From mboxrd@z Thu Jan 1 00:00:00 1970 From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov) Date: Fri, 20 Jul 2018 22:21:45 +0300 Subject: [PATCH] arm64: dts: renesas: r8a77980: add RWDT support In-Reply-To: <2368353.xfo5beGC5E@wasted.cogentembedded.com> References: <2368353.xfo5beGC5E@wasted.cogentembedded.com> Message-ID: <175a491f-a827-4a92-1884-2f1490d38a52@cogentembedded.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Describe RWDT in the R8A77980 SoC device tree. Enable RWDT on the Condor and V3H Starter Kit boards. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov --- The patch is against the 'renesas-devel-20180720-v4.18-rc5' of Simon Horman's 'renesas.git' repo. It depends on Geert Uytterhoeven's clock driver patches (adding the RWDT clock) in order to work... arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 5 +++++ arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts | 5 +++++ arch/arm64/boot/dts/renesas/r8a77980.dtsi | 10 ++++++++++ 3 files changed, 20 insertions(+) Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980-condor.dts +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts @@ -262,6 +262,11 @@ }; }; +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + &scif0 { pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; pinctrl-names = "default"; Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts @@ -191,6 +191,11 @@ }; }; +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + &scif0 { pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; pinctrl-names = "default"; Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -118,6 +118,16 @@ #size-cells = <2>; ranges; + rwdt: watchdog at e6020000 { + compatible = "renesas,r8a77980-wdt", + "renesas,rcar-gen3-wdt"; + reg = <0 0xe6020000 0 0x0c>; + clocks = <&cpg CPG_MOD 402>; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + resets = <&cpg 402>; + status = "disabled"; + }; + gpio0: gpio at e6050000 { compatible = "renesas,gpio-r8a77980", "renesas,rcar-gen3-gpio";