From: Stephen Boyd <sboyd@kernel.org>
To: "AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"Chen-Yu Tsai" <wenst@chromium.org>,
"Chun-Jie Chen" <chun-jie.chen@mediatek.com>,
"Daniel Golle" <daniel@makrotopia.org>,
"Ikjoon Jang" <ikjn@chromium.org>,
"Laura Nao" <laura.nao@collabora.com>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Michael Turquette" <mturquette@baylibre.com>,
"Nícolas F. R. A. Prado" <nfraprado@collabora.com>,
"Sam Shih" <sam.shih@mediatek.com>,
"Weiyi Lu" <weiyi.lu@mediatek.com>,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org
Subject: Re: [PATCH v2 2/3] clk: mediatek: mt8192: use MUX_CLR_SET
Date: Tue, 28 Apr 2026 19:06:11 -0700 [thread overview]
Message-ID: <177742837171.5403.15766311984942947032@localhost.localdomain> (raw)
In-Reply-To: <9667e8a7a0757f7fb9d6bb3fca105df97afd007b.1774499536.git.daniel@makrotopia.org>
Quoting Daniel Golle (2026-03-25 22:10:47)
> The mfg_pll_sel mux has neither a clock gate nor an update register,
> and upd_ofs is stored as u32, so the -1 truncates to 0xFFFFFFFF.
>
> While upd_shift being -1 (as s8) prevents the update path from
> executing at runtime, the bogus upd_ofs value is still stored in the
> struct.
>
> Use MUX_CLR_SET to avoid passing sentinel values to wrongly-typed
> fields.
>
> Fixes: 710573dee31b4 ("clk: mediatek: Add MT8192 basic clocks support")
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
Applied to clk-next
next prev parent reply other threads:[~2026-04-29 3:47 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-26 5:09 [PATCH v2 0/3] clk: mediatek: fix gate-less mux definitions Daniel Golle
2026-03-26 5:09 ` [PATCH v2 1/3] clk: mediatek: add MUX_CLR_SET macro Daniel Golle
2026-03-26 6:37 ` Chen-Yu Tsai
2026-04-29 2:06 ` Stephen Boyd
2026-03-26 5:10 ` [PATCH v2 2/3] clk: mediatek: mt8192: use MUX_CLR_SET Daniel Golle
2026-03-26 6:37 ` Chen-Yu Tsai
2026-04-29 2:06 ` Stephen Boyd [this message]
2026-03-26 5:11 ` [PATCH v2 3/3] clk: mediatek: mt7988: use MUX_CLR_SET for gate-less muxes Daniel Golle
2026-03-26 6:39 ` Chen-Yu Tsai
2026-04-29 2:06 ` Stephen Boyd
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