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Tue, 5 May 2026 09:02:57 -0500 Received: from DLEE200.ent.ti.com (157.170.170.75) by DLEE211.ent.ti.com (157.170.170.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 5 May 2026 09:02:56 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE200.ent.ti.com (157.170.170.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Tue, 5 May 2026 09:02:56 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 645E2ubE3108552; Tue, 5 May 2026 09:02:56 -0500 From: Nishanth Menon To: Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Thomas Richard (TI)" CC: Nishanth Menon , Thomas Petazzoni , , , , , , , Subject: Re: [PATCH v2] arm64: dts: ti: k3-j721s2-som-p0: add bootph-pre-ram property to PMIC-B Date: Tue, 5 May 2026 09:02:54 -0500 Message-ID: <177798976638.338258.10253070900100713533.b4-ty@b4> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20260429-k3-j721s2-som-bootph-pre-ram-pmic-4c-v2-1-31a0e7677216@bootlin.com> References: <20260429-k3-j721s2-som-bootph-pre-ram-pmic-4c-v2-1-31a0e7677216@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wtgPuNpAQD787eNUmauDJ2NFUdaPMb56dnX0Eg7uv6BRic5VQ19o+f7pYyUMv+l733fV+KB+cgFg3ANPhmA1s+k72k4p1bawJVIeGj5Thxwpy0b0FuwDW+fBK8Hs11KlKXi1+ZUP4fGQ4ZUY9GUSmkd+2dISbiTAmpmALKTo9DG9dExqj6z3Nuwyop5Dq3+93y1v6xRdjT/OcoctRJSzPIK4ImwAn1BHWJo75WF9joJfm6rPlWmwH3Dt6E3UPRcR5WrWI43pou/Q5d+UAGyoSAWx1ybqUGGwvfQOBpsZcebmvbyTicO62+SBnI0d3Z7DcB9QHYM1wXQUimwTtsTXg3cC9qWnrp9TEf3R/bJAUF/VpzgtYf8yJdg62glKQoH3bsWa2/gLVGiT2qY0gIb27MvLOOTJ/ePKXv5rafc/GDCa8gxGx/hkdF6sp8sx7mLy X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 14:02:59.4206 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f1511715-64c8-4f98-46cc-08deaaaf03ef X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.194];Helo=[lewvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR10MB5690 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260505_150307_442484_7287E3E2 X-CRM114-Status: GOOD ( 11.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Thomas Richard (TI), On Wed, 29 Apr 2026 14:19:48 +0200, Thomas Richard (TI) wrote: > On j721s2, PMIC-B is needed to exit the DDR from retention after > suspend-to-ram. Add bootph-pre-ram property to make PMIC-B available to > the bootloader in the phase that sets up the DDR. I have applied the following to branch ti-k3-dts-next on [1]. Thank you! [1/1] arm64: dts: ti: k3-j721s2-som-p0: add bootph-pre-ram property to PMIC-B commit: bd9fbe2781993259ea9241be7452e1355ceffb87 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D https://ti.com/opensource