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Thu, 21 May 2026 10:10:14 +0000 (UTC) Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH net v2 0/5] net: stmmac: eic7700: fix delay calculation and initialization ordering From: patchwork-bot+netdevbpf@kernel.org Message-Id: <177935821264.4013498.4647676520552839707.git-patchwork-notify@kernel.org> Date: Thu, 21 May 2026 10:10:12 +0000 References: <20260518021919.404-1-lizhi2@eswincomputing.com> In-Reply-To: <20260518021919.404-1-lizhi2@eswincomputing.com> To: =?utf-8?b?5p2O5b+XIDxsaXpoaTJAZXN3aW5jb21wdXRpbmcuY29tPg==?=@aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, rmk+kernel@armlinux.org.uk, maxime.chevallier@bootlin.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, pritesh.patel@einfochips.com, weishangjuan@eswincomputing.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260521_031003_865176_B5AB9C14 X-CRM114-Status: GOOD ( 11.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello: This series was applied to netdev/net.git (main) by Paolo Abeni : On Mon, 18 May 2026 10:19:19 +0800 you wrote: > From: Zhi Li > > v1 -> v2: > - Update eswin,eic7700-eth.yaml: > - Limit the binding changes to adding optional TXD and RXD delay register > offsets in eswin,hsp-sp-csr. > - Restore the original enum-based definitions for rx-internal-delay-ps > and tx-internal-delay-ps. > - Keep rx-internal-delay-ps and tx-internal-delay-ps as required > properties. > - Restore the original example content, with only the additional optional > TXD and RXD delay register offsets. > - Restore Acked-by from Conor Dooley for the binding change, which was > temporarily omitted in v1 during series restructuring and has been > reinstated now that the change is stable and properly isolated. > > [...] Here is the summary with links: - [net,v2,1/5] dt-bindings: ethernet: eswin: add optional TXD and RXD delay register offsets https://git.kernel.org/netdev/net/c/c36069c6f46c - [net,v2,2/5] net: stmmac: eswin: fix HSP CSR init ordering after clock enable https://git.kernel.org/netdev/net/c/23386defe949 - [net,v2,3/5] net: stmmac: eswin: clear TXD and RXD delay registers during initialization https://git.kernel.org/netdev/net/c/6872fb088edc - [net,v2,4/5] net: stmmac: eswin: correct RGMII delay granularity to 20 ps https://git.kernel.org/netdev/net/c/6ffcef9bc1fc - [net,v2,5/5] net: stmmac: eswin: validate RGMII delay values https://git.kernel.org/netdev/net/c/c2e152f7ce32 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html