From: Vinod Koul <vkoul@kernel.org>
To: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>,
Srinivas Neeli <srinivas.neeli@amd.com>
Cc: Frank Li <Frank.Li@kernel.org>,
Michal Simek <michal.simek@amd.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Suraj Gupta <suraj.gupta2@amd.com>,
Marek Vasut <marex@nabladev.com>,
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
Alex Bereza <alex@bereza.email>,
Folker Schwesinger <dev@folker-schwesinger.de>,
dmaengine@vger.kernel.org, netdev@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, git@amd.com
Subject: Re: (subset) [PATCH V6 0/4] dmaengine: xilinx_dma: MCDMA descriptor and metadata handling improvements
Date: Thu, 03 Sep 2026 22:35:06 +0530 [thread overview]
Message-ID: <178845510663.1711546.3081841181501985033.b4-ty@kernel.org> (raw)
In-Reply-To: <20260818174151.1608971-1-srinivas.neeli@amd.com>
On Tue, 18 Aug 2026 23:11:47 +0530, Srinivas Neeli wrote:
> This series improves the Xilinx AXI DMA and MCDMA driver's descriptor
> handling and metadata reporting. It fixes direction-specific descriptor
> field usage, ensures completion is based on the hardware completion bit
> (important with interrupt coalescing), and extends metadata handling to
> expose status and sideband fields alongside APP fields.
>
> The axienet driver is updated to derive RX frame length from the standard
> dmaengine residue mechanism rather than descriptor APP fields, making it
> work on designs where the AXI4-Stream status/control interface is not
> present.
>
> [...]
Applied, thanks!
[1/4] dmaengine: xilinx_dma: Fix MCDMA descriptor fields based on DMA direction
commit: c791d22ddd7b4940fa3c211b5ee7c5d4ce2d1dc3
[2/4] dmaengine: xilinx_dma: Move descriptors to done list based on completion bit
commit: 5af3ac5de34f9f7a4ae81c690d8dea5dcb523ab0
[4/4] dmaengine: xilinx_dma: Extend metadata handling for AXI DMA and MCDMA
commit: 37c44606eaac6f600fe2c602372bb02ef5ec0c53
Best regards,
--
~Vinod
prev parent reply other threads:[~2026-09-03 17:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-18 17:41 [PATCH V6 0/4] dmaengine: xilinx_dma: MCDMA descriptor and metadata handling improvements Srinivas Neeli
2026-08-18 17:41 ` [PATCH V6 1/4] dmaengine: xilinx_dma: Fix MCDMA descriptor fields based on DMA direction Srinivas Neeli
2026-08-18 18:57 ` Frank Li
2026-08-18 17:41 ` [PATCH V6 2/4] dmaengine: xilinx_dma: Move descriptors to done list based on completion bit Srinivas Neeli
2026-08-18 19:05 ` Frank Li
2026-08-18 17:41 ` [PATCH V6 3/4] net: xilinx: axienet: Derive RX frame length from residue in dmaengine path Srinivas Neeli
2026-08-18 17:41 ` [PATCH V6 4/4] dmaengine: xilinx_dma: Extend metadata handling for AXI DMA and MCDMA Srinivas Neeli
2026-08-18 19:15 ` Frank Li
2026-09-03 17:05 ` Vinod Koul [this message]
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