From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 460D1CF07BF for ; Thu, 10 Oct 2024 08:10:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:MIME-Version:Date:Message-ID:From:References:CC:To: Subject:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=cvzayg69NkU3kQwG3KnGiLgC5CfpBIoewThzMWbMn88=; b=ukAIMhRpmRut9nXVqxpEM9R4+E mW2FAMQmQxrVhXVSRYEdMV6AthGJ0fcR+tiM6yCKkBxjiL59rpY9vnh+RjcNJRqnTDvumtJispYmB sCfGDjzjJ9wnuH8cxxoRV7/7jW+HVysXd02ISJkSVv/WNsNavdTRf8C/ToxV2AbvG38Xpe8M3hsly N0PIbIPVX8uo2tfLwVUqNUn2uJzpGrhfncfSqoeXO3Creu7//rM7KDg28ySx3r8FXFpz3tpbKszHh fbZ9ql0+oA2vZmt+zoQ4Y2+z6gwG57nivTW6mgbsTSEXoVQFcVhORnmkAw4rdaS9c5L5L2QL3K129 y03TU66Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1syoFm-0000000Bux4-1xGM; Thu, 10 Oct 2024 08:10:34 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1synrR-0000000Brpj-3fUZ for linux-arm-kernel@bombadil.infradead.org; Thu, 10 Oct 2024 07:45:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:Content-Type :In-Reply-To:MIME-Version:Date:Message-ID:From:References:CC:To:Subject: Sender:Reply-To:Content-ID:Content-Description; bh=cvzayg69NkU3kQwG3KnGiLgC5CfpBIoewThzMWbMn88=; b=GM2EnXRWVn5T2pakeOiwmG7oZ/ i0Vk42GNY8BiudPOojE8lI1kFQ5zIRO0rJxlNHeYu1qhtKnADKGZH0QvXWsBIzm8ubJDf96Hxitbb Fej6QazeE08eFWPmPaU1pZalOvVaEt2bdfKJG6BI7E7q9SYVimZnGWRacRKo8fyTfD8ZabyyP1ulC roQzAc1Cxafpw9wxiFXHGBYV2q1/Qvd4WR/xg7LTK49O+gO7ZHI59okBQDrMSJsO18WutOtoeSpcH o+6qW8duI7ZH3HKmFU9TD+Ctw00PP+5vcPVXZFKUYO4DzUuzgShyJ4l/Q4wSbfGeATKqYUCe3UBE6 r2aw46AQ==; Received: from szxga02-in.huawei.com ([45.249.212.188]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1synrN-00000005E3n-3ifF for linux-arm-kernel@lists.infradead.org; Thu, 10 Oct 2024 07:45:24 +0000 Received: from mail.maildlp.com (unknown [172.19.163.174]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4XPMDQ21KDzfdCy; Thu, 10 Oct 2024 15:42:46 +0800 (CST) Received: from dggpemf500002.china.huawei.com (unknown [7.185.36.57]) by mail.maildlp.com (Postfix) with ESMTPS id 700BB1400D8; Thu, 10 Oct 2024 15:45:10 +0800 (CST) Received: from [10.174.178.247] (10.174.178.247) by dggpemf500002.china.huawei.com (7.185.36.57) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Thu, 10 Oct 2024 15:45:09 +0800 Subject: Re: [PATCH v3 3/9] ACPI/IORT: Support CANWBS memory access flag To: Jason Gunthorpe , , , Joerg Roedel , Kevin Tian , , Len Brown , , , Lorenzo Pieralisi , "Rafael J. Wysocki" , Robert Moore , Robin Murphy , Sudeep Holla , Will Deacon CC: Alex Williamson , Eric Auger , Jean-Philippe Brucker , Moritz Fischer , Michael Shavit , Nicolin Chen , , "Rafael J. Wysocki" , Shameerali Kolothum Thodi , Mostafa Saleh References: <3-v3-e2e16cd7467f+2a6a1-smmuv3_nesting_jgg@nvidia.com> From: Hanjun Guo Message-ID: <180134a4-051e-3a92-1652-0c3c53ffd6fa@huawei.com> Date: Thu, 10 Oct 2024 15:45:08 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <3-v3-e2e16cd7467f+2a6a1-smmuv3_nesting_jgg@nvidia.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit X-Originating-IP: [10.174.178.247] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To dggpemf500002.china.huawei.com (7.185.36.57) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241010_084522_470356_2BCC83A7 X-CRM114-Status: GOOD ( 16.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2024/10/10 0:23, Jason Gunthorpe wrote: > From: Nicolin Chen > > The IORT spec, Issue E.f (April 2024), adds a new CANWBS bit to the Memory > Access Flag field in the Memory Access Properties table, mainly for a PCI > Root Complex. > > This CANWBS defines the coherency of memory accesses to be not marked IOWB > cacheable/shareable. Its value further implies the coherency impact from a > pair of mismatched memory attributes (e.g. in a nested translation case): > 0x0: Use of mismatched memory attributes for accesses made by this > device may lead to a loss of coherency. > 0x1: Coherency of accesses made by this device to locations in > Conventional memory are ensured as follows, even if the memory > attributes for the accesses presented by the device or provided by > the SMMU are different from Inner and Outer Write-back cacheable, > Shareable. > > Note that the loss of coherency on a CANWBS-unsupported HW typically could > occur to an SMMU that doesn't implement the S2FWB feature where additional > cache flush operations would be required to prevent that from happening. > > Add a new ACPI_IORT_MF_CANWBS flag and set IOMMU_FWSPEC_PCI_RC_CANWBS upon > the presence of this new flag. > > CANWBS and S2FWB are similar features, in that they both guarantee the VM > can not violate coherency, however S2FWB can be bypassed by PCI No Snoop > TLPs, while CANWBS cannot. Thus CANWBS meets the requirements to set > IOMMU_CAP_ENFORCE_CACHE_COHERENCY. > > Architecturally ARM has expected that VFIO would disable No Snoop through > PCI Config space, if this is done then the two would have the same > protections. Acked-by: Hanjun Guo Thanks Hanjun