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[86.58.32.107]) by smtp.gmail.com with ESMTPSA id d2-20020a170906040200b006e84213fdffsm2921083eja.201.2022.04.24.13.02.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Apr 2022 13:02:10 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Chen-Yu Tsai , Maxime Ripard , Samuel Holland Cc: Samuel Holland , Daniel Vetter , David Airlie , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: Re: [PATCH v3 10/14] drm/sun4i: csc: Add support for the new MMIO layout Date: Sun, 24 Apr 2022 22:02:09 +0200 Message-ID: <1814351.tdWV9SEqCh@kista> In-Reply-To: <20220424162633.12369-11-samuel@sholland.org> References: <20220424162633.12369-1-samuel@sholland.org> <20220424162633.12369-11-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220424_130215_290625_018962B1 X-CRM114-Status: GOOD ( 25.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Dne nedelja, 24. april 2022 ob 18:26:28 CEST je Samuel Holland napisal(a): > D1 changes the MMIO offsets for the CSC blocks in the first mixer. The > mixers' ccsc property is used as an index into the ccsc_base array. Use > an enumeration to describe this index, and add the new set of offsets. > > Signed-off-by: Samuel Holland Reviewed-by: Jernej Skrabec Best regards, Jernej Skrabec > --- > > (no changes since v2) > > Changes in v2: > - Use an enumeration for the ccsc value. > > drivers/gpu/drm/sun4i/sun8i_csc.c | 7 ++++--- > drivers/gpu/drm/sun4i/sun8i_csc.h | 1 + > drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 +++++++++--------- > drivers/gpu/drm/sun4i/sun8i_mixer.h | 14 ++++++++++---- > 4 files changed, 24 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/ sun8i_csc.c > index 9bd62de0c288..58480d8e4f70 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_csc.c > +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c > @@ -8,9 +8,10 @@ > #include "sun8i_csc.h" > #include "sun8i_mixer.h" > > -static const u32 ccsc_base[2][2] = { > - {CCSC00_OFFSET, CCSC01_OFFSET}, > - {CCSC10_OFFSET, CCSC11_OFFSET}, > +static const u32 ccsc_base[][2] = { > + [CCSC_MIXER0_LAYOUT] = {CCSC00_OFFSET, CCSC01_OFFSET}, > + [CCSC_MIXER1_LAYOUT] = {CCSC10_OFFSET, CCSC11_OFFSET}, > + [CCSC_D1_MIXER0_LAYOUT] = {CCSC00_OFFSET, CCSC01_D1_OFFSET}, > }; > > /* > diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/ sun8i_csc.h > index 022cafa6c06c..828b86fd0cab 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_csc.h > +++ b/drivers/gpu/drm/sun4i/sun8i_csc.h > @@ -13,6 +13,7 @@ struct sun8i_mixer; > /* VI channel CSC units offsets */ > #define CCSC00_OFFSET 0xAA050 > #define CCSC01_OFFSET 0xFA050 > +#define CCSC01_D1_OFFSET 0xFA000 > #define CCSC10_OFFSET 0xA0000 > #define CCSC11_OFFSET 0xF0000 > > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/ sun8i_mixer.c > index 6b1711a9a71f..4ce593c99807 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c > @@ -564,7 +564,7 @@ static int sun8i_mixer_remove(struct platform_device *pdev) > } > > static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = { > - .ccsc = 0, > + .ccsc = CCSC_MIXER0_LAYOUT, > .scaler_mask = 0xf, > .scanline_yuv = 2048, > .ui_num = 3, > @@ -572,7 +572,7 @@ static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = { > }; > > static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = { > - .ccsc = 1, > + .ccsc = CCSC_MIXER1_LAYOUT, > .scaler_mask = 0x3, > .scanline_yuv = 2048, > .ui_num = 1, > @@ -580,7 +580,7 @@ static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = { > }; > > static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { > - .ccsc = 0, > + .ccsc = CCSC_MIXER0_LAYOUT, > .mod_rate = 432000000, > .scaler_mask = 0xf, > .scanline_yuv = 2048, > @@ -589,7 +589,7 @@ static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { > }; > > static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = { > - .ccsc = 0, > + .ccsc = CCSC_MIXER0_LAYOUT, > .mod_rate = 297000000, > .scaler_mask = 0xf, > .scanline_yuv = 2048, > @@ -598,7 +598,7 @@ static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = { > }; > > static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = { > - .ccsc = 1, > + .ccsc = CCSC_MIXER1_LAYOUT, > .mod_rate = 297000000, > .scaler_mask = 0x3, > .scanline_yuv = 2048, > @@ -611,12 +611,12 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { > .ui_num = 1, > .scaler_mask = 0x3, > .scanline_yuv = 2048, > - .ccsc = 0, > + .ccsc = CCSC_MIXER0_LAYOUT, > .mod_rate = 150000000, > }; > > static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = { > - .ccsc = 0, > + .ccsc = CCSC_MIXER0_LAYOUT, > .mod_rate = 297000000, > .scaler_mask = 0xf, > .scanline_yuv = 4096, > @@ -625,7 +625,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = { > }; > > static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { > - .ccsc = 1, > + .ccsc = CCSC_MIXER1_LAYOUT, > .mod_rate = 297000000, > .scaler_mask = 0x3, > .scanline_yuv = 2048, > @@ -634,7 +634,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { > }; > > static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { > - .ccsc = 0, > + .ccsc = CCSC_MIXER0_LAYOUT, > .is_de3 = true, > .mod_rate = 600000000, > .scaler_mask = 0xf, > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/ sun8i_mixer.h > index 5b3fbee18671..85c94884fb9a 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h > @@ -141,6 +141,15 @@ > #define SUN50I_MIXER_CDC0_EN 0xd0000 > #define SUN50I_MIXER_CDC1_EN 0xd8000 > > +enum { > + /* First mixer or second mixer with VEP support. */ > + CCSC_MIXER0_LAYOUT, > + /* Second mixer without VEP support. */ > + CCSC_MIXER1_LAYOUT, > + /* First mixer with the MMIO layout found in the D1 SoC. */ > + CCSC_D1_MIXER0_LAYOUT, > +}; > + > /** > * struct sun8i_mixer_cfg - mixer HW configuration > * @vi_num: number of VI channels > @@ -149,10 +158,7 @@ > * First, scaler supports for VI channels is defined and after that, scaler > * support for UI channels. For example, if mixer has 2 VI channels without > * scaler and 2 UI channels with scaler, bitmask would be 0xC. > - * @ccsc: select set of CCSC base addresses > - * Set value to 0 if this is first mixer or second mixer with VEP support. > - * Set value to 1 if this is second mixer without VEP support. Other values > - * are invalid. > + * @ccsc: select set of CCSC base addresses from the enumeration above. > * @mod_rate: module clock rate that needs to be set in order to have > * a functional block. > * @is_de3: true, if this is next gen display engine 3.0, false otherwise. > -- > 2.35.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel