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Fri, 11 Jul 2025 09:52:26 +0000 (GMT) From: "Devang Tailor" To: "'Krzysztof Kozlowski'" Cc: , , , , , , , , , , In-Reply-To: <20250711-shapeless-adorable-lobster-d2efbf@krzk-bin> Subject: RE: [PATCH v2 2/3] rtc: s3c: support for exynosautov9 on-chip RTC Date: Fri, 11 Jul 2025 15:22:25 +0530 Message-ID: <188001dbf249$831afd00$8950f700$@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQMc6yo9jRPgA4nZ2IiZrgLtyBFMygKSVtdMAw5/R1ICPLNBmLFr0ApA Content-Language: en-in X-CMS-MailID: 20250711095228epcas5p11af898a023698a922eb59ddbbffaa176 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250710082536epcas5p4f9dcd50ff474066562b2cbd40199d2d9 References: <20250710083434.1821671-1-dev.tailor@samsung.com> <20250710083434.1821671-3-dev.tailor@samsung.com> <20250711-shapeless-adorable-lobster-d2efbf@krzk-bin> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250711_025711_864269_1DA7E91D X-CRM114-Status: GOOD ( 23.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Krzysztof, > -----Original Message----- > From: Krzysztof Kozlowski > Sent: 11 July 2025 12:51 > To: Devang Tailor > Cc: robh=40kernel.org; krzk+dt=40kernel.org; conor+dt=40kernel.org; > alim.akhtar=40samsung.com; alexandre.belloni=40bootlin.com; > devicetree=40vger.kernel.org; linux-arm-kernel=40lists.infradead.org; lin= ux- > samsung-soc=40vger.kernel.org; linux-kernel=40vger.kernel.org; linux- > rtc=40vger.kernel.org; faraz.ata=40samsung.com > Subject: Re: =5BPATCH v2 2/3=5D rtc: s3c: support for exynosautov9 on-chi= p RTC >=20 > On Thu, Jul 10, 2025 at 02:04:33PM +0530, Devang Tailor wrote: > > The on-chip RTC of this SoC is almost similar to the previous versions > > of SoC. Hence re-use the existing driver with platform specific change > > to enable RTC. > > > > This has been tested with 'hwclock' & 'date' utilities > > > > Signed-off-by: Devang Tailor > > --- > > drivers/rtc/rtc-s3c.c =7C 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index > > 5dd575865adf..8db24b6360b8 100644 > > --- a/drivers/rtc/rtc-s3c.c > > +++ b/drivers/rtc/rtc-s3c.c > > =40=40 -384,6 +384,15 =40=40 static void s3c6410_rtc_disable(struct s3c= _rtc > *info) > > writew(con, info->base + S3C2410_RTCCON); =7D > > > > +static void exynosautov9_rtc_disable(struct s3c_rtc *info) =7B > > + unsigned int con; > > + > > + con =3D readb(info->base + S3C2410_RTCCON); > > + con &=3D =7ES3C2410_RTCCON_RTCEN; > > + writeb(con, info->base + S3C2410_RTCCON); =7D >=20 > Looks a lot like s3c24xx_rtc_disable()... >=20 > Anyway, if you keep ignoring the review, no point to provide reviews here= . >=20 I have removed the redundant code I had added in V1 considering your review= comment for asymmetry code. s3c24xx_rtc_disable() & s3c6410_rtc_disable() updates additional bit, which= is not valid for ExynosAutov9 (only RTCCON=5B4:0=5D are valid), hence I ad= ded this and mentioned in V2 cover letter as well. Please let me know if I am missing anything. > Best regards, > Krzysztof