From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B43EC3DA7F for ; Thu, 8 Aug 2024 02:03:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:MIME-Version: Content-Transfer-Encoding:Content-Type:References:In-Reply-To:Date:Cc:To:From :Subject:Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xeBzGU5DTBwHDca/OreT1bQLesgiFRjH3NSbGQuJpLs=; b=joebIz5ly5M/zdcvYT8pW2L4OW t82wdaNnecfC9VMzQcysUG1NGay+4XKeAHq9CFxWmlnROJD9G2SmXJVUVkQt7eMIFG9sGSsv1l6gc S+/on3+mz7FbrQ+95QPAk8NJflgdDk6qIn7rEyG0l/HhbT0QwXkzUth/L/1hE/kxE4y4dI2ykdBKV /veNAGHw7Omcy+dDQ3p2YvPFZxghwAjlnW7bcM9u6F5dGpg11S2x4zSIm8r2pCKmSFVFKRL2gK7CS tB5+JpPMD4rKspvnD8Zwnr2bXyKzpAgCryR9mSwudjpDmY/u2zcdW1Wb+wZrWgUpbr502Aa5fb8w1 BfHDZPmg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sbsUM-00000006mVU-0Tw0; Thu, 08 Aug 2024 02:02:50 +0000 Received: from pi.codeconstruct.com.au ([203.29.241.158] helo=codeconstruct.com.au) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sbsTn-00000006mQw-1146 for linux-arm-kernel@lists.infradead.org; Thu, 08 Aug 2024 02:02:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=codeconstruct.com.au; s=2022a; t=1723082527; bh=xeBzGU5DTBwHDca/OreT1bQLesgiFRjH3NSbGQuJpLs=; h=Subject:From:To:Cc:Date:In-Reply-To:References; b=hbNSVSS8FuAodoVkZ0Ir/7WxJyNLX++H51FwksLk0g2vg35TWCVxko2msf1QFIE9G VVKVkTt1P+rlM5gSWQP33zTNY2wAxqHrqHobycDEKBTQq42NPHVEmcNzLD2IXJu5M9 mwlJskVx3MisbQexHG4i9Lf/2WMPMtelC+INwEG3w81LgGZxJmXP/VJQxjlscmowxD FFKyLTXRjooNTBBg3udS7FIZY2n6bkQrOYCgO4yjgvZu5+tsVlWcNxNjnhUbRhL/Bo /ok4e7iWt5adUfNSZGoFnXOADNXDAkTmCqfM04ZyZmcquee6JOzQmAvrdWTMc7lK7w 8WUuvlc1c6qKQ== Received: from [192.168.68.112] (203-57-213-111.dyn.iinet.net.au [203.57.213.111]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 09C95656AB; Thu, 8 Aug 2024 10:02:04 +0800 (AWST) Message-ID: <18a932d777d1b3b86af15e80af82b50d2189872f.camel@codeconstruct.com.au> Subject: Re: [PATCH 1/2] dt-bindings: interrupt-controller: aspeed,ast2400-vic: Convert to DT schema From: Andrew Jeffery To: Krzysztof Kozlowski , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org Date: Thu, 08 Aug 2024 11:32:04 +0930 In-Reply-To: References: <20240802-dt-warnings-irq-aspeed-dt-schema-v1-0-8cd4266d2094@codeconstruct.com.au> <20240802-dt-warnings-irq-aspeed-dt-schema-v1-1-8cd4266d2094@codeconstruct.com.au> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4-2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240807_190215_692621_834BAC7B X-CRM114-Status: GOOD ( 19.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 2024-08-06 at 08:07 +0200, Krzysztof Kozlowski wrote: > On 02/08/2024 07:36, Andrew Jeffery wrote: > > Squash warnings such as: > >=20 > > arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: /ahb/in= terrupt-controller@1e6c0080: failed to match any schema with compatible: ['= aspeed,ast2400-vic'] > >=20 > > The YAML DT schema defines an optional property, valid-sources, which > > was not previously described in the prose binding. It is added to > > document existing practice in the Aspeed devicetrees. Unfortunately > > the property seems to predate the requirement that vendor-specific > > properties be prefixed. > >=20 > > Signed-off-by: Andrew Jeffery >=20 >=20 > > + > > +description: > > + The AST2400 and AST2500 SoC families include a legacy register layou= t before > > + a redesigned layout, but the bindings do not prescribe the use of on= e or the > > + other. > > + > > +properties: > > + compatible: > > + enum: > > + - aspeed,ast2400-vic > > + - aspeed,ast2500-vic > > + > > + interrupt-controller: true > > + > > + "#interrupt-cells": > > + const: 1 > > + description: > > + Specifies the number of cells needed to encode an interrupt sour= ce. It > > + must be 1 as the VIC has no configuration options for interrupt = sources. > > + The single cell defines the interrupt number. > > + > > + valid-sources: > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > + description: > > + One cell, bitmap of support sources for the implementation. >=20 > maxItems: 2 Ack. > What does "one cell" mean? uint32? DTS has two items. Hah, I think that was a process error :) Two is correct here. I'll rework the description. >=20 > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 >=20 > Is this correct? DTS does not have parent interrupt controller for this > device. I'll removed it, it's not necessary. >=20 > > + > > +required: > > + - compatible > > + - reg > > + - interrupt-controller > > + - "#interrupt-cells" > > + > > +allOf: > > + - $ref: /schemas/interrupt-controller.yaml > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + interrupt-controller@1e6c0080 { > > + compatible =3D "aspeed,ast2400-vic"; > > + reg =3D <0x1e6c0080 0x80>; > > + interrupt-controller; > > + #interrupt-cells =3D <1>; >=20 > Make the example complete - add valid-sources interupts. >=20 Ack. Thanks for the review. Andrew