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[178.79.73.218]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429952b7b6fsm15648567f8f.1.2025.10.27.11.01.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Oct 2025 11:01:42 -0700 (PDT) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: iuncuim , Rob Herring Cc: Vasily Khoruzhick , Yangtao Li , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Philipp Zabel , Andre Przywara , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/6] dt-bindings: thermal: sun8i: Add A523 THS0/1 controllers Date: Mon, 27 Oct 2025 19:01:40 +0100 Message-ID: <1935223.tdWV9SEqCh@jernej-laptop> In-Reply-To: <20251026210905.GA2941518-robh@kernel.org> References: <20251025043129.160454-1-iuncuim@gmail.com> <20251025043129.160454-2-iuncuim@gmail.com> <20251026210905.GA2941518-robh@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251027_110144_679039_0A66FAFB X-CRM114-Status: GOOD ( 20.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Dne nedelja, 26. oktober 2025 ob 22:09:05 Srednjeevropski standardni =C4=8D= as je Rob Herring napisal(a): > On Sat, Oct 25, 2025 at 12:31:24PM +0800, iuncuim wrote: > > From: Mikhail Kalashnikov > >=20 > > Add a binding for D1/T113s thermal sensor controller. Add dt-bindings > > description of the thermal sensors in the A523 processor. > > The controllers require activation of the additional frequency of the > > associated gpadc controller, so a new clock property has been added. > >=20 > > The calibration data is split into two cells that are in different areas > > of nvmem. Both controllers require access to both memory cell, so a new > > property nvmem-cells has been added. To maintain backward compatibility, > > the name of the old cell remains the same and the new nvmem-cell-names = is > > called calibration-second-part > >=20 > > Signed-off-by: Mikhail Kalashnikov > > --- > > .../thermal/allwinner,sun8i-a83t-ths.yaml | 56 ++++++++++++++++++- > > 1 file changed, 53 insertions(+), 3 deletions(-) > >=20 > > diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-= a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a= 83t-ths.yaml > > index 3e61689f6..b2f750ef2 100644 > > --- a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-th= s.yaml > > +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-th= s.yaml > > @@ -24,18 +24,23 @@ properties: > > - allwinner,sun50i-h5-ths > > - allwinner,sun50i-h6-ths > > - allwinner,sun50i-h616-ths > > + - allwinner,sun55i-a523-ths0 > > + - allwinner,sun55i-a523-ths1 > > =20 > > clocks: > > minItems: 1 > > items: > > - description: Bus Clock > > - description: Module Clock > > + - description: GPADC Clock > > =20 > > clock-names: > > minItems: 1 > > + maxItems: 2 >=20 > How can the max be both 2 and... >=20 > > items: > > - const: bus > > - const: mod > > + - const: gpadc >=20 > ...3 entries? >=20 Because old variant uses "bus" and "mod" and new variant uses "bus" and "gpadc" and none of them uses all 3 entries. Although, I guess we can simplify and just use "mod" in both cases. Best regards, Jernej