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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j8kUi-00078Q-IQ; Mon, 02 Mar 2020 12:48:24 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j8kUe-00077A-Qs for linux-arm-kernel@lists.infradead.org; Mon, 02 Mar 2020 12:48:22 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CF5B22F; Mon, 2 Mar 2020 04:48:19 -0800 (PST) Received: from [10.163.1.6] (unknown [10.163.1.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9181E3F534; Mon, 2 Mar 2020 04:48:16 -0800 (PST) Subject: Re: [PATCH 1/2] arm64: ptrauth: add pointer authentication Armv8.6 enhanced feature To: Will Deacon , Mark Rutland References: <1582117240-15330-1-git-send-email-amit.kachhap@arm.com> <1582117240-15330-2-git-send-email-amit.kachhap@arm.com> <20200228115736.GA3275@willie-the-truck> <20200228120314.GD36089@lakrids.cambridge.arm.com> <20200228122345.GC3275@willie-the-truck> From: Amit Kachhap Message-ID: <194f0008-4071-b143-f326-2f067e3b82fe@arm.com> Date: Mon, 2 Mar 2020 18:18:17 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <20200228122345.GC3275@willie-the-truck> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200302_044820_960330_3BCCCED9 X-CRM114-Status: GOOD ( 18.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kees Cook , Suzuki K Poulose , Catalin Marinas , Kristina Martsenko , Mark Brown , James Morse , Vincenzo Frascino , Dave Martin , linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Will, On 2/28/20 5:53 PM, Will Deacon wrote: > On Fri, Feb 28, 2020 at 12:03:14PM +0000, Mark Rutland wrote: >> On Fri, Feb 28, 2020 at 11:57:37AM +0000, Will Deacon wrote: >>> On Wed, Feb 19, 2020 at 06:30:39PM +0530, Amit Daniel Kachhap wrote: >>>> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c >>>> index 8d1c979..a4f8adb 100644 >>>> --- a/arch/arm64/kernel/cpufeature.c >>>> +++ b/arch/arm64/kernel/cpufeature.c >>>> @@ -154,9 +154,9 @@ static const struct arm64_ftr_bits ftr_id_aa64isar1[] = { >>>> ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_FCMA_SHIFT, 4, 0), >>>> ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_JSCVT_SHIFT, 4, 0), >>>> ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), >>>> - FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_API_SHIFT, 4, 0), >>>> + FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_API_SHIFT, 4, 0), >>>> ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), >>>> - FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_APA_SHIFT, 4, 0), >>>> + FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_APA_SHIFT, 4, 0), >>>> ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_DPB_SHIFT, 4, 0), >>>> ARM64_FTR_END, >>> >>> Hmm. This is a user-visible change and should probably be in its own patch. >>> It also means we will no longer advertise PAC on systems where not all of >>> the cores have "Enhanced PAC"; is that really necessary? >> >> It matters for KVM, since a guest won't expect the enhanced PAC trap if >> the ID registers say it does not have it. >> >> For userspace, the difference is it'll get a SIGILL on the AUT* >> instruction rather than a SIGSEGV when using the result of the AUT* >> instruction. > > Yes, if PAC is enabled. > >>> Generally we rely on incremental updates to unsigned ID register fields >>> being a superset (i.e. compatible with) the old behaviour. If that's not >>> the case here, then older kernels are broken and we may need new HWCAPs. >> >> In this case, the behaviour isn't a strict superset. Enhanced PAC >> unconditionally changed the behaviour of AUT* (i.e. there's no opt-in >> with a control bit), but it's not clear to me how much this matters for >> userspace. > > Doesn't that violate D13.1.3 "Principles of the ID scheme for fields in > ID registers"? > > The part I dislike is that older kernels will happily advertise PAC to > userspace on a system with mismatched legacy/enhanced PAC, and so the > change above doesn't make sense for userspace because the HWCAPs are > already unreliable. How to got about it? Shall I send this part as a separate fix patch mentioning the requirement for doing it? //Amit > > Will > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel