From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Marc Zyngier <maz@kernel.org>,
jhugo@codeaurora.org, Catalin Marinas <catalin.marinas@arm.com>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
Douglas Anderson <dianders@chromium.org>,
Matthias Kaehlcke <mka@chromium.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Andre Przywara <andre.przywara@arm.com>,
James Morse <james.morse@arm.com>,
Stephen Boyd <swboyd@chromium.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
Date: Thu, 16 Jan 2020 21:41:50 +0530 [thread overview]
Message-ID: <1a3f9557fa52ce2528630434e9a49d98@codeaurora.org> (raw)
In-Reply-To: <20200116153235.GA18909@willie-the-truck>
Hi Will,
On 2020-01-16 21:02, Will Deacon wrote:
> [+Jeffrey]
>
> On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
>> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
>> are not affected by Spectre variant 2. Add them to spectre_v2
>> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
>> vulnerability sysfs value.
>>
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>> arch/arm64/include/asm/cputype.h | 6 ++++++
>> arch/arm64/kernel/cpu_errata.c | 3 +++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/cputype.h
>> b/arch/arm64/include/asm/cputype.h
>> index aca07c2f6e6e..7219cddeba66 100644
>> --- a/arch/arm64/include/asm/cputype.h
>> +++ b/arch/arm64/include/asm/cputype.h
>> @@ -85,6 +85,9 @@
>> #define QCOM_CPU_PART_FALKOR_V1 0x800
>> #define QCOM_CPU_PART_FALKOR 0xC00
>> #define QCOM_CPU_PART_KRYO 0x200
>> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
>> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
>> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
>
> Jeffrey is the only person I know who understands the CPU naming here,
> so
> I've added him in case this needs either renaming or extending to cover
> other CPUs. I wouldn't be at all surprised if we need a function call
> rather than a bunch of table entries...
>
> That said, the internet claims that KRYO4XX gold is based on
> Cortex-A76,
> and so CSV2 should be set...
>
Yes the internet claims are true and CSV2 is set. SANITY check logs in
here show ID_PFR0_EL1 - https://lore.kernel.org/patchwork/patch/1138457/
Thanks,
Sai
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next prev parent reply other threads:[~2020-01-16 16:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-16 14:19 [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list Sai Prakash Ranjan
2020-01-16 15:32 ` Will Deacon
2020-01-16 15:42 ` Jeffrey Hugo
2020-01-16 15:57 ` Sai Prakash Ranjan
2020-01-16 16:11 ` Sai Prakash Ranjan [this message]
2020-01-16 18:27 ` Doug Anderson
2020-01-16 18:31 ` Will Deacon
2020-01-16 20:04 ` Sai Prakash Ranjan
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