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Thu, 12 Mar 2020 12:05:06 +0000 MIME-Version: 1.0 Date: Thu, 12 Mar 2020 12:05:05 +0000 From: Marc Zyngier To: Zenghui Yu Subject: Re: [PATCH v5 01/23] irqchip/gic-v3: Use SGIs without active state if offered In-Reply-To: <51b2c74fdbcca049cc01be6d78c7c693@kernel.org> References: <20200304203330.4967-1-maz@kernel.org> <20200304203330.4967-2-maz@kernel.org> <63f6530a-9369-31e6-88d0-5337173495b9@huawei.com> <51b2c74fdbcca049cc01be6d78c7c693@kernel.org> Message-ID: <1bff1835ba7d6e22edb836d38cf16a14@kernel.org> X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/1.3.10 X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: yuzenghui@huawei.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, lorenzo.pieralisi@arm.com, jason@lakedaemon.net, rrichter@marvell.com, tglx@linutronix.de, eric.auger@redhat.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200312_050508_441014_AC5DD8AF X-CRM114-Status: GOOD ( 15.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Jason Cooper , kvm@vger.kernel.org, Suzuki K Poulose , linux-kernel@vger.kernel.org, Eric Auger , Robert Richter , James Morse , Julien Thierry , Thomas Gleixner , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-03-12 09:28, Marc Zyngier wrote: > Hi Zenghui, > > On 2020-03-12 06:30, Zenghui Yu wrote: >> Hi Marc, >> >> On 2020/3/5 4:33, Marc Zyngier wrote: >>> To allow the direct injection of SGIs into a guest, the GICv4.1 >>> architecture has to sacrifice the Active state so that SGIs look >>> a lot like LPIs (they are injected by the same mechanism). >>> >>> In order not to break existing software, the architecture gives >>> offers guests OSs the choice: SGIs with or without an active >>> state. It is the hypervisors duty to honor the guest's choice. >>> >>> For this, the architecture offers a discovery bit indicating whether >>> the GIC supports GICv4.1 SGIs (GICD_TYPER2.nASSGIcap), and another >>> bit indicating whether the guest wants Active-less SGIs or not >>> (controlled by GICD_CTLR.nASSGIreq). >> >> I still can't find the description of these two bits in IHI0069F. >> Are they actually architected and will be available in the future >> version of the spec? I want to confirm it again since this has a >> great impact on the KVM code, any pointers? > > Damn. The bits *are* in the engineering spec version 19 (unfortunately > not a public document, but I believe you should have access to it). > > If the bits have effectively been removed from the spec, I'll drop the > GICv4.1 code from the 5.7 queue until we find a way to achieve the same > level of support. > > I've emailed people inside ARM to find out. I've now had written confirmation that the bits are still there. It is just that the current revision of the documentation was cut *before* they made it into the architecture (there seem to be a 6 month delay between the architecture being sampled and the documentation being released). M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel