From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67DE2C4360F for ; Thu, 4 Apr 2019 09:17:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3348B20820 for ; Thu, 4 Apr 2019 09:17:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Xw4DAz7V" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3348B20820 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TraARnBUEersa3SApWt1HV09RIuyixOVZXpJOM6wXSs=; b=Xw4DAz7V1XHukL 70PKGS/YLJvgqF4gJtmGadRNKHTw0zxGfVEuOaPthhtZ9psnik02ID9YMBbzAfK8OyXDIe6I1eXzi zC4tbEksQ3fjNB0OdY5SsCKVmoyZlYTOgoBhFIkuz7aYi7yNwJMDRy5HM/KoVvv6SkqeVf6cHldYg 8rIYj1g6PySkN9s29QMuQqm+5mKT+Ybexgp+cymHVgsOGO2AHjPfCCNMPrbtXKr+FdoGzeSGWDM/W XYX+AJNtWipE8bcBUp7aBi6xU79HMFB0UZQqpkVH3nq2PltGZD1ALbR4vheTTsPrbyNKQAkjv2v6c 42tDwvn1JNDgU8Y42fXw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hByUZ-0003WA-3W; Thu, 04 Apr 2019 09:17:03 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hByUQ-0003L6-7C for linux-arm-kernel@lists.infradead.org; Thu, 04 Apr 2019 09:16:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D54E8168F; Thu, 4 Apr 2019 02:16:53 -0700 (PDT) Received: from [10.1.196.69] (e112269-lin.cambridge.arm.com [10.1.196.69]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 757D73F557; Thu, 4 Apr 2019 02:16:50 -0700 (PDT) Subject: Re: [PATCH 2/6] arm64/mm: Enable memory hot remove To: Anshuman Khandual , Logan Gunthorpe , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, akpm@linux-foundation.org, will.deacon@arm.com, catalin.marinas@arm.com References: <1554265806-11501-1-git-send-email-anshuman.khandual@arm.com> <1554265806-11501-3-git-send-email-anshuman.khandual@arm.com> <45afb99f-5785-4048-a748-4e0f06b06b31@arm.com> From: Steven Price Message-ID: <1d1d69d1-06e6-f429-f22b-00ca922a314d@arm.com> Date: Thu, 4 Apr 2019 10:16:48 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <45afb99f-5785-4048-a748-4e0f06b06b31@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190404_021654_267378_A57CAED9 X-CRM114-Status: GOOD ( 17.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, mhocko@suse.com, david@redhat.com, mgorman@techsingularity.net, pasha.tatashin@oracle.com, Stephen Bates , cai@lca.pw, cpandya@codeaurora.org, james.morse@arm.com, dan.j.williams@intel.com, robin.murphy@arm.com, arunks@codeaurora.org, osalvador@suse.de Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 04/04/2019 08:07, Anshuman Khandual wrote: > > > On 04/03/2019 11:02 PM, Logan Gunthorpe wrote: >> >> >> On 2019-04-02 10:30 p.m., Anshuman Khandual wrote: >>> Memory removal from an arch perspective involves tearing down two different >>> kernel based mappings i.e vmemmap and linear while releasing related page >>> table pages allocated for the physical memory range to be removed. >>> >>> Define a common kernel page table tear down helper remove_pagetable() which >>> can be used to unmap given kernel virtual address range. In effect it can >>> tear down both vmemap or kernel linear mappings. This new helper is called >>> from both vmemamp_free() and ___remove_pgd_mapping() during memory removal. >>> The argument 'direct' here identifies kernel linear mappings. >>> >>> Vmemmap mappings page table pages are allocated through sparse mem helper >>> functions like vmemmap_alloc_block() which does not cycle the pages through >>> pgtable_page_ctor() constructs. Hence while removing it skips corresponding >>> destructor construct pgtable_page_dtor(). >>> >>> While here update arch_add_mempory() to handle __add_pages() failures by >>> just unmapping recently added kernel linear mapping. Now enable memory hot >>> remove on arm64 platforms by default with ARCH_ENABLE_MEMORY_HOTREMOVE. >>> >>> This implementation is overall inspired from kernel page table tear down >>> procedure on X86 architecture. >> >> I've been working on very similar things for RISC-V. In fact, I'm >> currently in progress on a very similar stripped down version of >> remove_pagetable(). (Though I'm fairly certain I've done a bunch of >> stuff wrong.) >> >> Would it be possible to move this work into common code that can be used >> by all arches? Seems like, to start, we should be able to support both >> arm64 and RISC-V... and maybe even x86 too. >> >> I'd be happy to help integrate and test such functions in RISC-V. > > Sure that will be great. The only impediment is pgtable_page_ctor() for kernel > linear mapping. This series is based on current arm64 where linear mapping > pgtable pages go through pgtable_page_ctor() init sequence but that might be > changing soon. If RISC-V does not have pgtable_page_ctor() init for linear > mapping and no other arch specific stuff later on we can try to consolidate > remove_pagetable() atleast for both the architectures. > > Then I wondering whether I can transition pud|pmd_large() to pud|pmd_sect(). The first 10 patches of my generic page walk series[1] adds p?d_large() as a common feature, so probably best sticking with p?d_large() if this is going to be common and basing on top of those patches. [1] https://lore.kernel.org/lkml/20190403141627.11664-1-steven.price@arm.com/T/ Steve _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel