From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E498C3DA59 for ; Mon, 15 Jul 2024 09:26:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=dNexjs7qpl0Exe3Wipnr1PFl8kntV8jY5wJQGmi0PU4=; b=D6MoZ+Z4go6E4BQPSiS0843ma3 JZLciJdguDCFMb1lvyPfZt7JU1cG7WmSvbe5VJ1Pvv1dru3kdNGsJyVSit0EAEYs750l2R6iLmVQ3 Jnigg9IhQlY0nMwFTDL/6zppyeq/Lsw5zBMIB04hLs5HCp8dYvJMYqRGPvgHPyJzQDX6u38DEJc0n DeiEOfH+rEKnTRaxH0H6ViKt9b+L7B0X124SLAF5vlg2EVSaXpqkoHlQbEwSFQiVqe8pqQ+U8+LGL P4UR4Vgb2zDvPsdYR02sf+iJFvQJ1YHlbDfz+f/fYk5ubwQUn7dE244TmYSWZH9a5B1tdcqIhlPZX MZL9zR1g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTHyc-00000006WXl-1PZA; Mon, 15 Jul 2024 09:26:34 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTHyJ-00000006WUH-1xjc for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 09:26:16 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ED58ADA7; Mon, 15 Jul 2024 02:26:39 -0700 (PDT) Received: from [10.162.40.16] (a077893.blr.arm.com [10.162.40.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7B89E3F73F; Mon, 15 Jul 2024 02:26:06 -0700 (PDT) Message-ID: <1da79356-4cf7-476f-bd16-61123e39598a@arm.com> Date: Mon, 15 Jul 2024 14:56:03 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 12/29] arm64: add POIndex defines To: Joey Gouly , linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@kernel.org, aneesh.kumar@linux.ibm.com, bp@alien8.de, broonie@kernel.org, catalin.marinas@arm.com, christophe.leroy@csgroup.eu, dave.hansen@linux.intel.com, hpa@zytor.com, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org, maz@kernel.org, mingo@redhat.com, mpe@ellerman.id.au, naveen.n.rao@linux.ibm.com, npiggin@gmail.com, oliver.upton@linux.dev, shuah@kernel.org, szabolcs.nagy@arm.com, tglx@linutronix.de, will@kernel.org, x86@kernel.org, kvmarm@lists.linux.dev References: <20240503130147.1154804-1-joey.gouly@arm.com> <20240503130147.1154804-13-joey.gouly@arm.com> Content-Language: en-US From: Anshuman Khandual In-Reply-To: <20240503130147.1154804-13-joey.gouly@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_022615_582002_FF9DF37C X-CRM114-Status: GOOD ( 13.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 5/3/24 18:31, Joey Gouly wrote: > The 3-bit POIndex is stored in the PTE at bits 60..62. > > Signed-off-by: Joey Gouly > Cc: Catalin Marinas > Cc: Will Deacon > --- > arch/arm64/include/asm/pgtable-hwdef.h | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h > index ef207a0d4f0d..370a02922fe1 100644 > --- a/arch/arm64/include/asm/pgtable-hwdef.h > +++ b/arch/arm64/include/asm/pgtable-hwdef.h > @@ -198,6 +198,16 @@ > #define PTE_PI_IDX_2 53 /* PXN */ > #define PTE_PI_IDX_3 54 /* UXN */ > > +/* > + * POIndex[2:0] encoding (Permission Overlay Extension) > + */ > +#define PTE_PO_IDX_0 (_AT(pteval_t, 1) << 60) > +#define PTE_PO_IDX_1 (_AT(pteval_t, 1) << 61) > +#define PTE_PO_IDX_2 (_AT(pteval_t, 1) << 62) > + > +#define PTE_PO_IDX_MASK GENMASK_ULL(62, 60) > + > + > /* > * Memory Attribute override for Stage-2 (MemAttr[3:0]) > */ Could this patch be folded with a later patch that uses the above indices and the mask for the first time.