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Mon, 26 Oct 2026 02:22:24 -0700 (PDT) Received: from [192.168.1.3] ([37.18.141.193]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e3ece5e4asm15042461f8f.59.2026.10.26.02.22.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Oct 2026 02:22:24 -0700 (PDT) Message-ID: <1de1884e-11e1-4375-97af-fe3bf924a584@linaro.org> Date: Mon, 26 Oct 2026 09:22:23 +0000 X-Archived-By: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] coresight: etm4x: Report the external outputs the PMU counts To: Leo Yan Cc: Amir Ayupov , Suzuki K Poulose , Mike Leach , Alexander Shishkin , Jonathan Corbet , Randy Dunlap , Shuah Khan , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261012230527.750567-1-aaupov@fb.com> <20261012230527.750567-4-aaupov@fb.com> <20261021164332.GI26205@e132581.arm.com> <024bc6f1-eb73-4f01-84f3-738bf68bdc93@linaro.org> <20261023140013.GK26205@e132581.arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20261023140013.GK26205@e132581.arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261026_022226_905700_4772CF10 X-CRM114-Status: GOOD ( 13.78 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-7.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On 23/10/2026 15:00, Leo Yan wrote: > On Fri, Oct 23, 2026 at 10:49:40AM +0100, James Clark wrote: > > [...] > >>>> * a device that matches one of its classes and has all of its capabilities. >>>> */ >>>> #define CS_CFG_MATCH_CAP_MASK 0x0000ff00 >>>> +/* trace unit external output n is countable by the PMU as TRCEXTOUTn */ >>>> +#define CS_CFG_MATCH_CAP_PMU_EXTOUT_SHIFT 8 >>>> +#define CS_CFG_MATCH_CAP_PMU_EXTOUT_NR 4 /* TRCEXTOUT0-3 */ >>>> +#define CS_CFG_MATCH_CAP_PMU_EXTOUT(n) BIT(CS_CFG_MATCH_CAP_PMU_EXTOUT_SHIFT + (n)) >> >> Isn't this recreating what GENMASK() and FIELD_PREP() does? Can we use that >> instead? > > TBC, are you suggesting using separate capability bits to represent > TRCEXTOUT0-3? Why can't we use a single capability bit to indicate > whether the feature is supported and caps->num_event to indicate > the number of external output signals? Just the pattern of *_SHIFT and other stuff to make a bitfield is usually better done with GENMASK(). Or if there are only 4 of them, even defining four BIT()s would be clearer. But yes if a single bit and caps->num_event works we should do that instead.