From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E60DCC25B7C for ; Tue, 28 May 2024 12:23:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=znI67XGA02dS0JNQQiFiVmTclBkxagV/+IJzuiAVJMQ=; b=TOzD48r221FnIa xQSfeAsQeFmwhpPZsBgV7uVyajAbJ2GVSICRn1bkx1gUbwUsccm5R5v9hthFqCeWpphYEFrxJR9ng cVSuYiCGmuoeSs8o80bsGXEa2NIacVparFkb5cAM+WNjCS2/J8lgGjlreG1ZezVck/SrdgmsXXAUK ATVzVsTaSimnmaegTfMCTb1algyWmjGpTZEhDpCyieWD9rEusJMLa/02V5fuuqyeFesySdOF/+wSZ lZbVy05WQEdTow2yiAPerKx2g7mjGu6CXDNHfnJhZODRkmobKJz6TX5PwlYsF5tajZCZktoynTg0w kogRPsO8CFBowUm6+TOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sBvrh-00000000Ywt-1H4x; Tue, 28 May 2024 12:23:41 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sBvrf-00000000Yw2-2WKK for linux-arm-kernel@lists.infradead.org; Tue, 28 May 2024 12:23:40 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 0B15F61D5F; Tue, 28 May 2024 12:23:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9AC32C3277B; Tue, 28 May 2024 12:23:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716899017; bh=JWqqFhT6BMoU6aedUh2YxiyaeH9WHnDepgBZgI6tTls=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=l1YwINKKJVGJhcVsF7GsL/Vfr1KNYTo13apnp4s2e5bRB4uFIJ9owNDw6Oa1d8Gks AmktQMpxqKQSrjGpIwK2c1oMW6qZQJo0eRbAmLqBuvC0i5Xxzl1YfnNbi8gBOUhSOj NSYtKsV43kXLgdYi+l2ViIT1y+VWRTw/OWHTNLQ9Vc6L5AyININOczUzdJAk6s/Gbf JDGov47zltypH79lOblHSo1vWAoThOF1Tkew9cKxAnE73Pcnva5y8o2W3sD6OiQ+tt 1gSBZCvUXzVzn+EJpYFHd4NU+Ghg5zY+XZd72+Bv3YZZoDKXQhGbbG03abPyc9MwMZ uP9S6w0rSldwA== Message-ID: <1e6242a1-2dc5-4f88-9cbb-eb14a27cccc4@kernel.org> Date: Tue, 28 May 2024 15:23:32 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/7] arm64: dts: ti: k3-j722s: Add lane mux for Serdes1 To: Siddharth Vadapalli , nm@ti.com, vigneshr@ti.com, afd@ti.com, kristo@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, u-kumar1@ti.com, danishanwar@ti.com, srk@ti.com References: <20240524090514.152727-1-s-vadapalli@ti.com> <20240524090514.152727-6-s-vadapalli@ti.com> Content-Language: en-US From: Roger Quadros In-Reply-To: <20240524090514.152727-6-s-vadapalli@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240528_052339_805467_1541A850 X-CRM114-Status: GOOD ( 16.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 24/05/2024 12:05, Siddharth Vadapalli wrote: > The Serdes1 instance of Serdes on J722S SoC can be muxed between PCIe0 Please use SERDES insted of Serdes or serdes as it is an abbreviation. > and SGMII1. Update the "serdes_ln_ctrl" node adding support for the lane > mux of Serdes1. Additionally, set the default muxing for Serdes1 Lane0 to > PCIe0. > > Signed-off-by: Siddharth Vadapalli > --- > Current patch is v1. No changelog. > > arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 3 ++- > arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 5 +++-- > 2 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > index a3bda39cc223..16c6ab8ee07e 100644 > --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > @@ -401,7 +401,8 @@ &sdhci1 { > }; > > &serdes_ln_ctrl { > - idle-states = ; > + idle-states = , > + ; > }; > > &serdes0 { > diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi > index b069cecebfd9..48b77e476c77 100644 > --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi > @@ -96,8 +96,9 @@ usb1: usb@31200000{ > &main_conf { > serdes_ln_ctrl: mux-controller@4080 { > compatible = "reg-mux"; > - reg = <0x4080 0x4>; > + reg = <0x4080 0x14>; > #mux-control-cells = <1>; > - mux-reg-masks = <0x0 0x3>; /* SERDES0 lane0 select */ > + mux-reg-masks = <0x0 0x3>, /* SERDES0 lane0 select */ > + <0x10 0x3>; /* SERDES1 lane0 select */ Why not introduce this right in the patch where you add serdes_ln_ctrl mux node? > }; > }; -- cheers, -roger _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel