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Tue, 25 Nov 2025 23:36:20 -0800 (PST) Received: from draszik.lan ([212.129.87.89]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42cb7fb919bsm38547158f8f.34.2025.11.25.23.36.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 23:36:20 -0800 (PST) Message-ID: <1fafb9117a9faa32222a55efc77794156635d105.camel@linaro.org> Subject: Re: [PATCH 4/6] mfd: max77759: modify irq configs From: =?ISO-8859-1?Q?Andr=E9?= Draszik To: Amit Sunil Dhamne , Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Greg Kroah-Hartman , Badhri Jagan Sridharan , Heikki Krogerus , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, RD Babiera , Kyle Tso Date: Wed, 26 Nov 2025 07:36:35 +0000 In-Reply-To: References: <20251123-max77759-charger-v1-0-6b2e4b8f7f54@google.com> <20251123-max77759-charger-v1-4-6b2e4b8f7f54@google.com> <5c901a6c831775a04924880cc9f783814f75b6aa.camel@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2-2+build3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251125_233623_019932_5654DAB0 X-CRM114-Status: GOOD ( 20.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 2025-11-26 at 06:44 +0000, Andr=C3=A9 Draszik wrote: > Hi Amit, >=20 > On Tue, 2025-11-25 at 17:10 -0800, Amit Sunil Dhamne wrote: > > Hi Andr=C3=A9, > >=20 > > On 11/23/25 10:21 PM, Andr=C3=A9 Draszik wrote: > > > Hi Amit, > > >=20 > > > Thanks for your patches to enable the charger! > >=20 > > Ack! > >=20 > >=20 > > > > From: Amit Sunil Dhamne > > > >=20 > > > > Define specific bit-level masks for charger's registers and modify = the > > > > irq mask for charger irq_chip. Also, configure the max77759 interru= pt > > > > lines as active low to all interrupt registrations to ensure the > > > > interrupt controllers are configured with the correct trigger type. > > > >=20 > > > > Signed-off-by: Amit Sunil Dhamne > > > > --- > > > > =C2=A0=C2=A0drivers/mfd/max77759.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 | 24 +++++++++++++++++------- > > > > =C2=A0=C2=A0include/linux/mfd/max77759.h |=C2=A0 9 +++++++++ > > > > =C2=A0=C2=A02 files changed, 26 insertions(+), 7 deletions(-) > > > >=20 > > > > diff --git a/drivers/mfd/max77759.c b/drivers/mfd/max77759.c > > > > index 6cf6306c4a3b..5fe22884f362 100644 > > > > --- a/drivers/mfd/max77759.c > > > > +++ b/drivers/mfd/max77759.c > > > > @@ -256,8 +256,17 @@ static const struct regmap_irq max77759_topsys= _irqs[] =3D { > > > > =C2=A0=C2=A0}; > > > > =C2=A0=20 > > > > =C2=A0=C2=A0static const struct regmap_irq max77759_chgr_irqs[] =3D= { > > > > - REGMAP_IRQ_REG(MAX77759_CHARGER_INT_1, 0, GENMASK(7, 0)), > > > > - REGMAP_IRQ_REG(MAX77759_CHARGER_INT_2, 1, GENMASK(7, 0)), > > > > + REGMAP_IRQ_REG(MAX77759_CHARGER_INT_1, 0, > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT_A= ICL | > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT_C= HGIN | > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT_C= HG | > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT_I= NLIM), > > > > + REGMAP_IRQ_REG(MAX77759_CHARGER_INT_2, 1, > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT2_= BAT_OILO | > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT2_= CHG_STA_CC | > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT2_= CHG_STA_CV | > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT2_= CHG_STA_TO | > > > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MAX77759_CHGR_REG_CHG_INT2_= CHG_STA_DONE), > > > > =C2=A0=C2=A0}; >=20 > You should also add the remaining bits in each register here, so that the > regulator-irq can mask them when no user exists. It will only touch the ^^^^^^^^^^^^^ regmap-irq A.