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[82.67.6.57]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a35a59d998sm187484365e9.15.2026.10.26.01.57.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2026 01:57:22 -0700 (PDT) From: Jerome Brunet To: Viresh Kumar , christian.koever-draxl@student.uibk.ac.at Cc: neil.armstrong@linaro.org, sboyd@kernel.org, bmasney+clk@redhat.com, khilman@baylibre.com, martin.blumenstingl@googlemail.com, rafael@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Christian Stefan =?utf-8?B?S8O2dsOpci1EcmF4?= =?utf-8?B?bA==?= Subject: Re: [PATCH 4/4] cpufreq: add an Amlogic speed-bin driver In-Reply-To: References: <20261025192219.209137-1-christian.koever-draxl@student.uibk.ac.at> <20261025192219.209137-5-christian.koever-draxl@student.uibk.ac.at> Date: Mon, 26 Oct 2026 09:57:22 +0100 Message-ID: <1jbj8gkff1.fsf@starbuckisacylon.baylibre.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261026_015725_275999_707D4450 X-CRM114-Status: GOOD ( 14.85 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-16.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On lun. 26 oct. 2026 at 11:00, Viresh Kumar wrote: > On 25-10-26, 20:22, christian.koever-draxl@student.uibk.ac.at wrote: >> From: Christian Stefan K=C3=B6v=C3=A9r-Draxl >>=20 >> Every S4 speed bin runs the same CPU frequencies but needs its own >> voltage curve, and the bin can only be read through the secure monitor. >>=20 >> Read the bin from the firmware, select the matching >> "opp-microvolt-speed" property for all CPUs, then register >> cpufreq-dt. Bins outside the known range fall back to bin 0, which >> has the highest voltages. Like sun50i-cpufreq-nvmem, the driver binds >> on the SoC compatible and needs no node of its own, and S4 is added to >> the cpufreq-dt-platdev blocklist so cpufreq-dt is only created after >> the bin has been applied. >>=20 >> Signed-off-by: Christian Stefan K=C3=B6v=C3=A9r-Draxl >> --- >> MAINTAINERS | 1 + >> drivers/cpufreq/Kconfig.arm | 14 ++ >> drivers/cpufreq/Makefile | 1 + >> drivers/cpufreq/amlogic-cpufreq.c | 184 +++++++++++++++++++++++++++ >> drivers/cpufreq/cpufreq-dt-platdev.c | 2 + >> 5 files changed, 202 insertions(+) >> create mode 100644 drivers/cpufreq/amlogic-cpufreq.c > > Is it safe to apply just this one ? I can take this via the PM tree then. I would advise to wait a little for Amlogic to chime in. Patch 2 is something I already rejected back when S4 support was initially introduced. I suppose AI just unearthed it and did not bother to mention it. Amlogic was supposed to migrate to SCMI at that point, and possibly handle CPU frequency scaling through the secure fw entirely. They did on later SoCs, I don't know where their FW stands on the S4. > > --=20 > viresh --=20 Jerome