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[82.67.6.57]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-49592f39c8asm8320547f8f.7.2026.11.09.00.37.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2026 00:37:01 -0800 (PST) From: Jerome Brunet To: Conor Dooley , Carlo Caione Cc: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Jian Hu , Chuan Liu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/7] dt-bindings: clock: Add Amlogic S7 SCMI clock IDs In-Reply-To: <20261108-computer-backed-d98862794d18@spud> References: <20261106-upstream-s7-clk-v1-0-7d501d62621f@baylibre.com> <20261106-upstream-s7-clk-v1-1-7d501d62621f@baylibre.com> <20261108-computer-backed-d98862794d18@spud> Date: Mon, 09 Nov 2026 09:37:00 +0100 Message-ID: <1jfqxa1jv7.fsf@starbuckisacylon.baylibre.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261109_003704_558813_76437746 X-CRM114-Status: GOOD ( 19.86 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On dim. 08 nov. 2026 at 23:21, Conor Dooley wrote: > On Fri, Nov 06, 2026 at 09:30:24AM +0100, Carlo Caione wrote: >> The S7 firmware exposes clocks through SCMI, including sources needed >> by the other clock controllers. >> >> Define their identifiers so devicetree can reference these >> firmware-provided clocks. > > Are SCMI clock IDs actually suitable for being bindings? Can't the IDs > vary here between versions of the firmware? > They're also not a "made up" set of indexes, like traditional clocks > are, they're real numbers that come from some document akin to > interrupts that we do not have bindings for and no driver is likely to > reference these definitions either right? There is no such document available unfortunately. I'm not sure one exist to be honest. Those IDs have been stable ... so far, but sure, a FW change could change them. The IDs are totally made up, in the very same way the other amlogic clock driver IDs are. Providers and consumer just need a common reference to desginate clocks, this is it. > > Is something like this not more suitable for being included as a header > in the amlogic dts directory? If you think it is more appropriate to have them there, it is fine by me. Carlo if you have to respin with this particular change on the DT side, feel free to add Acked-by: Jerome Brunet > >> >> Signed-off-by: Carlo Caione >> --- >> include/dt-bindings/clock/amlogic,s7-scmi-clkc.h | 27 ++++++++++++++++++++++++ >> 1 file changed, 27 insertions(+) >> >> diff --git a/include/dt-bindings/clock/amlogic,s7-scmi-clkc.h b/include/dt-bindings/clock/amlogic,s7-scmi-clkc.h >> new file mode 100644 >> index 000000000000..10d7caa5d1e2 >> --- /dev/null >> +++ b/include/dt-bindings/clock/amlogic,s7-scmi-clkc.h >> @@ -0,0 +1,27 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ >> +/* >> + * Copyright (c) 2026 BayLibre, SAS. >> + */ >> + >> +#ifndef __AMLOGIC_S7_SCMI_CLKC_H >> +#define __AMLOGIC_S7_SCMI_CLKC_H >> + >> +#define CLKID_DDR_PHY_OSC 0 >> +#define CLKID_USB1_PLL_OSC 1 >> +#define CLKID_TOP_PLL_OSC 2 >> +#define CLKID_HDMI_PLL_OSC 3 >> +#define CLKID_USB0_PHY_PLL_OSC 4 >> +#define CLKID_USB1_PHY_PLL_OSC 5 >> +#define CLKID_USB0_PLL_OSC 6 >> +#define CLKID_ETH_PLL_OSC 7 >> +#define CLKID_ADC_PLL_OSC 8 >> +#define CLKID_CPU_CLK 9 >> +#define CLKID_DSU_CLK 10 >> +#define CLKID_GP1_PLL 11 >> +#define CLKID_ACLKM 12 >> +#define CLKID_PWM_G 13 >> +#define CLKID_PWM_H 14 >> +#define CLKID_PWM_I 15 >> +#define CLKID_PWM_J 16 >> + >> +#endif /* __AMLOGIC_S7_SCMI_CLKC_H */ >> >> -- >> 2.56.0 >> -- Jerome