* [PATCH] Fix AT91SAM9G20 reset
@ 2009-12-09 13:50 Peter Horton
2009-12-09 14:09 ` Paulius Zaleckas
0 siblings, 1 reply; 9+ messages in thread
From: Peter Horton @ 2009-12-09 13:50 UTC (permalink / raw)
To: linux-arm-kernel
Fix AT91SAM9G20 reset as per the errata in the data sheet.
If the SDRAM is not cleanly shutdown before reset it can be left driving
the bus, which then stops the bootloader booting from NAND.
Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
--
Index: linux-2.6.32/arch/arm/mach-at91/Makefile
===================================================================
--- linux-2.6.32.orig/arch/arm/mach-at91/Makefile 2009-12-09 13:33:28.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/Makefile 2009-12-09 13:33:28.000000000 +0000
@@ -16,7 +16,7 @@
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9g20_reset.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
Index: linux-2.6.32/arch/arm/mach-at91/at91sam9260.c
===================================================================
--- linux-2.6.32.orig/arch/arm/mach-at91/at91sam9260.c 2009-12-03 03:51:21.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/at91sam9260.c 2009-12-09 13:45:50.000000000 +0000
@@ -25,6 +25,8 @@
#include "generic.h"
#include "clock.h"
+extern void at91sam9g20_reset(void);
+
static struct map_desc at91sam9260_io_desc[] __initdata = {
{
.virtual = AT91_VA_BASE_SYS,
@@ -327,7 +329,11 @@
else
iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
- at91_arch_reset = at91sam9260_reset;
+ if (cpu_is_at91sam9g20())
+ at91_arch_reset = at91sam9g20_reset;
+ else
+ at91_arch_reset = at91sam9260_reset;
+
pm_power_off = at91sam9260_poweroff;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
Index: linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S 2009-12-09 13:33:28.000000000 +0000
@@ -0,0 +1,52 @@
+/*
+ * (C) BitBox Ltd 2009
+ *
+ * reset AT91SAM9G20 as per errata
+ *
+ * unless the SDRAM is cleanly shutdown before we hit the
+ * reset register it can be left driving the data bus and
+ * killing the chance of a subsequent boot from NAND
+ */
+
+#define CP15_CR_I (1 << 12)
+
+#define SYS_VIRT_OFS (-0x01000000)
+
+#define SDRAMC_BASE (SYS_VIRT_OFS + 0xffffea00)
+#define SDRAMC_TR 0x0004
+#define SDRAMC_LPR 0x0010
+#define SDRAMC_LPCB_POWER_DOWN 2
+
+#define RSTC_BASE (SYS_VIRT_OFS + 0xfffffd00)
+#define RSTC_CR 0x0000
+#define RSTC_PROCRST (1 << 0)
+#define RSTC_PERRST (1 << 2)
+#define RSTC_KEY (0xa5 << 24)
+
+ .arm
+
+ .globl at91sam9g20_reset
+
+at91sam9g20_reset: mov r0, #0
+ mcr p15, 0, r0, c7, c5, 0 @ flush I-cache
+
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #CP15_CR_I
+ mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
+
+ ldr r0, =SDRAMC_BASE @ preload constants
+ ldr r1, =RSTC_BASE
+
+ mov r2, #1
+ mov r3, #SDRAMC_LPCB_POWER_DOWN
+ ldr r4, =RSTC_KEY | RSTC_PERRST | RSTC_PROCRST
+
+ .balign 32 @ align to cache line
+
+ str r2, [r0, #SDRAMC_TR] @ disable SDRAM access
+ str r3, [r0, #SDRAMC_LPR] @ power down SDRAM
+ str r4, [r1, #RSTC_CR] @ reset processor
+
+ b .
+
+/* vi:set ft=ignore ai: */
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] Fix AT91SAM9G20 reset
2009-12-09 13:50 Peter Horton
@ 2009-12-09 14:09 ` Paulius Zaleckas
0 siblings, 0 replies; 9+ messages in thread
From: Paulius Zaleckas @ 2009-12-09 14:09 UTC (permalink / raw)
To: linux-arm-kernel
On 12/09/2009 03:50 PM, Peter Horton wrote:
> Fix AT91SAM9G20 reset as per the errata in the data sheet.
>
> If the SDRAM is not cleanly shutdown before reset it can be left driving
> the bus, which then stops the bootloader booting from NAND.
>
> Signed-off-by: Peter Horton<phorton@bitbox.co.uk>
> --
>
[...]
> Index: linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S
> ===================================================================
> --- /dev/null 1970-01-01 00:00:00.000000000 +0000
> +++ linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S 2009-12-09 13:33:28.000000000 +0000
> @@ -0,0 +1,52 @@
> +/*
> + * (C) BitBox Ltd 2009
> + *
> + * reset AT91SAM9G20 as per errata
> + *
> + * unless the SDRAM is cleanly shutdown before we hit the
> + * reset register it can be left driving the data bus and
> + * killing the chance of a subsequent boot from NAND
> + */
> +
> +#define CP15_CR_I (1<< 12)
> +
> +#define SYS_VIRT_OFS (-0x01000000)
> +
> +#define SDRAMC_BASE (SYS_VIRT_OFS + 0xffffea00)
> +#define SDRAMC_TR 0x0004
> +#define SDRAMC_LPR 0x0010
> +#define SDRAMC_LPCB_POWER_DOWN 2
> +
> +#define RSTC_BASE (SYS_VIRT_OFS + 0xfffffd00)
> +#define RSTC_CR 0x0000
> +#define RSTC_PROCRST (1<< 0)
> +#define RSTC_PERRST (1<< 2)
> +#define RSTC_KEY (0xa5<< 24)
> +
> + .arm
> +
> + .globl at91sam9g20_reset
> +
> +at91sam9g20_reset: mov r0, #0
> + mcr p15, 0, r0, c7, c5, 0 @ flush I-cache
> +
> + mrc p15, 0, r0, c1, c0, 0
> + orr r0, r0, #CP15_CR_I
> + mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
> +
> + ldr r0, =SDRAMC_BASE @ preload constants
> + ldr r1, =RSTC_BASE
> +
> + mov r2, #1
> + mov r3, #SDRAMC_LPCB_POWER_DOWN
> + ldr r4, =RSTC_KEY | RSTC_PERRST | RSTC_PROCRST
> +
> + .balign 32 @ align to cache line
> +
> + str r2, [r0, #SDRAMC_TR] @ disable SDRAM access
> + str r3, [r0, #SDRAMC_LPR] @ power down SDRAM
> + str r4, [r1, #RSTC_CR] @ reset processor
> +
> + b .
> +
> +/* vi:set ft=ignore ai: */
Please remove the vi bits.
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] Fix AT91SAM9G20 reset
@ 2009-12-15 9:59 Peter Horton
0 siblings, 0 replies; 9+ messages in thread
From: Peter Horton @ 2009-12-15 9:59 UTC (permalink / raw)
To: linux-arm-kernel
Fix AT91SAM9G20 reset as per the errata in the data sheet.
If the SDRAM is not cleanly shutdown before reset it can be left driving
the bus, which then stops the bootloader booting from NAND.
Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
--
Index: linux-2.6.32/arch/arm/mach-at91/Makefile
===================================================================
--- linux-2.6.32.orig/arch/arm/mach-at91/Makefile 2009-12-15 09:53:27.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/Makefile 2009-12-15 09:53:27.000000000 +0000
@@ -16,7 +16,7 @@
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9g20_reset.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
Index: linux-2.6.32/arch/arm/mach-at91/at91sam9260.c
===================================================================
--- linux-2.6.32.orig/arch/arm/mach-at91/at91sam9260.c 2009-12-03 03:51:21.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/at91sam9260.c 2009-12-15 09:53:27.000000000 +0000
@@ -25,6 +25,8 @@
#include "generic.h"
#include "clock.h"
+extern void at91sam9g20_reset(void);
+
static struct map_desc at91sam9260_io_desc[] __initdata = {
{
.virtual = AT91_VA_BASE_SYS,
@@ -327,7 +329,11 @@
else
iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
- at91_arch_reset = at91sam9260_reset;
+ if (cpu_is_at91sam9g20())
+ at91_arch_reset = at91sam9g20_reset;
+ else
+ at91_arch_reset = at91sam9260_reset;
+
pm_power_off = at91sam9260_poweroff;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
Index: linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S 2009-12-15 09:55:17.000000000 +0000
@@ -0,0 +1,50 @@
+/*
+ * (C) BitBox Ltd 2009
+ *
+ * reset AT91SAM9G20 as per errata
+ *
+ * unless the SDRAM is cleanly shutdown before we hit the
+ * reset register it can be left driving the data bus and
+ * killing the chance of a subsequent boot from NAND
+ */
+
+#define CP15_CR_I (1 << 12)
+
+#define SYS_VIRT_OFS (-0x01000000)
+
+#define SDRAMC_BASE (SYS_VIRT_OFS + 0xffffea00)
+#define SDRAMC_TR 0x0004
+#define SDRAMC_LPR 0x0010
+#define SDRAMC_LPCB_POWER_DOWN 2
+
+#define RSTC_BASE (SYS_VIRT_OFS + 0xfffffd00)
+#define RSTC_CR 0x0000
+#define RSTC_PROCRST (1 << 0)
+#define RSTC_PERRST (1 << 2)
+#define RSTC_KEY (0xa5 << 24)
+
+ .arm
+
+ .globl at91sam9g20_reset
+
+at91sam9g20_reset: mov r0, #0
+ mcr p15, 0, r0, c7, c5, 0 @ flush I-cache
+
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #CP15_CR_I
+ mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
+
+ ldr r0, =SDRAMC_BASE @ preload constants
+ ldr r1, =RSTC_BASE
+
+ mov r2, #1
+ mov r3, #SDRAMC_LPCB_POWER_DOWN
+ ldr r4, =RSTC_KEY | RSTC_PERRST | RSTC_PROCRST
+
+ .balign 32 @ align to cache line
+
+ str r2, [r0, #SDRAMC_TR] @ disable SDRAM access
+ str r3, [r0, #SDRAMC_LPR] @ power down SDRAM
+ str r4, [r1, #RSTC_CR] @ reset processor
+
+ b .
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] Fix AT91SAM9G20 reset
@ 2010-04-13 8:31 Peter Horton
0 siblings, 0 replies; 9+ messages in thread
From: Peter Horton @ 2010-04-13 8:31 UTC (permalink / raw)
To: linux-arm-kernel
Fix AT91SAM9G20 reset as per the errata in the data sheet.
If the SDRAM is not cleanly shutdown before reset it can be left driving
the bus, which then stops the bootloader booting from NAND.
Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
--
Index: linux-2.6.32/arch/arm/mach-at91/Makefile
===================================================================
--- linux-2.6.32.orig/arch/arm/mach-at91/Makefile 2009-12-15 09:53:27.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/Makefile 2009-12-15 09:53:27.000000000 +0000
@@ -16,7 +16,7 @@
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9g20_reset.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
Index: linux-2.6.32/arch/arm/mach-at91/at91sam9260.c
===================================================================
--- linux-2.6.32.orig/arch/arm/mach-at91/at91sam9260.c 2009-12-03 03:51:21.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/at91sam9260.c 2009-12-15 09:53:27.000000000 +0000
@@ -25,6 +25,8 @@
#include "generic.h"
#include "clock.h"
+extern void at91sam9g20_reset(void);
+
static struct map_desc at91sam9260_io_desc[] __initdata = {
{
.virtual = AT91_VA_BASE_SYS,
@@ -327,7 +329,11 @@
else
iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
- at91_arch_reset = at91sam9260_reset;
+ if (cpu_is_at91sam9g20())
+ at91_arch_reset = at91sam9g20_reset;
+ else
+ at91_arch_reset = at91sam9260_reset;
+
pm_power_off = at91sam9260_poweroff;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
Index: linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S 2009-12-15 09:55:17.000000000 +0000
@@ -0,0 +1,50 @@
+/*
+ * (C) BitBox Ltd 2009
+ *
+ * reset AT91SAM9G20 as per errata
+ *
+ * unless the SDRAM is cleanly shutdown before we hit the
+ * reset register it can be left driving the data bus and
+ * killing the chance of a subsequent boot from NAND
+ */
+
+#define CP15_CR_I (1 << 12)
+
+#define SYS_VIRT_OFS (-0x01000000)
+
+#define SDRAMC_BASE (SYS_VIRT_OFS + 0xffffea00)
+#define SDRAMC_TR 0x0004
+#define SDRAMC_LPR 0x0010
+#define SDRAMC_LPCB_POWER_DOWN 2
+
+#define RSTC_BASE (SYS_VIRT_OFS + 0xfffffd00)
+#define RSTC_CR 0x0000
+#define RSTC_PROCRST (1 << 0)
+#define RSTC_PERRST (1 << 2)
+#define RSTC_KEY (0xa5 << 24)
+
+ .arm
+
+ .globl at91sam9g20_reset
+
+at91sam9g20_reset: mov r0, #0
+ mcr p15, 0, r0, c7, c5, 0 @ flush I-cache
+
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #CP15_CR_I
+ mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
+
+ ldr r0, =SDRAMC_BASE @ preload constants
+ ldr r1, =RSTC_BASE
+
+ mov r2, #1
+ mov r3, #SDRAMC_LPCB_POWER_DOWN
+ ldr r4, =RSTC_KEY | RSTC_PERRST | RSTC_PROCRST
+
+ .balign 32 @ align to cache line
+
+ str r2, [r0, #SDRAMC_TR] @ disable SDRAM access
+ str r3, [r0, #SDRAMC_LPR] @ power down SDRAM
+ str r4, [r1, #RSTC_CR] @ reset processor
+
+ b .
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] Fix AT91SAM9G20 reset
@ 2010-05-28 15:37 Peter Horton
2010-06-21 14:30 ` Lucas
2010-10-14 13:34 ` Nicolas Ferre
0 siblings, 2 replies; 9+ messages in thread
From: Peter Horton @ 2010-05-28 15:37 UTC (permalink / raw)
To: linux-arm-kernel
Fix AT91SAM9G20 as per the errata in the datasheet.
If the SDRAM is not cleanly shutdown before reset it can be left driving
the bus, which then stops the bootloader booting from NAND.
Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
--
Index: linux-2.6.32/arch/arm/mach-at91/Makefile
===================================================================
--- linux-2.6.32.orig/arch/arm/mach-at91/Makefile 2009-12-09 13:33:28.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/Makefile 2009-12-09 13:33:28.000000000 +0000
@@ -16,7 +16,7 @@
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9g20_reset.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o
Index: linux-2.6.32/arch/arm/mach-at91/at91sam9260.c
===================================================================
--- linux-2.6.32.orig/arch/arm/mach-at91/at91sam9260.c 2009-12-03 03:51:21.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/at91sam9260.c 2009-12-09 13:45:50.000000000 +0000
@@ -25,6 +25,8 @@
#include "generic.h"
#include "clock.h"
+extern void at91sam9g20_reset(void);
+
static struct map_desc at91sam9260_io_desc[] __initdata = {
{
.virtual = AT91_VA_BASE_SYS,
@@ -327,7 +329,11 @@
else
iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
- at91_arch_reset = at91sam9260_reset;
+ if (cpu_is_at91sam9g20())
+ at91_arch_reset = at91sam9g20_reset;
+ else
+ at91_arch_reset = at91sam9260_reset;
+
pm_power_off = at91sam9260_poweroff;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
Index: linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S 2009-12-09 13:33:28.000000000 +0000
@@ -0,0 +1,52 @@
+/*
+ * (C) BitBox Ltd 2010
+ *
+ * reset AT91SAM9G20 as per errata
+ *
+ * unless the SDRAM is cleanly shutdown before we hit the
+ * reset register it can be left driving the data bus and
+ * killing the chance of a subsequent boot from NAND
+ */
+
+#define CP15_CR_I (1 << 12)
+
+#define SYS_VIRT_OFS (-0x01000000)
+
+#define SDRAMC_BASE (SYS_VIRT_OFS + 0xffffea00)
+#define SDRAMC_TR 0x0004
+#define SDRAMC_LPR 0x0010
+#define SDRAMC_LPCB_POWER_DOWN 2
+
+#define RSTC_BASE (SYS_VIRT_OFS + 0xfffffd00)
+#define RSTC_CR 0x0000
+#define RSTC_PROCRST (1 << 0)
+#define RSTC_PERRST (1 << 2)
+#define RSTC_KEY (0xa5 << 24)
+
+ .arm
+
+ .globl at91sam9g20_reset
+
+at91sam9g20_reset: mov r0, #0
+ mcr p15, 0, r0, c7, c5, 0 @ flush I-cache
+
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #CP15_CR_I
+ mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
+
+ ldr r0, =SDRAMC_BASE @ preload constants
+ ldr r1, =RSTC_BASE
+
+ mov r2, #1
+ mov r3, #SDRAMC_LPCB_POWER_DOWN
+ ldr r4, =RSTC_KEY | RSTC_PERRST | RSTC_PROCRST
+
+ .balign 32 @ align to cache line
+
+ str r2, [r0, #SDRAMC_TR] @ disable SDRAM access
+ str r3, [r0, #SDRAMC_LPR] @ power down SDRAM
+ str r4, [r1, #RSTC_CR] @ reset processor
+
+ b .
+
+/* vi:set ft=ignore ai: */
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] Fix AT91SAM9G20 reset
2010-05-28 15:37 Peter Horton
@ 2010-06-21 14:30 ` Lucas
2010-06-21 15:14 ` Peter Horton
2010-10-14 13:34 ` Nicolas Ferre
1 sibling, 1 reply; 9+ messages in thread
From: Lucas @ 2010-06-21 14:30 UTC (permalink / raw)
To: linux-arm-kernel
Peter Horton <phorton <at> bitbox.co.uk> writes:
>
> Fix AT91SAM9G20 as per the errata in the datasheet.
>
> If the SDRAM is not cleanly shutdown before reset it can be left driving
> the bus, which then stops the bootloader booting from NAND.
>
> Signed-off-by: Peter Horton <phorton <at> bitbox.co.uk>
> --
>
Hi Peter,
Any Idea how to implement this for the WDT and hardware reset(NRST)?
A hardware reset sometimes still stops the bootloader booting from NAND.
Lucas
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] Fix AT91SAM9G20 reset
2010-06-21 14:30 ` Lucas
@ 2010-06-21 15:14 ` Peter Horton
0 siblings, 0 replies; 9+ messages in thread
From: Peter Horton @ 2010-06-21 15:14 UTC (permalink / raw)
To: linux-arm-kernel
On 21/06/2010 15:30, Lucas wrote:
> Peter Horton<phorton<at> bitbox.co.uk> writes:
>
>>
>> Fix AT91SAM9G20 as per the errata in the datasheet.
>>
>> If the SDRAM is not cleanly shutdown before reset it can be left driving
>> the bus, which then stops the bootloader booting from NAND.
>>
>> Signed-off-by: Peter Horton<phorton<at> bitbox.co.uk>
>> --
>>
>
>
> Hi Peter,
>
> Any Idea how to implement this for the WDT and hardware reset(NRST)?
> A hardware reset sometimes still stops the bootloader booting from NAND.
>
Not possible to fix as far as I understand it. We've had to put down a
small DataFlash which then boots from NAND.
Turns out we needed DataFlash anyway as the Atmel boot ROM is not
compatible with newer NANDs (newer NANDs no longer guarantee block 0
without ECC and the Atmel boot ROM doesn't support ECC).
P.
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] Fix AT91SAM9G20 reset
2010-05-28 15:37 Peter Horton
2010-06-21 14:30 ` Lucas
@ 2010-10-14 13:34 ` Nicolas Ferre
2010-10-14 15:31 ` Peter Horton
1 sibling, 1 reply; 9+ messages in thread
From: Nicolas Ferre @ 2010-10-14 13:34 UTC (permalink / raw)
To: linux-arm-kernel
Le 28/05/2010 17:37, Peter Horton :
> Fix AT91SAM9G20 as per the errata in the datasheet.
>
> If the SDRAM is not cleanly shutdown before reset it can be left driving
> the bus, which then stops the bootloader booting from NAND.
>
> Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
Thanks a lot for writing this patch. I am in the process of reviewing it
and extending it to other processors.
[..]
> --- /dev/null 1970-01-01 00:00:00.000000000 +0000
> +++ linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S 2009-12-09 13:33:28.000000000 +0000
> @@ -0,0 +1,52 @@
> +/*
> + * (C) BitBox Ltd 2010
> + *
> + * reset AT91SAM9G20 as per errata
> + *
> + * unless the SDRAM is cleanly shutdown before we hit the
> + * reset register it can be left driving the data bus and
> + * killing the chance of a subsequent boot from NAND
Can I add License sentence to this file? Like this one:
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
Best regards,
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] Fix AT91SAM9G20 reset
2010-10-14 13:34 ` Nicolas Ferre
@ 2010-10-14 15:31 ` Peter Horton
0 siblings, 0 replies; 9+ messages in thread
From: Peter Horton @ 2010-10-14 15:31 UTC (permalink / raw)
To: linux-arm-kernel
On 14/10/2010 14:34, Nicolas Ferre wrote:
> Le 28/05/2010 17:37, Peter Horton :
>> Fix AT91SAM9G20 as per the errata in the datasheet.
>>
>> If the SDRAM is not cleanly shutdown before reset it can be left driving
>> the bus, which then stops the bootloader booting from NAND.
>>
>> Signed-off-by: Peter Horton<phorton@bitbox.co.uk>
>
> Thanks a lot for writing this patch. I am in the process of reviewing it
> and extending it to other processors.
>
> [..]
>
>> --- /dev/null 1970-01-01 00:00:00.000000000 +0000
>> +++ linux-2.6.32/arch/arm/mach-at91/at91sam9g20_reset.S 2009-12-09 13:33:28.000000000 +0000
>> @@ -0,0 +1,52 @@
>> +/*
>> + * (C) BitBox Ltd 2010
>> + *
>> + * reset AT91SAM9G20 as per errata
>> + *
>> + * unless the SDRAM is cleanly shutdown before we hit the
>> + * reset register it can be left driving the data bus and
>> + * killing the chance of a subsequent boot from NAND
>
> Can I add License sentence to this file? Like this one:
>
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License as published by
> * the Free Software Foundation; either version 2 of the License, or
> * (at your option) any later version.
>
No problem.
P.
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2010-10-14 15:31 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
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2009-12-15 9:59 [PATCH] Fix AT91SAM9G20 reset Peter Horton
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2010-05-28 15:37 Peter Horton
2010-06-21 14:30 ` Lucas
2010-06-21 15:14 ` Peter Horton
2010-10-14 13:34 ` Nicolas Ferre
2010-10-14 15:31 ` Peter Horton
2010-04-13 8:31 Peter Horton
2009-12-09 13:50 Peter Horton
2009-12-09 14:09 ` Paulius Zaleckas
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