[PATCH 0/4] Add s3c64xx SROM support and setup SMDK nCS1 for Ethernet

[PATCH 0/4] Add s3c64xx SROM support and setup SMDK nCS1 for Ethernet

[Andy Green]

The following series adds platform defines for s3c64xx SROM unit,
and uses it to configure nCS1 in the SMDK mach- file so the ethernet
works regardless of what the bootloader may or may not have done.

It also adds a comment about how the SMDK must be physically
configured to allow the Ethernet to work and removes a magic
constant address.

---

Andy Green (4):
      smdk6410-comment-ethernet-prerequisites.patch
      smdk6410-add-chipselect-setup.patch
      s3c64xx-add-srom-physical-virtual-mapping.patch
      s3c64xx-introduce-srom-registers.patch


 arch/arm/mach-s3c6400/include/mach/map.h       |   14 ++++++
 arch/arm/mach-s3c6410/mach-smdk6410.c          |   37 ++++++++++++++-
 arch/arm/plat-s3c64xx/cpu.c                    |    5 ++
 arch/arm/plat-s3c64xx/include/plat/regs-srom.h |   59 ++++++++++++++++++++++++
 4 files changed, 113 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/plat-s3c64xx/include/plat/regs-srom.h

-- 
Signature

[PATCH 1/4] s3c64xx-introduce-srom-registers.patch

[Andy Green]

This introduces a platform file for s3c64xx that defines
the SROM unit registers that control chip select
characteristics.

Signed-off-by: Andy Green <andy@warmcat.com>
---

 arch/arm/mach-s3c6400/include/mach/map.h       |   12 +++++
 arch/arm/plat-s3c64xx/include/plat/regs-srom.h |   59 ++++++++++++++++++++++++
 2 files changed, 71 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/plat-s3c64xx/include/plat/regs-srom.h

diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h
index f3b48f8..b0fb5c5 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c6400/include/mach/map.h
@@ -17,6 +17,18 @@
 
 #include <plat/map-base.h>
 
+/*
+ * Post-mux Chip Select Regions Xm0CSn_
+ * These may be used by SROM, NAND or CF depending on settings
+ */
+
+#define S3C64XX_PA_XM0CSN0 (0x10000000)
+#define S3C64XX_PA_XM0CSN1 (0x18000000)
+#define S3C64XX_PA_XM0CSN2 (0x20000000)
+#define S3C64XX_PA_XM0CSN3 (0x28000000)
+#define S3C64XX_PA_XM0CSN4 (0x30000000)
+#define S3C64XX_PA_XM0CSN5 (0x38000000)
+
 /* HSMMC units */
 #define S3C64XX_PA_HSMMC(x)	(0x7C200000 + ((x) * 0x100000))
 #define S3C64XX_PA_HSMMC0	S3C64XX_PA_HSMMC(0)
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-srom.h b/arch/arm/plat-s3c64xx/include/plat/regs-srom.h
new file mode 100644
index 0000000..756731b
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/regs-srom.h
@@ -0,0 +1,59 @@
+/* arch/arm/plat-s3c64xx/include/plat/regs-srom.h
+ *
+ * Copyright 2009 Andy Green <andy@warmcat.com>
+ *
+ * S3C64XX SROM definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_REGS_SROM_H
+#define __PLAT_REGS_SROM_H __FILE__
+
+#define S3C64XX_SROMREG(x)	(S3C_VA_MEM + (x))
+
+#define S3C64XX_SROM_BW		S3C64XX_SROMREG(0)
+#define S3C64XX_SROM_BC0	S3C64XX_SROMREG(4)
+#define S3C64XX_SROM_BC1	S3C64XX_SROMREG(8)
+#define S3C64XX_SROM_BC2	S3C64XX_SROMREG(0xc)
+#define S3C64XX_SROM_BC3	S3C64XX_SROMREG(0x10)
+#define S3C64XX_SROM_BC4	S3C64XX_SROMREG(0x14)
+#define S3C64XX_SROM_BC5	S3C64XX_SROMREG(0x18)
+
+/*
+ * one register BW holds 5 x 4-bit packed settings for NCS0 - NCS4
+ */
+
+#define S3C64XX_SROM_BW__DATAWIDTH__SHIFT	0
+#define S3C64XX_SROM_BW__WAITENABLE__SHIFT	2
+#define S3C64XX_SROM_BW__BYTEENABLE__SHIFT	3
+#define S3C64XX_SROM_BW__CS_MASK 0xf
+
+#define S3C64XX_SROM_BW__NCS0__SHIFT	0
+#define S3C64XX_SROM_BW__NCS1__SHIFT	4
+#define S3C64XX_SROM_BW__NCS2__SHIFT	8
+#define S3C64XX_SROM_BW__NCS3__SHIFT	0xc
+#define S3C64XX_SROM_BW__NCS4__SHIFT	0x10
+
+/*
+ * applies to same to BCS0 - BCS4
+ */
+
+#define S3C64XX_SROM_BCX__PMC__SHIFT	0
+#define S3C64XX_SROM_BCX__PMC__MASK	3
+#define S3C64XX_SROM_BCX__TACP__SHIFT	4
+#define S3C64XX_SROM_BCX__TACP__MASK	0xf
+#define S3C64XX_SROM_BCX__TCAH__SHIFT	8
+#define S3C64XX_SROM_BCX__TCAH__MASK	0xf
+#define S3C64XX_SROM_BCX__TCOH__SHIFT	12
+#define S3C64XX_SROM_BCX__TCOH__MASK	0xf
+#define S3C64XX_SROM_BCX__TACC__SHIFT	16
+#define S3C64XX_SROM_BCX__TACC__MASK	0x1f
+#define S3C64XX_SROM_BCX__TCOS__SHIFT	24
+#define S3C64XX_SROM_BCX__TCOS__MASK	0xf
+#define S3C64XX_SROM_BCX__TACS__SHIFT	28
+#define S3C64XX_SROM_BCX__TACS__MASK	0xf
+
+#endif /* _PLAT_REGS_SROM_H */

[PATCH 2/4] s3c64xx-add-srom-physical-virtual-mapping.patch

[Andy Green]

This adds the physical address of the SROM unit, and
applies a virtual mapping for it to the S3C_VA_MEM
slot.

Signed-off-by: Andy Green <andy@warmcat.com>
---

 arch/arm/mach-s3c6400/include/mach/map.h |    2 ++
 arch/arm/plat-s3c64xx/cpu.c              |    5 +++++
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h
index b0fb5c5..f211744 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c6400/include/mach/map.h
@@ -50,6 +50,8 @@
 #define S3C_VA_UART2		S3C_VA_UARTx(2)
 #define S3C_VA_UART3		S3C_VA_UARTx(3)
 
+#define S3C64XX_PA_SROM		(0x70000000)
+
 #define S3C64XX_PA_NAND		(0x70200000)
 #define S3C64XX_PA_FB		(0x77100000)
 #define S3C64XX_PA_USB_HSOTG	(0x7C000000)
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/plat-s3c64xx/cpu.c
index 49796d2..2dba92a 100644
--- a/arch/arm/plat-s3c64xx/cpu.c
+++ b/arch/arm/plat-s3c64xx/cpu.c
@@ -73,6 +73,11 @@ static struct map_desc s3c_iodesc[] __initdata = {
 		.length		= SZ_4K,
 		.type		= MT_DEVICE,
 	}, {
+		.virtual	= (unsigned long)S3C_VA_MEM,
+		.pfn		= __phys_to_pfn(S3C64XX_PA_SROM),
+		.length		= SZ_4K,
+		.type		= MT_DEVICE,
+	}, {
 		.virtual	= (unsigned long)(S3C_VA_UART + UART_OFFS),
 		.pfn		= __phys_to_pfn(S3C_PA_UART),
 		.length		= SZ_4K,

[PATCH 3/4] smdk6410-add-chipselect-setup.patch

[Andy Green]

Since the mach-smdk6410.c file claims it can start up the
smsc9115 ethernet device on the board, it should take care
about configuring the necessary chip select nCS1 so it can
see the chip.  The select defaults to 8-bit mode so without
config the Ethernet doesn't work.

This patch uses the new SROM definitions to set nCS1 to the
state found in the Samsung U-Boot port for 6410.  It may be
more conservative that it needs to be since those settings
were marked as for CS8900A also using this chip select.

But this change is enough to get the ethernet working when
booted with Qi.

Signed-off-by: Andy Green <andy@warmcat.com>
---

 arch/arm/mach-s3c6410/mach-smdk6410.c |   27 +++++++++++++++++++++++++--
 1 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c
index 480d297..d613932 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c6410/mach-smdk6410.c
@@ -49,6 +49,7 @@
 #include <plat/regs-modem.h>
 #include <plat/regs-gpio.h>
 #include <plat/regs-sys.h>
+#include <plat/regs-srom.h>
 #include <plat/iic.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
@@ -156,8 +157,8 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 
 static struct resource smdk6410_smsc911x_resources[] = {
 	[0] = {
-		.start = 0x18000000,
-		.end   = 0x18000000 + SZ_64K - 1,
+		.start = S3C64XX_PA_XM0CSN1,
+		.end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
 		.flags = IORESOURCE_MEM,
 	},
 	[1] = {
@@ -429,10 +430,32 @@ static void __init smdk6410_map_io(void)
 
 static void __init smdk6410_machine_init(void)
 {
+	u32 cs1;
+
 	s3c_i2c0_set_platdata(NULL);
 	s3c_i2c1_set_platdata(NULL);
 	s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 
+	/* configure nCS1 width to 16 bits */
+
+	cs1 = __raw_readl(S3C64XX_SROM_BW) &
+		    ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
+	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
+		(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
+		(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
+						   S3C64XX_SROM_BW__NCS1__SHIFT;
+	__raw_writel(cs1, S3C64XX_SROM_BW);
+
+	/* set timing for nCS1 suitable for ethernet chip */
+
+	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
+		     (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
+		     (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
+		     (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
+		     (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
+		     (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
+		     (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
+
 	gpio_request(S3C64XX_GPN(5), "LCD power");
 	gpio_request(S3C64XX_GPF(13), "LCD power");
 	gpio_request(S3C64XX_GPF(15), "LCD power");

[PATCH 4/4] smdk6410-comment-ethernet-prerequisites.patch

[Andy Green]

LAN9115 Ethernet only works on SMDK6410 if certain switches
are set in specific ways.  Document the requirement.

Signed-off-by: Andy Green <andy@warmcat.com>
---

 arch/arm/mach-s3c6410/mach-smdk6410.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c
index d613932..c70661d 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c6410/mach-smdk6410.c
@@ -155,6 +155,16 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 };
 
+/*
+ * Configuring Ethernet on SMDK6410
+ *
+ * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
+ * The constant address below corresponds to nCS1
+ *
+ *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
+ *  2) CFG6 needs to be switched to "LAN9115" side
+ */
+
 static struct resource smdk6410_smsc911x_resources[] = {
 	[0] = {
 		.start = S3C64XX_PA_XM0CSN1,

[PATCH 0/4] Add s3c64xx SROM support and setup SMDK nCS1 for Ethernet

[Ben Dooks]

Andy Green wrote:
> The following series adds platform defines for s3c64xx SROM unit,
> and uses it to configure nCS1 in the SMDK mach- file so the ethernet
> works regardless of what the bootloader may or may not have done.
> 
> It also adds a comment about how the SMDK must be physically
> configured to allow the Ethernet to work and removes a magic
> constant address.

Looks ok, will look at merging into my next-s3c64xx tree at
somepoint soon.

> ---
> 
> Andy Green (4):
>       smdk6410-comment-ethernet-prerequisites.patch
>       smdk6410-add-chipselect-setup.patch
>       s3c64xx-add-srom-physical-virtual-mapping.patch
>       s3c64xx-introduce-srom-registers.patch
> 
> 
>  arch/arm/mach-s3c6400/include/mach/map.h       |   14 ++++++
>  arch/arm/mach-s3c6410/mach-smdk6410.c          |   37 ++++++++++++++-
>  arch/arm/plat-s3c64xx/cpu.c                    |    5 ++
>  arch/arm/plat-s3c64xx/include/plat/regs-srom.h |   59 ++++++++++++++++++++++++
>  4 files changed, 113 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/plat-s3c64xx/include/plat/regs-srom.h
>