* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support
2010-01-28 12:40 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support Magnus Damm
@ 2010-01-28 12:40 ` Magnus Damm
2010-01-28 22:08 ` Russell King - ARM Linux
2010-02-01 14:10 ` Pavel Machek
2010-01-28 12:40 ` [PATCH 02/06] ARM: Add sh7377 and G4EVM support Magnus Damm
` (4 subsequent siblings)
5 siblings, 2 replies; 16+ messages in thread
From: Magnus Damm @ 2010-01-28 12:40 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
This patch contains the SuperH Mobile ARM base support together
with sh7367 CPU and G3EVM board support. Only timer, serial
console and NOR flash are supported at this point. Patches for
the interrupt controller, pinmux support, clock framework and
runtime pm will be submitted as feature patches on top of this.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Applies on top of linux-next 20100119
arch/arm/Kconfig | 7
arch/arm/Makefile | 1
arch/arm/mach-shmobile/Kconfig | 53 ++++
arch/arm/mach-shmobile/Makefile | 12 +
arch/arm/mach-shmobile/Makefile.boot | 9
arch/arm/mach-shmobile/board-g3evm.c | 127 +++++++++++
arch/arm/mach-shmobile/clock-sh7367.c | 89 +++++++
arch/arm/mach-shmobile/include/mach/clkdev.h | 7
arch/arm/mach-shmobile/include/mach/common.h | 11
arch/arm/mach-shmobile/include/mach/dma.h | 1
arch/arm/mach-shmobile/include/mach/entry-macro.S | 39 +++
arch/arm/mach-shmobile/include/mach/gpio.h | 1
arch/arm/mach-shmobile/include/mach/hardware.h | 7
arch/arm/mach-shmobile/include/mach/io.h | 9
arch/arm/mach-shmobile/include/mach/irqs.h | 10
arch/arm/mach-shmobile/include/mach/memory.h | 7
arch/arm/mach-shmobile/include/mach/system.h | 14 +
arch/arm/mach-shmobile/include/mach/timex.h | 6
arch/arm/mach-shmobile/include/mach/uncompress.h | 21 +
arch/arm/mach-shmobile/include/mach/vmalloc.h | 6
arch/arm/mach-shmobile/setup-sh7367.c | 241 +++++++++++++++++++++
arch/arm/mach-shmobile/timer.c | 46 ++++
22 files changed, 724 insertions(+)
--- 0001/arch/arm/Kconfig
+++ work/arch/arm/Kconfig 2010-01-20 18:59:55.000000000 +0900
@@ -740,6 +740,11 @@ config ARCH_U8500
help
Support for ST-Ericsson's Ux500 architecture
+config ARCH_SHMOBILE
+ bool "Renesas SH-Mobile"
+ help
+ Support for Renesas's SH-Mobile ARM platforms
+
endchoice
source "arch/arm/mach-aaec2000/Kconfig"
@@ -851,6 +856,8 @@ source "arch/arm/mach-versatile/Kconfig"
source "arch/arm/mach-w90x900/Kconfig"
+source "arch/arm/mach-shmobile/Kconfig"
+
# Definitions to make life easier
config ARCH_ACORN
bool
--- 0001/arch/arm/Makefile
+++ work/arch/arm/Makefile 2010-01-20 18:59:55.000000000 +0900
@@ -166,6 +166,7 @@ machine-$(CONFIG_ARCH_S5P6440) := s5p64
machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100
machine-$(CONFIG_ARCH_SA1100) := sa1100
machine-$(CONFIG_ARCH_SHARK) := shark
+machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
machine-$(CONFIG_ARCH_STMP378X) := stmp378x
machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx
machine-$(CONFIG_ARCH_U300) := u300
--- /dev/null
+++ work/arch/arm/mach-shmobile/Kconfig 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,53 @@
+if ARCH_SHMOBILE
+
+comment "SH-Mobile System Type"
+
+config ARCH_SH7367
+ bool "SH-Mobile SH7367 (G3)"
+ select CPU_V6
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+
+comment "SH-Mobile Board Type"
+
+config MACH_G3EVM
+ bool "G3EVM board"
+ depends on ARCH_SH7367
+
+comment "SH-Mobile System Configuration"
+
+menu "Memory configuration"
+
+config MEMORY_START
+ hex "Physical memory start address"
+ default "0x50000000" if MACH_G3EVM
+ default "0x00000000"
+ ---help---
+ Tweak this only when porting to a new machine which does not
+ already have a defconfig. Changing it from the known correct
+ value on any of the known systems will only lead to disaster.
+
+config MEMORY_SIZE
+ hex "Physical memory size"
+ default "0x08000000" if MACH_G3EVM
+ default "0x04000000"
+ help
+ This sets the default memory size assumed by your kernel. It can
+ be overridden as normal by the 'mem=' argument on the kernel command
+ line.
+
+endmenu
+
+menu "Timer and clock configuration"
+
+config SH_TIMER_CMT
+ bool "CMT timer driver"
+ default y
+ help
+ This enables build of the CMT timer driver.
+
+endmenu
+
+endif
--- /dev/null
+++ work/arch/arm/mach-shmobile/Makefile 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,12 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Common objects
+obj-y := timer.o
+
+# CPU objects
+obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o
+
+# Board objects
+obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o
--- /dev/null
+++ work/arch/arm/mach-shmobile/Makefile.boot 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,9 @@
+__ZRELADDR := $(shell /bin/bash -c 'printf "0x%08x" \
+ $$[$(CONFIG_MEMORY_START) + 0x8000]')
+
+ zreladdr-y := $(__ZRELADDR)
+
+# Unsupported legacy stuff
+#
+#params_phys-y (Instead: Pass atags pointer in r2)
+#initrd_phys-y (Instead: Use compiled-in initramfs)
--- /dev/null
+++ work/arch/arm/mach-shmobile/board-g3evm.c 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,127 @@
+/*
+ * G3EVM board support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "kernel_ro",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+ .width = 2,
+ .parts = nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+ [0] = {
+ .start = 0x00000000,
+ .end = 0x08000000 - 1,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device nor_flash_device = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &nor_flash_data,
+ },
+ .num_resources = ARRAY_SIZE(nor_flash_resources),
+ .resource = nor_flash_resources,
+};
+
+
+static struct platform_device *g3evm_devices[] __initdata = {
+ &nor_flash_device,
+};
+
+static struct map_desc g3evm_io_desc[] __initdata = {
+ /* create a 1:1 entity map for 0xe6xxxxxx
+ * used by CPGA, INTC and PFC.
+ */
+ {
+ .virtual = 0xe6000000,
+ .pfn = __phys_to_pfn(0xe6000000),
+ .length = 256 << 20,
+ .type = MT_DEVICE_NONSHARED
+ },
+};
+
+static void __init g3evm_map_io(void)
+{
+ iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
+
+ /* setup early devices and clocks here as well */
+ sh7367_add_early_devices();
+ sh7367_clock_init();
+}
+
+static void __init g3evm_init(void)
+{
+ sh7367_add_standard_devices();
+
+ platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
+}
+
+MACHINE_START(G3EVM, "g3evm")
+ .phys_io = 0xe6000000,
+ .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
+ .map_io = g3evm_map_io,
+ .init_irq = sh7367_init_irq,
+ .init_machine = g3evm_init,
+ .timer = &shmobile_timer,
+MACHINE_END
--- /dev/null
+++ work/arch/arm/mach-shmobile/clock-sh7367.c 2010-01-21 19:49:08.000000000 +0900
@@ -0,0 +1,89 @@
+/*
+ * Preliminary clock framework support for sh7367
+ *
+ * Copyright (C) 2010 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/clk.h>
+
+struct clk {
+ const char *name;
+ unsigned long rate;
+};
+
+#include <asm/clkdev.h>
+
+int __clk_get(struct clk *clk)
+{
+ return 1;
+}
+EXPORT_SYMBOL(__clk_get);
+
+void __clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(__clk_put);
+
+
+int clk_enable(struct clk *clk)
+{
+ return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+ return clk ? clk->rate : 0;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+/* a static peripheral clock for now - enough to get sh-sci working */
+static struct clk peripheral_clk = {
+ .name = "peripheral_clk",
+ .rate = 48000000,
+};
+
+/* a static rclk for now - enough to get sh_cmt working */
+static struct clk r_clk = {
+ .name = "r_clk",
+ .rate = 32768,
+};
+
+static struct clk_lookup lookups[] = {
+ {
+ .clk = &peripheral_clk,
+ }, {
+ .clk = &r_clk,
+ }
+};
+
+void __init sh7367_clock_init(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+ lookups[i].con_id = lookups[i].clk->name;
+ clkdev_add(&lookups[i]);
+ }
+}
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/clkdev.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+int __clk_get(struct clk *clk);
+void __clk_put(struct clk *clk);
+
+#endif /* __ASM_MACH_CLKDEV_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/common.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,11 @@
+#ifndef __ARCH_MACH_COMMON_H
+#define __ARCH_MACH_COMMON_H
+
+extern struct sys_timer shmobile_timer;
+
+extern void sh7367_init_irq(void);
+extern void sh7367_add_early_devices(void);
+extern void sh7367_add_standard_devices(void);
+extern void sh7367_clock_init(void);
+
+#endif /* __ARCH_MACH_COMMON_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/dma.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1 @@
+/* empty */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/entry-macro.S 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+
+ .macro disable_fiq
+ .endm
+
+ .macro get_irqnr_preamble, base, tmp
+ .endm
+
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
+
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ ldr \base, =INTFLGA
+ ldr \irqnr, [\base]
+ cmp \irqnr, #0
+ beq 1000f
+ /* intevt to irq number */
+ lsr \irqnr, \irqnr, #0x5
+ subs \irqnr, \irqnr, #16
+
+1000:
+ .endm
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/gpio.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1 @@
+/* empty */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/hardware.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_HARDWARE_H
+#define __ASM_MACH_HARDWARE_H
+
+/* INTFLGA register - used by low level interrupt code in entry-macro.S */
+#define INTFLGA 0xe6980018
+
+#endif /* __ASM_MACH_HARDWARE_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/io.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,9 @@
+#ifndef __ASM_MACH_IO_H
+#define __ASM_MACH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+#define __io(a) ((void __iomem *)(a))
+#define __mem_pci(a) (a)
+
+#endif /* __ASM_MACH_IO_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/irqs.h 2010-01-21 19:48:34.000000000 +0900
@@ -0,0 +1,10 @@
+#ifndef __ASM_MACH_IRQS_H
+#define __ASM_MACH_IRQS_H
+
+#define NR_IRQS 512
+#define NR_IRQS_LEGACY 8
+
+#define evt2irq(evt) (((evt) >> 5) - 16)
+#define irq2evt(irq) (((irq) + 16) << 5)
+
+#endif /* __ASM_MACH_IRQS_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/memory.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_MEMORY_H
+#define __ASM_MACH_MEMORY_H
+
+#define PHYS_OFFSET UL(CONFIG_MEMORY_START)
+#define MEM_SIZE UL(CONFIG_MEMORY_SIZE)
+
+#endif /* __ASM_MACH_MEMORY_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/system.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,14 @@
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+static inline void arch_idle(void)
+{
+ cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+ cpu_reset(0);
+}
+
+#endif
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/timex.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_TIMEX_H
+#define __ASM_MACH_TIMEX_H
+
+#define CLOCK_TICK_RATE 1193180 /* unused i8253 PIT value */
+
+#endif /* __ASM_MACH_TIMEX_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/uncompress.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,21 @@
+#ifndef __ASM_MACH_UNCOMPRESS_H
+#define __ASM_MACH_UNCOMPRESS_H
+
+/*
+ * This does not append a newline
+ */
+static void putc(int c)
+{
+}
+
+static inline void flush(void)
+{
+}
+
+static void arch_decomp_setup(void)
+{
+}
+
+#define arch_decomp_wdog()
+
+#endif /* __ASM_MACH_UNCOMPRESS_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/vmalloc.h 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_VMALLOC_H
+#define __ASM_MACH_VMALLOC_H
+
+#define VMALLOC_END (PAGE_OFFSET + 0x24000000)
+
+#endif /* __ASM_MACH_VMALLOC_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/setup-sh7367.c 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,241 @@
+/*
+ * sh7367 processor support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+ .mapbase = 0xe6c40000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+ .mapbase = 0xe6c50000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+ .mapbase = 0xe6c60000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+ .mapbase = 0xe6c70000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+ .mapbase = 0xe6c80000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+ .mapbase = 0xe6cb0000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+ .mapbase = 0xe6c30000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+ .name = "CMT10",
+ .channel_offset = 0x10,
+ .timer_bit = 0,
+ .clk = "r_clk",
+ .clockevent_rating = 125,
+ .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+ [0] = {
+ .name = "CMT10",
+ .start = 0xe6138010,
+ .end = 0xe613801b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 72,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device cmt10_device = {
+ .name = "sh_cmt",
+ .id = 10,
+ .dev = {
+ .platform_data = &cmt10_platform_data,
+ },
+ .resource = cmt10_resources,
+ .num_resources = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7367_early_devices[] __initdata = {
+ &scif0_device,
+ &scif1_device,
+ &scif2_device,
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+ &scif6_device,
+ &cmt10_device,
+};
+
+void __init sh7367_add_standard_devices(void)
+{
+ platform_add_devices(sh7367_early_devices,
+ ARRAY_SIZE(sh7367_early_devices));
+}
+
+#define SYMSTPCR2 0xe6158048
+#define SYMSTPCR2_CMT1 (1 << 29)
+
+void __init sh7367_add_early_devices(void)
+{
+ /* enable clock to CMT1 */
+ __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
+
+ early_platform_add_devices(sh7367_early_devices,
+ ARRAY_SIZE(sh7367_early_devices));
+}
+
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources INTCA */
+
+ SCIFA0, SCIFA1, SCIFA2, SCIFA3, SCIFA4, SCIFA5, SCIFB,
+ CMT10,
+};
+
+static struct intc_vect vectors[] = {
+ INTC_VECT(CMT10, 0xb00),
+ INTC_VECT(SCIFA0, 0xc00), INTC_VECT(SCIFA1, 0xc20),
+ INTC_VECT(SCIFA2, 0xc40), INTC_VECT(SCIFA3, 0xc60),
+ INTC_VECT(SCIFA4, 0xd20), INTC_VECT(SCIFA5, 0xd40),
+ INTC_VECT(SCIFB, 0xd60),
+};
+
+static struct intc_mask_reg mask_registers[] = {
+ { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+ { 0, 0, 0, 0, SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+ { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+ { SCIFB, SCIFA5, SCIFA4, 0, 0, 0, 0, 0 } },
+ { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+ { 0, 0, 0, CMT10, 0, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg prio_registers[] = {
+ { 0xe6940014, 0, 16, 4, /* IPRFA */ { 0, 0, 0, CMT10 } },
+ { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+ SCIFA2, SCIFA3 } },
+ { 0xe6940020, 0, 16, 4, /* IPRIA */ { 0, SCIFA4, 0, 0 } },
+ { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, 0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7367", vectors, NULL, mask_registers,
+ prio_registers, NULL);
+
+void __init sh7367_init_irq(void)
+{
+ register_intc_controller(&intc_desc);
+}
--- /dev/null
+++ work/arch/arm/mach-shmobile/timer.c 2010-01-20 18:59:56.000000000 +0900
@@ -0,0 +1,46 @@
+/*
+ * SH-Mobile Timer
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2002 - 2009 Paul Mundt
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ */
+#include <linux/platform_device.h>
+#include <asm/mach/time.h>
+
+static void __init shmobile_late_time_init(void)
+{
+ /*
+ * Make sure all compiled-in early timers register themselves.
+ *
+ * Run probe() for two "earlytimer" devices, these will be the
+ * clockevents and clocksource devices respectively. In the event
+ * that only a clockevents device is available, we -ENODEV on the
+ * clocksource and the jiffies clocksource is used transparently
+ * instead. No error handling is necessary here.
+ */
+ early_platform_driver_register_all("earlytimer");
+ early_platform_driver_probe("earlytimer", 2, 0);
+}
+
+static void __init shmobile_timer_init(void)
+{
+ late_time_init = shmobile_late_time_init;
+}
+
+struct sys_timer shmobile_timer = {
+ .init = shmobile_timer_init,
+};
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support
2010-01-28 12:40 ` [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support Magnus Damm
@ 2010-01-28 22:08 ` Russell King - ARM Linux
2010-01-29 11:26 ` Magnus Damm
2010-02-01 14:10 ` Pavel Machek
1 sibling, 1 reply; 16+ messages in thread
From: Russell King - ARM Linux @ 2010-01-28 22:08 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jan 28, 2010 at 09:40:38PM +0900, Magnus Damm wrote:
> --- 0001/arch/arm/Kconfig
> +++ work/arch/arm/Kconfig 2010-01-20 18:59:55.000000000 +0900
> @@ -740,6 +740,11 @@ config ARCH_U8500
> help
> Support for ST-Ericsson's Ux500 architecture
>
> +config ARCH_SHMOBILE
> + bool "Renesas SH-Mobile"
> + help
> + Support for Renesas's SH-Mobile ARM platforms
> +
The entries in this choice menu are sorted by option text - please
place your new option appropriately to avoid conflicts.
> endchoice
>
> source "arch/arm/mach-aaec2000/Kconfig"
> @@ -851,6 +856,8 @@ source "arch/arm/mach-versatile/Kconfig"
>
> source "arch/arm/mach-w90x900/Kconfig"
>
> +source "arch/arm/mach-shmobile/Kconfig"
Ditto, except ordered alphabetically by filename.
> +static struct sh_timer_config cmt10_platform_data = {
> + .name = "CMT10",
> + .channel_offset = 0x10,
> + .timer_bit = 0,
> + .clk = "r_clk",
I guess you can't do a lot about this because of arch/sh, but over in ARM
land, we use clkdev to get the clock primerily by the device name rather
than a string passed around; this is how the clk API is meant to be used.
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support
2010-01-28 22:08 ` Russell King - ARM Linux
@ 2010-01-29 11:26 ` Magnus Damm
0 siblings, 0 replies; 16+ messages in thread
From: Magnus Damm @ 2010-01-29 11:26 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jan 29, 2010 at 7:08 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> The entries in this choice menu are sorted by option text - please
> place your new option appropriately to avoid conflicts.
Ok, will make sure it gets sorted properly.
>> +static struct sh_timer_config cmt10_platform_data = {
>> + ? ? .name = "CMT10",
>> + ? ? .channel_offset = 0x10,
>> + ? ? .timer_bit = 0,
>> + ? ? .clk = "r_clk",
>
> I guess you can't do a lot about this because of arch/sh, but over in ARM
> land, we use clkdev to get the clock primerily by the device name rather
> than a string passed around; this is how the clk API is meant to be used.
At this early stage there is not so much to do. When I get around to
implement the clock framework and runtime pm for SuperH Mobile ARM
then I'll have a close look at clkdev.
I'll update and resend these patches next week.
Thanks!
/ magnus
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support
2010-01-28 12:40 ` [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support Magnus Damm
2010-01-28 22:08 ` Russell King - ARM Linux
@ 2010-02-01 14:10 ` Pavel Machek
2010-02-01 14:26 ` Paul Mundt
1 sibling, 1 reply; 16+ messages in thread
From: Pavel Machek @ 2010-02-01 14:10 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
> This patch contains the SuperH Mobile ARM base support together
> with sh7367 CPU and G3EVM board support. Only timer, serial
> console and NOR flash are supported at this point. Patches for
> the interrupt controller, pinmux support, clock framework and
> runtime pm will be submitted as feature patches on top of this.
...
> arch/arm/mach-shmobile/Makefile.boot | 9
> arch/arm/mach-shmobile/board-g3evm.c | 127 +++++++++++
I guess I'm confused. I thought superh was architecture, like arm
is.....?
I superh actually manufacturer? And can we get shorter name than
mach-shmobile? mach-shm?
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support
2010-02-01 14:10 ` Pavel Machek
@ 2010-02-01 14:26 ` Paul Mundt
2010-02-01 16:19 ` Linus Walleij
0 siblings, 1 reply; 16+ messages in thread
From: Paul Mundt @ 2010-02-01 14:26 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Feb 01, 2010 at 03:10:57PM +0100, Pavel Machek wrote:
> > This patch contains the SuperH Mobile ARM base support together
> > with sh7367 CPU and G3EVM board support. Only timer, serial
> > console and NOR flash are supported at this point. Patches for
> > the interrupt controller, pinmux support, clock framework and
> > runtime pm will be submitted as feature patches on top of this.
> ...
> > arch/arm/mach-shmobile/Makefile.boot | 9
> > arch/arm/mach-shmobile/board-g3evm.c | 127 +++++++++++
>
> I guess I'm confused. I thought superh was architecture, like arm
> is.....?
>
SH-Mobile (G series, in this case) is a line of SH/ARM multi-cores. They
contain both SH and ARM MPUs and are built up almost entirely on SH IP
blocks. There are some SH-Mobiles that are SH-only, and those are taken
care of in arch/sh/ as normal. Most of the shared code sits in drivers/sh
and so forth, requiring fairly little glue on the ARM architecture side.
As support for these CPUs is extended, we'll likely see more of arch/sh/
being generalized. There's likely not going to be enough that is directly
reusable between the two to warrant a split out architecture directory of
its own, but we'll see how it goes.
It's forseeable that we will also see support for the same CPU in
arch/sh/ aimed at the SH MPU, and that we can have linux running on both
the SH and the ARM at the same time sharing the same peripheral domain.
However, all of these things are out of scope for this patch set, which
is just getting the groundwork established for the ARM MPU.
> I superh actually manufacturer? And can we get shorter name than
> mach-shmobile? mach-shm?
shmobile is what the line is called, and matches the naming scheme we
already have in-tree today. Changing that around would only lead to more
confusion. It's also not really any longer than many of the other mach
types, so I don't really see the point.
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support
2010-02-01 14:26 ` Paul Mundt
@ 2010-02-01 16:19 ` Linus Walleij
2010-02-02 0:12 ` Paul Mundt
0 siblings, 1 reply; 16+ messages in thread
From: Linus Walleij @ 2010-02-01 16:19 UTC (permalink / raw)
To: linux-arm-kernel
2010/2/1 Paul Mundt <lethal@linux-sh.org>:
> SH-Mobile (G series, in this case) is a line of SH/ARM multi-cores. They
> contain both SH and ARM MPUs and are built up almost entirely on SH IP
> blocks.
Jaysis, that's one odd bird. There must be some upside to designing
things like this, is there some paper or conference presentation on the idea
behind this thing somewhere out there? I just get very curious!
Linus Walleij
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support
2010-02-01 16:19 ` Linus Walleij
@ 2010-02-02 0:12 ` Paul Mundt
0 siblings, 0 replies; 16+ messages in thread
From: Paul Mundt @ 2010-02-02 0:12 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Feb 01, 2010 at 05:19:21PM +0100, Linus Walleij wrote:
> 2010/2/1 Paul Mundt <lethal@linux-sh.org>:
>
> > SH-Mobile (G series, in this case) is a line of SH/ARM multi-cores. They
> > contain both SH and ARM MPUs and are built up almost entirely on SH IP
> > blocks.
>
> Jaysis, that's one odd bird. There must be some upside to designing
> things like this, is there some paper or conference presentation on the idea
> behind this thing somewhere out there? I just get very curious!
>
Most of it comes down to customer requirements, where the application
stack is primarily running on a single MPU and the other is primarily
used as a co-processor. In the Japanese cellular market (what this series
was designed for) many people have a lot of existing ITRON code tied to
one architecture or the other that they don't wish to part with, are
unable to port, etc. a lot of that ends up being multimedia bits, but
people have done other things with it, too. We've also done SH/M32R
multi-cores in the past for similar reasons, although those had a limited
production run.
The multiple kernels on multiple CPUs thing is pretty standard for the
Japanese market at least, we face similar issues on SH SMP where we have
a need for lightweight CPU and memory hotplug/unplug in order to offline
different CPUs temporarily for one-shot ITRON/uITRON applications (which
gets to be tricky if that CPUs memory is an active NUMA node that we've
already spread allocations to), this is something quite common in
automotive at least.
The real problem with ITRON is that many of the existing applications
do fairly questionable things with register accesses, which can cause
troubles for things like dynamic clock gating and the like. On the other
hand, it only runs in a single address space, so simply paravirtualizing
the parts we care about should be lightweight enough. Outside of the
Japanese market, ITRON and its variants are much more of an unknown, so
providing Linux for both cores is becoming gradually more important. The
previous generations all contained an integrated cellular baseband which
largely restricted it to the domestic market, although this has been
changing over the last couple of years with multi-band FOMA becoming more
commonplace. In any event, things like AP4 are more intended for general
use and decouple the baseband completely.
The domestic market will likely gradually transition over to Linux on
both cores, but it will take some time, and even then we'll likely never
be rid of ITRON completely (and especially not uITRON). These CPUs have
been in the majority of Japanese cell phones for almost a decade, with a
lot of the underlying code changing very little. The ARM MPU itself is a
new addition on the side that was only added a couple of years ago, but
we still have to wait and see if people are able to make effective use of
both.
As far as public information, there's very little in either english or
japanese. I couldn't really point you at anything specific that you
couldn't find with google. In any event, now that these sorts of things
are no longer restricted to the Japanese domestic market we'll hopefully
be able to employ a greater degree of transparency.
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 02/06] ARM: Add sh7377 and G4EVM support
2010-01-28 12:40 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support Magnus Damm
2010-01-28 12:40 ` [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support Magnus Damm
@ 2010-01-28 12:40 ` Magnus Damm
2010-01-28 12:41 ` [PATCH 03/06] ARM: Add sh7372 and AP4EVB support Magnus Damm
` (3 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Magnus Damm @ 2010-01-28 12:40 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
This patch adds base support for the SuperH Mobile ARM processor
sh7377 together with G4EVM board support. Only timer, serial
console and NOR flash are supported at this point. Patches for
the interrupt controller, pinmux support, clock framework and
runtime pm will be submitted as feature patches on top of this.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Applies on top of linux-next 20100119 and the sh7367 patch.
arch/arm/mach-shmobile/Kconfig | 14 +
arch/arm/mach-shmobile/Makefile | 2
arch/arm/mach-shmobile/board-g4evm.c | 127 ++++++++++++
arch/arm/mach-shmobile/include/mach/common.h | 4
arch/arm/mach-shmobile/setup-sh7377.c | 260 ++++++++++++++++++++++++++
5 files changed, 407 insertions(+)
--- 0002/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2010-01-21 19:50:20.000000000 +0900
@@ -10,12 +10,24 @@ config ARCH_SH7367
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
+config ARCH_SH7377
+ bool "SH-Mobile SH7377 (G4)"
+ select CPU_V7
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+
comment "SH-Mobile Board Type"
config MACH_G3EVM
bool "G3EVM board"
depends on ARCH_SH7367
+config MACH_G4EVM
+ bool "G4EVM board"
+ depends on ARCH_SH7377
+
comment "SH-Mobile System Configuration"
menu "Memory configuration"
@@ -23,6 +35,7 @@ menu "Memory configuration"
config MEMORY_START
hex "Physical memory start address"
default "0x50000000" if MACH_G3EVM
+ default "0x40000000" if MACH_G4EVM
default "0x00000000"
---help---
Tweak this only when porting to a new machine which does not
@@ -32,6 +45,7 @@ config MEMORY_START
config MEMORY_SIZE
hex "Physical memory size"
default "0x08000000" if MACH_G3EVM
+ default "0x08000000" if MACH_G4EVM
default "0x04000000"
help
This sets the default memory size assumed by your kernel. It can
--- 0002/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2010-01-21 19:50:20.000000000 +0900
@@ -7,6 +7,8 @@ obj-y := timer.o
# CPU objects
obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o
+obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7367.o
# Board objects
obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o
+obj-$(CONFIG_MACH_G4EVM) += board-g4evm.o
--- /dev/null
+++ work/arch/arm/mach-shmobile/board-g4evm.c 2010-01-21 19:50:21.000000000 +0900
@@ -0,0 +1,127 @@
+/*
+ * G4EVM board support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "kernel_ro",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+ .width = 2,
+ .parts = nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+ [0] = {
+ .start = 0x00000000,
+ .end = 0x08000000 - 1,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device nor_flash_device = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &nor_flash_data,
+ },
+ .num_resources = ARRAY_SIZE(nor_flash_resources),
+ .resource = nor_flash_resources,
+};
+
+
+static struct platform_device *g4evm_devices[] __initdata = {
+ &nor_flash_device,
+};
+
+static struct map_desc g4evm_io_desc[] __initdata = {
+ /* create a 1:1 entity map for 0xe6xxxxxx
+ * used by CPGA, INTC and PFC.
+ */
+ {
+ .virtual = 0xe6000000,
+ .pfn = __phys_to_pfn(0xe6000000),
+ .length = 256 << 20,
+ .type = MT_DEVICE_NONSHARED
+ },
+};
+
+static void __init g4evm_map_io(void)
+{
+ iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
+
+ /* setup early devices and clocks here as well */
+ sh7377_add_early_devices();
+ sh7367_clock_init(); /* use g3 clocks for now */
+}
+
+static void __init g4evm_init(void)
+{
+ sh7377_add_standard_devices();
+
+ platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));
+}
+
+MACHINE_START(G4EVM, "g4evm")
+ .phys_io = 0xe6000000,
+ .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
+ .map_io = g4evm_map_io,
+ .init_irq = sh7377_init_irq,
+ .init_machine = g4evm_init,
+ .timer = &shmobile_timer,
+MACHINE_END
--- 0002/arch/arm/mach-shmobile/include/mach/common.h
+++ work/arch/arm/mach-shmobile/include/mach/common.h 2010-01-21 19:50:20.000000000 +0900
@@ -8,4 +8,8 @@ extern void sh7367_add_early_devices(voi
extern void sh7367_add_standard_devices(void);
extern void sh7367_clock_init(void);
+extern void sh7377_init_irq(void);
+extern void sh7377_add_early_devices(void);
+extern void sh7377_add_standard_devices(void);
+
#endif /* __ARCH_MACH_COMMON_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/setup-sh7377.c 2010-01-21 19:50:21.000000000 +0900
@@ -0,0 +1,260 @@
+/*
+ * sh7377 processor support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+ .mapbase = 0xe6c40000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+ .mapbase = 0xe6c50000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+ .mapbase = 0xe6c60000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+ .mapbase = 0xe6c70000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+ .mapbase = 0xe6c80000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+ .mapbase = 0xe6cb0000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+ .mapbase = 0xe6cc0000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 196, 196, 196, 196 },
+};
+
+static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+};
+
+static struct plat_sci_port scif7_platform_data = {
+ .mapbase = 0xe6c30000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif7_device = {
+ .name = "sh-sci",
+ .id = 7,
+ .dev = {
+ .platform_data = &scif7_platform_data,
+ },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+ .name = "CMT10",
+ .channel_offset = 0x10,
+ .timer_bit = 0,
+ .clk = "r_clk",
+ .clockevent_rating = 125,
+ .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+ [0] = {
+ .name = "CMT10",
+ .start = 0xe6138010,
+ .end = 0xe613801b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 72,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device cmt10_device = {
+ .name = "sh_cmt",
+ .id = 10,
+ .dev = {
+ .platform_data = &cmt10_platform_data,
+ },
+ .resource = cmt10_resources,
+ .num_resources = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7377_early_devices[] __initdata = {
+ &scif0_device,
+ &scif1_device,
+ &scif2_device,
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+ &scif6_device,
+ &scif7_device,
+ &cmt10_device,
+};
+
+void __init sh7377_add_standard_devices(void)
+{
+ platform_add_devices(sh7377_early_devices,
+ ARRAY_SIZE(sh7377_early_devices));
+}
+
+#define SMSTPCR3 0xe615013c
+#define SMSTPCR3_CMT1 (1 << 29)
+
+void __init sh7377_add_early_devices(void)
+{
+ /* enable clock to CMT1 */
+ __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
+
+ early_platform_add_devices(sh7377_early_devices,
+ ARRAY_SIZE(sh7377_early_devices));
+}
+
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources INTCA */
+
+ SCIFA0, SCIFA1, SCIFA2, SCIFA3, SCIFA4, SCIFA5, SCIFB, SCIFA6,
+ CMT10,
+};
+
+static struct intc_vect vectors[] = {
+ INTC_VECT(CMT10, 0xb00),
+ INTC_VECT(SCIFA0, 0xc00), INTC_VECT(SCIFA1, 0xc20),
+ INTC_VECT(SCIFA2, 0xc40), INTC_VECT(SCIFA3, 0xc60),
+ INTC_VECT(SCIFA4, 0xd20), INTC_VECT(SCIFA5, 0xd40),
+ INTC_VECT(SCIFB, 0xd60), INTC_VECT(SCIFA6, 0x1a80),
+};
+
+static struct intc_mask_reg mask_registers[] = {
+ { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+ { 0, 0, 0, 0, SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+ { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+ { SCIFB, SCIFA5, SCIFA4, 0, 0, 0, 0, 0 } },
+ { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+ { 0, 0, 0, CMT10, 0, 0, 0, 0 } },
+ { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
+ { 0, 0, 0, 0, SCIFA6, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg prio_registers[] = {
+ { 0xe6940014, 0, 16, 4, /* IPRFA */ { 0, 0, 0, CMT10 } },
+ { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+ SCIFA2, SCIFA3 } },
+ { 0xe6940020, 0, 16, 4, /* IPRIA */ { 0, SCIFA4, 0, 0 } },
+ { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, 0 } },
+ { 0xe695003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7377", vectors, NULL, mask_registers,
+ prio_registers, NULL);
+
+void __init sh7377_init_irq(void)
+{
+ register_intc_controller(&intc_desc);
+}
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 03/06] ARM: Add sh7372 and AP4EVB support
2010-01-28 12:40 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support Magnus Damm
2010-01-28 12:40 ` [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support Magnus Damm
2010-01-28 12:40 ` [PATCH 02/06] ARM: Add sh7377 and G4EVM support Magnus Damm
@ 2010-01-28 12:41 ` Magnus Damm
2010-01-28 22:19 ` Russell King - ARM Linux
2010-01-28 12:41 ` [PATCH 04/06] sh: Build drivers/sh for SuperH Mobile ARM Magnus Damm
` (2 subsequent siblings)
5 siblings, 1 reply; 16+ messages in thread
From: Magnus Damm @ 2010-01-28 12:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
This patch adds base support for the SuperH Mobile ARM processor
sh7372 together with AP4EVB board support. Only timer, serial
console and NOR flash are supported at this point. Patches for
the interrupt controller, pinmux support, clock framework and
runtime pm will be submitted as feature patches on top of this.
The mach-type entry has been submitted but is included here for now.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Applies on top of linux-next 20100119 and the sh7367+sh7377 patches.
arch/arm/mach-shmobile/Kconfig | 14 +
arch/arm/mach-shmobile/Makefile | 2
arch/arm/mach-shmobile/board-ap4evb.c | 127 +++++++++++++
arch/arm/mach-shmobile/include/mach/common.h | 4
arch/arm/mach-shmobile/setup-sh7372.c | 241 ++++++++++++++++++++++++++
arch/arm/tools/mach-types | 1
6 files changed, 389 insertions(+)
--- 0003/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2010-01-21 19:51:03.000000000 +0900
@@ -18,6 +18,14 @@ config ARCH_SH7377
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
+config ARCH_SH7372
+ bool "SH-Mobile SH7372 (AP4)"
+ select CPU_V7
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+
comment "SH-Mobile Board Type"
config MACH_G3EVM
@@ -28,6 +36,10 @@ config MACH_G4EVM
bool "G4EVM board"
depends on ARCH_SH7377
+config MACH_AP4EVB
+ bool "AP4EVB board"
+ depends on ARCH_SH7372
+
comment "SH-Mobile System Configuration"
menu "Memory configuration"
@@ -36,6 +48,7 @@ config MEMORY_START
hex "Physical memory start address"
default "0x50000000" if MACH_G3EVM
default "0x40000000" if MACH_G4EVM
+ default "0x40000000" if MACH_AP4EVB
default "0x00000000"
---help---
Tweak this only when porting to a new machine which does not
@@ -46,6 +59,7 @@ config MEMORY_SIZE
hex "Physical memory size"
default "0x08000000" if MACH_G3EVM
default "0x08000000" if MACH_G4EVM
+ default "0x10000000" if MACH_AP4EVB
default "0x04000000"
help
This sets the default memory size assumed by your kernel. It can
--- 0003/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2010-01-21 19:51:03.000000000 +0900
@@ -8,7 +8,9 @@ obj-y := timer.o
# CPU objects
obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o
obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7367.o
+obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7367.o
# Board objects
obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o
obj-$(CONFIG_MACH_G4EVM) += board-g4evm.o
+obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o
--- /dev/null
+++ work/arch/arm/mach-shmobile/board-ap4evb.c 2010-01-21 19:51:04.000000000 +0900
@@ -0,0 +1,127 @@
+/*
+ * AP4EVB board support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "kernel_ro",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+ .width = 2,
+ .parts = nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+ [0] = {
+ .start = 0x00000000,
+ .end = 0x08000000 - 1,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device nor_flash_device = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &nor_flash_data,
+ },
+ .num_resources = ARRAY_SIZE(nor_flash_resources),
+ .resource = nor_flash_resources,
+};
+
+
+static struct platform_device *ap4evb_devices[] __initdata = {
+ &nor_flash_device,
+};
+
+static struct map_desc ap4evb_io_desc[] __initdata = {
+ /* create a 1:1 entity map for 0xe6xxxxxx
+ * used by CPGA, INTC and PFC.
+ */
+ {
+ .virtual = 0xe6000000,
+ .pfn = __phys_to_pfn(0xe6000000),
+ .length = 256 << 20,
+ .type = MT_DEVICE_NONSHARED
+ },
+};
+
+static void __init ap4evb_map_io(void)
+{
+ iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
+
+ /* setup early devices and clocks here as well */
+ sh7372_add_early_devices();
+ sh7367_clock_init(); /* use g3 clocks for now */
+}
+
+static void __init ap4evb_init(void)
+{
+ sh7372_add_standard_devices();
+
+ platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
+}
+
+MACHINE_START(AP4EVB, "ap4evb")
+ .phys_io = 0xe6000000,
+ .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
+ .map_io = ap4evb_map_io,
+ .init_irq = sh7372_init_irq,
+ .init_machine = ap4evb_init,
+ .timer = &shmobile_timer,
+MACHINE_END
--- 0003/arch/arm/mach-shmobile/include/mach/common.h
+++ work/arch/arm/mach-shmobile/include/mach/common.h 2010-01-21 19:51:03.000000000 +0900
@@ -12,4 +12,8 @@ extern void sh7377_init_irq(void);
extern void sh7377_add_early_devices(void);
extern void sh7377_add_standard_devices(void);
+extern void sh7372_init_irq(void);
+extern void sh7372_add_early_devices(void);
+extern void sh7372_add_standard_devices(void);
+
#endif /* __ARCH_MACH_COMMON_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/setup-sh7372.c 2010-01-21 19:51:04.000000000 +0900
@@ -0,0 +1,241 @@
+/*
+ * sh7372 processor support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+ .mapbase = 0xe6c40000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+ .mapbase = 0xe6c50000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+ .mapbase = 0xe6c60000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+ .mapbase = 0xe6c70000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+ .mapbase = 0xe6c80000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+ .mapbase = 0xe6cb0000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+ .mapbase = 0xe6c30000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .type = PORT_SCIF,
+ .irqs = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+ .name = "CMT10",
+ .channel_offset = 0x10,
+ .timer_bit = 0,
+ .clk = "r_clk",
+ .clockevent_rating = 125,
+ .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+ [0] = {
+ .name = "CMT10",
+ .start = 0xe6138010,
+ .end = 0xe613801b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 72,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device cmt10_device = {
+ .name = "sh_cmt",
+ .id = 10,
+ .dev = {
+ .platform_data = &cmt10_platform_data,
+ },
+ .resource = cmt10_resources,
+ .num_resources = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7372_early_devices[] __initdata = {
+ &scif0_device,
+ &scif1_device,
+ &scif2_device,
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+ &scif6_device,
+ &cmt10_device,
+};
+
+void __init sh7372_add_standard_devices(void)
+{
+ platform_add_devices(sh7372_early_devices,
+ ARRAY_SIZE(sh7372_early_devices));
+}
+
+#define SMSTPCR3 0xe615013c
+#define SMSTPCR3_CMT1 (1 << 29)
+
+void __init sh7372_add_early_devices(void)
+{
+ /* enable clock to CMT1 */
+ __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
+
+ early_platform_add_devices(sh7372_early_devices,
+ ARRAY_SIZE(sh7372_early_devices));
+}
+
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources INTCA */
+
+ SCIFA0, SCIFA1, SCIFA2, SCIFA3, SCIFA4, SCIFA5, SCIFB,
+ CMT10,
+};
+
+static struct intc_vect vectors[] = {
+ INTC_VECT(CMT10, 0xb00),
+ INTC_VECT(SCIFA0, 0xc00), INTC_VECT(SCIFA1, 0xc20),
+ INTC_VECT(SCIFA2, 0xc40), INTC_VECT(SCIFA3, 0xc60),
+ INTC_VECT(SCIFA4, 0xd20), INTC_VECT(SCIFA5, 0xd40),
+ INTC_VECT(SCIFB, 0xd60),
+};
+
+static struct intc_mask_reg mask_registers[] = {
+ { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+ { 0, 0, 0, 0, SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+ { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+ { SCIFB, SCIFA5, SCIFA4, 0, 0, 0, 0, 0 } },
+ { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+ { 0, 0, 0, CMT10, 0, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg prio_registers[] = {
+ { 0xe6940014, 0, 16, 4, /* IPRFA */ { 0, 0, 0, CMT10 } },
+ { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+ SCIFA2, SCIFA3 } },
+ { 0xe6940020, 0, 16, 4, /* IPRIA */ { 0, SCIFA4, 0, 0 } },
+ { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, 0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7372", vectors, NULL, mask_registers,
+ prio_registers, NULL);
+
+void __init sh7372_init_irq(void)
+{
+ register_intc_controller(&intc_desc);
+}
--- 0001/arch/arm/tools/mach-types
+++ work/arch/arm/tools/mach-types 2010-01-21 19:51:03.000000000 +0900
@@ -2578,3 +2578,4 @@ glacier MACH_GLACIER GLACIER 2592
phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593
omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594
pca101 MACH_PCA101 PCA101 2595
+ap4evb MACH_AP4EVB AP4EVB 2630
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 03/06] ARM: Add sh7372 and AP4EVB support
2010-01-28 12:41 ` [PATCH 03/06] ARM: Add sh7372 and AP4EVB support Magnus Damm
@ 2010-01-28 22:19 ` Russell King - ARM Linux
0 siblings, 0 replies; 16+ messages in thread
From: Russell King - ARM Linux @ 2010-01-28 22:19 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jan 28, 2010 at 09:41:01PM +0900, Magnus Damm wrote:
> --- 0001/arch/arm/tools/mach-types
> +++ work/arch/arm/tools/mach-types 2010-01-21 19:51:03.000000000 +0900
> @@ -2578,3 +2578,4 @@ glacier MACH_GLACIER GLACIER 2592
> phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593
> omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594
> pca101 MACH_PCA101 PCA101 2595
> +ap4evb MACH_AP4EVB AP4EVB 2630
Note that this'll be included in the mach-types update which'll
probably be pushed to Linus probably tonight.
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 04/06] sh: Build drivers/sh for SuperH Mobile ARM
2010-01-28 12:40 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support Magnus Damm
` (2 preceding siblings ...)
2010-01-28 12:41 ` [PATCH 03/06] ARM: Add sh7372 and AP4EVB support Magnus Damm
@ 2010-01-28 12:41 ` Magnus Damm
2010-01-28 12:41 ` [PATCH 05/06] sh: Let INTC set IRQF_VALID on ARM platforms Magnus Damm
2010-01-28 12:41 ` [PATCH 06/06] sh-sci: Preliminary SuperH Mobile ARM support Magnus Damm
5 siblings, 0 replies; 16+ messages in thread
From: Magnus Damm @ 2010-01-28 12:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Build drivers/sh in the case for SuperH Mobile ARM.
Shared code for the interrupt controller (INTC) and
the gpio/pinmux (PFC) is located there.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
drivers/Makefile | 1 +
1 file changed, 1 insertion(+)
--- 0001/drivers/Makefile
+++ work/drivers/Makefile 2010-01-19 15:39:21.000000000 +0900
@@ -99,6 +99,7 @@ obj-$(CONFIG_SGI_SN) += sn/
obj-y += firmware/
obj-$(CONFIG_CRYPTO) += crypto/
obj-$(CONFIG_SUPERH) += sh/
+obj-$(CONFIG_ARCH_SHMOBILE) += sh/
obj-$(CONFIG_GENERIC_TIME) += clocksource/
obj-$(CONFIG_DMA_ENGINE) += dma/
obj-$(CONFIG_DCA) += dca/
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 05/06] sh: Let INTC set IRQF_VALID on ARM platforms
2010-01-28 12:40 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support Magnus Damm
` (3 preceding siblings ...)
2010-01-28 12:41 ` [PATCH 04/06] sh: Build drivers/sh for SuperH Mobile ARM Magnus Damm
@ 2010-01-28 12:41 ` Magnus Damm
2010-01-29 2:50 ` Paul Mundt
2010-01-28 12:41 ` [PATCH 06/06] sh-sci: Preliminary SuperH Mobile ARM support Magnus Damm
5 siblings, 1 reply; 16+ messages in thread
From: Magnus Damm @ 2010-01-28 12:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Reuse the SuperH INTC code on ARM by using set_irq_flags()
to set IRQF_VALID on ARM platforms. Reworking the shared ARM
interrupt code and removing IRQF_VALID is another option.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
drivers/sh/intc.c | 5 +++++
1 file changed, 5 insertions(+)
--- 0001/drivers/sh/intc.c
+++ work/drivers/sh/intc.c 2010-01-21 19:53:15.000000000 +0900
@@ -658,6 +658,11 @@ static void __init intc_register_irq(str
if (desc->ack_regs)
ack_handle[irq] = intc_ack_data(desc, d, enum_id);
+
+ /* Set IRQF_VALID to enable IRQ on ARM systems */
+#ifdef CONFIG_ARCH_SHMOBILE
+ set_irq_flags(irq, IRQF_VALID);
+#endif
}
static unsigned int __init save_reg(struct intc_desc_int *d,
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 05/06] sh: Let INTC set IRQF_VALID on ARM platforms
2010-01-28 12:41 ` [PATCH 05/06] sh: Let INTC set IRQF_VALID on ARM platforms Magnus Damm
@ 2010-01-29 2:50 ` Paul Mundt
0 siblings, 0 replies; 16+ messages in thread
From: Paul Mundt @ 2010-01-29 2:50 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jan 28, 2010 at 09:41:21PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm@opensource.se>
>
> Reuse the SuperH INTC code on ARM by using set_irq_flags()
> to set IRQF_VALID on ARM platforms. Reworking the shared ARM
> interrupt code and removing IRQF_VALID is another option.
>
> Signed-off-by: Magnus Damm <damm@opensource.se>
> ---
>
> drivers/sh/intc.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> --- 0001/drivers/sh/intc.c
> +++ work/drivers/sh/intc.c 2010-01-21 19:53:15.000000000 +0900
> @@ -658,6 +658,11 @@ static void __init intc_register_irq(str
>
> if (desc->ack_regs)
> ack_handle[irq] = intc_ack_data(desc, d, enum_id);
> +
> + /* Set IRQF_VALID to enable IRQ on ARM systems */
> +#ifdef CONFIG_ARCH_SHMOBILE
> + set_irq_flags(irq, IRQF_VALID);
> +#endif
> }
>
This should be CONFIG_ARM rather than ARCH_SHMOBILE, as it's hardly
SH-Mobile specific.
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 06/06] sh-sci: Preliminary SuperH Mobile ARM support
2010-01-28 12:40 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support Magnus Damm
` (4 preceding siblings ...)
2010-01-28 12:41 ` [PATCH 05/06] sh: Let INTC set IRQF_VALID on ARM platforms Magnus Damm
@ 2010-01-28 12:41 ` Magnus Damm
2010-01-29 2:52 ` Paul Mundt
5 siblings, 1 reply; 16+ messages in thread
From: Magnus Damm @ 2010-01-28 12:41 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Add preliminary SuperH Mobile ARM support to the sh-sci
driver. Enough to get serial console working. Needs more
work. Is really disconnected from the ARM support code
but is included here for completeness.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
drivers/serial/Kconfig | 2 +-
drivers/serial/sh-sci.h | 23 ++++++++++++++++++-----
2 files changed, 19 insertions(+), 6 deletions(-)
--- 0001/drivers/serial/Kconfig
+++ work/drivers/serial/Kconfig 2010-01-21 19:55:26.000000000 +0900
@@ -996,7 +996,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
config SERIAL_SH_SCI
tristate "SuperH SCI(F) serial port support"
- depends on HAVE_CLK && (SUPERH || H8300)
+ depends on HAVE_CLK && (SUPERH || H8300 || ARCH_SHMOBILE)
select SERIAL_CORE
config SERIAL_SH_SCI_NR_UARTS
--- 0001/drivers/serial/sh-sci.h
+++ work/drivers/serial/sh-sci.h 2010-01-21 19:57:10.000000000 +0900
@@ -174,6 +174,10 @@
# define SCSPTR3 0xffc60020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* Overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
+#elif defined(CONFIG_ARCH_SHMOBILE)
+# define SCSCR_INIT(port) 0x0030
+# define SCIF_ONLY
+# define SCIF_ORER 0x0200
#else
# error CPU subtype not defined
#endif
@@ -261,7 +265,8 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc)
# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf)
@@ -356,7 +361,7 @@
SCI_OUT(sci_size, sci_offset, value); \
}
-#ifdef CONFIG_CPU_SH3
+#if defined(CONFIG_CPU_SH3) || defined(CONFIG_ARCH_SHMOBILE)
#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
@@ -366,7 +371,8 @@
CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
#define SCIF_FNS(name, scif_offset, scif_size) \
CPU_SCIF_FNS(name, scif_offset, scif_size)
#else
@@ -401,7 +407,8 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
SCIF_FNS(SCSMR, 0x00, 16)
SCIF_FNS(SCBRR, 0x04, 8)
@@ -548,6 +555,11 @@ static inline int sci_rxd_in(struct uart
return sci_in(port, SCxSR) & 0x0003 ? 1 : 0;
return 1;
}
+#elif defined(CONFIG_ARCH_SHMOBILE)
+static inline int sci_rxd_in(struct uart_port *port)
+{
+ return 1;
+}
#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
@@ -801,7 +813,8 @@ static inline int sci_rxd_in(struct uart
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
defined(CONFIG_CPU_SUBTYPE_SH7724)
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 06/06] sh-sci: Preliminary SuperH Mobile ARM support
2010-01-28 12:41 ` [PATCH 06/06] sh-sci: Preliminary SuperH Mobile ARM support Magnus Damm
@ 2010-01-29 2:52 ` Paul Mundt
0 siblings, 0 replies; 16+ messages in thread
From: Paul Mundt @ 2010-01-29 2:52 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jan 28, 2010 at 09:41:31PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm@opensource.se>
>
> Add preliminary SuperH Mobile ARM support to the sh-sci
> driver. Enough to get serial console working. Needs more
> work. Is really disconnected from the ARM support code
> but is included here for completeness.
>
> Signed-off-by: Magnus Damm <damm@opensource.se>
> ---
>
> drivers/serial/Kconfig | 2 +-
> drivers/serial/sh-sci.h | 23 ++++++++++++++++++-----
> 2 files changed, 19 insertions(+), 6 deletions(-)
>
> --- 0001/drivers/serial/Kconfig
> +++ work/drivers/serial/Kconfig 2010-01-21 19:55:26.000000000 +0900
> @@ -996,7 +996,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
>
> config SERIAL_SH_SCI
> tristate "SuperH SCI(F) serial port support"
> - depends on HAVE_CLK && (SUPERH || H8300)
> + depends on HAVE_CLK && (SUPERH || H8300 || ARCH_SHMOBILE)
> select SERIAL_CORE
>
> config SERIAL_SH_SCI_NR_UARTS
> --- 0001/drivers/serial/sh-sci.h
> +++ work/drivers/serial/sh-sci.h 2010-01-21 19:57:10.000000000 +0900
> @@ -174,6 +174,10 @@
> # define SCSPTR3 0xffc60020 /* 16 bit SCIF */
> # define SCIF_ORER 0x0001 /* Overrun error bit */
> # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
> +#elif defined(CONFIG_ARCH_SHMOBILE)
> +# define SCSCR_INIT(port) 0x0030
> +# define SCIF_ONLY
> +# define SCIF_ORER 0x0200
> #else
> # error CPU subtype not defined
> #endif
> defined(CONFIG_CPU_SUBTYPE_SH7724)
SCIF_ONLY should be killed off, nothing is checking for it these days. I
thought they were all gone already, but it looks like SH7757 snuck one
back in, too..
^ permalink raw reply [flat|nested] 16+ messages in thread