* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support V2
2010-02-05 11:14 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support V2 Magnus Damm
@ 2010-02-05 11:14 ` Magnus Damm
2010-02-05 22:10 ` Russell King - ARM Linux
2010-02-05 11:14 ` [PATCH 02/06] ARM: Add sh7377 and G4EVM " Magnus Damm
` (4 subsequent siblings)
5 siblings, 1 reply; 8+ messages in thread
From: Magnus Damm @ 2010-02-05 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
This patch is V2 of the SuperH Mobile ARM base support together
with sh7367 CPU and G3EVM board support. Only timer, serial
console and NOR flash are supported at this point. Patches for
the interrupt controller, pinmux support, clock framework and
runtime pm will be submitted as feature patches on top of this.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Changes since V1:
- sorted entries arch/arm/Kconfig
- dropped ioremap flag in sh-sci platform data
arch/arm/Kconfig | 7
arch/arm/Makefile | 1
arch/arm/mach-shmobile/Kconfig | 53 ++++
arch/arm/mach-shmobile/Makefile | 12 +
arch/arm/mach-shmobile/Makefile.boot | 9
arch/arm/mach-shmobile/board-g3evm.c | 127 +++++++++++
arch/arm/mach-shmobile/clock-sh7367.c | 89 +++++++
arch/arm/mach-shmobile/include/mach/clkdev.h | 7
arch/arm/mach-shmobile/include/mach/common.h | 11
arch/arm/mach-shmobile/include/mach/dma.h | 1
arch/arm/mach-shmobile/include/mach/entry-macro.S | 39 +++
arch/arm/mach-shmobile/include/mach/gpio.h | 1
arch/arm/mach-shmobile/include/mach/hardware.h | 7
arch/arm/mach-shmobile/include/mach/io.h | 9
arch/arm/mach-shmobile/include/mach/irqs.h | 10
arch/arm/mach-shmobile/include/mach/memory.h | 7
arch/arm/mach-shmobile/include/mach/system.h | 14 +
arch/arm/mach-shmobile/include/mach/timex.h | 6
arch/arm/mach-shmobile/include/mach/uncompress.h | 21 +
arch/arm/mach-shmobile/include/mach/vmalloc.h | 6
arch/arm/mach-shmobile/setup-sh7367.c | 241 +++++++++++++++++++++
arch/arm/mach-shmobile/timer.c | 46 ++++
22 files changed, 724 insertions(+)
--- 0001/arch/arm/Kconfig
+++ work/arch/arm/Kconfig 2010-02-05 13:59:05.000000000 +0900
@@ -608,6 +608,11 @@ config ARCH_MSM
stack and controls some vital subsystems
(clock and power control, etc).
+config ARCH_SHMOBILE
+ bool "Renesas SH-Mobile"
+ help
+ Support for Renesas's SH-Mobile ARM platforms
+
config ARCH_RPC
bool "RiscPC"
select ARCH_ACORN
@@ -857,6 +862,8 @@ endif
source "arch/arm/mach-s5p6440/Kconfig"
+source "arch/arm/mach-shmobile/Kconfig"
+
source "arch/arm/plat-stmp3xxx/Kconfig"
if ARCH_S5PC1XX
--- 0001/arch/arm/Makefile
+++ work/arch/arm/Makefile 2010-02-05 13:52:58.000000000 +0900
@@ -166,6 +166,7 @@ machine-$(CONFIG_ARCH_S5P6440) := s5p64
machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100
machine-$(CONFIG_ARCH_SA1100) := sa1100
machine-$(CONFIG_ARCH_SHARK) := shark
+machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
machine-$(CONFIG_ARCH_STMP378X) := stmp378x
machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx
machine-$(CONFIG_ARCH_U300) := u300
--- /dev/null
+++ work/arch/arm/mach-shmobile/Kconfig 2010-02-05 13:53:00.000000000 +0900
@@ -0,0 +1,53 @@
+if ARCH_SHMOBILE
+
+comment "SH-Mobile System Type"
+
+config ARCH_SH7367
+ bool "SH-Mobile SH7367 (G3)"
+ select CPU_V6
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+
+comment "SH-Mobile Board Type"
+
+config MACH_G3EVM
+ bool "G3EVM board"
+ depends on ARCH_SH7367
+
+comment "SH-Mobile System Configuration"
+
+menu "Memory configuration"
+
+config MEMORY_START
+ hex "Physical memory start address"
+ default "0x50000000" if MACH_G3EVM
+ default "0x00000000"
+ ---help---
+ Tweak this only when porting to a new machine which does not
+ already have a defconfig. Changing it from the known correct
+ value on any of the known systems will only lead to disaster.
+
+config MEMORY_SIZE
+ hex "Physical memory size"
+ default "0x08000000" if MACH_G3EVM
+ default "0x04000000"
+ help
+ This sets the default memory size assumed by your kernel. It can
+ be overridden as normal by the 'mem=' argument on the kernel command
+ line.
+
+endmenu
+
+menu "Timer and clock configuration"
+
+config SH_TIMER_CMT
+ bool "CMT timer driver"
+ default y
+ help
+ This enables build of the CMT timer driver.
+
+endmenu
+
+endif
--- /dev/null
+++ work/arch/arm/mach-shmobile/Makefile 2010-02-05 13:53:00.000000000 +0900
@@ -0,0 +1,12 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Common objects
+obj-y := timer.o
+
+# CPU objects
+obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o
+
+# Board objects
+obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o
--- /dev/null
+++ work/arch/arm/mach-shmobile/Makefile.boot 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,9 @@
+__ZRELADDR := $(shell /bin/bash -c 'printf "0x%08x" \
+ $$[$(CONFIG_MEMORY_START) + 0x8000]')
+
+ zreladdr-y := $(__ZRELADDR)
+
+# Unsupported legacy stuff
+#
+#params_phys-y (Instead: Pass atags pointer in r2)
+#initrd_phys-y (Instead: Use compiled-in initramfs)
--- /dev/null
+++ work/arch/arm/mach-shmobile/board-g3evm.c 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,127 @@
+/*
+ * G3EVM board support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "kernel_ro",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+ .width = 2,
+ .parts = nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+ [0] = {
+ .start = 0x00000000,
+ .end = 0x08000000 - 1,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device nor_flash_device = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &nor_flash_data,
+ },
+ .num_resources = ARRAY_SIZE(nor_flash_resources),
+ .resource = nor_flash_resources,
+};
+
+
+static struct platform_device *g3evm_devices[] __initdata = {
+ &nor_flash_device,
+};
+
+static struct map_desc g3evm_io_desc[] __initdata = {
+ /* create a 1:1 entity map for 0xe6xxxxxx
+ * used by CPGA, INTC and PFC.
+ */
+ {
+ .virtual = 0xe6000000,
+ .pfn = __phys_to_pfn(0xe6000000),
+ .length = 256 << 20,
+ .type = MT_DEVICE_NONSHARED
+ },
+};
+
+static void __init g3evm_map_io(void)
+{
+ iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
+
+ /* setup early devices and clocks here as well */
+ sh7367_add_early_devices();
+ sh7367_clock_init();
+}
+
+static void __init g3evm_init(void)
+{
+ sh7367_add_standard_devices();
+
+ platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
+}
+
+MACHINE_START(G3EVM, "g3evm")
+ .phys_io = 0xe6000000,
+ .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
+ .map_io = g3evm_map_io,
+ .init_irq = sh7367_init_irq,
+ .init_machine = g3evm_init,
+ .timer = &shmobile_timer,
+MACHINE_END
--- /dev/null
+++ work/arch/arm/mach-shmobile/clock-sh7367.c 2010-02-05 13:53:00.000000000 +0900
@@ -0,0 +1,89 @@
+/*
+ * Preliminary clock framework support for sh7367
+ *
+ * Copyright (C) 2010 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/clk.h>
+
+struct clk {
+ const char *name;
+ unsigned long rate;
+};
+
+#include <asm/clkdev.h>
+
+int __clk_get(struct clk *clk)
+{
+ return 1;
+}
+EXPORT_SYMBOL(__clk_get);
+
+void __clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(__clk_put);
+
+
+int clk_enable(struct clk *clk)
+{
+ return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+ return clk ? clk->rate : 0;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+/* a static peripheral clock for now - enough to get sh-sci working */
+static struct clk peripheral_clk = {
+ .name = "peripheral_clk",
+ .rate = 48000000,
+};
+
+/* a static rclk for now - enough to get sh_cmt working */
+static struct clk r_clk = {
+ .name = "r_clk",
+ .rate = 32768,
+};
+
+static struct clk_lookup lookups[] = {
+ {
+ .clk = &peripheral_clk,
+ }, {
+ .clk = &r_clk,
+ }
+};
+
+void __init sh7367_clock_init(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+ lookups[i].con_id = lookups[i].clk->name;
+ clkdev_add(&lookups[i]);
+ }
+}
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/clkdev.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+int __clk_get(struct clk *clk);
+void __clk_put(struct clk *clk);
+
+#endif /* __ASM_MACH_CLKDEV_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/common.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,11 @@
+#ifndef __ARCH_MACH_COMMON_H
+#define __ARCH_MACH_COMMON_H
+
+extern struct sys_timer shmobile_timer;
+
+extern void sh7367_init_irq(void);
+extern void sh7367_add_early_devices(void);
+extern void sh7367_add_standard_devices(void);
+extern void sh7367_clock_init(void);
+
+#endif /* __ARCH_MACH_COMMON_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/dma.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1 @@
+/* empty */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/entry-macro.S 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+
+ .macro disable_fiq
+ .endm
+
+ .macro get_irqnr_preamble, base, tmp
+ .endm
+
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
+
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ ldr \base, =INTFLGA
+ ldr \irqnr, [\base]
+ cmp \irqnr, #0
+ beq 1000f
+ /* intevt to irq number */
+ lsr \irqnr, \irqnr, #0x5
+ subs \irqnr, \irqnr, #16
+
+1000:
+ .endm
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/gpio.h 2010-02-05 13:53:00.000000000 +0900
@@ -0,0 +1 @@
+/* empty */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/hardware.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_HARDWARE_H
+#define __ASM_MACH_HARDWARE_H
+
+/* INTFLGA register - used by low level interrupt code in entry-macro.S */
+#define INTFLGA 0xe6980018
+
+#endif /* __ASM_MACH_HARDWARE_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/io.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,9 @@
+#ifndef __ASM_MACH_IO_H
+#define __ASM_MACH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+#define __io(a) ((void __iomem *)(a))
+#define __mem_pci(a) (a)
+
+#endif /* __ASM_MACH_IO_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/irqs.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,10 @@
+#ifndef __ASM_MACH_IRQS_H
+#define __ASM_MACH_IRQS_H
+
+#define NR_IRQS 512
+#define NR_IRQS_LEGACY 8
+
+#define evt2irq(evt) (((evt) >> 5) - 16)
+#define irq2evt(irq) (((irq) + 16) << 5)
+
+#endif /* __ASM_MACH_IRQS_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/memory.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_MEMORY_H
+#define __ASM_MACH_MEMORY_H
+
+#define PHYS_OFFSET UL(CONFIG_MEMORY_START)
+#define MEM_SIZE UL(CONFIG_MEMORY_SIZE)
+
+#endif /* __ASM_MACH_MEMORY_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/system.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,14 @@
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+static inline void arch_idle(void)
+{
+ cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+ cpu_reset(0);
+}
+
+#endif
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/timex.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_TIMEX_H
+#define __ASM_MACH_TIMEX_H
+
+#define CLOCK_TICK_RATE 1193180 /* unused i8253 PIT value */
+
+#endif /* __ASM_MACH_TIMEX_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/uncompress.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,21 @@
+#ifndef __ASM_MACH_UNCOMPRESS_H
+#define __ASM_MACH_UNCOMPRESS_H
+
+/*
+ * This does not append a newline
+ */
+static void putc(int c)
+{
+}
+
+static inline void flush(void)
+{
+}
+
+static void arch_decomp_setup(void)
+{
+}
+
+#define arch_decomp_wdog()
+
+#endif /* __ASM_MACH_UNCOMPRESS_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/include/mach/vmalloc.h 2010-02-05 13:52:59.000000000 +0900
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_VMALLOC_H
+#define __ASM_MACH_VMALLOC_H
+
+#define VMALLOC_END (PAGE_OFFSET + 0x24000000)
+
+#endif /* __ASM_MACH_VMALLOC_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/setup-sh7367.c 2010-02-05 14:00:16.000000000 +0900
@@ -0,0 +1,241 @@
+/*
+ * sh7367 processor support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+ .mapbase = 0xe6c40000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+ .mapbase = 0xe6c50000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+ .mapbase = 0xe6c60000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+ .mapbase = 0xe6c70000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+ .mapbase = 0xe6c80000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+ .mapbase = 0xe6cb0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+ .mapbase = 0xe6c30000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+ .name = "CMT10",
+ .channel_offset = 0x10,
+ .timer_bit = 0,
+ .clk = "r_clk",
+ .clockevent_rating = 125,
+ .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+ [0] = {
+ .name = "CMT10",
+ .start = 0xe6138010,
+ .end = 0xe613801b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 72,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device cmt10_device = {
+ .name = "sh_cmt",
+ .id = 10,
+ .dev = {
+ .platform_data = &cmt10_platform_data,
+ },
+ .resource = cmt10_resources,
+ .num_resources = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7367_early_devices[] __initdata = {
+ &scif0_device,
+ &scif1_device,
+ &scif2_device,
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+ &scif6_device,
+ &cmt10_device,
+};
+
+void __init sh7367_add_standard_devices(void)
+{
+ platform_add_devices(sh7367_early_devices,
+ ARRAY_SIZE(sh7367_early_devices));
+}
+
+#define SYMSTPCR2 0xe6158048
+#define SYMSTPCR2_CMT1 (1 << 29)
+
+void __init sh7367_add_early_devices(void)
+{
+ /* enable clock to CMT1 */
+ __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
+
+ early_platform_add_devices(sh7367_early_devices,
+ ARRAY_SIZE(sh7367_early_devices));
+}
+
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources INTCA */
+
+ SCIFA0, SCIFA1, SCIFA2, SCIFA3, SCIFA4, SCIFA5, SCIFB,
+ CMT10,
+};
+
+static struct intc_vect vectors[] = {
+ INTC_VECT(CMT10, 0xb00),
+ INTC_VECT(SCIFA0, 0xc00), INTC_VECT(SCIFA1, 0xc20),
+ INTC_VECT(SCIFA2, 0xc40), INTC_VECT(SCIFA3, 0xc60),
+ INTC_VECT(SCIFA4, 0xd20), INTC_VECT(SCIFA5, 0xd40),
+ INTC_VECT(SCIFB, 0xd60),
+};
+
+static struct intc_mask_reg mask_registers[] = {
+ { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+ { 0, 0, 0, 0, SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+ { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+ { SCIFB, SCIFA5, SCIFA4, 0, 0, 0, 0, 0 } },
+ { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+ { 0, 0, 0, CMT10, 0, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg prio_registers[] = {
+ { 0xe6940014, 0, 16, 4, /* IPRFA */ { 0, 0, 0, CMT10 } },
+ { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+ SCIFA2, SCIFA3 } },
+ { 0xe6940020, 0, 16, 4, /* IPRIA */ { 0, SCIFA4, 0, 0 } },
+ { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, 0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7367", vectors, NULL, mask_registers,
+ prio_registers, NULL);
+
+void __init sh7367_init_irq(void)
+{
+ register_intc_controller(&intc_desc);
+}
--- /dev/null
+++ work/arch/arm/mach-shmobile/timer.c 2010-02-05 13:53:00.000000000 +0900
@@ -0,0 +1,46 @@
+/*
+ * SH-Mobile Timer
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2002 - 2009 Paul Mundt
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ */
+#include <linux/platform_device.h>
+#include <asm/mach/time.h>
+
+static void __init shmobile_late_time_init(void)
+{
+ /*
+ * Make sure all compiled-in early timers register themselves.
+ *
+ * Run probe() for two "earlytimer" devices, these will be the
+ * clockevents and clocksource devices respectively. In the event
+ * that only a clockevents device is available, we -ENODEV on the
+ * clocksource and the jiffies clocksource is used transparently
+ * instead. No error handling is necessary here.
+ */
+ early_platform_driver_register_all("earlytimer");
+ early_platform_driver_probe("earlytimer", 2, 0);
+}
+
+static void __init shmobile_timer_init(void)
+{
+ late_time_init = shmobile_late_time_init;
+}
+
+struct sys_timer shmobile_timer = {
+ .init = shmobile_timer_init,
+};
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM support V2
2010-02-05 11:14 ` [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM " Magnus Damm
@ 2010-02-05 22:10 ` Russell King - ARM Linux
0 siblings, 0 replies; 8+ messages in thread
From: Russell King - ARM Linux @ 2010-02-05 22:10 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 05, 2010 at 08:14:49PM +0900, Magnus Damm wrote:
> + .macro get_irqnr_preamble, base, tmp
> + .endm
> +
> + .macro arch_ret_to_user, tmp1, tmp2
> + .endm
> +
> + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
> + ldr \base, =INTFLGA
There's the potential for an optimisation here - move this instruction
into get_irqnr_preamble, and you'll avoid having to re-load the base
register if there's multiple IRQs pending.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 02/06] ARM: Add sh7377 and G4EVM support V2
2010-02-05 11:14 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support V2 Magnus Damm
2010-02-05 11:14 ` [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM " Magnus Damm
@ 2010-02-05 11:14 ` Magnus Damm
2010-02-05 11:15 ` [PATCH 03/06] ARM: Add sh7372 and AP4EVB " Magnus Damm
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Magnus Damm @ 2010-02-05 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
This patch is V2 of base support for the SuperH Mobile ARM
processor sh7372 together with AP4EVB board support. Only timer,
serial console and NOR flash are supported at this point. Support
for the interrupt controller, pinmux support, clock framework and
runtime pm will be submitted as feature patches on top of this.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Changes since V1:
- dropped mach-type entry
- dropped ioremap flag in sh-sci platform data
arch/arm/mach-shmobile/Kconfig | 14 +
arch/arm/mach-shmobile/Makefile | 2
arch/arm/mach-shmobile/board-ap4evb.c | 127 +++++++++++++
arch/arm/mach-shmobile/include/mach/common.h | 4
arch/arm/mach-shmobile/setup-sh7372.c | 241 ++++++++++++++++++++++++++
5 files changed, 388 insertions(+)
--- 0003/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2010-02-05 14:04:20.000000000 +0900
@@ -18,6 +18,14 @@ config ARCH_SH7377
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
+config ARCH_SH7372
+ bool "SH-Mobile SH7372 (AP4)"
+ select CPU_V7
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+
comment "SH-Mobile Board Type"
config MACH_G3EVM
@@ -28,6 +36,10 @@ config MACH_G4EVM
bool "G4EVM board"
depends on ARCH_SH7377
+config MACH_AP4EVB
+ bool "AP4EVB board"
+ depends on ARCH_SH7372
+
comment "SH-Mobile System Configuration"
menu "Memory configuration"
@@ -36,6 +48,7 @@ config MEMORY_START
hex "Physical memory start address"
default "0x50000000" if MACH_G3EVM
default "0x40000000" if MACH_G4EVM
+ default "0x40000000" if MACH_AP4EVB
default "0x00000000"
---help---
Tweak this only when porting to a new machine which does not
@@ -46,6 +59,7 @@ config MEMORY_SIZE
hex "Physical memory size"
default "0x08000000" if MACH_G3EVM
default "0x08000000" if MACH_G4EVM
+ default "0x10000000" if MACH_AP4EVB
default "0x04000000"
help
This sets the default memory size assumed by your kernel. It can
--- 0003/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2010-02-05 14:04:20.000000000 +0900
@@ -8,7 +8,9 @@ obj-y := timer.o
# CPU objects
obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o
obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7367.o
+obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7367.o
# Board objects
obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o
obj-$(CONFIG_MACH_G4EVM) += board-g4evm.o
+obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o
--- /dev/null
+++ work/arch/arm/mach-shmobile/board-ap4evb.c 2010-02-05 14:04:20.000000000 +0900
@@ -0,0 +1,127 @@
+/*
+ * AP4EVB board support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "kernel_ro",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+ .width = 2,
+ .parts = nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+ [0] = {
+ .start = 0x00000000,
+ .end = 0x08000000 - 1,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device nor_flash_device = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &nor_flash_data,
+ },
+ .num_resources = ARRAY_SIZE(nor_flash_resources),
+ .resource = nor_flash_resources,
+};
+
+
+static struct platform_device *ap4evb_devices[] __initdata = {
+ &nor_flash_device,
+};
+
+static struct map_desc ap4evb_io_desc[] __initdata = {
+ /* create a 1:1 entity map for 0xe6xxxxxx
+ * used by CPGA, INTC and PFC.
+ */
+ {
+ .virtual = 0xe6000000,
+ .pfn = __phys_to_pfn(0xe6000000),
+ .length = 256 << 20,
+ .type = MT_DEVICE_NONSHARED
+ },
+};
+
+static void __init ap4evb_map_io(void)
+{
+ iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
+
+ /* setup early devices and clocks here as well */
+ sh7372_add_early_devices();
+ sh7367_clock_init(); /* use g3 clocks for now */
+}
+
+static void __init ap4evb_init(void)
+{
+ sh7372_add_standard_devices();
+
+ platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
+}
+
+MACHINE_START(AP4EVB, "ap4evb")
+ .phys_io = 0xe6000000,
+ .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
+ .map_io = ap4evb_map_io,
+ .init_irq = sh7372_init_irq,
+ .init_machine = ap4evb_init,
+ .timer = &shmobile_timer,
+MACHINE_END
--- 0003/arch/arm/mach-shmobile/include/mach/common.h
+++ work/arch/arm/mach-shmobile/include/mach/common.h 2010-02-05 14:04:20.000000000 +0900
@@ -12,4 +12,8 @@ extern void sh7377_init_irq(void);
extern void sh7377_add_early_devices(void);
extern void sh7377_add_standard_devices(void);
+extern void sh7372_init_irq(void);
+extern void sh7372_add_early_devices(void);
+extern void sh7372_add_standard_devices(void);
+
#endif /* __ARCH_MACH_COMMON_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/setup-sh7372.c 2010-02-05 14:04:30.000000000 +0900
@@ -0,0 +1,241 @@
+/*
+ * sh7372 processor support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+ .mapbase = 0xe6c40000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+ .mapbase = 0xe6c50000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+ .mapbase = 0xe6c60000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+ .mapbase = 0xe6c70000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+ .mapbase = 0xe6c80000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+ .mapbase = 0xe6cb0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+ .mapbase = 0xe6c30000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+ .name = "CMT10",
+ .channel_offset = 0x10,
+ .timer_bit = 0,
+ .clk = "r_clk",
+ .clockevent_rating = 125,
+ .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+ [0] = {
+ .name = "CMT10",
+ .start = 0xe6138010,
+ .end = 0xe613801b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 72,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device cmt10_device = {
+ .name = "sh_cmt",
+ .id = 10,
+ .dev = {
+ .platform_data = &cmt10_platform_data,
+ },
+ .resource = cmt10_resources,
+ .num_resources = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7372_early_devices[] __initdata = {
+ &scif0_device,
+ &scif1_device,
+ &scif2_device,
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+ &scif6_device,
+ &cmt10_device,
+};
+
+void __init sh7372_add_standard_devices(void)
+{
+ platform_add_devices(sh7372_early_devices,
+ ARRAY_SIZE(sh7372_early_devices));
+}
+
+#define SMSTPCR3 0xe615013c
+#define SMSTPCR3_CMT1 (1 << 29)
+
+void __init sh7372_add_early_devices(void)
+{
+ /* enable clock to CMT1 */
+ __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
+
+ early_platform_add_devices(sh7372_early_devices,
+ ARRAY_SIZE(sh7372_early_devices));
+}
+
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources INTCA */
+
+ SCIFA0, SCIFA1, SCIFA2, SCIFA3, SCIFA4, SCIFA5, SCIFB,
+ CMT10,
+};
+
+static struct intc_vect vectors[] = {
+ INTC_VECT(CMT10, 0xb00),
+ INTC_VECT(SCIFA0, 0xc00), INTC_VECT(SCIFA1, 0xc20),
+ INTC_VECT(SCIFA2, 0xc40), INTC_VECT(SCIFA3, 0xc60),
+ INTC_VECT(SCIFA4, 0xd20), INTC_VECT(SCIFA5, 0xd40),
+ INTC_VECT(SCIFB, 0xd60),
+};
+
+static struct intc_mask_reg mask_registers[] = {
+ { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+ { 0, 0, 0, 0, SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+ { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+ { SCIFB, SCIFA5, SCIFA4, 0, 0, 0, 0, 0 } },
+ { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+ { 0, 0, 0, CMT10, 0, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg prio_registers[] = {
+ { 0xe6940014, 0, 16, 4, /* IPRFA */ { 0, 0, 0, CMT10 } },
+ { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+ SCIFA2, SCIFA3 } },
+ { 0xe6940020, 0, 16, 4, /* IPRIA */ { 0, SCIFA4, 0, 0 } },
+ { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, 0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7372", vectors, NULL, mask_registers,
+ prio_registers, NULL);
+
+void __init sh7372_init_irq(void)
+{
+ register_intc_controller(&intc_desc);
+}
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 03/06] ARM: Add sh7372 and AP4EVB support V2
2010-02-05 11:14 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support V2 Magnus Damm
2010-02-05 11:14 ` [PATCH 01/06] ARM: SuperH Mobile ARM, sh7367 and G3EVM " Magnus Damm
2010-02-05 11:14 ` [PATCH 02/06] ARM: Add sh7377 and G4EVM " Magnus Damm
@ 2010-02-05 11:15 ` Magnus Damm
2010-02-05 11:15 ` [PATCH 04/06] sh: Build drivers/sh for SuperH Mobile ARM Magnus Damm
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Magnus Damm @ 2010-02-05 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
This patch is V2 of base support for the SuperH Mobile ARM
processor sh7377 together with G4EVM board support. Only timer,
serial console and NOR flash are supported at this point. Support
for the interrupt controller, pinmux support, clock framework and
runtime pm will be submitted as feature patches on top of this.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Changes since V1:
- dropped ioremap flag in sh-sci platform data
arch/arm/mach-shmobile/Kconfig | 14 +
arch/arm/mach-shmobile/Makefile | 2
arch/arm/mach-shmobile/board-g4evm.c | 127 ++++++++++++
arch/arm/mach-shmobile/include/mach/common.h | 4
arch/arm/mach-shmobile/setup-sh7377.c | 260 ++++++++++++++++++++++++++
5 files changed, 407 insertions(+)
--- 0002/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2010-02-05 14:02:30.000000000 +0900
@@ -10,12 +10,24 @@ config ARCH_SH7367
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
+config ARCH_SH7377
+ bool "SH-Mobile SH7377 (G4)"
+ select CPU_V7
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+
comment "SH-Mobile Board Type"
config MACH_G3EVM
bool "G3EVM board"
depends on ARCH_SH7367
+config MACH_G4EVM
+ bool "G4EVM board"
+ depends on ARCH_SH7377
+
comment "SH-Mobile System Configuration"
menu "Memory configuration"
@@ -23,6 +35,7 @@ menu "Memory configuration"
config MEMORY_START
hex "Physical memory start address"
default "0x50000000" if MACH_G3EVM
+ default "0x40000000" if MACH_G4EVM
default "0x00000000"
---help---
Tweak this only when porting to a new machine which does not
@@ -32,6 +45,7 @@ config MEMORY_START
config MEMORY_SIZE
hex "Physical memory size"
default "0x08000000" if MACH_G3EVM
+ default "0x08000000" if MACH_G4EVM
default "0x04000000"
help
This sets the default memory size assumed by your kernel. It can
--- 0002/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2010-02-05 14:02:30.000000000 +0900
@@ -7,6 +7,8 @@ obj-y := timer.o
# CPU objects
obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o
+obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7367.o
# Board objects
obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o
+obj-$(CONFIG_MACH_G4EVM) += board-g4evm.o
--- /dev/null
+++ work/arch/arm/mach-shmobile/board-g4evm.c 2010-02-05 14:02:31.000000000 +0900
@@ -0,0 +1,127 @@
+/*
+ * G4EVM board support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ },
+ {
+ .name = "kernel_ro",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 8 * 1024 * 1024,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+ .width = 2,
+ .parts = nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+ [0] = {
+ .start = 0x00000000,
+ .end = 0x08000000 - 1,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device nor_flash_device = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &nor_flash_data,
+ },
+ .num_resources = ARRAY_SIZE(nor_flash_resources),
+ .resource = nor_flash_resources,
+};
+
+
+static struct platform_device *g4evm_devices[] __initdata = {
+ &nor_flash_device,
+};
+
+static struct map_desc g4evm_io_desc[] __initdata = {
+ /* create a 1:1 entity map for 0xe6xxxxxx
+ * used by CPGA, INTC and PFC.
+ */
+ {
+ .virtual = 0xe6000000,
+ .pfn = __phys_to_pfn(0xe6000000),
+ .length = 256 << 20,
+ .type = MT_DEVICE_NONSHARED
+ },
+};
+
+static void __init g4evm_map_io(void)
+{
+ iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
+
+ /* setup early devices and clocks here as well */
+ sh7377_add_early_devices();
+ sh7367_clock_init(); /* use g3 clocks for now */
+}
+
+static void __init g4evm_init(void)
+{
+ sh7377_add_standard_devices();
+
+ platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));
+}
+
+MACHINE_START(G4EVM, "g4evm")
+ .phys_io = 0xe6000000,
+ .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
+ .map_io = g4evm_map_io,
+ .init_irq = sh7377_init_irq,
+ .init_machine = g4evm_init,
+ .timer = &shmobile_timer,
+MACHINE_END
--- 0002/arch/arm/mach-shmobile/include/mach/common.h
+++ work/arch/arm/mach-shmobile/include/mach/common.h 2010-02-05 14:02:30.000000000 +0900
@@ -8,4 +8,8 @@ extern void sh7367_add_early_devices(voi
extern void sh7367_add_standard_devices(void);
extern void sh7367_clock_init(void);
+extern void sh7377_init_irq(void);
+extern void sh7377_add_early_devices(void);
+extern void sh7377_add_standard_devices(void);
+
#endif /* __ARCH_MACH_COMMON_H */
--- /dev/null
+++ work/arch/arm/mach-shmobile/setup-sh7377.c 2010-02-05 14:02:53.000000000 +0900
@@ -0,0 +1,260 @@
+/*
+ * sh7377 processor support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+ .mapbase = 0xe6c40000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+ .mapbase = 0xe6c50000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+ .mapbase = 0xe6c60000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+ .mapbase = 0xe6c70000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+ .mapbase = 0xe6c80000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+ .mapbase = 0xe6cb0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+ .mapbase = 0xe6cc0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 196, 196, 196, 196 },
+};
+
+static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+};
+
+static struct plat_sci_port scif7_platform_data = {
+ .mapbase = 0xe6c30000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif7_device = {
+ .name = "sh-sci",
+ .id = 7,
+ .dev = {
+ .platform_data = &scif7_platform_data,
+ },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+ .name = "CMT10",
+ .channel_offset = 0x10,
+ .timer_bit = 0,
+ .clk = "r_clk",
+ .clockevent_rating = 125,
+ .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+ [0] = {
+ .name = "CMT10",
+ .start = 0xe6138010,
+ .end = 0xe613801b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 72,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device cmt10_device = {
+ .name = "sh_cmt",
+ .id = 10,
+ .dev = {
+ .platform_data = &cmt10_platform_data,
+ },
+ .resource = cmt10_resources,
+ .num_resources = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7377_early_devices[] __initdata = {
+ &scif0_device,
+ &scif1_device,
+ &scif2_device,
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+ &scif6_device,
+ &scif7_device,
+ &cmt10_device,
+};
+
+void __init sh7377_add_standard_devices(void)
+{
+ platform_add_devices(sh7377_early_devices,
+ ARRAY_SIZE(sh7377_early_devices));
+}
+
+#define SMSTPCR3 0xe615013c
+#define SMSTPCR3_CMT1 (1 << 29)
+
+void __init sh7377_add_early_devices(void)
+{
+ /* enable clock to CMT1 */
+ __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
+
+ early_platform_add_devices(sh7377_early_devices,
+ ARRAY_SIZE(sh7377_early_devices));
+}
+
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources INTCA */
+
+ SCIFA0, SCIFA1, SCIFA2, SCIFA3, SCIFA4, SCIFA5, SCIFB, SCIFA6,
+ CMT10,
+};
+
+static struct intc_vect vectors[] = {
+ INTC_VECT(CMT10, 0xb00),
+ INTC_VECT(SCIFA0, 0xc00), INTC_VECT(SCIFA1, 0xc20),
+ INTC_VECT(SCIFA2, 0xc40), INTC_VECT(SCIFA3, 0xc60),
+ INTC_VECT(SCIFA4, 0xd20), INTC_VECT(SCIFA5, 0xd40),
+ INTC_VECT(SCIFB, 0xd60), INTC_VECT(SCIFA6, 0x1a80),
+};
+
+static struct intc_mask_reg mask_registers[] = {
+ { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+ { 0, 0, 0, 0, SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+ { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+ { SCIFB, SCIFA5, SCIFA4, 0, 0, 0, 0, 0 } },
+ { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+ { 0, 0, 0, CMT10, 0, 0, 0, 0 } },
+ { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
+ { 0, 0, 0, 0, SCIFA6, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg prio_registers[] = {
+ { 0xe6940014, 0, 16, 4, /* IPRFA */ { 0, 0, 0, CMT10 } },
+ { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+ SCIFA2, SCIFA3 } },
+ { 0xe6940020, 0, 16, 4, /* IPRIA */ { 0, SCIFA4, 0, 0 } },
+ { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, 0 } },
+ { 0xe695003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7377", vectors, NULL, mask_registers,
+ prio_registers, NULL);
+
+void __init sh7377_init_irq(void)
+{
+ register_intc_controller(&intc_desc);
+}
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 04/06] sh: Build drivers/sh for SuperH Mobile ARM
2010-02-05 11:14 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support V2 Magnus Damm
` (2 preceding siblings ...)
2010-02-05 11:15 ` [PATCH 03/06] ARM: Add sh7372 and AP4EVB " Magnus Damm
@ 2010-02-05 11:15 ` Magnus Damm
2010-02-05 11:15 ` [PATCH 05/06] sh: Let INTC set IRQF_VALID on ARM platforms V2 Magnus Damm
2010-02-05 11:15 ` [PATCH 06/06] sh-sci: SuperH Mobile ARM support V2 Magnus Damm
5 siblings, 0 replies; 8+ messages in thread
From: Magnus Damm @ 2010-02-05 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Build drivers/sh in the case for SuperH Mobile ARM.
Shared code for the interrupt controller (INTC) and
the gpio/pinmux (PFC) is located there.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
drivers/Makefile | 1 +
1 file changed, 1 insertion(+)
--- 0001/drivers/Makefile
+++ work/drivers/Makefile 2010-01-19 15:39:21.000000000 +0900
@@ -99,6 +99,7 @@ obj-$(CONFIG_SGI_SN) += sn/
obj-y += firmware/
obj-$(CONFIG_CRYPTO) += crypto/
obj-$(CONFIG_SUPERH) += sh/
+obj-$(CONFIG_ARCH_SHMOBILE) += sh/
obj-$(CONFIG_GENERIC_TIME) += clocksource/
obj-$(CONFIG_DMA_ENGINE) += dma/
obj-$(CONFIG_DCA) += dca/
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 05/06] sh: Let INTC set IRQF_VALID on ARM platforms V2
2010-02-05 11:14 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support V2 Magnus Damm
` (3 preceding siblings ...)
2010-02-05 11:15 ` [PATCH 04/06] sh: Build drivers/sh for SuperH Mobile ARM Magnus Damm
@ 2010-02-05 11:15 ` Magnus Damm
2010-02-05 11:15 ` [PATCH 06/06] sh-sci: SuperH Mobile ARM support V2 Magnus Damm
5 siblings, 0 replies; 8+ messages in thread
From: Magnus Damm @ 2010-02-05 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Reuse the SuperH INTC code on ARM by using set_irq_flags()
to set IRQF_VALID on ARM platforms. (V2)
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Changes since V1:
- wrap with CONFIG_ARM instead of CONFIG_ARCH_SHMOBILE
- use set_irq_flags() in create_irq_nr() as well
drivers/sh/intc.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
--- 0001/drivers/sh/intc.c
+++ work/drivers/sh/intc.c 2010-02-05 14:11:53.000000000 +0900
@@ -658,6 +658,10 @@ static void __init intc_register_irq(str
if (desc->ack_regs)
ack_handle[irq] = intc_ack_data(desc, d, enum_id);
+
+#ifdef CONFIG_ARM
+ set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */
+#endif
}
static unsigned int __init save_reg(struct intc_desc_int *d,
@@ -906,8 +910,12 @@ unsigned int create_irq_nr(unsigned int
out_unlock:
spin_unlock_irqrestore(&vector_lock, flags);
- if (irq > 0)
+ if (irq > 0) {
dynamic_irq_init(irq);
+#ifdef CONFIG_ARM
+ set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */
+#endif
+ }
return irq;
}
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 06/06] sh-sci: SuperH Mobile ARM support V2
2010-02-05 11:14 [PATCH 00/06] ARM: Initial SuperH Mobile ARM support V2 Magnus Damm
` (4 preceding siblings ...)
2010-02-05 11:15 ` [PATCH 05/06] sh: Let INTC set IRQF_VALID on ARM platforms V2 Magnus Damm
@ 2010-02-05 11:15 ` Magnus Damm
5 siblings, 0 replies; 8+ messages in thread
From: Magnus Damm @ 2010-02-05 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Add SuperH Mobile ARM support to the sh-sci driver. (V2)
Also remove the SCLSR register that is missing on sh772x,
sh7705 and SH-Mobile.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Applies on top of the sci_rxd_in() cleanup patch
Changes since V1:
- rewrote the patch
drivers/serial/Kconfig | 2 +-
drivers/serial/sh-sci.h | 23 ++++++++++++++---------
2 files changed, 15 insertions(+), 10 deletions(-)
--- 0001/drivers/serial/Kconfig
+++ work/drivers/serial/Kconfig 2010-02-05 16:07:02.000000000 +0900
@@ -1013,7 +1013,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
config SERIAL_SH_SCI
tristate "SuperH SCI(F) serial port support"
- depends on HAVE_CLK && (SUPERH || H8300)
+ depends on HAVE_CLK && (SUPERH || H8300 || ARCH_SHMOBILE)
select SERIAL_CORE
config SERIAL_SH_SCI_NR_UARTS
--- 0007/drivers/serial/sh-sci.h
+++ work/drivers/serial/sh-sci.h 2010-02-05 16:42:18.000000000 +0900
@@ -30,9 +30,9 @@
*/
# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCIF_ORER 0x0200 /* overrun error bit */
#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
@@ -166,7 +166,8 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
# define SCIF_ORER 0x0200
# define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
# define SCIF_RFDC_MASK 0x007f
@@ -199,7 +200,8 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc)
# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf)
@@ -294,7 +296,7 @@
SCI_OUT(sci_size, sci_offset, value); \
}
-#ifdef CONFIG_CPU_SH3
+#if defined(CONFIG_CPU_SH3) || defined(CONFIG_ARCH_SHMOBILE)
#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
@@ -304,7 +306,8 @@
CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
#define SCIF_FNS(name, scif_offset, scif_size) \
CPU_SCIF_FNS(name, scif_offset, scif_size)
#else
@@ -339,7 +342,8 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
SCIF_FNS(SCSMR, 0x00, 16)
SCIF_FNS(SCBRR, 0x04, 8)
@@ -351,7 +355,7 @@ SCIF_FNS(SCFCR, 0x18, 16)
SCIF_FNS(SCFDR, 0x1c, 16)
SCIF_FNS(SCxTDR, 0x20, 8)
SCIF_FNS(SCxRDR, 0x24, 8)
-SCIF_FNS(SCLSR, 0x24, 16)
+SCIF_FNS(SCLSR, 0x00, 0)
#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
defined(CONFIG_CPU_SUBTYPE_SH7724)
SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16)
@@ -521,7 +525,8 @@ static inline int sci_rxd_in(struct uart
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
- defined(CONFIG_CPU_SUBTYPE_SH7721)
+ defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+ defined(CONFIG_ARCH_SHMOBILE)
#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
defined(CONFIG_CPU_SUBTYPE_SH7724)
^ permalink raw reply [flat|nested] 8+ messages in thread