From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] ARM: Change the mandatory barriers implementation
Date: Tue, 23 Feb 2010 11:10:36 +0000 [thread overview]
Message-ID: <20100223111036.GA10501@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <20100223110105.11048.8143.stgit@e102109-lin.cambridge.arm.com>
On Tue, Feb 23, 2010 at 11:01:05AM +0000, Catalin Marinas wrote:
> -#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
> -#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
> -#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
> +#define mb() dsb()
> +#define rmb() dmb()
> +#define wmb() dsb()
What is the reason for getting rid of the arch_is_coherent() bit here
and imposing non-compiler barriers on everything? I'd assume that
Lennert knew what he was doing with Xscale3.
This also breaks ARMv3 since you now issue a mcr for the write buffer
on architectures which have no write buffer.
next prev parent reply other threads:[~2010-02-23 11:10 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-02-23 11:01 [PATCH 1/4] ARM: Change the mandatory barriers implementation Catalin Marinas
2010-02-23 11:10 ` Russell King - ARM Linux [this message]
2010-02-23 12:16 ` Catalin Marinas
2010-02-23 12:30 ` Russell King - ARM Linux
2010-02-23 15:12 ` Catalin Marinas
2010-02-23 15:24 ` Russell King - ARM Linux
2010-02-23 16:02 ` Catalin Marinas
2010-02-23 18:03 ` Russell King - ARM Linux
2010-02-23 18:07 ` Catalin Marinas
2010-03-01 3:37 ` Jamie Lokier
2010-02-26 15:43 ` Catalin Marinas
2010-03-01 3:44 ` Jamie Lokier
2010-02-23 12:21 ` Catalin Marinas
2010-02-23 12:31 ` Russell King - ARM Linux
2010-02-23 11:35 ` Shilimkar, Santosh
2010-02-23 11:41 ` Russell King - ARM Linux
2010-02-23 17:33 ` Russell King - ARM Linux
2010-02-23 17:58 ` Catalin Marinas
2010-02-23 18:04 ` Catalin Marinas
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