Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[Shiraz HASHIM]

Hello,

I am trying to port Linux on ARM Cortex A9 based platform and what
I see is that if I don't invalidate the data cache before enabling
and using it (in arch/arm/boot/compressed/head.S) the system crashes.

I need to do the same for second core before calling secondary_startup.

Is it normal? Why then other platforms (cortex A9 based) are not doing
this. What am I missing?

thanks for your help.

regards
Shira

Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[Shilimkar, Santosh]

> -----Original Message-----
> From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-arm-kernel-
> bounces at lists.infradead.org] On Behalf Of Shiraz HASHIM
> Sent: Saturday, April 17, 2010 3:26 PM
> To: linux-arm-kernel at lists.infradead.org
> Subject: Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage
> 
> Hello,
> 
> I am trying to port Linux on ARM Cortex A9 based platform and what
> I see is that if I don't invalidate the data cache before enabling
> and using it (in arch/arm/boot/compressed/head.S) the system crashes.

Are you enabling $L1 D in your bootloader before jumping into the kernel??

> I need to do the same for second core before calling secondary_startup.
> 
> Is it normal? Why then other platforms (cortex A9 based) are not doing
> this. What am I missing?
> 
> thanks for your help.
> 
> regards
> Shira
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[Shiraz HASHIM]

Hello Santosh,

On 4/17/2010 3:37 PM, Shilimkar, Santosh wrote:
>> -----Original Message-----
>> From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-arm-kernel-
>> bounces at lists.infradead.org] On Behalf Of Shiraz HASHIM
>> Sent: Saturday, April 17, 2010 3:26 PM
>> To: linux-arm-kernel at lists.infradead.org
>> Subject: Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage
>>
>> Hello,
>>
>> I am trying to port Linux on ARM Cortex A9 based platform and what
>> I see is that if I don't invalidate the data cache before enabling
>> and using it (in arch/arm/boot/compressed/head.S) the system crashes.
> 
> Are you enabling $L1 D in your bootloader before jumping into the kernel??

No. uboot is not enabling data cache. The first time it gets enabled is
in head.S before Linux decompression.

>> I need to do the same for second core before calling secondary_startup.
>>
>> Is it normal? Why then other platforms (cortex A9 based) are not doing
>> this. What am I missing?
>>
>> thanks for your help.

regards
Shiraz

Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[Russell King - ARM Linux]

On Sat, Apr 17, 2010 at 03:26:13PM +0530, Shiraz HASHIM wrote:
> Hello,
> 
> I am trying to port Linux on ARM Cortex A9 based platform and what
> I see is that if I don't invalidate the data cache before enabling
> and using it (in arch/arm/boot/compressed/head.S) the system crashes.
> 
> I need to do the same for second core before calling secondary_startup.
> 
> Is it normal? Why then other platforms (cortex A9 based) are not doing
> this. What am I missing?

Yes, it's required.  See:

http://www.arm.linux.org.uk/developer/booting.php

Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[shiraz hashim]

Hello Russell,

On Sat, Apr 17, 2010 at 11:44 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Sat, Apr 17, 2010 at 03:26:13PM +0530, Shiraz HASHIM wrote:
>> Hello,
>>
>> I am trying to port Linux on ARM Cortex A9 based platform and what
>> I see is that if I don't invalidate the data cache before enabling
>> and using it (in arch/arm/boot/compressed/head.S) the system crashes.
>>
>> I need to do the same for second core before calling secondary_startup.
>>
>> Is it normal? Why then other platforms (cortex A9 based) are not doing
>> this. What am I missing?
>
> Yes, it's required. ?See:
>
> http://www.arm.linux.org.uk/developer/booting.php

OK. So it means that the bootloader is expected to do this
invalidation or cleanup,
and for secondary cpus we can do it before calling secondary_startup.
Am I right ?

regards
Shiraz

Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[shiraz hashim]

On Sat, Apr 17, 2010 at 11:44 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Sat, Apr 17, 2010 at 03:26:13PM +0530, Shiraz HASHIM wrote:
>> Hello,
>>
>> I am trying to port Linux on ARM Cortex A9 based platform and what
>> I see is that if I don't invalidate the data cache before enabling
>> and using it (in arch/arm/boot/compressed/head.S) the system crashes.
>>
>> I need to do the same for second core before calling secondary_startup.
>>
>> Is it normal? Why then other platforms (cortex A9 based) are not doing
>> this. What am I missing?
>
> Yes, it's required. ?See:
>
> http://www.arm.linux.org.uk/developer/booting.php

The only thing which is confusing me is that do we need to invalidate
the data cache, even if it is disabled in bootloader.

regards
Shiraz

Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[Russell King - ARM Linux]

On Sun, Apr 18, 2010 at 09:13:55PM +0530, shiraz hashim wrote:
> On Sat, Apr 17, 2010 at 11:44 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > On Sat, Apr 17, 2010 at 03:26:13PM +0530, Shiraz HASHIM wrote:
> >> Hello,
> >>
> >> I am trying to port Linux on ARM Cortex A9 based platform and what
> >> I see is that if I don't invalidate the data cache before enabling
> >> and using it (in arch/arm/boot/compressed/head.S) the system crashes.
> >>
> >> I need to do the same for second core before calling secondary_startup.
> >>
> >> Is it normal? Why then other platforms (cortex A9 based) are not doing
> >> this. What am I missing?
> >
> > Yes, it's required. ?See:
> >
> > http://www.arm.linux.org.uk/developer/booting.php
> 
> The only thing which is confusing me is that do we need to invalidate
> the data cache, even if it is disabled in bootloader.

If you don't, the cache will be in an undefined state when it is enabled,
which in turn means that when you enable it, you don't know whether the
instructions you're going to execute come from the cache or from the
memory - and the two may be different.