From: paul@pwsan.com (Paul Walmsley)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 11/22] OMAP4: CM: Remove non-functional registers in ES1.0
Date: Tue, 18 May 2010 20:18:51 -0600 [thread overview]
Message-ID: <20100519021850.19716.29094.stgit@localhost.localdomain> (raw)
In-Reply-To: <20100519021800.19716.8938.stgit@localhost.localdomain>
From: Benoit Cousson <b-cousson@ti.com>
The automatic HW restore from OFF mode is not functional at all in
OMAP4430 ES1.0.
Because of that, it will be extensively changed in the next Si revision,
and the compatibilty will not be maintained with ES1.0.
Remove the current XXX_RESTORE registers definition to avoid future
conflicts with the next Si revision.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
---
arch/arm/mach-omap2/cm44xx.h | 41 ++---------------------------------------
1 files changed, 2 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
index c575b9b..b889ac6 100644
--- a/arch/arm/mach-omap2/cm44xx.h
+++ b/arch/arm/mach-omap2/cm44xx.h
@@ -1,8 +1,8 @@
/*
* OMAP44xx CM1 & CM2 instance offset macros
*
- * Copyright (C) 2009 Texas Instruments, Inc.
- * Copyright (C) 2009 Nokia Corporation
+ * Copyright (C) 2009-2010 Texas Instruments, Inc.
+ * Copyright (C) 2009-2010 Nokia Corporation
*
* Paul Walmsley (paul at pwsan.com)
* Rajendra Nayak (rnayak at ti.com)
@@ -25,7 +25,6 @@
/* CM1 */
-
/* CM1.OCP_SOCKET_CM1 register offsets */
#define OMAP4430_REVISION_CM1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_OCP_SOCKET_MOD, 0x0000)
#define OMAP4430_CM_CM1_PROFILING_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_OCP_SOCKET_MOD, 0x0040)
@@ -116,25 +115,8 @@
#define OMAP4430_CM1_ABE_TIMER8_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_MOD, 0x0080)
#define OMAP4430_CM1_ABE_WDT3_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_MOD, 0x0088)
-/* CM1.RESTORE_CM1 register offsets */
-#define OMAP4430_CM_CLKSEL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0000)
-#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0004)
-#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0008)
-#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x000c)
-#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0010)
-#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0014)
-#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0018)
-#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x001c)
-#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0020)
-#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0024)
-#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0028)
-#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x002c)
-#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0030)
-#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_MOD, 0x0034)
-
/* CM2 */
-
/* CM2.OCP_SOCKET_CM2 register offsets */
#define OMAP4430_REVISION_CM2 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_OCP_SOCKET_MOD, 0x0000)
#define OMAP4430_CM_CM2_PROFILING_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_OCP_SOCKET_MOD, 0x0040)
@@ -336,23 +318,4 @@
/* CM2.CEFUSE_CM2 register offsets */
#define OMAP4430_CM_CEFUSE_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_MOD, 0x0000)
#define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_MOD, 0x0020)
-
-/* CM2.RESTORE_CM2 register offsets */
-#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0000)
-#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0004)
-#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0008)
-#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x000c)
-#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0010)
-#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0014)
-#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0018)
-#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x001c)
-#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0020)
-#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0024)
-#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0028)
-#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x002c)
-#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0030)
-#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0034)
-#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0038)
-#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x003c)
-#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_MOD, 0x0040)
#endif
next prev parent reply other threads:[~2010-05-19 2:18 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-19 2:18 [PATCH 00/22] OMAP PRCM/clock/powerdomain/hwmod: remaining patches for 2.6.35 Paul Walmsley
2010-05-19 2:18 ` [PATCH 01/22] OMAP4: hwmod: Replace module & device offsets by absolute clkctrl address Paul Walmsley
2010-05-19 2:18 ` [PATCH 02/22] OMAP: CM: Move MAX_MODULE_READY_TIME to cm.h Paul Walmsley
2010-05-19 2:18 ` [PATCH 03/22] OMAP4: hwmod & CM: Implement the omap4_cm_wait_module_ready function Paul Walmsley
2010-05-19 2:18 ` [PATCH 04/22] OMAP4: hwmod: Replace OCPIF_HAS_IDLEST by HWMOD_NO_IDLEST Paul Walmsley
2010-05-19 2:18 ` [PATCH 05/22] OMAP: hwmod: Fix wrong pointer iteration in oh->slaves Paul Walmsley
2010-05-19 2:18 ` [PATCH 06/22] OMAP: hwmod: Remove IS_ERR check with omap_clk_get_by_name return value Paul Walmsley
2010-05-19 2:18 ` [PATCH 07/22] OMAP: hwmod: Replace WARN by pr_warning if clock lookup failed Paul Walmsley
2010-05-21 10:00 ` Sergei Shtylyov
2010-05-21 10:16 ` Benoit Cousson
2010-05-19 2:18 ` [PATCH 08/22] OMAP: hwmod: Do not exit the iteration if one clock init failed Paul Walmsley
2010-05-19 2:18 ` [PATCH 09/22] OMAP: hwmod: Rename hwmod name for the MPU Paul Walmsley
2010-05-19 2:18 ` [PATCH 10/22] OMAP: hwmod: Replace WARN by pr_warning for clockdomain check Paul Walmsley
2010-05-21 10:02 ` Sergei Shtylyov
2010-05-21 10:23 ` Sergei Shtylyov
2010-05-21 10:41 ` Benoit Cousson
2010-05-19 2:18 ` Paul Walmsley [this message]
2010-05-19 2:18 ` [PATCH 12/22] OMAP4: PRM: Remove MPU internal code name and apply PRCM naming convention Paul Walmsley
2010-05-19 2:18 ` [PATCH 13/22] OMAP4: PRCM: Remove duplicate definition of base addresses Paul Walmsley
2010-05-19 2:18 ` [PATCH 14/22] OMAP4: PRCM: Add offset defines for all PRM registers Paul Walmsley
2010-05-19 2:18 ` [PATCH 15/22] OMAP4: PRCM: Add offset defines for all CM registers Paul Walmsley
2010-05-19 2:18 ` [PATCH 16/22] OMAP4 clock: Support clk_set_parent Paul Walmsley
2010-05-19 2:18 ` [PATCH 17/22] OMAP: timers: Fix clock source names for OMAP4 Paul Walmsley
2010-05-19 2:18 ` [PATCH 18/22] OMAP4 powerdomain: Fix pwrsts flags for ALWAYS ON domains Paul Walmsley
2010-05-19 2:19 ` [PATCH 19/22] OMAP3 clock: add support for setting the divider for sys_clkout2 using clk_set_rate Paul Walmsley
2010-05-19 2:19 ` [PATCH 20/22] OMAP4 powerdomain: Support LOWPOWERSTATECHANGE for powerdomains Paul Walmsley
2010-05-19 2:19 ` [PATCH 21/22] OMAP powerdomain, hwmod, omap_device: add some credits Paul Walmsley
2010-05-19 2:19 ` [PATCH 22/22] OMAP2 clock: fix recursive spinlock attempt when CONFIG_CPU_FREQ=y Paul Walmsley
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