From: felipe.balbi@nokia.com (Felipe Balbi)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH] irq: handle private interrupt registration
Date: Wed, 2 Jun 2010 08:41:04 +0300 [thread overview]
Message-ID: <20100602054104.GE6465@nokia.com> (raw)
In-Reply-To: <alpine.LFD.2.00.1006020110090.2933@localhost.localdomain>
Hi,
On Wed, Jun 02, 2010 at 01:14:32AM +0200, ext Thomas Gleixner wrote:
>1) Use PER_CPU offsets for the irq numbers. The generic irq code does
> not care whether the interrupt number is matching any physical
> numbering scheme in the hardware, as long as the arch specific chip
> implementation knows how to deal with it, which is not rocket
> science to do.
FWIW, I think (1) is a better approach as the problem will vanish
altogether and to me it sounds like the simpler approach as well. Archs
which have more than one IRQ chip (like OMAP with the twl4030 family)
will already use sequencial numbering anyway, so using the same approach
for N cpus, to me, sounds like a good deal.
While at that, a question from my side: do we have a generic way of
fetching the last IRQ number so we can easily use that to calculate the
physical number of the IRQ line on the chip ?
On OMAP, we have been passing that number down to twl4030 via
platform_data, but it would be better to ask genirq to tell us which was
the last irq number "claimed".
--
balbi
DefectiveByDesign.org
next prev parent reply other threads:[~2010-06-02 5:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-26 20:29 [RFC PATCH] irq: handle private interrupt registration adharmap at codeaurora.org
2010-06-01 22:26 ` Andrew Morton
2010-06-01 23:14 ` Thomas Gleixner
2010-06-02 5:41 ` Felipe Balbi [this message]
2010-06-02 13:06 ` Thomas Gleixner
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