ARM: S5PV210: Add support SDMMC Write Protection on SMDKV210

ARM: S5PV210: Add support SDMMC Write Protection on SMDKV210

[Kukjin Kim]

This patch adds support SDMMC write protection pin on SMDKV210.

Note: Depends on following patch set

[PATCH 1/2] ARM: SAMSUNG: Add device definition for HSMMC3
[PATCH 2/2 RE-SEND] ARM: S5PV210: Add support HSMMC on Samsung SMDKV210

And this patch set includes the following patches:

[PATCH 1/3] ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection
[PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210
[PATCH 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT for Samsung SoC

[PATCH 1/3] ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection

[Kukjin Kim]

From: Lee Hyuk <hyuk1.lee@samsung.com>

This patch adds the members of platdata which are cfg_wp and get_ro.
The cfg_wp is the function for setting the specific GPIO for WP pin
and get_ro is the function for getting data from the assigned GPIO.

Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/plat-samsung/dev-hsmmc.c          |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc1.c         |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc2.c         |    4 ++++
 arch/arm/plat-samsung/dev-hsmmc3.c         |    4 ++++
 arch/arm/plat-samsung/include/plat/sdhci.h |    6 ++++++
 5 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
index 4c05b39..f2bae6f 100644
--- a/arch/arm/plat-samsung/dev-hsmmc.c
+++ b/arch/arm/plat-samsung/dev-hsmmc.c
@@ -65,4 +65,8 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }
diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
index e49bc4c..b326e0d 100644
--- a/arch/arm/plat-samsung/dev-hsmmc1.c
+++ b/arch/arm/plat-samsung/dev-hsmmc1.c
@@ -65,4 +65,8 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }
diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
index 824580b..3474ef2 100644
--- a/arch/arm/plat-samsung/dev-hsmmc2.c
+++ b/arch/arm/plat-samsung/dev-hsmmc2.c
@@ -66,4 +66,8 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }
diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c b/arch/arm/plat-samsung/dev-hsmmc3.c
index 05d5ea4..1da8ea7 100644
--- a/arch/arm/plat-samsung/dev-hsmmc3.c
+++ b/arch/arm/plat-samsung/dev-hsmmc3.c
@@ -69,4 +69,8 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->cfg_gpio = pd->cfg_gpio;
 	if (pd->cfg_card)
 		set->cfg_card = pd->cfg_card;
+	if (pd->cfg_wp)
+		set->cfg_wp = pd->cfg_wp;
+	if (pd->get_ro)
+		set->get_ro = pd->get_ro;
 }
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 1314ffa..da198d8 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -29,6 +29,8 @@ struct mmc_ios;
  *            is necessary the controllers and/or GPIO blocks require the
  *	      changing of driver-strength and other controls dependant on
  *	      the card and speed of operation.
+ * @cfg_wp: Configure the GPIO in order to allocate WP pin.
+ * @get_ro: Call back function for getting data from the allocated GPIO.
  *
  * Initialisation data specific to either the machine or the platform
  * for the device driver to use or call-back when configuring gpio or
@@ -45,6 +47,8 @@ struct s3c_sdhci_platdata {
 			    void __iomem *regbase,
 			    struct mmc_ios *ios,
 			    struct mmc_card *card);
+	void	(*cfg_wp)(int dev_id);
+	int	(*get_ro)(struct mmc_host *mmc);
 };
 
 /**
@@ -234,6 +238,8 @@ extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
 					   struct mmc_ios *ios,
 					   struct mmc_card *card);
 
+extern void s3c_sdhci_set_platdata(void);
+
 #ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s5pv210_default_sdhci0(void)
 {
-- 
1.6.2.5

[PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Kukjin Kim]

From: Lee Hyuk <hyuk1.lee@samsung.com>

S5PV210 HSMMC host controller doesn't have the Write Protection pin which
should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
get the data from SDMMC card WP pin with EXT_INT and implement get_ro and
cfg_wp function.

Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
 arch/arm/mach-s5pv210/setup-sdhci.c   |   72 +++++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index b08f376..18cdb8c 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -27,6 +27,7 @@
 #include <plat/cpu.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
@@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
 static void __init smdkv210_machine_init(void)
 {
 	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+	s3c_sdhci_set_platdata();
 	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
 }
 
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
index 51815ec..b553b36 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -15,13 +15,17 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
 #include <linux/mmc/card.h>
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/regs-sdhci.h>
 #include <plat/sdhci.h>
 
+#include <mach/map.h>
+
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
 char *s5pv210_hsmmc_clksrcs[4] = {
@@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
 	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
 	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 }
+
+static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
+{
+	int gpio_dat;
+
+	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
+		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp != NULL)) {
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
+		return !!(gpio_dat & 0x80);
+	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp != NULL) {
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
+		return !!(gpio_dat & 0x2);
+	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp != NULL) {
+		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
+		return !!(gpio_dat & 0x1);
+	} else
+		return 0;
+}
+
+static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
+{
+	switch (dev_id) {
+	case 0:
+	case 1:
+		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+		break;
+	case 2:
+		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
+		break;
+	case 3:
+		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
+		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
+		break;
+	default:
+		break;
+	}
+}
+
+static struct s3c_sdhci_platdata hsmmc0_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc1_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc2_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+static struct s3c_sdhci_platdata hsmmc3_platdata = {
+	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
+	.get_ro         = s5pv210_sdhci_get_ro,
+};
+
+void s3c_sdhci_set_platdata(void)
+{
+	s3c_sdhci0_set_platdata(&hsmmc0_platdata);
+	s3c_sdhci1_set_platdata(&hsmmc1_platdata);
+	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
+	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
+}
+EXPORT_SYMBOL(s3c_sdhci_set_platdata);
-- 
1.6.2.5

[PATCH 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT for Samsung SoC

[Kukjin Kim]

From: Lee Hyuk <hyuk1.lee@samsung.com>

S5PV210 HSMMC host controller doesn't have the WP pin which should be
connnected with SDMMC card WP pin. So if there are the cfg_wp and get_ro
in pdata, configure the WP pin and replace get_ro function in sdhci with
get_ro function in pdata.

Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 drivers/mmc/host/sdhci-s3c.c |   12 ++++++++++++
 drivers/mmc/host/sdhci.c     |    3 +++
 drivers/mmc/host/sdhci.h     |    3 +++
 3 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index af21792..857cbed 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -311,6 +311,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	if (pdata->cfg_gpio)
 		pdata->cfg_gpio(pdev, pdata->max_width);
 
+	if (pdata->get_ro)
+		sdhci_s3c_ops.get_ro = pdata->get_ro;
+
 	host->hw_name = "samsung-hsmmc";
 	host->ops = &sdhci_s3c_ops;
 	host->quirks = 0;
@@ -335,6 +338,15 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
 			 SDHCI_QUIRK_32BIT_DMA_SIZE);
 
+	/* Controller's WP pin donsn't connected with SD card. So we allocate
+	 * a GPIO for getting WP data form SD card  and use that data as
+	 * the return value of the get_ro function */
+	host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
+
+	/* to configure gpio pin as a card write protection signal */
+	if (pdata->cfg_wp)
+		pdata->cfg_wp(pdev->id);
+
 	ret = sdhci_add_host(host);
 	if (ret) {
 		dev_err(dev, "sdhci_add_host() failed\n");
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index c6d1bd8..2f8dfbc 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1192,6 +1192,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
 
 	host = mmc_priv(mmc);
 
+	if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
+		return host->ops->get_ro(mmc);
+
 	spin_lock_irqsave(&host->lock, flags);
 
 	if (host->flags & SDHCI_DEVICE_DEAD)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index c846813..f479e22 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -240,6 +240,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN		(1<<25)
 /* Controller cannot support End Attribute in NOP ADMA descriptor */
 #define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC		(1<<26)
+/* Controller has no write-protect pin connected with SD card */
+#define SDHCI_QUIRK_NO_WP_BIT                          (1<<27)
 
 	int			irq;		/* Device IRQ */
 	void __iomem *		ioaddr;		/* Mapped address */
@@ -312,6 +314,7 @@ struct sdhci_ops {
 	unsigned int	(*get_max_clock)(struct sdhci_host *host);
 	unsigned int	(*get_min_clock)(struct sdhci_host *host);
 	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
+	int		(*get_ro)(struct mmc_host *mmc);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
-- 
1.6.2.5

[PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Kyungmin Park]

On Tue, Jun 15, 2010 at 8:27 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> From: Lee Hyuk <hyuk1.lee@samsung.com>
>
> S5PV210 HSMMC host controller doesn't have the Write Protection pin which
> should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
> get the data from SDMMC card WP pin with EXT_INT and implement get_ro and
> cfg_wp function.
>
> Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> ?arch/arm/mach-s5pv210/mach-smdkv210.c | ? ?2 +
> ?arch/arm/mach-s5pv210/setup-sdhci.c ? | ? 72 +++++++++++++++++++++++++++++++++
> ?2 files changed, 74 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
> index b08f376..18cdb8c 100644
> --- a/arch/arm/mach-s5pv210/mach-smdkv210.c
> +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
> @@ -27,6 +27,7 @@
> ?#include <plat/cpu.h>
> ?#include <plat/adc.h>
> ?#include <plat/ts.h>
> +#include <plat/sdhci.h>
>
> ?/* Following are default values for UCON, ULCON and UFCON UART registers */
> ?#define S5PV210_UCON_DEFAULT ? (S3C2410_UCON_TXILEVEL | ? ? ? ?\
> @@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
> ?static void __init smdkv210_machine_init(void)
> ?{
> ? ? ? ?s3c24xx_ts_set_platdata(&s3c_ts_platform);
> + ? ? ? s3c_sdhci_set_platdata();
> ? ? ? ?platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
> ?}
>
> diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
> index 51815ec..b553b36 100644
> --- a/arch/arm/mach-s5pv210/setup-sdhci.c
> +++ b/arch/arm/mach-s5pv210/setup-sdhci.c
> @@ -15,13 +15,17 @@
> ?#include <linux/interrupt.h>
> ?#include <linux/platform_device.h>
> ?#include <linux/io.h>
> +#include <linux/gpio.h>
>
> ?#include <linux/mmc/card.h>
> ?#include <linux/mmc/host.h>
>
> +#include <plat/gpio-cfg.h>
> ?#include <plat/regs-sdhci.h>
> ?#include <plat/sdhci.h>
>
> +#include <mach/map.h>
> +
> ?/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
>
> ?char *s5pv210_hsmmc_clksrcs[4] = {
> @@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
> ? ? ? ?writel(ctrl2, r + S3C_SDHCI_CONTROL2);
> ? ? ? ?writel(ctrl3, r + S3C_SDHCI_CONTROL3);
> ?}
> +
> +static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
> +{
> + ? ? ? int gpio_dat;
> +
> + ? ? ? if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
> + ? ? ? ? ? ? ? (mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp != NULL)) {
> + ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
> + ? ? ? ? ? ? ? return !!(gpio_dat & 0x80);

It's GPIO values, and it's smdk specific values. So it should go smdk
board files instead of platform common one.

> + ? ? ? } else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp != NULL) {
> + ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
> + ? ? ? ? ? ? ? return !!(gpio_dat & 0x2);
> + ? ? ? } else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp != NULL) {
> + ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
> + ? ? ? ? ? ? ? return !!(gpio_dat & 0x1);
> + ? ? ? } else
> + ? ? ? ? ? ? ? return 0;
> +}
> +
> +static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
> +{
> + ? ? ? switch (dev_id) {
> + ? ? ? case 0:
> + ? ? ? case 1:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? break;
> + ? ? ? case 2:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? break;
> + ? ? ? case 3:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);

Ditto. board specific configurations. should go smdk board file.

> + ? ? ? ? ? ? ? break;
> + ? ? ? default:
> + ? ? ? ? ? ? ? break;
> + ? ? ? }
> +}
> +
> +static struct s3c_sdhci_platdata hsmmc0_platdata = {
> + ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
> + ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc1_platdata = {
> + ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
> + ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc2_platdata = {
> + ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
> + ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc3_platdata = {
> + ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
> + ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
> +};
> +
> +void s3c_sdhci_set_platdata(void)
> +{
> + ? ? ? s3c_sdhci0_set_platdata(&hsmmc0_platdata);
> + ? ? ? s3c_sdhci1_set_platdata(&hsmmc1_platdata);
> + ? ? ? s3c_sdhci2_set_platdata(&hsmmc2_platdata);
> + ? ? ? s3c_sdhci3_set_platdata(&hsmmc3_platdata);
> +}
> +EXPORT_SYMBOL(s3c_sdhci_set_platdata);

I think all added lines should go smdk totally.

Thank you,
Kyungmin Park

> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>

[PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Maurus Cuelenaere]

Op 15-06-10 13:27, Kukjin Kim schreef:
> From: Lee Hyuk <hyuk1.lee@samsung.com>
>
> S5PV210 HSMMC host controller doesn't have the Write Protection pin which
> should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
> get the data from SDMMC card WP pin with EXT_INT and implement get_ro and
> cfg_wp function.
>
> Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
>  arch/arm/mach-s5pv210/setup-sdhci.c   |   72 +++++++++++++++++++++++++++++++++
>  2 files changed, 74 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
> index b08f376..18cdb8c 100644
> --- a/arch/arm/mach-s5pv210/mach-smdkv210.c
> +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
> @@ -27,6 +27,7 @@
>  #include <plat/cpu.h>
>  #include <plat/adc.h>
>  #include <plat/ts.h>
> +#include <plat/sdhci.h>
>  
>  /* Following are default values for UCON, ULCON and UFCON UART registers */
>  #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
> @@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
>  static void __init smdkv210_machine_init(void)
>  {
>  	s3c24xx_ts_set_platdata(&s3c_ts_platform);
> +	s3c_sdhci_set_platdata();
>   

Wouldn't it be better to name this s5pv210_sdhci_set_platdata() ?
Also, see below.

>  	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
>  }
>  
> diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
> index 51815ec..b553b36 100644
> --- a/arch/arm/mach-s5pv210/setup-sdhci.c
> +++ b/arch/arm/mach-s5pv210/setup-sdhci.c
> @@ -15,13 +15,17 @@
>  #include <linux/interrupt.h>
>  #include <linux/platform_device.h>
>  #include <linux/io.h>
> +#include <linux/gpio.h>
>  
>  #include <linux/mmc/card.h>
>  #include <linux/mmc/host.h>
>  
> +#include <plat/gpio-cfg.h>
>  #include <plat/regs-sdhci.h>
>  #include <plat/sdhci.h>
>  
> +#include <mach/map.h>
> +
>  /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
>  
>  char *s5pv210_hsmmc_clksrcs[4] = {
> @@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
>  	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
>  	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
>  }
> +
> +static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
> +{
> +	int gpio_dat;
> +
> +	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
> +		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp != NULL)) {
> +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
> +		return !!(gpio_dat & 0x80);
> +	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp != NULL) {
> +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
> +		return !!(gpio_dat & 0x2);
> +	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp != NULL) {
> +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
> +		return !!(gpio_dat & 0x1);
> +	} else
> +		return 0;
> +}
> +
> +static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
> +{
> +	switch (dev_id) {
> +	case 0:
> +	case 1:
> +		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
> +		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
> +		break;
> +	case 2:
> +		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
> +		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
> +		break;
> +	case 3:
> +		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
> +		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
> +		break;
> +	default:
> +		break;
> +	}
> +}
> +
> +static struct s3c_sdhci_platdata hsmmc0_platdata = {
> +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> +	.get_ro         = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc1_platdata = {
> +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> +	.get_ro         = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc2_platdata = {
> +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> +	.get_ro         = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc3_platdata = {
> +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> +	.get_ro         = s5pv210_sdhci_get_ro,
> +};
> +
> +void s3c_sdhci_set_platdata(void)
> +{
> +	s3c_sdhci0_set_platdata(&hsmmc0_platdata);
> +	s3c_sdhci1_set_platdata(&hsmmc1_platdata);
> +	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
> +	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
> +}
> +EXPORT_SYMBOL(s3c_sdhci_set_platdata);
>   

Why do you export this function? I don't see this being used anywhere
except in mach-s5pv210.

-- 
Maurus Cuelenaere

[PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Ben Dooks]

On Tue, Jun 15, 2010 at 08:27:47PM +0900, Kukjin Kim wrote:
> From: Lee Hyuk <hyuk1.lee@samsung.com>
> 
> S5PV210 HSMMC host controller doesn't have the Write Protection pin which
> should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
> get the data from SDMMC card WP pin with EXT_INT and implement get_ro and
> cfg_wp function.
> 
> Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
>  arch/arm/mach-s5pv210/setup-sdhci.c   |   72 +++++++++++++++++++++++++++++++++
>  2 files changed, 74 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
> index b08f376..18cdb8c 100644
> --- a/arch/arm/mach-s5pv210/mach-smdkv210.c
> +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
> @@ -27,6 +27,7 @@
>  #include <plat/cpu.h>
>  #include <plat/adc.h>
>  #include <plat/ts.h>
> +#include <plat/sdhci.h>
>  
>  /* Following are default values for UCON, ULCON and UFCON UART registers */
>  #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
> @@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
>  static void __init smdkv210_machine_init(void)
>  {
>  	s3c24xx_ts_set_platdata(&s3c_ts_platform);
> +	s3c_sdhci_set_platdata();

hmm, did you really want to call it this? also, no argument specified.

>  	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
>  }
>  
> diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
> index 51815ec..b553b36 100644
> --- a/arch/arm/mach-s5pv210/setup-sdhci.c
> +++ b/arch/arm/mach-s5pv210/setup-sdhci.c
> @@ -15,13 +15,17 @@
>  #include <linux/interrupt.h>
>  #include <linux/platform_device.h>
>  #include <linux/io.h>
> +#include <linux/gpio.h>
>  
>  #include <linux/mmc/card.h>
>  #include <linux/mmc/host.h>
>  
> +#include <plat/gpio-cfg.h>
>  #include <plat/regs-sdhci.h>
>  #include <plat/sdhci.h>
>  
> +#include <mach/map.h>
> +
>  /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
>  
>  char *s5pv210_hsmmc_clksrcs[4] = {
> @@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
>  	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
>  	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
>  }
> +
> +static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
> +{
> +	int gpio_dat;
> +
> +	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
> +		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp != NULL)) {
> +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
> +		return !!(gpio_dat & 0x80);
> +	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp != NULL) {
> +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
> +		return !!(gpio_dat & 0x2);
> +	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp != NULL) {
> +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
> +		return !!(gpio_dat & 0x1);
> +	} else
> +		return 0;

Why not use the gpio layer? really, this sort of thing is what it is
there for.

> +}
> +
> +static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
> +{
> +	switch (dev_id) {
> +	case 0:
> +	case 1:
> +		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
> +		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
> +		break;
> +	case 2:
> +		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
> +		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
> +		break;
> +	case 3:
> +		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
> +		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
> +		break;
> +	default:
> +		break;

again, if you'd use the gpio layer, at-lesat the cfgpin() wouldn't
have been necessary.

> +	}
> +}
> +
> +static struct s3c_sdhci_platdata hsmmc0_platdata = {
> +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> +	.get_ro         = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc1_platdata = {
> +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> +	.get_ro         = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc2_platdata = {
> +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> +	.get_ro         = s5pv210_sdhci_get_ro,
> +};
> +
> +static struct s3c_sdhci_platdata hsmmc3_platdata = {
> +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> +	.get_ro         = s5pv210_sdhci_get_ro,
> +};
> +
> +void s3c_sdhci_set_platdata(void)
> +{
> +	s3c_sdhci0_set_platdata(&hsmmc0_platdata);
> +	s3c_sdhci1_set_platdata(&hsmmc1_platdata);
> +	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
> +	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
> +}
> +EXPORT_SYMBOL(s3c_sdhci_set_platdata);

There is _NO NEED_ to export these, they really should not be used outside
of the machine initialisation.

-- 
Ben

Q:      What's a light-year?
A:      One-third less calories than a regular year.

[PATCH 1/3] ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection

[Ben Dooks]

On Tue, Jun 15, 2010 at 08:27:46PM +0900, Kukjin Kim wrote:
> From: Lee Hyuk <hyuk1.lee@samsung.com>
> 
> This patch adds the members of platdata which are cfg_wp and get_ro.
> The cfg_wp is the function for setting the specific GPIO for WP pin
> and get_ro is the function for getting data from the assigned GPIO.

Why not just pass gpio numbers, and have the sdhci-s3c driver claim them
if they are valid?
 
> Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  arch/arm/plat-samsung/dev-hsmmc.c          |    4 ++++
>  arch/arm/plat-samsung/dev-hsmmc1.c         |    4 ++++
>  arch/arm/plat-samsung/dev-hsmmc2.c         |    4 ++++
>  arch/arm/plat-samsung/dev-hsmmc3.c         |    4 ++++
>  arch/arm/plat-samsung/include/plat/sdhci.h |    6 ++++++
>  5 files changed, 22 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
> index 4c05b39..f2bae6f 100644
> --- a/arch/arm/plat-samsung/dev-hsmmc.c
> +++ b/arch/arm/plat-samsung/dev-hsmmc.c
> @@ -65,4 +65,8 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
>  		set->cfg_gpio = pd->cfg_gpio;
>  	if (pd->cfg_card)
>  		set->cfg_card = pd->cfg_card;
> +	if (pd->cfg_wp)
> +		set->cfg_wp = pd->cfg_wp;
> +	if (pd->get_ro)
> +		set->get_ro = pd->get_ro;
>  }
> diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
> index e49bc4c..b326e0d 100644
> --- a/arch/arm/plat-samsung/dev-hsmmc1.c
> +++ b/arch/arm/plat-samsung/dev-hsmmc1.c
> @@ -65,4 +65,8 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
>  		set->cfg_gpio = pd->cfg_gpio;
>  	if (pd->cfg_card)
>  		set->cfg_card = pd->cfg_card;
> +	if (pd->cfg_wp)
> +		set->cfg_wp = pd->cfg_wp;
> +	if (pd->get_ro)
> +		set->get_ro = pd->get_ro;
>  }
> diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
> index 824580b..3474ef2 100644
> --- a/arch/arm/plat-samsung/dev-hsmmc2.c
> +++ b/arch/arm/plat-samsung/dev-hsmmc2.c
> @@ -66,4 +66,8 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
>  		set->cfg_gpio = pd->cfg_gpio;
>  	if (pd->cfg_card)
>  		set->cfg_card = pd->cfg_card;
> +	if (pd->cfg_wp)
> +		set->cfg_wp = pd->cfg_wp;
> +	if (pd->get_ro)
> +		set->get_ro = pd->get_ro;
>  }
> diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c b/arch/arm/plat-samsung/dev-hsmmc3.c
> index 05d5ea4..1da8ea7 100644
> --- a/arch/arm/plat-samsung/dev-hsmmc3.c
> +++ b/arch/arm/plat-samsung/dev-hsmmc3.c
> @@ -69,4 +69,8 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
>  		set->cfg_gpio = pd->cfg_gpio;
>  	if (pd->cfg_card)
>  		set->cfg_card = pd->cfg_card;
> +	if (pd->cfg_wp)
> +		set->cfg_wp = pd->cfg_wp;
> +	if (pd->get_ro)
> +		set->get_ro = pd->get_ro;
>  }
> diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
> index 1314ffa..da198d8 100644
> --- a/arch/arm/plat-samsung/include/plat/sdhci.h
> +++ b/arch/arm/plat-samsung/include/plat/sdhci.h
> @@ -29,6 +29,8 @@ struct mmc_ios;
>   *            is necessary the controllers and/or GPIO blocks require the
>   *	      changing of driver-strength and other controls dependant on
>   *	      the card and speed of operation.
> + * @cfg_wp: Configure the GPIO in order to allocate WP pin.
> + * @get_ro: Call back function for getting data from the allocated GPIO.

if you just used gpio calls and passed a gpio number here,
you'd not need cfg_wp.

>   *
>   * Initialisation data specific to either the machine or the platform
>   * for the device driver to use or call-back when configuring gpio or
> @@ -45,6 +47,8 @@ struct s3c_sdhci_platdata {
>  			    void __iomem *regbase,
>  			    struct mmc_ios *ios,
>  			    struct mmc_card *card);
> +	void	(*cfg_wp)(int dev_id);
> +	int	(*get_ro)(struct mmc_host *mmc);
>  };
>  
>  /**
> @@ -234,6 +238,8 @@ extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
>  					   struct mmc_ios *ios,
>  					   struct mmc_card *card);
>  
> +extern void s3c_sdhci_set_platdata(void);
> +
>  #ifdef CONFIG_S3C_DEV_HSMMC
>  static inline void s5pv210_default_sdhci0(void)
>  {
> -- 
> 1.6.2.5
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
-- 
Ben

Q:      What's a light-year?
A:      One-third less calories than a regular year.

[PATCH 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT for Samsung SoC

[Ben Dooks]

On Tue, Jun 15, 2010 at 08:27:48PM +0900, Kukjin Kim wrote:
> From: Lee Hyuk <hyuk1.lee@samsung.com>
> 
> S5PV210 HSMMC host controller doesn't have the WP pin which should be
> connnected with SDMMC card WP pin. So if there are the cfg_wp and get_ro
> in pdata, configure the WP pin and replace get_ro function in sdhci with
> get_ro function in pdata.
> 
> Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  drivers/mmc/host/sdhci-s3c.c |   12 ++++++++++++
>  drivers/mmc/host/sdhci.c     |    3 +++
>  drivers/mmc/host/sdhci.h     |    3 +++
>  3 files changed, 18 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
> index af21792..857cbed 100644
> --- a/drivers/mmc/host/sdhci-s3c.c
> +++ b/drivers/mmc/host/sdhci-s3c.c
> @@ -311,6 +311,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
>  	if (pdata->cfg_gpio)
>  		pdata->cfg_gpio(pdev, pdata->max_width);
>  
> +	if (pdata->get_ro)
> +		sdhci_s3c_ops.get_ro = pdata->get_ro;
> +
>  	host->hw_name = "samsung-hsmmc";
>  	host->ops = &sdhci_s3c_ops;
>  	host->quirks = 0;
> @@ -335,6 +338,15 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
>  	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
>  			 SDHCI_QUIRK_32BIT_DMA_SIZE);
>  
> +	/* Controller's WP pin donsn't connected with SD card. So we allocate
> +	 * a GPIO for getting WP data form SD card  and use that data as
> +	 * the return value of the get_ro function */
> +	host->quirks |= SDHCI_QUIRK_NO_WP_BIT;

I really think this should be a custom-wp quirk, not a we-don-have-wp
quirk.

> +
> +	/* to configure gpio pin as a card write protection signal */
> +	if (pdata->cfg_wp)
> +		pdata->cfg_wp(pdev->id);
> +
>  	ret = sdhci_add_host(host);
>  	if (ret) {
>  		dev_err(dev, "sdhci_add_host() failed\n");
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index c6d1bd8..2f8dfbc 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1192,6 +1192,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
>  
>  	host = mmc_priv(mmc);
>  
> +	if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
> +		return host->ops->get_ro(mmc);
> +
>  	spin_lock_irqsave(&host->lock, flags);
>  
>  	if (host->flags & SDHCI_DEVICE_DEAD)
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index c846813..f479e22 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -240,6 +240,8 @@ struct sdhci_host {
>  #define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN		(1<<25)
>  /* Controller cannot support End Attribute in NOP ADMA descriptor */
>  #define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC		(1<<26)
> +/* Controller has no write-protect pin connected with SD card */
> +#define SDHCI_QUIRK_NO_WP_BIT                          (1<<27)
>  
>  	int			irq;		/* Device IRQ */
>  	void __iomem *		ioaddr;		/* Mapped address */
> @@ -312,6 +314,7 @@ struct sdhci_ops {
>  	unsigned int	(*get_max_clock)(struct sdhci_host *host);
>  	unsigned int	(*get_min_clock)(struct sdhci_host *host);
>  	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
> +	int		(*get_ro)(struct mmc_host *mmc);
>  };
>  
>  #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
> -- 
> 1.6.2.5
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
-- 
Ben

Q:      What's a light-year?
A:      One-third less calories than a regular year.

[PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Kukjin Kim]

Kyungmin Park wrote:
> 
> On Tue, Jun 15, 2010 at 8:27 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > From: Lee Hyuk <hyuk1.lee@samsung.com>
> >
> > S5PV210 HSMMC host controller doesn't have the Write Protection pin
which
> > should be connnected with SDMMC card WP pin. So allocated a GPIO in
order
> to
> > get the data from SDMMC card WP pin with EXT_INT and implement get_ro
and
> > cfg_wp function.
> >
> > Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> > ?arch/arm/mach-s5pv210/mach-smdkv210.c | ? ?2 +
> > ?arch/arm/mach-s5pv210/setup-sdhci.c ? | ? 72
> +++++++++++++++++++++++++++++++++
> > ?2 files changed, 74 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-
> s5pv210/mach-smdkv210.c
> > index b08f376..18cdb8c 100644
> > --- a/arch/arm/mach-s5pv210/mach-smdkv210.c
> > +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
> > @@ -27,6 +27,7 @@
> > ?#include <plat/cpu.h>
> > ?#include <plat/adc.h>
> > ?#include <plat/ts.h>
> > +#include <plat/sdhci.h>
> >
> > ?/* Following are default values for UCON, ULCON and UFCON UART
registers */
> > ?#define S5PV210_UCON_DEFAULT ? (S3C2410_UCON_TXILEVEL | ? ? ? ?\
> > @@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
> > ?static void __init smdkv210_machine_init(void)
> > ?{
> > ? ? ? ?s3c24xx_ts_set_platdata(&s3c_ts_platform);
> > + ? ? ? s3c_sdhci_set_platdata();
> > ? ? ? ?platform_add_devices(smdkv210_devices,
> ARRAY_SIZE(smdkv210_devices));
> > ?}
> >
> > diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-
> s5pv210/setup-sdhci.c
> > index 51815ec..b553b36 100644
> > --- a/arch/arm/mach-s5pv210/setup-sdhci.c
> > +++ b/arch/arm/mach-s5pv210/setup-sdhci.c
> > @@ -15,13 +15,17 @@
> > ?#include <linux/interrupt.h>
> > ?#include <linux/platform_device.h>
> > ?#include <linux/io.h>
> > +#include <linux/gpio.h>
> >
> > ?#include <linux/mmc/card.h>
> > ?#include <linux/mmc/host.h>
> >
> > +#include <plat/gpio-cfg.h>
> > ?#include <plat/regs-sdhci.h>
> > ?#include <plat/sdhci.h>
> >
> > +#include <mach/map.h>
> > +
> > ?/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
> >
> > ?char *s5pv210_hsmmc_clksrcs[4] = {
> > @@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct
> platform_device *dev,
> > ? ? ? ?writel(ctrl2, r + S3C_SDHCI_CONTROL2);
> > ? ? ? ?writel(ctrl3, r + S3C_SDHCI_CONTROL3);
> > ?}
> > +
> > +static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
> > +{
> > + ? ? ? int gpio_dat;
> > +
> > + ? ? ? if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL)
||
> > + ? ? ? ? ? ? ? (mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp !=
> NULL)) {
> > + ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
> > + ? ? ? ? ? ? ? return !!(gpio_dat & 0x80);
> 
> It's GPIO values, and it's smdk specific values. So it should go smdk
> board files instead of platform common one.
> 
Yes, you're right..moved.

> > + ? ? ? } else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp !=
> NULL) {
> > + ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
> > + ? ? ? ? ? ? ? return !!(gpio_dat & 0x2);
> > + ? ? ? } else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp !=
> NULL) {
> > + ? ? ? ? ? ? ? gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
> > + ? ? ? ? ? ? ? return !!(gpio_dat & 0x1);
> > + ? ? ? } else
> > + ? ? ? ? ? ? ? return 0;
> > +}
> > +
> > +static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
> > +{
> > + ? ? ? switch (dev_id) {
> > + ? ? ? case 0:
> > + ? ? ? case 1:
> > + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
> > + ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
> > + ? ? ? ? ? ? ? break;
> > + ? ? ? case 2:
> > + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
> > + ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
> > + ? ? ? ? ? ? ? break;
> > + ? ? ? case 3:
> > + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
> > + ? ? ? ? ? ? ? s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
> 
> Ditto. board specific configurations. should go smdk board file.
> 
Moved.

> > + ? ? ? ? ? ? ? break;
> > + ? ? ? default:
> > + ? ? ? ? ? ? ? break;
> > + ? ? ? }
> > +}
> > +
> > +static struct s3c_sdhci_platdata hsmmc0_platdata = {
> > + ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
> > + ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc1_platdata = {
> > + ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
> > + ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc2_platdata = {
> > + ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
> > + ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc3_platdata = {
> > + ? ? ? .cfg_wp ? ? ? ? = s5pv210_setup_sdhci_gpio_wp,
> > + ? ? ? .get_ro ? ? ? ? = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +void s3c_sdhci_set_platdata(void)
> > +{
> > + ? ? ? s3c_sdhci0_set_platdata(&hsmmc0_platdata);
> > + ? ? ? s3c_sdhci1_set_platdata(&hsmmc1_platdata);
> > + ? ? ? s3c_sdhci2_set_platdata(&hsmmc2_platdata);
> > + ? ? ? s3c_sdhci3_set_platdata(&hsmmc3_platdata);
> > +}
> > +EXPORT_SYMBOL(s3c_sdhci_set_platdata);
> 
> I think all added lines should go smdk totally.
> 
Fixed in v2 patches as your comments.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Kukjin Kim]

Maurus Cuelenaere wrote:
> 
> Op 15-06-10 13:27, Kukjin Kim schreef:
> > From: Lee Hyuk <hyuk1.lee@samsung.com>
> >
> > S5PV210 HSMMC host controller doesn't have the Write Protection pin which
> > should be connnected with SDMMC card WP pin. So allocated a GPIO in order
> to
> > get the data from SDMMC card WP pin with EXT_INT and implement get_ro and
> > cfg_wp function.
> >
> > Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> >  arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
> >  arch/arm/mach-s5pv210/setup-sdhci.c   |   72
> +++++++++++++++++++++++++++++++++
> >  2 files changed, 74 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-
> s5pv210/mach-smdkv210.c
> > index b08f376..18cdb8c 100644
> > --- a/arch/arm/mach-s5pv210/mach-smdkv210.c
> > +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
> > @@ -27,6 +27,7 @@
> >  #include <plat/cpu.h>
> >  #include <plat/adc.h>
> >  #include <plat/ts.h>
> > +#include <plat/sdhci.h>
> >
> >  /* Following are default values for UCON, ULCON and UFCON UART registers
> */
> >  #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
> > @@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
> >  static void __init smdkv210_machine_init(void)
> >  {
> >  	s3c24xx_ts_set_platdata(&s3c_ts_platform);
> > +	s3c_sdhci_set_platdata();
> >
> 
> Wouldn't it be better to name this s5pv210_sdhci_set_platdata() ?
> Also, see below.
> 
Ok..so used s3c_sdhciX_set_platdata() instead of using above.

> >  	platform_add_devices(smdkv210_devices,
> ARRAY_SIZE(smdkv210_devices));
> >  }
> >
> > diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-
> s5pv210/setup-sdhci.c
> > index 51815ec..b553b36 100644
> > --- a/arch/arm/mach-s5pv210/setup-sdhci.c
> > +++ b/arch/arm/mach-s5pv210/setup-sdhci.c
> > @@ -15,13 +15,17 @@
> >  #include <linux/interrupt.h>
> >  #include <linux/platform_device.h>
> >  #include <linux/io.h>
> > +#include <linux/gpio.h>
> >
> >  #include <linux/mmc/card.h>
> >  #include <linux/mmc/host.h>
> >
> > +#include <plat/gpio-cfg.h>
> >  #include <plat/regs-sdhci.h>
> >  #include <plat/sdhci.h>
> >
> > +#include <mach/map.h>
> > +
> >  /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
> >
> >  char *s5pv210_hsmmc_clksrcs[4] = {
> > @@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct
> platform_device *dev,
> >  	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
> >  	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
> >  }
> > +
> > +static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
> > +{
> > +	int gpio_dat;
> > +
> > +	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
> > +		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp !=
> NULL)) {
> > +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
> > +		return !!(gpio_dat & 0x80);
> > +	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp !=
> NULL) {
> > +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
> > +		return !!(gpio_dat & 0x2);
> > +	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp !=
> NULL) {
> > +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
> > +		return !!(gpio_dat & 0x1);
> > +	} else
> > +		return 0;
> > +}
> > +
> > +static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
> > +{
> > +	switch (dev_id) {
> > +	case 0:
> > +	case 1:
> > +		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
> > +		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
> > +		break;
> > +	case 2:
> > +		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
> > +		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
> > +		break;
> > +	case 3:
> > +		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
> > +		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
> > +		break;
> > +	default:
> > +		break;
> > +	}
> > +}
> > +
> > +static struct s3c_sdhci_platdata hsmmc0_platdata = {
> > +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> > +	.get_ro         = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc1_platdata = {
> > +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> > +	.get_ro         = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc2_platdata = {
> > +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> > +	.get_ro         = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc3_platdata = {
> > +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> > +	.get_ro         = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +void s3c_sdhci_set_platdata(void)
> > +{
> > +	s3c_sdhci0_set_platdata(&hsmmc0_platdata);
> > +	s3c_sdhci1_set_platdata(&hsmmc1_platdata);
> > +	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
> > +	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
> > +}
> > +EXPORT_SYMBOL(s3c_sdhci_set_platdata);
> >
> 
> Why do you export this function? I don't see this being used anywhere
> except in mach-s5pv210.
> 
You're right..so machine specific functions moved in the machine file.
And removed unnecessary above function. EXPORT_SYMBOL also.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Kukjin Kim]

Ben Dooks wrote:
> 
> On Tue, Jun 15, 2010 at 08:27:47PM +0900, Kukjin Kim wrote:
> > From: Lee Hyuk <hyuk1.lee@samsung.com>
> >
> > S5PV210 HSMMC host controller doesn't have the Write Protection pin
which
> > should be connnected with SDMMC card WP pin. So allocated a GPIO in
order
> to
> > get the data from SDMMC card WP pin with EXT_INT and implement get_ro
and
> > cfg_wp function.
> >
> > Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> >  arch/arm/mach-s5pv210/mach-smdkv210.c |    2 +
> >  arch/arm/mach-s5pv210/setup-sdhci.c   |   72
> +++++++++++++++++++++++++++++++++
> >  2 files changed, 74 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-
> s5pv210/mach-smdkv210.c
> > index b08f376..18cdb8c 100644
> > --- a/arch/arm/mach-s5pv210/mach-smdkv210.c
> > +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
> > @@ -27,6 +27,7 @@
> >  #include <plat/cpu.h>
> >  #include <plat/adc.h>
> >  #include <plat/ts.h>
> > +#include <plat/sdhci.h>
> >
> >  /* Following are default values for UCON, ULCON and UFCON UART
registers
> */
> >  #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
> > @@ -101,6 +102,7 @@ static void __init smdkv210_map_io(void)
> >  static void __init smdkv210_machine_init(void)
> >  {
> >  	s3c24xx_ts_set_platdata(&s3c_ts_platform);
> > +	s3c_sdhci_set_platdata();
> 
> hmm, did you really want to call it this? also, no argument specified.
> 
No..fixed it.

> >  	platform_add_devices(smdkv210_devices,
> ARRAY_SIZE(smdkv210_devices));
> >  }
> >
> > diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-
> s5pv210/setup-sdhci.c
> > index 51815ec..b553b36 100644
> > --- a/arch/arm/mach-s5pv210/setup-sdhci.c
> > +++ b/arch/arm/mach-s5pv210/setup-sdhci.c
> > @@ -15,13 +15,17 @@
> >  #include <linux/interrupt.h>
> >  #include <linux/platform_device.h>
> >  #include <linux/io.h>
> > +#include <linux/gpio.h>
> >
> >  #include <linux/mmc/card.h>
> >  #include <linux/mmc/host.h>
> >
> > +#include <plat/gpio-cfg.h>
> >  #include <plat/regs-sdhci.h>
> >  #include <plat/sdhci.h>
> >
> > +#include <mach/map.h>
> > +
> >  /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
> >
> >  char *s5pv210_hsmmc_clksrcs[4] = {
> > @@ -61,3 +65,71 @@ void s5pv210_setup_sdhci_cfg_card(struct
> platform_device *dev,
> >  	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
> >  	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
> >  }
> > +
> > +static int s5pv210_sdhci_get_ro(struct mmc_host *mmc)
> > +{
> > +	int gpio_dat;
> > +
> > +	if ((mmc->index == 0 && s3c_hsmmc0_def_platdata.cfg_wp != NULL) ||
> > +		(mmc->index == 1 && s3c_hsmmc1_def_platdata.cfg_wp !=
> NULL)) {
> > +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x04);
> > +		return !!(gpio_dat & 0x80);
> > +	} else if (mmc->index == 2 && s3c_hsmmc2_def_platdata.cfg_wp !=
> NULL) {
> > +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x64);
> > +		return !!(gpio_dat & 0x2);
> > +	} else if (mmc->index == 3 && s3c_hsmmc3_def_platdata.cfg_wp !=
> NULL) {
> > +		gpio_dat = __raw_readl((S5P_VA_GPIO + 0xC00) + 0x24);
> > +		return !!(gpio_dat & 0x1);
> > +	} else
> > +		return 0;
> 
> Why not use the gpio layer? really, this sort of thing is what it is
> there for.
> 
Ok..used it.

> > +}
> > +
> > +static void s5pv210_setup_sdhci_gpio_wp(int dev_id)
> > +{
> > +	switch (dev_id) {
> > +	case 0:
> > +	case 1:
> > +		s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT);
> > +		s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
> > +		break;
> > +	case 2:
> > +		s3c_gpio_cfgpin(S5PV210_GPH3(1), S3C_GPIO_INPUT);
> > +		s3c_gpio_setpull(S5PV210_GPH3(1), S3C_GPIO_PULL_UP);
> > +		break;
> > +	case 3:
> > +		s3c_gpio_cfgpin(S5PV210_GPH1(0), S3C_GPIO_INPUT);
> > +		s3c_gpio_setpull(S5PV210_GPH1(0), S3C_GPIO_PULL_UP);
> > +		break;
> > +	default:
> > +		break;
> 
> again, if you'd use the gpio layer, at-lesat the cfgpin() wouldn't
> have been necessary.
> 
OK.

> > +	}
> > +}
> > +
> > +static struct s3c_sdhci_platdata hsmmc0_platdata = {
> > +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> > +	.get_ro         = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc1_platdata = {
> > +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> > +	.get_ro         = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc2_platdata = {
> > +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> > +	.get_ro         = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +static struct s3c_sdhci_platdata hsmmc3_platdata = {
> > +	.cfg_wp         = s5pv210_setup_sdhci_gpio_wp,
> > +	.get_ro         = s5pv210_sdhci_get_ro,
> > +};
> > +
> > +void s3c_sdhci_set_platdata(void)
> > +{
> > +	s3c_sdhci0_set_platdata(&hsmmc0_platdata);
> > +	s3c_sdhci1_set_platdata(&hsmmc1_platdata);
> > +	s3c_sdhci2_set_platdata(&hsmmc2_platdata);
> > +	s3c_sdhci3_set_platdata(&hsmmc3_platdata);
> > +}
> > +EXPORT_SYMBOL(s3c_sdhci_set_platdata);
> 
> There is _NO NEED_ to export these, they really should not be used outside
> of the machine initialisation.

Yeah, you're right.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 1/3] ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection

[Kukjin Kim]

Ben Dooks wrote:
> 
> On Tue, Jun 15, 2010 at 08:27:46PM +0900, Kukjin Kim wrote:
> > From: Lee Hyuk <hyuk1.lee@samsung.com>
> >
> > This patch adds the members of platdata which are cfg_wp and get_ro.
> > The cfg_wp is the function for setting the specific GPIO for WP pin
> > and get_ro is the function for getting data from the assigned GPIO.
> 
> Why not just pass gpio numbers, and have the sdhci-s3c driver claim them
> if they are valid?
> 
Ok..fixed it as your comments.

> > Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> >  arch/arm/plat-samsung/dev-hsmmc.c          |    4 ++++
> >  arch/arm/plat-samsung/dev-hsmmc1.c         |    4 ++++
> >  arch/arm/plat-samsung/dev-hsmmc2.c         |    4 ++++
> >  arch/arm/plat-samsung/dev-hsmmc3.c         |    4 ++++
> >  arch/arm/plat-samsung/include/plat/sdhci.h |    6 ++++++
> >  5 files changed, 22 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/plat-samsung/dev-hsmmc.c
b/arch/arm/plat-samsung/dev-
> hsmmc.c
> > index 4c05b39..f2bae6f 100644
> > --- a/arch/arm/plat-samsung/dev-hsmmc.c
> > +++ b/arch/arm/plat-samsung/dev-hsmmc.c
> > @@ -65,4 +65,8 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata
> *pd)
> >  		set->cfg_gpio = pd->cfg_gpio;
> >  	if (pd->cfg_card)
> >  		set->cfg_card = pd->cfg_card;
> > +	if (pd->cfg_wp)
> > +		set->cfg_wp = pd->cfg_wp;
> > +	if (pd->get_ro)
> > +		set->get_ro = pd->get_ro;
> >  }
> > diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c
b/arch/arm/plat-samsung/dev-
> hsmmc1.c
> > index e49bc4c..b326e0d 100644
> > --- a/arch/arm/plat-samsung/dev-hsmmc1.c
> > +++ b/arch/arm/plat-samsung/dev-hsmmc1.c
> > @@ -65,4 +65,8 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata
> *pd)
> >  		set->cfg_gpio = pd->cfg_gpio;
> >  	if (pd->cfg_card)
> >  		set->cfg_card = pd->cfg_card;
> > +	if (pd->cfg_wp)
> > +		set->cfg_wp = pd->cfg_wp;
> > +	if (pd->get_ro)
> > +		set->get_ro = pd->get_ro;
> >  }
> > diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c
b/arch/arm/plat-samsung/dev-
> hsmmc2.c
> > index 824580b..3474ef2 100644
> > --- a/arch/arm/plat-samsung/dev-hsmmc2.c
> > +++ b/arch/arm/plat-samsung/dev-hsmmc2.c
> > @@ -66,4 +66,8 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata
> *pd)
> >  		set->cfg_gpio = pd->cfg_gpio;
> >  	if (pd->cfg_card)
> >  		set->cfg_card = pd->cfg_card;
> > +	if (pd->cfg_wp)
> > +		set->cfg_wp = pd->cfg_wp;
> > +	if (pd->get_ro)
> > +		set->get_ro = pd->get_ro;
> >  }
> > diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c
b/arch/arm/plat-samsung/dev-
> hsmmc3.c
> > index 05d5ea4..1da8ea7 100644
> > --- a/arch/arm/plat-samsung/dev-hsmmc3.c
> > +++ b/arch/arm/plat-samsung/dev-hsmmc3.c
> > @@ -69,4 +69,8 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata
> *pd)
> >  		set->cfg_gpio = pd->cfg_gpio;
> >  	if (pd->cfg_card)
> >  		set->cfg_card = pd->cfg_card;
> > +	if (pd->cfg_wp)
> > +		set->cfg_wp = pd->cfg_wp;
> > +	if (pd->get_ro)
> > +		set->get_ro = pd->get_ro;
> >  }
> > diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-
> samsung/include/plat/sdhci.h
> > index 1314ffa..da198d8 100644
> > --- a/arch/arm/plat-samsung/include/plat/sdhci.h
> > +++ b/arch/arm/plat-samsung/include/plat/sdhci.h
> > @@ -29,6 +29,8 @@ struct mmc_ios;
> >   *            is necessary the controllers and/or GPIO blocks require
the
> >   *	      changing of driver-strength and other controls dependant on
> >   *	      the card and speed of operation.
> > + * @cfg_wp: Configure the GPIO in order to allocate WP pin.
> > + * @get_ro: Call back function for getting data from the allocated
GPIO.
> 
> if you just used gpio calls and passed a gpio number here,
> you'd not need cfg_wp.
> 
OK.

> >   *
> >   * Initialisation data specific to either the machine or the platform
> >   * for the device driver to use or call-back when configuring gpio or
> > @@ -45,6 +47,8 @@ struct s3c_sdhci_platdata {
> >  			    void __iomem *regbase,
> >  			    struct mmc_ios *ios,
> >  			    struct mmc_card *card);
> > +	void	(*cfg_wp)(int dev_id);
> > +	int	(*get_ro)(struct mmc_host *mmc);
> >  };
> >
> >  /**
> > @@ -234,6 +238,8 @@ extern void s5pv210_setup_sdhci_cfg_card(struct
> platform_device *dev,
> >  					   struct mmc_ios *ios,
> >  					   struct mmc_card *card);
> >
> > +extern void s3c_sdhci_set_platdata(void);
> > +
> >  #ifdef CONFIG_S3C_DEV_HSMMC
> >  static inline void s5pv210_default_sdhci0(void)
> >  {


Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.