* [patch 071/149] ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6 [not found] ` <20100706225815.GA21834@flint.arm.linux.org.uk> @ 2010-07-07 8:56 ` Kirill A. Shutemov 2010-07-07 22:34 ` Russell King - ARM Linux 0 siblings, 1 reply; 4+ messages in thread From: Kirill A. Shutemov @ 2010-07-07 8:56 UTC (permalink / raw) To: linux-arm-kernel On Tue, Jul 06, 2010 at 11:58:15PM +0100, Russell King wrote: > On Tue, Jul 06, 2010 at 04:06:18PM +0300, Kirill A. Shutemov wrote: > > I've investigated the issue. It's reproducible if you try to jump to > > the megabyte next to section mapping. > > Okay, this is specific to the way that OMAP sets up its mappings, which > is why it doesn't appear everywhere. > > > On ARM one Linux PGD entry contains two hardware entry. But there is error > > in do_translation_fault(). It's always call pmd_none() check for the first > > entry of two, not for the entry corresponded to address. So in case if we > > try to jump the megabyte next to section mapping, we will have inifinity > > loop of translation faults. > > Okay, now that we know _why_ it happens, I'm satisfied that the fix > previously committed will help this situation. > > > diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c > > index 9634fe1..825b9da 100644 > > --- a/arch/arm/mm/fault.c > > +++ b/arch/arm/mm/fault.c > > @@ -406,7 +406,8 @@ do_translation_fault(unsigned long addr, unsigned int fsr, > > pmd_k = pmd_offset(pgd_k, addr); > > pmd = pmd_offset(pgd, addr); > > > > - if (pmd_none(*pmd_k)) > > + index = (addr >> SECTION_SHIFT) & 1; > > + if (pmd_none(pmd_k[index])) > > I do think this is extremely obscure, and therefore requires a comment > to help people understand what is going on here and why. Leaving it > in the commit log would be an invitation for this to be needlessly > cut'n'pasted. Ok, I'll fix it. But it seems that the problem is more global. Potentially, any of pmd_none() check may produce false results. I don't see an easy way to fix it. It's not so big problem since we don't have [super]section in userspace, but I guess, we want to have huge pages support in the future. Any ideas how to fix it in the right way? Does Linux VM still expect one PTE table per page? CC list modified. Removed persons who unlikely interested in ARM-specific stuff. linux-arm-kernel and linux-mm added. -- Kirill A. Shutemov ^ permalink raw reply [flat|nested] 4+ messages in thread
* [patch 071/149] ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6 2010-07-07 8:56 ` [patch 071/149] ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6 Kirill A. Shutemov @ 2010-07-07 22:34 ` Russell King - ARM Linux 2010-07-08 11:31 ` Kirill A. Shutemov 0 siblings, 1 reply; 4+ messages in thread From: Russell King - ARM Linux @ 2010-07-07 22:34 UTC (permalink / raw) To: linux-arm-kernel On Wed, Jul 07, 2010 at 11:56:01AM +0300, Kirill A. Shutemov wrote: > But it seems that the problem is more global. Potentially, any of > pmd_none() check may produce false results. I don't see an easy way to fix > it. It isn't. We normally guarantee that we always fill on both L1 entries. The only exception is for the mappings specified via create_mapping() which is used for the static platform mappings. > Does Linux VM still expect one PTE table per page? Yes, and as far as I can see probably always will. Hence why we need to put two L1 entries in one page and lie to the kernel about the sizes of the hardware entries. ^ permalink raw reply [flat|nested] 4+ messages in thread
* [patch 071/149] ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6 2010-07-07 22:34 ` Russell King - ARM Linux @ 2010-07-08 11:31 ` Kirill A. Shutemov 2010-07-12 22:08 ` Kirill A. Shutemov 0 siblings, 1 reply; 4+ messages in thread From: Kirill A. Shutemov @ 2010-07-08 11:31 UTC (permalink / raw) To: linux-arm-kernel On Wed, Jul 07, 2010 at 11:34:18PM +0100, Russell King - ARM Linux wrote: > On Wed, Jul 07, 2010 at 11:56:01AM +0300, Kirill A. Shutemov wrote: > > But it seems that the problem is more global. Potentially, any of > > pmd_none() check may produce false results. I don't see an easy way to fix > > it. > > It isn't. We normally guarantee that we always fill on both L1 entries. > The only exception is for the mappings specified via create_mapping() > which is used for the static platform mappings. Why do not to change create_mapping() to follow the same rules? I mean, create sections only if it asked for 2*SECTION_SIZE with appropriate alignment. It reduces number of section mappings, but, probably, will be a bit cleaner and less error-prune. > > Does Linux VM still expect one PTE table per page? > > Yes, and as far as I can see probably always will. Hence why we need > to put two L1 entries in one page and lie to the kernel about the sizes > of the hardware entries. Another option is leave half of page with PTE table free. Is it very bad idea? How other architectures handle it? Or only on ARM PTL table size is less than page size? -- Kirill A. Shutemov ^ permalink raw reply [flat|nested] 4+ messages in thread
* [patch 071/149] ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6 2010-07-08 11:31 ` Kirill A. Shutemov @ 2010-07-12 22:08 ` Kirill A. Shutemov 0 siblings, 0 replies; 4+ messages in thread From: Kirill A. Shutemov @ 2010-07-12 22:08 UTC (permalink / raw) To: linux-arm-kernel On Thu, Jul 08, 2010 at 02:31:22PM +0300, Kirill A. Shutemov wrote: > On Wed, Jul 07, 2010 at 11:34:18PM +0100, Russell King - ARM Linux wrote: > > On Wed, Jul 07, 2010 at 11:56:01AM +0300, Kirill A. Shutemov wrote: > > > But it seems that the problem is more global. Potentially, any of > > > pmd_none() check may produce false results. I don't see an easy way to fix > > > it. > > > > It isn't. We normally guarantee that we always fill on both L1 entries. > > The only exception is for the mappings specified via create_mapping() > > which is used for the static platform mappings. > > Why do not to change create_mapping() to follow the same rules? > I mean, create sections only if it asked for 2*SECTION_SIZE with > appropriate alignment. It reduces number of section mappings, but, > probably, will be a bit cleaner and less error-prune. > > > > Does Linux VM still expect one PTE table per page? > > > > Yes, and as far as I can see probably always will. Hence why we need > > to put two L1 entries in one page and lie to the kernel about the sizes > > of the hardware entries. > > Another option is leave half of page with PTE table free. Is it very bad > idea? > > How other architectures handle it? Or only on ARM PTL table size is less > than page size? Russell, any comments? I would like to fix it in a right way. -- Kirill A. Shutemov ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2010-07-12 22:08 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- [not found] <20100701175144.GA2116@kroah.com> [not found] ` <20100701173212.785441106@clark.site> [not found] ` <20100701221420.GA10481@shutemov.name> [not found] ` <20100701221728.GA12187@suse.de> [not found] ` <20100701222541.GB10481@shutemov.name> [not found] ` <20100701224837.GA27389@flint.arm.linux.org.uk> [not found] ` <20100701225911.GC10481@shutemov.name> [not found] ` <20100701231207.GB27389@flint.arm.linux.org.uk> [not found] ` <20100706130618.GA14177@shutemov.name> [not found] ` <20100706225815.GA21834@flint.arm.linux.org.uk> 2010-07-07 8:56 ` [patch 071/149] ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6 Kirill A. Shutemov 2010-07-07 22:34 ` Russell King - ARM Linux 2010-07-08 11:31 ` Kirill A. Shutemov 2010-07-12 22:08 ` Kirill A. Shutemov
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