From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] [ARM] dmabounce: add support for low bitmasks in dmabounce
Date: Thu, 29 Jul 2010 09:50:56 +0100 [thread overview]
Message-ID: <20100729085056.GA14880@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <1280365067-21102-2-git-send-email-gking@nvidia.com>
On Wed, Jul 28, 2010 at 05:57:46PM -0700, gking at nvidia.com wrote:
> some systems have devices which require DMA bounce buffers due to
> alignment restrictions rather than address window restrictions.
>
> detect when a device's DMA mask has low bits set to zero and treat
> this as an alignment for DMA pool allocations, but ignore the low
> bits for DMA valid window comparisons.
Why can't you arrange for the originally allocated buffer to have the
necessary alignment? What kind of devices have this problem? Are
there cases where the alignment is greater than the L1 cache line size?
next prev parent reply other threads:[~2010-07-29 8:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-29 0:57 [RFC 0/2] DMA bounce alignment and highmem support gking at nvidia.com
2010-07-29 0:57 ` [PATCH 1/2] [ARM] dmabounce: add support for low bitmasks in dmabounce gking at nvidia.com
2010-07-29 8:50 ` Russell King - ARM Linux [this message]
2010-07-29 15:46 ` Gary King
2010-07-29 0:57 ` [PATCH 2/2] [ARM] dma-mapping: add highmem support to dma bounce gking at nvidia.com
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