[PATCH] i.MX35: Add mx35_revision function to query the silicon revision

[PATCH] i.MX35: Add mx35_revision function to query the silicon revision

[Sascha Hauer]

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-mx3/clock-imx35.c       |    2 ++
 arch/arm/mach-mx3/cpu.c               |   32 ++++++++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/mx35.h |   19 +++++++------------
 arch/arm/plat-mxc/include/mach/mx3x.h |    8 ++++++++
 4 files changed, 49 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index dcabed0..2b1d129 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -535,6 +535,8 @@ int __init mx35_clocks_init()
 	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
 	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
 
+	mx35_read_cpu_rev();
+
 #ifdef CONFIG_MXC_USE_EPIT
 	epit_timer_init(&epit1_clk,
 			MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index 861afe0..161dfff 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -55,3 +55,35 @@ void __init mx31_read_cpu_rev(void)
 
 	printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
 }
+
+unsigned int mx35_cpu_rev;
+EXPORT_SYMBOL(mx35_cpu_rev);
+
+#define MX35_ROM_SI_REV		0x40
+
+void __init mx35_read_cpu_rev(void)
+{
+	void __iomem *rom = ioremap(MX35_IROM_BASE_ADDR, MX35_IROM_SIZE);
+	u32 rev;
+	char *srev = "unknown";
+
+	if (!rom)
+		return;
+
+	rev = readl(rom + MX35_ROM_SI_REV);
+	switch (rev) {
+	case 0x1:
+		mx35_cpu_rev = MX35_CHIP_REV_1_0;
+		srev = "1.0";
+		break;
+	case 0x2:
+		mx35_cpu_rev = MX35_CHIP_REV_2_0;
+		srev = "2.0";
+		break;
+	}
+
+	printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
+
+	iounmap(rom);
+}
+
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 9f0a1ee..f740455 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -1,5 +1,9 @@
 #ifndef __MACH_MX35_H__
 #define __MACH_MX35_H__
+
+#define MX35_IROM_BASE_ADDR		0x0
+#define MX35_IROM_SIZE			SZ_16K
+
 /*
  * IRAM
  */
@@ -184,18 +188,9 @@
 
 #define MX35_PROD_SIGNATURE		0x1	/* For MX31 */
 
-/* silicon revisions specific to i.MX31 */
-#define MX35_CHIP_REV_1_0		0x10
-#define MX35_CHIP_REV_1_1		0x11
-#define MX35_CHIP_REV_1_2		0x12
-#define MX35_CHIP_REV_1_3		0x13
-#define MX35_CHIP_REV_2_0		0x20
-#define MX35_CHIP_REV_2_1		0x21
-#define MX35_CHIP_REV_2_2		0x22
-#define MX35_CHIP_REV_2_3		0x23
-#define MX35_CHIP_REV_3_0		0x30
-#define MX35_CHIP_REV_3_1		0x31
-#define MX35_CHIP_REV_3_2		0x32
+/* silicon revisions specific to i.MX35 */
+#define MX35_CHIP_REV_1_0		0x1
+#define MX35_CHIP_REV_2_0		0x2
 
 #define MX35_SYSTEM_REV_MIN		MX35_CHIP_REV_1_0
 #define MX35_SYSTEM_REV_NUM		3
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index 7a356de3..581db46 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -267,6 +267,14 @@ static inline int mx31_revision(void)
 {
 	return mx31_cpu_rev;
 }
+
+extern unsigned int mx35_cpu_rev;
+extern void mx35_read_cpu_rev(void);
+
+static inline int mx35_revision(void)
+{
+	return mx35_cpu_rev;
+}
 #endif
 
 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-- 
1.7.2.3

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH] i.MX35: Add mx35_revision function to query the silicon revision

[Uwe Kleine-König]

Hallo Sascha,

I put you patch in my (still private) tree and suggest the following on
top of the two.  If you're OK I'd squash the hunks into the respective
patches and send them to you.

Best regards
Uwe

diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index 161dfff..2872863 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -73,11 +73,11 @@ void __init mx35_read_cpu_rev(void)
 	rev = readl(rom + MX35_ROM_SI_REV);
 	switch (rev) {
 	case 0x1:
-		mx35_cpu_rev = MX35_CHIP_REV_1_0;
+		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
 		srev = "1.0";
 		break;
 	case 0x2:
-		mx35_cpu_rev = MX35_CHIP_REV_2_0;
+		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
 		srev = "2.0";
 		break;
 	}
@@ -86,4 +86,3 @@ void __init mx35_read_cpu_rev(void)
 
 	iounmap(rom);
 }
-
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c
index 95f35c8..02d9890 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-dma.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c
@@ -50,8 +50,8 @@ struct imx_imx_sdma_data imx31_imx_sdma_data __initdata =
 #endif /* ifdef CONFIG_ARCH_MX31 */
 
 #ifdef CONFIG_ARCH_MX35
-const struct imx_imx_sdma_data imx35_imx_sdma_data __initconst =
-	imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 2);
+struct imx_imx_sdma_data imx35_imx_sdma_data __initdata =
+	imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0);
 #endif /* ifdef CONFIG_ARCH_MX35 */
 
 #ifdef CONFIG_ARCH_MX51
@@ -108,9 +108,10 @@ static int __init imxXX_add_imx_dma(void)
 #endif
 
 #if defined(CONFIG_ARCH_MX35)
-	if (cpu_is_mx35())
+	if (cpu_is_mx35()) {
+		imx35_imx_sdma_data.pdata.to_version = mx35_revision() >> 4;
 		ret = imx_add_imx_sdma(&imx35_imx_sdma_data);
-	else
+	} else
 #endif
 
 #if defined(CONFIG_ARCH_MX51)
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index f740455..b651ee4 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -188,11 +188,7 @@
 
 #define MX35_PROD_SIGNATURE		0x1	/* For MX31 */
 
-/* silicon revisions specific to i.MX35 */
-#define MX35_CHIP_REV_1_0		0x1
-#define MX35_CHIP_REV_2_0		0x2
-
-#define MX35_SYSTEM_REV_MIN		MX35_CHIP_REV_1_0
+#define MX35_SYSTEM_REV_MIN		MX3x_CHIP_REV_1_0
 #define MX35_SYSTEM_REV_NUM		3
 
 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH] i.MX35: Add mx35_revision function to query the silicon revision

[Sascha Hauer]

On Thu, Oct 07, 2010 at 08:21:37PM +0200, Uwe Kleine-K?nig wrote:
> Hallo Sascha,
> 
> I put you patch in my (still private) tree and suggest the following on
> top of the two.  If you're OK I'd squash the hunks into the respective
> patches and send them to you.

Yes, I'm ok.

Here's another one I would like to put ontop of it.

SAscha


[PATCH] ARM i.MX31: use MX3x_ prefixed version of CHIP_REV_x

Also, remove the depreacated symbols from arch/arm/mach-mx3/cpu.c

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-mx3/Makefile            |    1 -
 arch/arm/mach-mx3/cpu.c               |   20 ++++++++++----------
 arch/arm/plat-mxc/include/mach/mx3x.h |   15 +--------------
 3 files changed, 11 insertions(+), 25 deletions(-)

diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 2bd7bec..8a182d0a 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -7,7 +7,6 @@
 obj-y				:= mm.o devices.o cpu.o
 CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
 CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
-CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
 obj-$(CONFIG_ARCH_MX31)		+= clock-imx31.o iomux-imx31.o
 obj-$(CONFIG_ARCH_MX35)		+= clock-imx35.o
 obj-$(CONFIG_MACH_MX31ADS)	+= mach-mx31ads.o
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index 161dfff..db7af50 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -25,15 +25,15 @@ struct mx3_cpu_type {
 };
 
 static struct mx3_cpu_type mx31_cpu_type[] __initdata = {
-	{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0",  .rev = CHIP_REV_1_0	},
-	{ .srev = 0x10, .name = "i.MX31",    .v = "1.1",  .rev = CHIP_REV_1_1	},
-	{ .srev = 0x11, .name = "i.MX31L",   .v = "1.1",  .rev = CHIP_REV_1_1	},
-	{ .srev = 0x12, .name = "i.MX31",    .v = "1.15", .rev = CHIP_REV_1_1	},
-	{ .srev = 0x13, .name = "i.MX31L",   .v = "1.15", .rev = CHIP_REV_1_1	},
-	{ .srev = 0x14, .name = "i.MX31",    .v = "1.2",  .rev = CHIP_REV_1_2	},
-	{ .srev = 0x15, .name = "i.MX31L",   .v = "1.2",  .rev = CHIP_REV_1_2	},
-	{ .srev = 0x28, .name = "i.MX31",    .v = "2.0",  .rev = CHIP_REV_2_0	},
-	{ .srev = 0x29, .name = "i.MX31L",   .v = "2.0",  .rev = CHIP_REV_2_0	},
+	{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0",  .rev = MX3x_CHIP_REV_1_0 },
+	{ .srev = 0x10, .name = "i.MX31",    .v = "1.1",  .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x11, .name = "i.MX31L",   .v = "1.1",  .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x12, .name = "i.MX31",    .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x13, .name = "i.MX31L",   .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x14, .name = "i.MX31",    .v = "1.2",  .rev = MX3x_CHIP_REV_1_2 },
+	{ .srev = 0x15, .name = "i.MX31L",   .v = "1.2",  .rev = MX3x_CHIP_REV_1_2 },
+	{ .srev = 0x28, .name = "i.MX31",    .v = "2.0",  .rev = MX3x_CHIP_REV_2_0 },
+	{ .srev = 0x29, .name = "i.MX31L",   .v = "2.0",  .rev = MX3x_CHIP_REV_2_0 },
 };
 
 void __init mx31_read_cpu_rev(void)
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
 	u32 i, srev;
 
 	/* read SREV register from IIM module */
-	srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
+	srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
 
 	for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
 		if (srev == mx31_cpu_type[i].srev) {
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index 581db46..d1bd26d 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -240,7 +240,7 @@
 
 #define MX3x_PROD_SIGNATURE		0x1	/* For MX31 */
 
-/* silicon revisions specific to i.MX31 */
+/* silicon revisions specific to i.MX31 and i.MX35 */
 #define MX3x_CHIP_REV_1_0		0x10
 #define MX3x_CHIP_REV_1_1		0x11
 #define MX3x_CHIP_REV_1_2		0x12
@@ -397,19 +397,6 @@ static inline int mx35_revision(void)
 #define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG
 #define MXC_INT_EXT_TV MX3x_INT_EXT_TV
 #define PROD_SIGNATURE MX3x_PROD_SIGNATURE
-#define CHIP_REV_1_0 MX3x_CHIP_REV_1_0
-#define CHIP_REV_1_1 MX3x_CHIP_REV_1_1
-#define CHIP_REV_1_2 MX3x_CHIP_REV_1_2
-#define CHIP_REV_1_3 MX3x_CHIP_REV_1_3
-#define CHIP_REV_2_0 MX3x_CHIP_REV_2_0
-#define CHIP_REV_2_1 MX3x_CHIP_REV_2_1
-#define CHIP_REV_2_2 MX3x_CHIP_REV_2_2
-#define CHIP_REV_2_3 MX3x_CHIP_REV_2_3
-#define CHIP_REV_3_0 MX3x_CHIP_REV_3_0
-#define CHIP_REV_3_1 MX3x_CHIP_REV_3_1
-#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2
-#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN
-#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM
 #endif
 
 #endif /* ifndef __MACH_MX3x_H__ */
-- 
1.7.2.3

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 0/3] sdma/dma resources

[Uwe Kleine-König]

Hello Sascha,

you have to drop "ARM: imx: fix/define clocks and create devices for imx dma"
(currently dcdb3b1cf9b327cf91e) from your tree to be able to apply these
on top of your imx-for-2.6.37 branch.

Best regards
Uwe

[PATCH 1/3] ARM: mx3: use MX3x_ prefixed version of CHIP_REV_x

[Uwe Kleine-König]

From: Sascha Hauer <s.hauer@pengutronix.de>

Also, remove the deprecated symbols from arch/arm/mach-mx3/cpu.c

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-mx3/Makefile            |    1 -
 arch/arm/mach-mx3/cpu.c               |   20 ++++++++++----------
 arch/arm/plat-mxc/include/mach/mx3x.h |   13 -------------
 3 files changed, 10 insertions(+), 24 deletions(-)

diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 2bd7bec..8a182d0a 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -7,7 +7,6 @@
 obj-y				:= mm.o devices.o cpu.o
 CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
 CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
-CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
 obj-$(CONFIG_ARCH_MX31)		+= clock-imx31.o iomux-imx31.o
 obj-$(CONFIG_ARCH_MX35)		+= clock-imx35.o
 obj-$(CONFIG_MACH_MX31ADS)	+= mach-mx31ads.o
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index 861afe0..47b0573 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -25,15 +25,15 @@ struct mx3_cpu_type {
 };
 
 static struct mx3_cpu_type mx31_cpu_type[] __initdata = {
-	{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0",  .rev = CHIP_REV_1_0	},
-	{ .srev = 0x10, .name = "i.MX31",    .v = "1.1",  .rev = CHIP_REV_1_1	},
-	{ .srev = 0x11, .name = "i.MX31L",   .v = "1.1",  .rev = CHIP_REV_1_1	},
-	{ .srev = 0x12, .name = "i.MX31",    .v = "1.15", .rev = CHIP_REV_1_1	},
-	{ .srev = 0x13, .name = "i.MX31L",   .v = "1.15", .rev = CHIP_REV_1_1	},
-	{ .srev = 0x14, .name = "i.MX31",    .v = "1.2",  .rev = CHIP_REV_1_2	},
-	{ .srev = 0x15, .name = "i.MX31L",   .v = "1.2",  .rev = CHIP_REV_1_2	},
-	{ .srev = 0x28, .name = "i.MX31",    .v = "2.0",  .rev = CHIP_REV_2_0	},
-	{ .srev = 0x29, .name = "i.MX31L",   .v = "2.0",  .rev = CHIP_REV_2_0	},
+	{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0",  .rev = MX3x_CHIP_REV_1_0 },
+	{ .srev = 0x10, .name = "i.MX31",    .v = "1.1",  .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x11, .name = "i.MX31L",   .v = "1.1",  .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x12, .name = "i.MX31",    .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x13, .name = "i.MX31L",   .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x14, .name = "i.MX31",    .v = "1.2",  .rev = MX3x_CHIP_REV_1_2 },
+	{ .srev = 0x15, .name = "i.MX31L",   .v = "1.2",  .rev = MX3x_CHIP_REV_1_2 },
+	{ .srev = 0x28, .name = "i.MX31",    .v = "2.0",  .rev = MX3x_CHIP_REV_2_0 },
+	{ .srev = 0x29, .name = "i.MX31L",   .v = "2.0",  .rev = MX3x_CHIP_REV_2_0 },
 };
 
 void __init mx31_read_cpu_rev(void)
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
 	u32 i, srev;
 
 	/* read SREV register from IIM module */
-	srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
+	srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
 
 	for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
 		if (srev == mx31_cpu_type[i].srev) {
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index 7a356de3..d41ad68 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -389,19 +389,6 @@ static inline int mx31_revision(void)
 #define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG
 #define MXC_INT_EXT_TV MX3x_INT_EXT_TV
 #define PROD_SIGNATURE MX3x_PROD_SIGNATURE
-#define CHIP_REV_1_0 MX3x_CHIP_REV_1_0
-#define CHIP_REV_1_1 MX3x_CHIP_REV_1_1
-#define CHIP_REV_1_2 MX3x_CHIP_REV_1_2
-#define CHIP_REV_1_3 MX3x_CHIP_REV_1_3
-#define CHIP_REV_2_0 MX3x_CHIP_REV_2_0
-#define CHIP_REV_2_1 MX3x_CHIP_REV_2_1
-#define CHIP_REV_2_2 MX3x_CHIP_REV_2_2
-#define CHIP_REV_2_3 MX3x_CHIP_REV_2_3
-#define CHIP_REV_3_0 MX3x_CHIP_REV_3_0
-#define CHIP_REV_3_1 MX3x_CHIP_REV_3_1
-#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2
-#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN
-#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM
 #endif
 
 #endif /* ifndef __MACH_MX3x_H__ */
-- 
1.7.2.3

[PATCH 2/3] ARM: mx35: Add mx35_revision function to query the silicon revision

[Uwe Kleine-König]

From: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-mx3/clock-imx35.c       |    2 ++
 arch/arm/mach-mx3/cpu.c               |   31 +++++++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/mx35.h |   19 +++++--------------
 arch/arm/plat-mxc/include/mach/mx3x.h |   10 +++++++++-
 4 files changed, 47 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 708c2b3..d59ff70 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -535,6 +535,8 @@ int __init mx35_clocks_init()
 	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
 	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
 
+	mx35_read_cpu_rev();
+
 #ifdef CONFIG_MXC_USE_EPIT
 	epit_timer_init(&epit1_clk,
 			MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index 47b0573..8c6eb5e 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -55,3 +55,34 @@ void __init mx31_read_cpu_rev(void)
 
 	printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
 }
+
+unsigned int mx35_cpu_rev;
+EXPORT_SYMBOL(mx35_cpu_rev);
+
+#define MX35_ROM_SI_REV		0x40
+
+void __init mx35_read_cpu_rev(void)
+{
+	void __iomem *rom = ioremap(MX35_IROM_BASE_ADDR, MX35_IROM_SIZE);
+	u32 rev;
+	char *srev = "unknown";
+
+	if (!rom)
+		return;
+
+	rev = readl(rom + MX35_ROM_SI_REV);
+	switch (rev) {
+	case 0x1:
+		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
+		srev = "1.0";
+		break;
+	case 0x2:
+		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
+		srev = "2.0";
+		break;
+	}
+
+	printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
+
+	iounmap(rom);
+}
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 9f0a1ee..b651ee4 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -1,5 +1,9 @@
 #ifndef __MACH_MX35_H__
 #define __MACH_MX35_H__
+
+#define MX35_IROM_BASE_ADDR		0x0
+#define MX35_IROM_SIZE			SZ_16K
+
 /*
  * IRAM
  */
@@ -184,20 +188,7 @@
 
 #define MX35_PROD_SIGNATURE		0x1	/* For MX31 */
 
-/* silicon revisions specific to i.MX31 */
-#define MX35_CHIP_REV_1_0		0x10
-#define MX35_CHIP_REV_1_1		0x11
-#define MX35_CHIP_REV_1_2		0x12
-#define MX35_CHIP_REV_1_3		0x13
-#define MX35_CHIP_REV_2_0		0x20
-#define MX35_CHIP_REV_2_1		0x21
-#define MX35_CHIP_REV_2_2		0x22
-#define MX35_CHIP_REV_2_3		0x23
-#define MX35_CHIP_REV_3_0		0x30
-#define MX35_CHIP_REV_3_1		0x31
-#define MX35_CHIP_REV_3_2		0x32
-
-#define MX35_SYSTEM_REV_MIN		MX35_CHIP_REV_1_0
+#define MX35_SYSTEM_REV_MIN		MX3x_CHIP_REV_1_0
 #define MX35_SYSTEM_REV_NUM		3
 
 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index d41ad68..d1bd26d 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -240,7 +240,7 @@
 
 #define MX3x_PROD_SIGNATURE		0x1	/* For MX31 */
 
-/* silicon revisions specific to i.MX31 */
+/* silicon revisions specific to i.MX31 and i.MX35 */
 #define MX3x_CHIP_REV_1_0		0x10
 #define MX3x_CHIP_REV_1_1		0x11
 #define MX3x_CHIP_REV_1_2		0x12
@@ -267,6 +267,14 @@ static inline int mx31_revision(void)
 {
 	return mx31_cpu_rev;
 }
+
+extern unsigned int mx35_cpu_rev;
+extern void mx35_read_cpu_rev(void);
+
+static inline int mx35_revision(void)
+{
+	return mx35_cpu_rev;
+}
 #endif
 
 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-- 
1.7.2.3

[PATCH 3/3] ARM: imx: fix/define clocks and create devices for imx dma

[Uwe Kleine-König]

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-mx3/clock-imx31.c              |    4 +-
 arch/arm/mach-mx3/clock-imx35.c              |    2 +-
 arch/arm/mach-mx5/clock-mx51.c               |    5 +
 arch/arm/plat-mxc/devices/Makefile           |    1 +
 arch/arm/plat-mxc/devices/platform-imx-dma.c |  129 ++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/mx51.h        |    2 +-
 6 files changed, 139 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/plat-mxc/devices/platform-imx-dma.c

diff --git a/arch/arm/mach-mx3/clock-imx31.c b/arch/arm/mach-mx3/clock-imx31.c
index 18e98f1..109e98f 100644
--- a/arch/arm/mach-mx3/clock-imx31.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -477,7 +477,7 @@ DEFINE_CLOCK(epit1_clk,   0, MXC_CCM_CGR0,  6, NULL, NULL, &perclk_clk);
 DEFINE_CLOCK(epit2_clk,   1, MXC_CCM_CGR0,  8, NULL, NULL, &perclk_clk);
 DEFINE_CLOCK(iim_clk,     0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(ata_clk,     0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk);
-DEFINE_CLOCK(sdma_clk1,   0, MXC_CCM_CGR0, 14, NULL, &sdma_clk1, &ahb_clk);
+DEFINE_CLOCK(sdma_clk1,   0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk);
 DEFINE_CLOCK(cspi3_clk,   2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(rng_clk,     0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(uart1_clk,   0, MXC_CCM_CGR0, 20, NULL, NULL, &perclk_clk);
@@ -564,7 +564,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK(NULL, "ata", ata_clk)
 	_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
 	_REGISTER_CLOCK(NULL, "rng", rng_clk)
-	_REGISTER_CLOCK(NULL, "sdma_ahb", sdma_clk1)
+	_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk1)
 	_REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2)
 	_REGISTER_CLOCK(NULL, "mstick", mstick1_clk)
 	_REGISTER_CLOCK(NULL, "mstick", mstick2_clk)
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index d59ff70..2b1d129 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -482,7 +482,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK(NULL, "rtc", rtc_clk)
 	_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
 	_REGISTER_CLOCK(NULL, "scc", scc_clk)
-	_REGISTER_CLOCK(NULL, "sdma", sdma_clk)
+	_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
 	_REGISTER_CLOCK(NULL, "spba", spba_clk)
 	_REGISTER_CLOCK(NULL, "spdif", spdif_clk)
 	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index e6c17d7..21cecc0 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -977,6 +977,10 @@ DEFINE_CLOCK(cspi_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET,
 DEFINE_CLOCK(cspi_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG13_OFFSET,
 		NULL, NULL, &ipg_clk, &cspi_ipg_clk);
 
+/* SDMA */
+DEFINE_CLOCK(sdma_clk, 1, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG15_OFFSET,
+		NULL, NULL, &ahb_clk, NULL);
+
 #define _REGISTER_CLOCK(d, n, c) \
        { \
 		.dev_id = d, \
@@ -1003,6 +1007,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK("mxc_nand", NULL, nfc_clk)
 	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
 	_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
+	_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
 	_REGISTER_CLOCK(NULL, "ckih", ckih_clk)
 	_REGISTER_CLOCK(NULL, "ckih2", ckih2_clk)
 	_REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk)
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
index ac77383..2663fb1 100644
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/plat-mxc/devices/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
+obj-y += platform-imx-dma.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c
new file mode 100644
index 0000000..02d9890
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (C) 2010 Pengutronix
+ * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+#include <linux/compiler.h>
+#include <linux/err.h>
+#include <linux/init.h>
+
+#include <mach/hardware.h>
+#include <mach/devices-common.h>
+#ifdef SDMA_IS_MERGED
+#include <mach/sdma.h>
+#else
+struct sdma_platform_data {
+	int sdma_version;
+	char *cpu_name;
+	int to_version;
+};
+#endif
+
+struct imx_imx_sdma_data {
+	resource_size_t iobase;
+	resource_size_t irq;
+	struct sdma_platform_data pdata;
+};
+
+#define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\
+	{								\
+		.iobase = soc ## _SDMA ## _BASE_ADDR,			\
+		.irq = soc ## _INT_SDMA,				\
+		.pdata = {						\
+			.sdma_version = _sdma_version,			\
+			.cpu_name = _cpu_name,				\
+			.to_version = _to_version,			\
+		},							\
+	}
+
+#ifdef CONFIG_ARCH_MX25
+const struct imx_imx_sdma_data imx25_imx_sdma_data __initconst =
+	imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0);
+#endif /* ifdef CONFIG_ARCH_MX25 */
+
+#ifdef CONFIG_ARCH_MX31
+struct imx_imx_sdma_data imx31_imx_sdma_data __initdata =
+	imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0);
+#endif /* ifdef CONFIG_ARCH_MX31 */
+
+#ifdef CONFIG_ARCH_MX35
+struct imx_imx_sdma_data imx35_imx_sdma_data __initdata =
+	imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0);
+#endif /* ifdef CONFIG_ARCH_MX35 */
+
+#ifdef CONFIG_ARCH_MX51
+const struct imx_imx_sdma_data imx51_imx_sdma_data __initconst =
+	imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 0);
+#endif /* ifdef CONFIG_ARCH_MX51 */
+
+static struct platform_device __init __maybe_unused *imx_add_imx_sdma(
+		const struct imx_imx_sdma_data *data)
+{
+	struct resource res[] = {
+		{
+			.start = data->iobase,
+			.end = data->iobase + SZ_4K - 1,
+			.flags = IORESOURCE_MEM,
+		}, {
+			.start = data->irq,
+			.end = data->irq,
+			.flags = IORESOURCE_IRQ,
+		},
+	};
+
+	return imx_add_platform_device("imx-sdma", -1,
+			res, ARRAY_SIZE(res),
+			&data->pdata, sizeof(data->pdata));
+}
+
+static struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
+{
+	return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0);
+}
+
+static int __init imxXX_add_imx_dma(void)
+{
+	struct platform_device *ret;
+
+#if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27)
+	if (cpu_is_mx21() || cpu_is_mx27())
+		ret = imx_add_imx_dma();
+	else
+#endif
+
+#if defined(CONFIG_ARCH_MX25)
+	if (cpu_is_mx25())
+		ret = imx_add_imx_sdma(&imx25_imx_sdma_data);
+	else
+#endif
+
+#if defined(CONFIG_ARCH_MX31)
+	if (cpu_is_mx31()) {
+		imx31_imx_sdma_data.pdata.to_version = mx31_revision() >> 4;
+		ret = imx_add_imx_sdma(&imx31_imx_sdma_data);
+	} else
+#endif
+
+#if defined(CONFIG_ARCH_MX35)
+	if (cpu_is_mx35()) {
+		imx35_imx_sdma_data.pdata.to_version = mx35_revision() >> 4;
+		ret = imx_add_imx_sdma(&imx35_imx_sdma_data);
+	} else
+#endif
+
+#if defined(CONFIG_ARCH_MX51)
+	if (cpu_is_mx51())
+		ret = imx_add_imx_sdma(&imx51_imx_sdma_data);
+	else
+#endif
+		ret = ERR_PTR(-ENODEV);
+
+	if (IS_ERR(ret))
+		return PTR_ERR(ret);
+
+	return 0;
+}
+arch_initcall(imxXX_add_imx_dma);
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index c99eeab..1906ee5a5 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -285,7 +285,7 @@
 #define MX51_MXC_INT_MMC_SDHC3		3
 #define MX51_MXC_INT_MMC_SDHC4		4
 #define MX51_MXC_INT_RESV5		5
-#define MX51_MXC_INT_SDMA		6
+#define MX51_INT_SDMA			6
 #define MX51_MXC_INT_IOMUX		7
 #define MX51_INT_NFC			8
 #define MX51_MXC_INT_VPU		9
-- 
1.7.2.3

[PATCH] i.MX35: use the correct IIM register to get CPU revision

[Eric Bénard]

instead of using ROM_SI_REV use IIM's Silicon Revision register
as described in :
- Reference Manual 29.3.3.10
- RM Errata 29.3.3.9.13

Signed-off-by: Eric B?nard <eric@eukrea.com>
---
 arch/arm/mach-mx3/clock-imx35.c       |    1 +
 arch/arm/mach-mx3/cpu.c               |   23 +++++++++--------------
 arch/arm/plat-mxc/include/mach/mx35.h |    8 +++-----
 3 files changed, 13 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 85884c7..f7cec59 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -535,6 +535,7 @@ int __init mx35_clocks_init()
 	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
 	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
 
+	clk_enable(&iim_clk);
 	mx35_read_cpu_rev();
 
 	mxc_timer_init(&gpt_clk,
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index db7af50..d00a754 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -59,31 +59,26 @@ void __init mx31_read_cpu_rev(void)
 unsigned int mx35_cpu_rev;
 EXPORT_SYMBOL(mx35_cpu_rev);
 
-#define MX35_ROM_SI_REV		0x40
-
 void __init mx35_read_cpu_rev(void)
 {
-	void __iomem *rom = ioremap(MX35_IROM_BASE_ADDR, MX35_IROM_SIZE);
 	u32 rev;
 	char *srev = "unknown";
 
-	if (!rom)
-		return;
-
-	rev = readl(rom + MX35_ROM_SI_REV);
+	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
 	switch (rev) {
-	case 0x1:
-		mx35_cpu_rev = MX35_CHIP_REV_1_0;
+	case 0x00:
+		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
 		srev = "1.0";
 		break;
-	case 0x2:
-		mx35_cpu_rev = MX35_CHIP_REV_2_0;
+	case 0x10:
+		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
 		srev = "2.0";
 		break;
+	case 0x11:
+		mx35_cpu_rev = MX3x_CHIP_REV_2_1;
+		srev = "2.1";
+		break;
 	}
 
 	printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
-
-	iounmap(rom);
 }
-
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index d1675ae..92794be 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -70,6 +70,8 @@
 #define MX35_CAN1_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xe4000)
 #define MX35_CAN2_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xe8000)
 #define MX35_RTIC_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xec000)
+#define MX35_IIM_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xf0000)
+
 #define MX35_OTG_BASE_ADDR		0x53ff4000
 
 #define MX35_ROMP_BASE_ADDR		0x60000000
@@ -182,11 +184,7 @@
 
 #define MX35_PROD_SIGNATURE		0x1	/* For MX31 */
 
-/* silicon revisions specific to i.MX35 */
-#define MX35_CHIP_REV_1_0		0x1
-#define MX35_CHIP_REV_2_0		0x2
-
-#define MX35_SYSTEM_REV_MIN		MX35_CHIP_REV_1_0
+#define MX35_SYSTEM_REV_MIN		MX3x_CHIP_REV_1_0
 #define MX35_SYSTEM_REV_NUM		3
 
 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-- 
1.7.0.4

[PATCH] i.MX35: use the correct IIM register to get CPU revision

[Eric Bénard]

Le 08/10/2010 10:02, Eric B?nard a ?crit :
 > @@ -182,11 +184,7 @@
 >
 >   #define MX35_PROD_SIGNATURE		0x1	/* For MX31 */
 >
 > -/* silicon revisions specific to i.MX35 */
 > -#define MX35_CHIP_REV_1_0		0x1
 > -#define MX35_CHIP_REV_2_0		0x2
 > -
 > -#define MX35_SYSTEM_REV_MIN		MX35_CHIP_REV_1_0
 > +#define MX35_SYSTEM_REV_MIN		MX3x_CHIP_REV_1_0
 >   #define MX35_SYSTEM_REV_NUM		3
 >
 >   #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS

oops I made a mistake when importing your patches, the end of this one 
shjould'nt be there.

Eric

[PATCH v2] i.MX35: use the correct IIM register to get CPU revision

[Eric Bénard]

instead of using ROM_SI_REV use IIM's Silicon Revision register
as described in :
- Reference Manual 29.3.3.10
- RM Errata 29.3.3.9.13

Signed-off-by: Eric B?nard <eric@eukrea.com>
---
v2 : fix wrong part of previous patch in plat-mxc/include/mach/mx35.h
 arch/arm/mach-mx3/clock-imx35.c       |    1 +
 arch/arm/mach-mx3/cpu.c               |   23 +++++++++--------------
 arch/arm/plat-mxc/include/mach/mx35.h |    2 ++
 3 files changed, 12 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 85884c7..f7cec59 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -535,6 +535,7 @@ int __init mx35_clocks_init()
 	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
 	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
 
+	clk_enable(&iim_clk);
 	mx35_read_cpu_rev();
 
 	mxc_timer_init(&gpt_clk,
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index db7af50..d00a754 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -59,31 +59,26 @@ void __init mx31_read_cpu_rev(void)
 unsigned int mx35_cpu_rev;
 EXPORT_SYMBOL(mx35_cpu_rev);
 
-#define MX35_ROM_SI_REV		0x40
-
 void __init mx35_read_cpu_rev(void)
 {
-	void __iomem *rom = ioremap(MX35_IROM_BASE_ADDR, MX35_IROM_SIZE);
 	u32 rev;
 	char *srev = "unknown";
 
-	if (!rom)
-		return;
-
-	rev = readl(rom + MX35_ROM_SI_REV);
+	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
 	switch (rev) {
-	case 0x1:
-		mx35_cpu_rev = MX35_CHIP_REV_1_0;
+	case 0x00:
+		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
 		srev = "1.0";
 		break;
-	case 0x2:
-		mx35_cpu_rev = MX35_CHIP_REV_2_0;
+	case 0x10:
+		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
 		srev = "2.0";
 		break;
+	case 0x11:
+		mx35_cpu_rev = MX3x_CHIP_REV_2_1;
+		srev = "2.1";
+		break;
 	}
 
 	printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
-
-	iounmap(rom);
 }
-
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 4a864c3..92794be 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -70,6 +70,8 @@
 #define MX35_CAN1_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xe4000)
 #define MX35_CAN2_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xe8000)
 #define MX35_RTIC_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xec000)
+#define MX35_IIM_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xf0000)
+
 #define MX35_OTG_BASE_ADDR		0x53ff4000
 
 #define MX35_ROMP_BASE_ADDR		0x60000000
-- 
1.7.0.4

[PATCH v2] i.MX35: use the correct IIM register to get CPU revision

[Fabio Estevam]

Hi Eric,

--- On Fri, 10/8/10, Eric B?nard <eric@eukrea.com> wrote:
...
> instead of using ROM_SI_REV use IIM's
> Silicon Revision register
> as described in :
> - Reference Manual 29.3.3.10
> - RM Errata 29.3.3.9.13
> 
> Signed-off-by: Eric B?nard <eric@eukrea.com>

Yes, this is the preferred method for silicon detection on MX35.

Thanks,

Fabio Estevam


      

[PATCH v2] i.MX35: use the correct IIM register to get CPU revision

[Uwe Kleine-König]

Hello Eric,

On Fri, Oct 08, 2010 at 10:18:29AM +0200, Eric B?nard wrote:
> instead of using ROM_SI_REV use IIM's Silicon Revision register
> as described in :
> - Reference Manual 29.3.3.10
> - RM Errata 29.3.3.9.13
> 
> Signed-off-by: Eric B?nard <eric@eukrea.com>
> ---
> v2 : fix wrong part of previous patch in plat-mxc/include/mach/mx35.h
>  arch/arm/mach-mx3/clock-imx35.c       |    1 +
>  arch/arm/mach-mx3/cpu.c               |   23 +++++++++--------------
>  arch/arm/plat-mxc/include/mach/mx35.h |    2 ++
>  3 files changed, 12 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
> index 85884c7..f7cec59 100644
> --- a/arch/arm/mach-mx3/clock-imx35.c
> +++ b/arch/arm/mach-mx3/clock-imx35.c
> @@ -535,6 +535,7 @@ int __init mx35_clocks_init()
>  	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
>  	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
>  
> +	clk_enable(&iim_clk);
>  	mx35_read_cpu_rev();

Do you let the clock running on purpose?

>  	mxc_timer_init(&gpt_clk,
> diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
> index db7af50..d00a754 100644
> --- a/arch/arm/mach-mx3/cpu.c
> +++ b/arch/arm/mach-mx3/cpu.c
> @@ -59,31 +59,26 @@ void __init mx31_read_cpu_rev(void)
>  unsigned int mx35_cpu_rev;
>  EXPORT_SYMBOL(mx35_cpu_rev);
>  
> -#define MX35_ROM_SI_REV		0x40
> -
>  void __init mx35_read_cpu_rev(void)
>  {
> -	void __iomem *rom = ioremap(MX35_IROM_BASE_ADDR, MX35_IROM_SIZE);
>  	u32 rev;
>  	char *srev = "unknown";
>  
> -	if (!rom)
> -		return;
> -
> -	rev = readl(rom + MX35_ROM_SI_REV);
> +	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
>  	switch (rev) {
> -	case 0x1:
> -		mx35_cpu_rev = MX35_CHIP_REV_1_0;
> +	case 0x00:
> +		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
>  		srev = "1.0";
>  		break;
> -	case 0x2:
> -		mx35_cpu_rev = MX35_CHIP_REV_2_0;
> +	case 0x10:
> +		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
>  		srev = "2.0";
>  		break;
> +	case 0x11:
> +		mx35_cpu_rev = MX3x_CHIP_REV_2_1;
> +		srev = "2.1";
> +		break;
Would it make sense here to do:

	mx35_cpu_rev = 0x10 + rev;

?

>  	}
>  
>  	printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
> -
> -	iounmap(rom);
>  }
> -
> diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
> index 4a864c3..92794be 100644
> --- a/arch/arm/plat-mxc/include/mach/mx35.h
> +++ b/arch/arm/plat-mxc/include/mach/mx35.h
> @@ -70,6 +70,8 @@
>  #define MX35_CAN1_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xe4000)
>  #define MX35_CAN2_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xe8000)
>  #define MX35_RTIC_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xec000)
> +#define MX35_IIM_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xf0000)
> +
>  #define MX35_OTG_BASE_ADDR		0x53ff4000
>  
>  #define MX35_ROMP_BASE_ADDR		0x60000000
> -- 
> 1.7.0.4
> 
> 

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH v2] i.MX35: use the correct IIM register to get CPU revision

[Sascha Hauer]

On Fri, Oct 08, 2010 at 02:31:02PM +0200, Uwe Kleine-K?nig wrote:
> Hello Eric,
> 
> On Fri, Oct 08, 2010 at 10:18:29AM +0200, Eric B?nard wrote:
> > instead of using ROM_SI_REV use IIM's Silicon Revision register
> > as described in :
> > - Reference Manual 29.3.3.10
> > - RM Errata 29.3.3.9.13
> > 
> > Signed-off-by: Eric B?nard <eric@eukrea.com>
> > ---
> > v2 : fix wrong part of previous patch in plat-mxc/include/mach/mx35.h
> >  arch/arm/mach-mx3/clock-imx35.c       |    1 +
> >  arch/arm/mach-mx3/cpu.c               |   23 +++++++++--------------
> >  arch/arm/plat-mxc/include/mach/mx35.h |    2 ++
> >  3 files changed, 12 insertions(+), 14 deletions(-)
> > 
> > diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
> > index 85884c7..f7cec59 100644
> > --- a/arch/arm/mach-mx3/clock-imx35.c
> > +++ b/arch/arm/mach-mx3/clock-imx35.c
> > @@ -535,6 +535,7 @@ int __init mx35_clocks_init()
> >  	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
> >  	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
> >  
> > +	clk_enable(&iim_clk);
> >  	mx35_read_cpu_rev();
> 
> Do you let the clock running on purpose?
> 
> >  	mxc_timer_init(&gpt_clk,
> > diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
> > index db7af50..d00a754 100644
> > --- a/arch/arm/mach-mx3/cpu.c
> > +++ b/arch/arm/mach-mx3/cpu.c
> > @@ -59,31 +59,26 @@ void __init mx31_read_cpu_rev(void)
> >  unsigned int mx35_cpu_rev;
> >  EXPORT_SYMBOL(mx35_cpu_rev);
> >  
> > -#define MX35_ROM_SI_REV		0x40
> > -
> >  void __init mx35_read_cpu_rev(void)
> >  {
> > -	void __iomem *rom = ioremap(MX35_IROM_BASE_ADDR, MX35_IROM_SIZE);
> >  	u32 rev;
> >  	char *srev = "unknown";
> >  
> > -	if (!rom)
> > -		return;
> > -
> > -	rev = readl(rom + MX35_ROM_SI_REV);
> > +	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
> >  	switch (rev) {
> > -	case 0x1:
> > -		mx35_cpu_rev = MX35_CHIP_REV_1_0;
> > +	case 0x00:
> > +		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
> >  		srev = "1.0";
> >  		break;
> > -	case 0x2:
> > -		mx35_cpu_rev = MX35_CHIP_REV_2_0;
> > +	case 0x10:
> > +		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
> >  		srev = "2.0";
> >  		break;
> > +	case 0x11:
> > +		mx35_cpu_rev = MX3x_CHIP_REV_2_1;
> > +		srev = "2.1";
> > +		break;
> Would it make sense here to do:
> 
> 	mx35_cpu_rev = 0x10 + rev;

I think this makes only sense when someone from Freescale says it's
correct. Otherwise I would prefer getting an 'unknown' here as a heads
up for new silicon versions.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH v2] i.MX35: use the correct IIM register to get CPU revision

[Eric Bénard]

Hi Uwe,

Le 08/10/2010 14:31, Uwe Kleine-K?nig a ?crit :
>> diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
>> index 85884c7..f7cec59 100644
>> --- a/arch/arm/mach-mx3/clock-imx35.c
>> +++ b/arch/arm/mach-mx3/clock-imx35.c
>> @@ -535,6 +535,7 @@ int __init mx35_clocks_init()
>>   	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
>>   	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
>>
>> +	clk_enable(&iim_clk);
>>   	mx35_read_cpu_rev();
>
> Do you let the clock running on purpose?
>
same as on i.MX31 : the iim clock is kept on.

>>   	mxc_timer_init(&gpt_clk,
>> diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
>> index db7af50..d00a754 100644
>> --- a/arch/arm/mach-mx3/cpu.c
>> +++ b/arch/arm/mach-mx3/cpu.c
>> @@ -59,31 +59,26 @@ void __init mx31_read_cpu_rev(void)
>>   unsigned int mx35_cpu_rev;
>>   EXPORT_SYMBOL(mx35_cpu_rev);
>>
>> -#define MX35_ROM_SI_REV		0x40
>> -
>>   void __init mx35_read_cpu_rev(void)
>>   {
>> -	void __iomem *rom = ioremap(MX35_IROM_BASE_ADDR, MX35_IROM_SIZE);
>>   	u32 rev;
>>   	char *srev = "unknown";
>>
>> -	if (!rom)
>> -		return;
>> -
>> -	rev = readl(rom + MX35_ROM_SI_REV);
>> +	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
>>   	switch (rev) {
>> -	case 0x1:
>> -		mx35_cpu_rev = MX35_CHIP_REV_1_0;
>> +	case 0x00:
>> +		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
>>   		srev = "1.0";
>>   		break;
>> -	case 0x2:
>> -		mx35_cpu_rev = MX35_CHIP_REV_2_0;
>> +	case 0x10:
>> +		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
>>   		srev = "2.0";
>>   		break;
>> +	case 0x11:
>> +		mx35_cpu_rev = MX3x_CHIP_REV_2_1;
>> +		srev = "2.1";
>> +		break;
> Would it make sense here to do:
>
> 	mx35_cpu_rev = 0x10 + rev;
>
> ?
>
we don't know how future chip will be numbered !

Eric

[PATCH v2] i.MX35: use the correct IIM register to get CPU revision

[Uwe Kleine-König]

On Fri, Oct 08, 2010 at 03:00:47PM +0200, Eric B?nard wrote:
> Hi Uwe,
>
> Le 08/10/2010 14:31, Uwe Kleine-K?nig a ?crit :
>>> diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
>>> index 85884c7..f7cec59 100644
>>> --- a/arch/arm/mach-mx3/clock-imx35.c
>>> +++ b/arch/arm/mach-mx3/clock-imx35.c
>>> @@ -535,6 +535,7 @@ int __init mx35_clocks_init()
>>>   	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
>>>   	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
>>>
>>> +	clk_enable(&iim_clk);
>>>   	mx35_read_cpu_rev();
>>
>> Do you let the clock running on purpose?
>>
> same as on i.MX31 : the iim clock is kept on.
OK

>>>   	mxc_timer_init(&gpt_clk,
>>> diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
>>> index db7af50..d00a754 100644
>>> --- a/arch/arm/mach-mx3/cpu.c
>>> +++ b/arch/arm/mach-mx3/cpu.c
>>> @@ -59,31 +59,26 @@ void __init mx31_read_cpu_rev(void)
>>>   unsigned int mx35_cpu_rev;
>>>   EXPORT_SYMBOL(mx35_cpu_rev);
>>>
>>> -#define MX35_ROM_SI_REV		0x40
>>> -
>>>   void __init mx35_read_cpu_rev(void)
>>>   {
>>> -	void __iomem *rom = ioremap(MX35_IROM_BASE_ADDR, MX35_IROM_SIZE);
>>>   	u32 rev;
>>>   	char *srev = "unknown";
>>>
>>> -	if (!rom)
>>> -		return;
>>> -
>>> -	rev = readl(rom + MX35_ROM_SI_REV);
>>> +	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
>>>   	switch (rev) {
>>> -	case 0x1:
>>> -		mx35_cpu_rev = MX35_CHIP_REV_1_0;
>>> +	case 0x00:
>>> +		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
>>>   		srev = "1.0";
>>>   		break;
>>> -	case 0x2:
>>> -		mx35_cpu_rev = MX35_CHIP_REV_2_0;
>>> +	case 0x10:
>>> +		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
>>>   		srev = "2.0";
>>>   		break;
>>> +	case 0x11:
>>> +		mx35_cpu_rev = MX3x_CHIP_REV_2_1;
>>> +		srev = "2.1";
>>> +		break;
>> Would it make sense here to do:
>>
>> 	mx35_cpu_rev = 0x10 + rev;
>>
>> ?
>>
> we don't know how future chip will be numbered !
ack

Will resend the series with this and Sascha's patch squashed together.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH v2] i.MX35: use the correct IIM register to get CPU revision

[Uwe Kleine-König]

Hello,

On Fri, Oct 08, 2010 at 10:18:29AM +0200, Eric B?nard wrote:
> instead of using ROM_SI_REV use IIM's Silicon Revision register
> as described in :
> - Reference Manual 29.3.3.10
> - RM Errata 29.3.3.9.13
> 
> Signed-off-by: Eric B?nard <eric@eukrea.com>
OK, based on this I resend the three patches.  I squashed Eric's
"i.MX35: use the correct IIM register to get CPU revision" and Sascha's
"5f3282f0821ece24f9423d1ac819c398eed5947f" together, fixed up the
conflicts (as Eric seems not to have used my latest patches) and removed
a few things that became superflous then.
(I kept Sascha's short description and as a countermove took Eric as
author.  I hope this is OK for you.)

Patches 1 and 3 are unaffected, but I resend them to have them together.

Sascha: as before: you need to drop
dcdb3b1cf9b327cf91ee6eaff61d809619bd98f4 from your branch before
applying this series.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH v2 1/3] ARM: mx3: use MX3x_ prefixed version of CHIP_REV_x

[Uwe Kleine-König]

From: Sascha Hauer <s.hauer@pengutronix.de>

Also, remove the deprecated symbols from arch/arm/mach-mx3/cpu.c

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-mx3/Makefile            |    1 -
 arch/arm/mach-mx3/cpu.c               |   20 ++++++++++----------
 arch/arm/plat-mxc/include/mach/mx3x.h |   13 -------------
 3 files changed, 10 insertions(+), 24 deletions(-)

diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 2bd7bec..8a182d0a 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -7,7 +7,6 @@
 obj-y				:= mm.o devices.o cpu.o
 CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
 CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
-CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
 obj-$(CONFIG_ARCH_MX31)		+= clock-imx31.o iomux-imx31.o
 obj-$(CONFIG_ARCH_MX35)		+= clock-imx35.o
 obj-$(CONFIG_MACH_MX31ADS)	+= mach-mx31ads.o
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index 861afe0..47b0573 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -25,15 +25,15 @@ struct mx3_cpu_type {
 };
 
 static struct mx3_cpu_type mx31_cpu_type[] __initdata = {
-	{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0",  .rev = CHIP_REV_1_0	},
-	{ .srev = 0x10, .name = "i.MX31",    .v = "1.1",  .rev = CHIP_REV_1_1	},
-	{ .srev = 0x11, .name = "i.MX31L",   .v = "1.1",  .rev = CHIP_REV_1_1	},
-	{ .srev = 0x12, .name = "i.MX31",    .v = "1.15", .rev = CHIP_REV_1_1	},
-	{ .srev = 0x13, .name = "i.MX31L",   .v = "1.15", .rev = CHIP_REV_1_1	},
-	{ .srev = 0x14, .name = "i.MX31",    .v = "1.2",  .rev = CHIP_REV_1_2	},
-	{ .srev = 0x15, .name = "i.MX31L",   .v = "1.2",  .rev = CHIP_REV_1_2	},
-	{ .srev = 0x28, .name = "i.MX31",    .v = "2.0",  .rev = CHIP_REV_2_0	},
-	{ .srev = 0x29, .name = "i.MX31L",   .v = "2.0",  .rev = CHIP_REV_2_0	},
+	{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0",  .rev = MX3x_CHIP_REV_1_0 },
+	{ .srev = 0x10, .name = "i.MX31",    .v = "1.1",  .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x11, .name = "i.MX31L",   .v = "1.1",  .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x12, .name = "i.MX31",    .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x13, .name = "i.MX31L",   .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
+	{ .srev = 0x14, .name = "i.MX31",    .v = "1.2",  .rev = MX3x_CHIP_REV_1_2 },
+	{ .srev = 0x15, .name = "i.MX31L",   .v = "1.2",  .rev = MX3x_CHIP_REV_1_2 },
+	{ .srev = 0x28, .name = "i.MX31",    .v = "2.0",  .rev = MX3x_CHIP_REV_2_0 },
+	{ .srev = 0x29, .name = "i.MX31L",   .v = "2.0",  .rev = MX3x_CHIP_REV_2_0 },
 };
 
 void __init mx31_read_cpu_rev(void)
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
 	u32 i, srev;
 
 	/* read SREV register from IIM module */
-	srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
+	srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
 
 	for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
 		if (srev == mx31_cpu_type[i].srev) {
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index 7a356de3..d41ad68 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -389,19 +389,6 @@ static inline int mx31_revision(void)
 #define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG
 #define MXC_INT_EXT_TV MX3x_INT_EXT_TV
 #define PROD_SIGNATURE MX3x_PROD_SIGNATURE
-#define CHIP_REV_1_0 MX3x_CHIP_REV_1_0
-#define CHIP_REV_1_1 MX3x_CHIP_REV_1_1
-#define CHIP_REV_1_2 MX3x_CHIP_REV_1_2
-#define CHIP_REV_1_3 MX3x_CHIP_REV_1_3
-#define CHIP_REV_2_0 MX3x_CHIP_REV_2_0
-#define CHIP_REV_2_1 MX3x_CHIP_REV_2_1
-#define CHIP_REV_2_2 MX3x_CHIP_REV_2_2
-#define CHIP_REV_2_3 MX3x_CHIP_REV_2_3
-#define CHIP_REV_3_0 MX3x_CHIP_REV_3_0
-#define CHIP_REV_3_1 MX3x_CHIP_REV_3_1
-#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2
-#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN
-#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM
 #endif
 
 #endif /* ifndef __MACH_MX3x_H__ */
-- 
1.7.2.3

[PATCH v2 2/3] ARM: mx35: Add mx35_revision function to query the silicon revision

[Uwe Kleine-König]

From: Eric B?nard <eric@eukrea.com>

Based on work done earlier by Sascha Hauer

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Eric B?nard <eric@eukrea.com>
[ukl: actually squash the two approaches together]
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-mx3/clock-imx35.c       |    3 +++
 arch/arm/mach-mx3/cpu.c               |   27 +++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/mx35.h |   18 ++++--------------
 arch/arm/plat-mxc/include/mach/mx3x.h |   10 +++++++++-
 4 files changed, 43 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 708c2b3..0911d7c 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -535,6 +535,9 @@ int __init mx35_clocks_init()
 	__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
 	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
 
+	clk_enable(&iim_clk);
+	mx35_read_cpu_rev();
+
 #ifdef CONFIG_MXC_USE_EPIT
 	epit_timer_init(&epit1_clk,
 			MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index 47b0573..d00a754 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -55,3 +55,30 @@ void __init mx31_read_cpu_rev(void)
 
 	printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
 }
+
+unsigned int mx35_cpu_rev;
+EXPORT_SYMBOL(mx35_cpu_rev);
+
+void __init mx35_read_cpu_rev(void)
+{
+	u32 rev;
+	char *srev = "unknown";
+
+	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
+	switch (rev) {
+	case 0x00:
+		mx35_cpu_rev = MX3x_CHIP_REV_1_0;
+		srev = "1.0";
+		break;
+	case 0x10:
+		mx35_cpu_rev = MX3x_CHIP_REV_2_0;
+		srev = "2.0";
+		break;
+	case 0x11:
+		mx35_cpu_rev = MX3x_CHIP_REV_2_1;
+		srev = "2.1";
+		break;
+	}
+
+	printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
+}
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 9f0a1ee..220a656 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -1,5 +1,6 @@
 #ifndef __MACH_MX35_H__
 #define __MACH_MX35_H__
+
 /*
  * IRAM
  */
@@ -63,6 +64,8 @@
 #define MX35_CAN1_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xe4000)
 #define MX35_CAN2_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xe8000)
 #define MX35_RTIC_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xec000)
+#define MX35_IIM_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xf0000)
+
 #define MX35_OTG_BASE_ADDR		0x53ff4000
 
 #define MX35_ROMP_BASE_ADDR		0x60000000
@@ -184,20 +187,7 @@
 
 #define MX35_PROD_SIGNATURE		0x1	/* For MX31 */
 
-/* silicon revisions specific to i.MX31 */
-#define MX35_CHIP_REV_1_0		0x10
-#define MX35_CHIP_REV_1_1		0x11
-#define MX35_CHIP_REV_1_2		0x12
-#define MX35_CHIP_REV_1_3		0x13
-#define MX35_CHIP_REV_2_0		0x20
-#define MX35_CHIP_REV_2_1		0x21
-#define MX35_CHIP_REV_2_2		0x22
-#define MX35_CHIP_REV_2_3		0x23
-#define MX35_CHIP_REV_3_0		0x30
-#define MX35_CHIP_REV_3_1		0x31
-#define MX35_CHIP_REV_3_2		0x32
-
-#define MX35_SYSTEM_REV_MIN		MX35_CHIP_REV_1_0
+#define MX35_SYSTEM_REV_MIN		MX3x_CHIP_REV_1_0
 #define MX35_SYSTEM_REV_NUM		3
 
 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index d41ad68..d1bd26d 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -240,7 +240,7 @@
 
 #define MX3x_PROD_SIGNATURE		0x1	/* For MX31 */
 
-/* silicon revisions specific to i.MX31 */
+/* silicon revisions specific to i.MX31 and i.MX35 */
 #define MX3x_CHIP_REV_1_0		0x10
 #define MX3x_CHIP_REV_1_1		0x11
 #define MX3x_CHIP_REV_1_2		0x12
@@ -267,6 +267,14 @@ static inline int mx31_revision(void)
 {
 	return mx31_cpu_rev;
 }
+
+extern unsigned int mx35_cpu_rev;
+extern void mx35_read_cpu_rev(void);
+
+static inline int mx35_revision(void)
+{
+	return mx35_cpu_rev;
+}
 #endif
 
 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-- 
1.7.2.3

[PATCH v2 3/3] ARM: imx: fix/define clocks and create devices for imx dma

[Uwe Kleine-König]

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-mx3/clock-imx31.c              |    4 +-
 arch/arm/mach-mx3/clock-imx35.c              |    2 +-
 arch/arm/mach-mx5/clock-mx51.c               |    5 +
 arch/arm/plat-mxc/devices/Makefile           |    1 +
 arch/arm/plat-mxc/devices/platform-imx-dma.c |  129 ++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/mx51.h        |    2 +-
 6 files changed, 139 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/plat-mxc/devices/platform-imx-dma.c

diff --git a/arch/arm/mach-mx3/clock-imx31.c b/arch/arm/mach-mx3/clock-imx31.c
index 18e98f1..109e98f 100644
--- a/arch/arm/mach-mx3/clock-imx31.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -477,7 +477,7 @@ DEFINE_CLOCK(epit1_clk,   0, MXC_CCM_CGR0,  6, NULL, NULL, &perclk_clk);
 DEFINE_CLOCK(epit2_clk,   1, MXC_CCM_CGR0,  8, NULL, NULL, &perclk_clk);
 DEFINE_CLOCK(iim_clk,     0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(ata_clk,     0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk);
-DEFINE_CLOCK(sdma_clk1,   0, MXC_CCM_CGR0, 14, NULL, &sdma_clk1, &ahb_clk);
+DEFINE_CLOCK(sdma_clk1,   0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk);
 DEFINE_CLOCK(cspi3_clk,   2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(rng_clk,     0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(uart1_clk,   0, MXC_CCM_CGR0, 20, NULL, NULL, &perclk_clk);
@@ -564,7 +564,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK(NULL, "ata", ata_clk)
 	_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
 	_REGISTER_CLOCK(NULL, "rng", rng_clk)
-	_REGISTER_CLOCK(NULL, "sdma_ahb", sdma_clk1)
+	_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk1)
 	_REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2)
 	_REGISTER_CLOCK(NULL, "mstick", mstick1_clk)
 	_REGISTER_CLOCK(NULL, "mstick", mstick2_clk)
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 0911d7c..6fcb48a 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -482,7 +482,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK(NULL, "rtc", rtc_clk)
 	_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
 	_REGISTER_CLOCK(NULL, "scc", scc_clk)
-	_REGISTER_CLOCK(NULL, "sdma", sdma_clk)
+	_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
 	_REGISTER_CLOCK(NULL, "spba", spba_clk)
 	_REGISTER_CLOCK(NULL, "spdif", spdif_clk)
 	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index e6c17d7..21cecc0 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -977,6 +977,10 @@ DEFINE_CLOCK(cspi_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET,
 DEFINE_CLOCK(cspi_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG13_OFFSET,
 		NULL, NULL, &ipg_clk, &cspi_ipg_clk);
 
+/* SDMA */
+DEFINE_CLOCK(sdma_clk, 1, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG15_OFFSET,
+		NULL, NULL, &ahb_clk, NULL);
+
 #define _REGISTER_CLOCK(d, n, c) \
        { \
 		.dev_id = d, \
@@ -1003,6 +1007,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK("mxc_nand", NULL, nfc_clk)
 	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
 	_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
+	_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
 	_REGISTER_CLOCK(NULL, "ckih", ckih_clk)
 	_REGISTER_CLOCK(NULL, "ckih2", ckih2_clk)
 	_REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk)
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
index ac77383..2663fb1 100644
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/plat-mxc/devices/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
+obj-y += platform-imx-dma.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c
new file mode 100644
index 0000000..02d9890
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (C) 2010 Pengutronix
+ * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+#include <linux/compiler.h>
+#include <linux/err.h>
+#include <linux/init.h>
+
+#include <mach/hardware.h>
+#include <mach/devices-common.h>
+#ifdef SDMA_IS_MERGED
+#include <mach/sdma.h>
+#else
+struct sdma_platform_data {
+	int sdma_version;
+	char *cpu_name;
+	int to_version;
+};
+#endif
+
+struct imx_imx_sdma_data {
+	resource_size_t iobase;
+	resource_size_t irq;
+	struct sdma_platform_data pdata;
+};
+
+#define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\
+	{								\
+		.iobase = soc ## _SDMA ## _BASE_ADDR,			\
+		.irq = soc ## _INT_SDMA,				\
+		.pdata = {						\
+			.sdma_version = _sdma_version,			\
+			.cpu_name = _cpu_name,				\
+			.to_version = _to_version,			\
+		},							\
+	}
+
+#ifdef CONFIG_ARCH_MX25
+const struct imx_imx_sdma_data imx25_imx_sdma_data __initconst =
+	imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0);
+#endif /* ifdef CONFIG_ARCH_MX25 */
+
+#ifdef CONFIG_ARCH_MX31
+struct imx_imx_sdma_data imx31_imx_sdma_data __initdata =
+	imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0);
+#endif /* ifdef CONFIG_ARCH_MX31 */
+
+#ifdef CONFIG_ARCH_MX35
+struct imx_imx_sdma_data imx35_imx_sdma_data __initdata =
+	imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0);
+#endif /* ifdef CONFIG_ARCH_MX35 */
+
+#ifdef CONFIG_ARCH_MX51
+const struct imx_imx_sdma_data imx51_imx_sdma_data __initconst =
+	imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 0);
+#endif /* ifdef CONFIG_ARCH_MX51 */
+
+static struct platform_device __init __maybe_unused *imx_add_imx_sdma(
+		const struct imx_imx_sdma_data *data)
+{
+	struct resource res[] = {
+		{
+			.start = data->iobase,
+			.end = data->iobase + SZ_4K - 1,
+			.flags = IORESOURCE_MEM,
+		}, {
+			.start = data->irq,
+			.end = data->irq,
+			.flags = IORESOURCE_IRQ,
+		},
+	};
+
+	return imx_add_platform_device("imx-sdma", -1,
+			res, ARRAY_SIZE(res),
+			&data->pdata, sizeof(data->pdata));
+}
+
+static struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
+{
+	return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0);
+}
+
+static int __init imxXX_add_imx_dma(void)
+{
+	struct platform_device *ret;
+
+#if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27)
+	if (cpu_is_mx21() || cpu_is_mx27())
+		ret = imx_add_imx_dma();
+	else
+#endif
+
+#if defined(CONFIG_ARCH_MX25)
+	if (cpu_is_mx25())
+		ret = imx_add_imx_sdma(&imx25_imx_sdma_data);
+	else
+#endif
+
+#if defined(CONFIG_ARCH_MX31)
+	if (cpu_is_mx31()) {
+		imx31_imx_sdma_data.pdata.to_version = mx31_revision() >> 4;
+		ret = imx_add_imx_sdma(&imx31_imx_sdma_data);
+	} else
+#endif
+
+#if defined(CONFIG_ARCH_MX35)
+	if (cpu_is_mx35()) {
+		imx35_imx_sdma_data.pdata.to_version = mx35_revision() >> 4;
+		ret = imx_add_imx_sdma(&imx35_imx_sdma_data);
+	} else
+#endif
+
+#if defined(CONFIG_ARCH_MX51)
+	if (cpu_is_mx51())
+		ret = imx_add_imx_sdma(&imx51_imx_sdma_data);
+	else
+#endif
+		ret = ERR_PTR(-ENODEV);
+
+	if (IS_ERR(ret))
+		return PTR_ERR(ret);
+
+	return 0;
+}
+arch_initcall(imxXX_add_imx_dma);
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index c99eeab..1906ee5a5 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -285,7 +285,7 @@
 #define MX51_MXC_INT_MMC_SDHC3		3
 #define MX51_MXC_INT_MMC_SDHC4		4
 #define MX51_MXC_INT_RESV5		5
-#define MX51_MXC_INT_SDMA		6
+#define MX51_INT_SDMA			6
 #define MX51_MXC_INT_IOMUX		7
 #define MX51_INT_NFC			8
 #define MX51_MXC_INT_VPU		9
-- 
1.7.2.3