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From: kirill@shutemov.name (Kirill A. Shutemov)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 17/18] ARM: LPAE: define printk format for physical addresses and page table entries
Date: Mon, 25 Oct 2010 15:01:31 +0300	[thread overview]
Message-ID: <20101025120131.GB32026@shutemov.name> (raw)
In-Reply-To: <20101025090109.25275.23930.stgit@e102109-lin.cambridge.arm.com>

On Mon, Oct 25, 2010 at 10:01:10AM +0100, Catalin Marinas wrote:
> From: Will Deacon <will.deacon@arm.com>
> 
> Now that the Kernel supports 2 level and 3 level page tables, physical
> addresses (and also page table entries) may be 32 or 64-bits depending
> upon the configuration.
> 
> This patch adds a conversion specifier (PHYS_ADDR_FMT) which represents
> a u32 or u64 depending on the width of a physical address.
> 
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> ---
>  arch/arm/include/asm/types.h |    6 ++++++
>  arch/arm/kernel/setup.c      |    2 +-
>  arch/arm/mm/fault.c          |    8 ++++----
>  arch/arm/mm/mmu.c            |   18 +++++++++---------
>  4 files changed, 20 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
> index 039dd8f..88190c0 100644
> --- a/arch/arm/include/asm/types.h
> +++ b/arch/arm/include/asm/types.h
> @@ -6,6 +6,12 @@
>  #ifdef __KERNEL__
>  #define BITS_PER_LONG 32
>  
> +#ifdef CONFIG_PHYS_ADDR_T_64BIT
> +#define PHYS_ADDR_FMT	"%016Lx"

I think, better to use ANSI C compatible 'll' instead of 'L'.

> +#else
> +#define PHYS_ADDR_FMT	"%08x"
> +#endif
> +
>  #ifndef __ASSEMBLY__
>  typedef dma_addr_t dma64_addr_t;
>  #endif /* __ASSEMBLY__ */
> diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
> index a6a37d5..80ff616 100644
> --- a/arch/arm/kernel/setup.c
> +++ b/arch/arm/kernel/setup.c
> @@ -413,7 +413,7 @@ static int __init arm_add_memory(phys_addr_t start, unsigned long size)
>  
>  	if (meminfo.nr_banks >= NR_BANKS) {
>  		printk(KERN_CRIT "NR_BANKS too low, "
> -			"ignoring memory at %#lx\n", start);
> +			"ignoring memory at " PHYS_ADDR_FMT "\n", start);
>  		return -EINVAL;
>  	}
>  
> diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
> index b662aea..df33362 100644
> --- a/arch/arm/mm/fault.c
> +++ b/arch/arm/mm/fault.c
> @@ -81,7 +81,7 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
>  
>  	printk(KERN_ALERT "pgd = %p\n", mm->pgd);
>  	pgd = pgd_offset(mm, addr);
> -	printk(KERN_ALERT "[%08lx] *pgd=%08lx", addr, pgd_val(*pgd));
> +	printk(KERN_ALERT "[%08lx] *pgd=" PHYS_ADDR_FMT, addr, pgd_val(*pgd));
>  
>  	do {
>  		pmd_t *pmd;
> @@ -97,7 +97,7 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
>  
>  		pmd = pmd_offset(pgd, addr);
>  		if (PTRS_PER_PMD != 1)
> -			printk(", *pmd=%08lx", pmd_val(*pmd));
> +			printk(", *pmd=" PHYS_ADDR_FMT, pmd_val(*pmd));
>  
>  		if (pmd_none(*pmd))
>  			break;
> @@ -112,9 +112,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
>  			break;
>  
>  		pte = pte_offset_map(pmd, addr);
> -		printk(", *pte=%08lx", pte_val(*pte));
> +		printk(", *pte=" PHYS_ADDR_FMT, pte_val(*pte));
>  #ifndef CONFIG_ARM_LPAE
> -		printk(", *ppte=%08lx", pte_val(pte[-LINUX_PTE_OFFSET]));
> +		printk(", *ppte=" PHYS_ADDR_FMT, pte_val(pte[-LINUX_PTE_OFFSET]));
>  #endif
>  		pte_unmap(pte);
>  	} while(0);
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index f8f8e06..87460bb 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -622,7 +622,7 @@ static void __init create_36bit_mapping(struct map_desc *md,
>  
>  	if (!(cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3())) {
>  		printk(KERN_ERR "MM: CPU does not support supersection "
> -		       "mapping for 0x%08llx at 0x%08lx\n",
> +		       "mapping for 0x" PHYS_ADDR_FMT " at 0x%08lx\n",
>  		       __pfn_to_phys((u64)md->pfn), addr);
>  		return;
>  	}
> @@ -635,14 +635,14 @@ static void __init create_36bit_mapping(struct map_desc *md,
>  	 */
>  	if (type->domain) {
>  		printk(KERN_ERR "MM: invalid domain in supersection "
> -		       "mapping for 0x%08llx at 0x%08lx\n",
> +		       "mapping for 0x" PHYS_ADDR_FMT " at 0x%08lx\n",
>  		       __pfn_to_phys((u64)md->pfn), addr);
>  		return;
>  	}
>  
>  	if ((addr | length | __pfn_to_phys(md->pfn)) & ~SUPERSECTION_MASK) {
> -		printk(KERN_ERR "MM: cannot create mapping for "
> -		       "0x%08llx at 0x%08lx invalid alignment\n",
> +		printk(KERN_ERR "MM: cannot create mapping for 0x" PHYS_ADDR_FMT
> +		       " at 0x%08lx invalid alignment\n",
>  		       __pfn_to_phys((u64)md->pfn), addr);
>  		return;
>  	}
> @@ -684,16 +684,16 @@ static void __init create_mapping(struct map_desc *md)
>  	pgd_t *pgd;
>  
>  	if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) {
> -		printk(KERN_WARNING "BUG: not creating mapping for "
> -		       "0x%08llx at 0x%08lx in user region\n",
> +		printk(KERN_WARNING "BUG: not creating mapping for 0x"
> +		       PHYS_ADDR_FMT " at 0x%08lx in user region\n",
>  		       __pfn_to_phys((u64)md->pfn), md->virtual);
>  		return;
>  	}
>  
>  	if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
>  	    md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) {
> -		printk(KERN_WARNING "BUG: mapping for 0x%08llx at 0x%08lx "
> -		       "overlaps vmalloc space\n",
> +		printk(KERN_WARNING "BUG: mapping for 0x" PHYS_ADDR_FMT
> +		       " at 0x%08lx overlaps vmalloc space\n",
>  		       __pfn_to_phys((u64)md->pfn), md->virtual);
>  	}
>  
> @@ -714,7 +714,7 @@ static void __init create_mapping(struct map_desc *md)
>  	length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
>  
>  	if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) {
> -		printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not "
> +		printk(KERN_WARNING "BUG: map for 0x" PHYS_ADDR_FMT " at 0x%08lx can not "
>  		       "be mapped using pages, ignoring.\n",
>  		       __pfn_to_phys(md->pfn), addr);
>  		return;
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
 Kirill A. Shutemov

  reply	other threads:[~2010-10-25 12:01 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-10-25  8:59 [RFC PATCH 00/18] ARM: Add support for the Large Physical Address Extensions Catalin Marinas
2010-10-25  8:59 ` [RFC PATCH 01/18] ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_* Catalin Marinas
2010-10-25  8:59 ` [RFC PATCH 02/18] ARM: LPAE: Factor out 2-level page table definitions into separate files Catalin Marinas
2010-10-25  8:59 ` [RFC PATCH 03/18] ARM: LPAE: use u32 instead of unsigned long for 32-bit ptes Catalin Marinas
2010-10-25  8:59 ` [RFC PATCH 04/18] ARM: LPAE: Do not assume Linux PTEs are always at PTRS_PER_PTE offset Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 05/18] ARM: LPAE: Introduce L_PTE_NOEXEC and L_PTE_NOWRITE Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 06/18] ARM: LPAE: Introduce the 3-level page table format definitions Catalin Marinas
2010-10-25 11:15   ` Arnd Bergmann
2010-10-25 11:59     ` Catalin Marinas
2010-10-25 13:25       ` Arnd Bergmann
2010-10-25 16:18         ` Catalin Marinas
2010-10-25 18:25           ` Arnd Bergmann
2010-12-06  9:27             ` Christoffer Dall
2010-12-06 14:21               ` Arnd Bergmann
2010-10-25  9:00 ` [RFC PATCH 07/18] ARM: LPAE: Page table maintenance for the 3-level format Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 08/18] ARM: LPAE: MMU setup for the 3-level page table format Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 09/18] ARM: LPAE: Add fault handling support Catalin Marinas
2010-10-25 10:17   ` Kirill A. Shutemov
2010-10-25 10:35     ` Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 10/18] ARM: LPAE: Add context switching support Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 11/18] ARM: LPAE: Add SMP support for the 3-level page table format Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 12/18] ARM: LPAE: use phys_addr_t instead of unsigned long for physical addresses Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 13/18] ARM: LPAE: ensure dma_addr_t is the same size as phys_addr_t Catalin Marinas
2010-10-25 11:08   ` Arnd Bergmann
2010-10-25 11:32     ` Catalin Marinas
2010-10-25 12:01       ` FUJITA Tomonori
2010-10-25 12:31         ` Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 14/18] ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem Catalin Marinas
2010-10-25  9:00 ` [RFC PATCH 15/18] ARM: LPAE: use phys_addr_t for physical start address in early_mem Catalin Marinas
2010-10-25  9:01 ` [RFC PATCH 16/18] ARM: LPAE: add support for ATAG_MEM64 Catalin Marinas
2010-10-25  9:01 ` [RFC PATCH 17/18] ARM: LPAE: define printk format for physical addresses and page table entries Catalin Marinas
2010-10-25 12:01   ` Kirill A. Shutemov [this message]
2010-10-25  9:01 ` [RFC PATCH 18/18] ARM: LPAE: Add the Kconfig entries Catalin Marinas

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