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From: cbouatmailru@gmail.com (Anton Vorontsov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/3] ARM: cns3xxx: Add architecture definition for EHCI/OHCI controller
Date: Wed, 24 Nov 2010 19:11:22 +0300	[thread overview]
Message-ID: <20101124161122.GA15902@oksana.dev.rtsoft.ru> (raw)
In-Reply-To: <1290443565-20766-3-git-send-email-mkl0301@gmail.com>

On Tue, Nov 23, 2010 at 12:32:44AM +0800, mkl0301 at gmail.com wrote:
> From: Mac Lin <mkl0301@gmail.com>
> 
> This patch add plateform_device for EHCI and OHCI controller on CNS3XXX. Power
> reference count (usb_pwr_ref) is used to control enabling and disabling the
> single clock control for both EHCI and OHCI controller.
> 
> It also remove EHCI/OHCI unused virtual address definitions.
> 
> Signed-off-by: Mac Lin <mkl0301@gmail.com>
> ---
[...]

I fixed a few small stylistic issues in this patch. Plus,

> +	},
> +	[1] = {
> +		.start          = IRQ_CNS3XXX_USB_OHCI,
> +		.flags          = IORESOURCE_IRQ,
> +	},
> +};
> +
> +static u64 cns3xxx_usb_ohci_dma_mask = 0xffffffffULL;

Changed this to DMA_BIT_MASK(32).

> +static struct platform_device cns3xxx_usb_ohci_device = {
> +	.name = "cns3xxx-ohci",
> +	.dev                = {
> +		.dma_mask       = &cns3xxx_usb_ohci_dma_mask,
> +		.coherent_dma_mask = 0xffffffffULL,

Ditto.

[...]
> --- a/arch/arm/mach-cns3xxx/include/mach/pm.h
> +++ b/arch/arm/mach-cns3xxx/include/mach/pm.h
> @@ -16,4 +16,6 @@ void cns3xxx_pwr_clk_dis(unsigned int block);
>  void cns3xxx_pwr_power_up(unsigned int block);
>  void cns3xxx_pwr_power_down(unsigned int block);
>  
> +extern atomic_t usb_pwr_ref;

You needed #include <asm/atomic.h> in this file, I added this for you.

...and in the end, applied the following patch to CNS3xxx tree:

commit bcea8081b6b6a298db016f33de8d52845deda9d6
Author: Mac Lin <mkl0301@gmail.com>
Date:   Tue Nov 23 00:32:44 2010 +0800

    ARM: cns3xxx: Add architecture definition for EHCI/OHCI controller
    
    This patch add plateform_device for EHCI and OHCI controller on CNS3XXX.
    Power reference count (usb_pwr_ref) is used to control enabling and
    disabling the single clock control for both EHCI and OHCI controller.
    
    It also removes EHCI/OHCI unused virtual address definitions.
    
    Signed-off-by: Mac Lin <mkl0301@gmail.com>
    Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>

diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 9df8391..795ad77 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -17,6 +17,7 @@
 #include <linux/kernel.h>
 #include <linux/compiler.h>
 #include <linux/io.h>
+#include <linux/dma-mapping.h>
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
 #include <linux/platform_device.h>
@@ -108,10 +109,63 @@ static void __init cns3420_early_serial_setup(void)
 }
 
 /*
+ * USB
+ */
+static struct resource cns3xxx_usb_ehci_resources[] = {
+	[0] = {
+		.start = CNS3XXX_USB_BASE,
+		.end   = CNS3XXX_USB_BASE + SZ_16M - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = IRQ_CNS3XXX_USB_EHCI,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device cns3xxx_usb_ehci_device = {
+	.name          = "cns3xxx-ehci",
+	.num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources),
+	.resource      = cns3xxx_usb_ehci_resources,
+	.dev           = {
+		.dma_mask          = &cns3xxx_usb_ehci_dma_mask,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
+	},
+};
+
+static struct resource cns3xxx_usb_ohci_resources[] = {
+	[0] = {
+		.start = CNS3XXX_USB_OHCI_BASE,
+		.end   = CNS3XXX_USB_OHCI_BASE + SZ_16M - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = IRQ_CNS3XXX_USB_OHCI,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device cns3xxx_usb_ohci_device = {
+	.name          = "cns3xxx-ohci",
+	.num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources),
+	.resource      = cns3xxx_usb_ohci_resources,
+	.dev           = {
+		.dma_mask          = &cns3xxx_usb_ohci_dma_mask,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
+	},
+};
+
+/*
  * Initialization
  */
 static struct platform_device *cns3420_pdevs[] __initdata = {
 	&cns3420_nor_pdev,
+	&cns3xxx_usb_ehci_device,
+	&cns3xxx_usb_ohci_device,
 };
 
 static void __init cns3420_init(void)
diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
index 6dbce13..191c8e5 100644
--- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
+++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
@@ -165,7 +165,6 @@
 #define CNS3XXX_USBOTG_BASE_VIRT		0xFFF15000
 
 #define CNS3XXX_USB_BASE			0x82000000	/* USB Host Control */
-#define CNS3XXX_USB_BASE_VIRT			0xFFF16000
 
 #define CNS3XXX_SATA2_BASE			0x83000000	/* SATA */
 #define CNS3XXX_SATA2_SIZE			SZ_16M
@@ -184,7 +183,6 @@
 #define CNS3XXX_2DG_BASE_VIRT			0xFFF1B000
 
 #define CNS3XXX_USB_OHCI_BASE			0x88000000	/* USB OHCI */
-#define CNS3XXX_USB_OHCI_BASE_VIRT		0xFFF1C000
 
 #define CNS3XXX_L2C_BASE			0x92000000	/* L2 Cache Control */
 #define CNS3XXX_L2C_BASE_VIRT			0xFFF27000
diff --git a/arch/arm/mach-cns3xxx/include/mach/pm.h b/arch/arm/mach-cns3xxx/include/mach/pm.h
index 102617b..6eae7f7 100644
--- a/arch/arm/mach-cns3xxx/include/mach/pm.h
+++ b/arch/arm/mach-cns3xxx/include/mach/pm.h
@@ -11,9 +11,13 @@
 #ifndef __CNS3XXX_PM_H
 #define __CNS3XXX_PM_H
 
+#include <asm/atomic.h>
+
 void cns3xxx_pwr_clk_en(unsigned int block);
 void cns3xxx_pwr_clk_dis(unsigned int block);
 void cns3xxx_pwr_power_up(unsigned int block);
 void cns3xxx_pwr_power_down(unsigned int block);
 
+extern atomic_t usb_pwr_ref;
+
 #endif /* __CNS3XXX_PM_H */
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 7b672e5..78fbaba 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -10,6 +10,7 @@
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/delay.h>
+#include <asm/atomic.h>
 #include <mach/system.h>
 #include <mach/cns3xxx.h>
 #include <mach/pm.h>
@@ -117,3 +118,6 @@ int cns3xxx_cpu_clock(void)
 	return cpu;
 }
 EXPORT_SYMBOL(cns3xxx_cpu_clock);
+
+atomic_t usb_pwr_ref = ATOMIC_INIT(0);
+EXPORT_SYMBOL(usb_pwr_ref);

  reply	other threads:[~2010-11-24 16:11 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-11-22 16:32 [PATCH v2 0/3] USB: add support for cns3xxx SOC's EHCI/OHCI controller mkl0301 at gmail.com
2010-11-22 16:32 ` [PATCH v2 1/3] ARM: cns3xxx: Add new and export the old power management functions mkl0301 at gmail.com
2010-11-24 16:11   ` Anton Vorontsov
2010-11-22 16:32 ` [PATCH v2 2/3] ARM: cns3xxx: Add architecture definition for EHCI/OHCI controller mkl0301 at gmail.com
2010-11-24 16:11   ` Anton Vorontsov [this message]
2010-11-25  7:25     ` Lin Mac
2010-11-25 10:48       ` Anton Vorontsov
2010-11-25 13:51         ` Lin Mac
2010-11-25 13:56           ` Anton Vorontsov
2010-11-25 15:37             ` Alan Stern
2010-11-25 16:15               ` Anton Vorontsov
2010-11-22 16:32 ` [PATCH v2 3/3] USB: cns3xxx: Add EHCI and OHCI bus glue for cns3xxx SOCs mkl0301 at gmail.com
2010-11-24 16:25   ` Anton Vorontsov
2010-11-25 13:12     ` Anton Vorontsov

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