From: paul@pwsan.com (Paul Walmsley)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 12/12] OMAP1: clock_data: use runtime cpu / machine checks
Date: Mon, 13 Dec 2010 23:34:55 -0700 [thread overview]
Message-ID: <20101214063454.21555.37831.stgit@twilight.localdomain> (raw)
In-Reply-To: <20101214063308.21555.76050.stgit@twilight.localdomain>
From: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Otherwise multi-omap1 configurations may set wrong clock speed.
Created and tested against l-o master on Amstrad Delta.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap1/clock_data.c | 17 ++++++++---------
1 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 423d21d..c7c2a52 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -823,12 +823,10 @@ int __init omap1_clk_init(void)
crystal_type = info->system_clock_type;
}
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- ck_ref.rate = 13000000;
-#elif defined(CONFIG_ARCH_OMAP16XX)
- if (crystal_type == 2)
+ if (cpu_is_omap7xx())
+ ck_ref.rate = 13000000;
+ if (cpu_is_omap16xx() && crystal_type == 2)
ck_ref.rate = 19200000;
-#endif
pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: "
"0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
@@ -883,10 +881,11 @@ int __init omap1_clk_init(void)
ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
-#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
- /* Select slicer output as OMAP input clock */
- omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, OMAP7XX_PCC_UPLD_CTRL);
-#endif
+ if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
+ /* Select slicer output as OMAP input clock */
+ omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
+ OMAP7XX_PCC_UPLD_CTRL);
+ }
/* Amstrad Delta wants BCLK high when inactive */
if (machine_is_ams_delta())
next prev parent reply other threads:[~2010-12-14 6:34 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-14 6:34 [PATCH 00/12] OMAP: clock/SRAM: patches for 2.6.38, part one Paul Walmsley
2010-12-14 6:34 ` [PATCH 01/12] OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk Paul Walmsley
2010-12-14 6:34 ` [PATCH 02/12] OMAP3: clock data: Add "wkup_clkdm" in sr1_fck and sr2_fck Paul Walmsley
2010-12-14 6:34 ` [PATCH 03/12] OMAP4: clock data: Add missing DPLL x2 clock nodes Paul Walmsley
2010-12-22 1:47 ` Paul Walmsley
2010-12-30 4:52 ` Gopinath, Thara
2010-12-14 6:34 ` [PATCH 04/12] OMAP4: clock data: Add missing fields in iva_hsd_byp_clk_mux_ck Paul Walmsley
2010-12-14 6:34 ` [PATCH 05/12] OMAP4: PRCM: Add SCRM header file Paul Walmsley
2010-12-14 13:59 ` Cousson, Benoit
2010-12-14 18:13 ` Paul Walmsley
2010-12-14 20:16 ` Cousson, Benoit
2010-12-15 1:15 ` Paul Walmsley
2010-12-15 1:17 ` Paul Walmsley
2010-12-14 6:34 ` [PATCH 06/12] OMAP4: clock data: Add SCRM auxiliary clock nodes Paul Walmsley
2010-12-14 6:34 ` [PATCH 07/12] OMAP4: clock data: Export control to enable/disable CORE/PER M3 clocks Paul Walmsley
2010-12-14 6:34 ` [PATCH 08/12] OMAP2xxx clock: fix dss2_fck recalc to use clksel Paul Walmsley
2010-12-14 6:34 ` [PATCH 09/12] OMAP3: clock: clarify usage of struct clksel_rate.flags and struct omap_clk.cpu Paul Walmsley
2010-12-14 6:34 ` [PATCH 10/12] OMAP3: clock: fix incorrect rate display when switching MPU rate at boot Paul Walmsley
2010-12-14 6:34 ` [PATCH 11/12] OMAP2/3: SRAM: add comment about crashes during a TLB miss Paul Walmsley
2010-12-14 6:34 ` Paul Walmsley [this message]
2010-12-14 6:49 ` [PATCH 00/12] OMAP: clock/SRAM: patches for 2.6.38, part one Santosh Shilimkar
2010-12-14 6:53 ` Paul Walmsley
2010-12-14 6:53 ` Santosh Shilimkar
2010-12-14 20:05 ` Kevin Hilman
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