* [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes.
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
@ 2010-12-15 2:02 ` Lennert Buytenhek
2010-12-15 2:44 ` Nicolas Pitre
2010-12-15 16:25 ` Russell King - ARM Linux
2010-12-15 2:02 ` [PATCH 02/16] ARM: Remove dependency of plat-orion GPIO " Lennert Buytenhek
` (14 subsequent siblings)
15 siblings, 2 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:02 UTC (permalink / raw)
To: linux-arm-kernel
This patch makes the various mach dirs that use the plat-orion time
code pass in timer and bridge addresses explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-dove/common.c | 5 +-
arch/arm/mach-dove/include/mach/bridge-regs.h | 4 -
arch/arm/mach-kirkwood/common.c | 6 +-
arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 3 -
arch/arm/mach-loki/common.c | 6 +-
arch/arm/mach-loki/include/mach/bridge-regs.h | 5 -
arch/arm/mach-mv78xx0/common.c | 5 +-
arch/arm/mach-mv78xx0/include/mach/bridge-regs.h | 4 -
arch/arm/mach-orion5x/common.c | 7 +-
arch/arm/mach-orion5x/include/mach/bridge-regs.h | 6 +-
arch/arm/plat-orion/include/plat/time.h | 5 +-
arch/arm/plat-orion/time.c | 123 +++++++++++++--------
12 files changed, 108 insertions(+), 71 deletions(-)
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index f7a1258..83817ed 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -67,6 +67,8 @@ static struct map_desc dove_io_desc[] __initdata = {
void __init dove_map_io(void)
{
iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
/*****************************************************************************
@@ -540,7 +542,8 @@ static int get_tclk(void)
static void dove_timer_init(void)
{
- orion_time_init(IRQ_DOVE_BRIDGE, get_tclk());
+ orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_DOVE_BRIDGE, get_tclk());
}
struct sys_timer dove_timer = {
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 214a4c3..226949d 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -26,10 +26,6 @@
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
-#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
-#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 3688123..d67740f 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -60,6 +60,8 @@ static struct map_desc kirkwood_io_desc[] __initdata = {
void __init kirkwood_map_io(void)
{
iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
/*
@@ -864,7 +866,9 @@ int __init kirkwood_find_tclk(void)
static void __init kirkwood_timer_init(void)
{
kirkwood_tclk = kirkwood_find_tclk();
- orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
+
+ orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
}
struct sys_timer kirkwood_timer = {
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index aff0e13..957bd79 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -29,9 +29,6 @@
#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
#define WDT_INT_REQ 0x0008
-#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c
index 818f19d..9206671 100644
--- a/arch/arm/mach-loki/common.c
+++ b/arch/arm/mach-loki/common.c
@@ -18,6 +18,7 @@
#include <asm/timex.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
+#include <mach/bridge-regs.h>
#include <mach/loki.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
@@ -38,6 +39,8 @@ static struct map_desc loki_io_desc[] __initdata = {
void __init loki_map_io(void)
{
iotable_init(loki_io_desc, ARRAY_SIZE(loki_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
@@ -292,7 +295,8 @@ void __init loki_uart1_init(void)
****************************************************************************/
static void loki_timer_init(void)
{
- orion_time_init(IRQ_LOKI_BRIDGE, LOKI_TCLK);
+ orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_LOKI_BRIDGE, LOKI_TCLK);
}
struct sys_timer loki_timer = {
diff --git a/arch/arm/mach-loki/include/mach/bridge-regs.h b/arch/arm/mach-loki/include/mach/bridge-regs.h
index a3fabf7..fd87732 100644
--- a/arch/arm/mach-loki/include/mach/bridge-regs.h
+++ b/arch/arm/mach-loki/include/mach/bridge-regs.h
@@ -17,11 +17,6 @@
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
-#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
-
-#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR 0x0004
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 08465eb..64a97bc 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -162,6 +162,8 @@ void __init mv78xx0_map_io(void)
mv78xx0_io_desc[0].pfn = __phys_to_pfn(phys);
iotable_init(mv78xx0_io_desc, ARRAY_SIZE(mv78xx0_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
@@ -820,7 +822,8 @@ void __init mv78xx0_uart3_init(void)
****************************************************************************/
static void mv78xx0_timer_init(void)
{
- orion_time_init(IRQ_MV78XX0_TIMER_1, get_tclk());
+ orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_MV78XX0_TIMER_1, get_tclk());
}
struct sys_timer mv78xx0_timer = {
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index 2d14c4f..c64dbb9 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -20,10 +20,6 @@
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
-#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
-#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 8dc2c76..74ac68c 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -26,6 +26,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
+#include <mach/bridge-regs.h>
#include <mach/hardware.h>
#include <mach/orion5x.h>
#include <plat/ehci-orion.h>
@@ -65,6 +66,8 @@ static struct map_desc orion5x_io_desc[] __initdata = {
void __init orion5x_map_io(void)
{
iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
@@ -616,7 +619,9 @@ int __init orion5x_find_tclk(void)
static void orion5x_timer_init(void)
{
orion5x_tclk = orion5x_find_tclk();
- orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
+
+ orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_ORION5X_BRIDGE, orion5x_tclk);
}
struct sys_timer orion5x_timer = {
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 5c9744c..96484bc 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -22,14 +22,12 @@
#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)
+#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
+
#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C)
-#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
#define WDT_INT_REQ 0x0008
-#define BRIDGE_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200)
diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h
index c06ca35..7ed6aa9 100644
--- a/arch/arm/plat-orion/include/plat/time.h
+++ b/arch/arm/plat-orion/include/plat/time.h
@@ -11,7 +11,10 @@
#ifndef __PLAT_TIME_H
#define __PLAT_TIME_H
-void orion_time_init(unsigned int irq, unsigned int tclk);
+void orion_time_set_base(u32 _timer_base);
+
+void orion_time_init(u32 bridge_base, u32 bridge_timer1_clr_mask,
+ unsigned int irq, unsigned int tclk);
#endif
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 715a301..5b0fc77 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -18,28 +18,42 @@
#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
-#include <asm/mach/time.h>
-#include <mach/bridge-regs.h>
-#include <mach/hardware.h>
/*
- * Number of timer ticks per jiffy.
+ * MBus bridge block registers.
*/
-static u32 ticks_per_jiffy;
+#define BRIDGE_CAUSE_OFF 0x0110
+#define BRIDGE_MASK_OFF 0x0114
+#define BRIDGE_INT_TIMER0 0x0002
+#define BRIDGE_INT_TIMER1 0x0004
/*
* Timer block registers.
*/
-#define TIMER_CTRL (TIMER_VIRT_BASE + 0x0000)
-#define TIMER0_EN 0x0001
-#define TIMER0_RELOAD_EN 0x0002
-#define TIMER1_EN 0x0004
-#define TIMER1_RELOAD_EN 0x0008
-#define TIMER0_RELOAD (TIMER_VIRT_BASE + 0x0010)
-#define TIMER0_VAL (TIMER_VIRT_BASE + 0x0014)
-#define TIMER1_RELOAD (TIMER_VIRT_BASE + 0x0018)
-#define TIMER1_VAL (TIMER_VIRT_BASE + 0x001c)
+#define TIMER_CTRL_OFF 0x0000
+#define TIMER0_EN 0x0001
+#define TIMER0_RELOAD_EN 0x0002
+#define TIMER1_EN 0x0004
+#define TIMER1_RELOAD_EN 0x0008
+#define TIMER0_RELOAD_OFF 0x0010
+#define TIMER0_VAL_OFF 0x0014
+#define TIMER1_RELOAD_OFF 0x0018
+#define TIMER1_VAL_OFF 0x001c
+
+
+/*
+ * SoC-specific data.
+ */
+static void __iomem *bridge_base;
+static u32 bridge_timer1_clr_mask;
+static void __iomem *timer_base;
+
+
+/*
+ * Number of timer ticks per jiffy.
+ */
+static u32 ticks_per_jiffy;
/*
@@ -57,8 +71,11 @@ static unsigned long tclk2ns_scale;
unsigned long long sched_clock(void)
{
- unsigned long long v = cnt32_to_63(0xffffffff - readl(TIMER0_VAL));
- return (v * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
+ unsigned long val;
+
+ val = ~readl(timer_base + TIMER0_VAL_OFF);
+
+ return (cnt32_to_63(val) * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
}
static struct timer_list cnt32_to_63_keepwarm_timer;
@@ -78,6 +95,7 @@ static void __init setup_sched_clock(unsigned long tclk)
v <<= TCLK2NS_SCALE_FACTOR;
v += tclk/2;
do_div(v, tclk);
+
/*
* We want an even value to automatically clear the top bit
* returned by cnt32_to_63() without an additional run time
@@ -97,7 +115,7 @@ static void __init setup_sched_clock(unsigned long tclk)
*/
static cycle_t orion_clksrc_read(struct clocksource *cs)
{
- return 0xffffffff - readl(TIMER0_VAL);
+ return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF);
}
static struct clocksource orion_clksrc = {
@@ -128,23 +146,23 @@ orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev)
/*
* Clear and enable clockevent timer interrupt.
*/
- writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
+ writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
- u = readl(BRIDGE_MASK);
+ u = readl(bridge_base + BRIDGE_MASK_OFF);
u |= BRIDGE_INT_TIMER1;
- writel(u, BRIDGE_MASK);
+ writel(u, bridge_base + BRIDGE_MASK_OFF);
/*
* Setup new clockevent timer value.
*/
- writel(delta, TIMER1_VAL);
+ writel(delta, timer_base + TIMER1_VAL_OFF);
/*
* Enable the timer.
*/
- u = readl(TIMER_CTRL);
+ u = readl(timer_base + TIMER_CTRL_OFF);
u = (u & ~TIMER1_RELOAD_EN) | TIMER1_EN;
- writel(u, TIMER_CTRL);
+ writel(u, timer_base + TIMER_CTRL_OFF);
local_irq_restore(flags);
@@ -162,37 +180,38 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
/*
* Setup timer to fire@1/HZ intervals.
*/
- writel(ticks_per_jiffy - 1, TIMER1_RELOAD);
- writel(ticks_per_jiffy - 1, TIMER1_VAL);
+ writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
+ writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
/*
* Enable timer interrupt.
*/
- u = readl(BRIDGE_MASK);
- writel(u | BRIDGE_INT_TIMER1, BRIDGE_MASK);
+ u = readl(bridge_base + BRIDGE_MASK_OFF);
+ writel(u | BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
/*
* Enable timer.
*/
- u = readl(TIMER_CTRL);
- writel(u | TIMER1_EN | TIMER1_RELOAD_EN, TIMER_CTRL);
+ u = readl(timer_base + TIMER_CTRL_OFF);
+ writel(u | TIMER1_EN | TIMER1_RELOAD_EN,
+ timer_base + TIMER_CTRL_OFF);
} else {
/*
* Disable timer.
*/
- u = readl(TIMER_CTRL);
- writel(u & ~TIMER1_EN, TIMER_CTRL);
+ u = readl(timer_base + TIMER_CTRL_OFF);
+ writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
/*
* Disable timer interrupt.
*/
- u = readl(BRIDGE_MASK);
- writel(u & ~BRIDGE_INT_TIMER1, BRIDGE_MASK);
+ u = readl(bridge_base + BRIDGE_MASK_OFF);
+ writel(u & ~BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
/*
* ACK pending timer interrupt.
*/
- writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
+ writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
}
local_irq_restore(flags);
@@ -212,7 +231,7 @@ static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)
/*
* ACK timer interrupt and call event handler.
*/
- writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
+ writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
orion_clkevt.event_handler(&orion_clkevt);
return IRQ_HANDLED;
@@ -224,32 +243,46 @@ static struct irqaction orion_timer_irq = {
.handler = orion_timer_interrupt
};
-void __init orion_time_init(unsigned int irq, unsigned int tclk)
+void __init
+orion_time_set_base(u32 _timer_base)
+{
+ timer_base = (void __iomem *)_timer_base;
+}
+
+void __init
+orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
+ unsigned int irq, unsigned int tclk)
{
u32 u;
+ /*
+ * Set SoC-specific data.
+ */
+ bridge_base = (void __iomem *)_bridge_base;
+ bridge_timer1_clr_mask = _bridge_timer1_clr_mask;
+
ticks_per_jiffy = (tclk + HZ/2) / HZ;
/*
- * Set scale and timer for sched_clock
+ * Set scale and timer for sched_clock.
*/
setup_sched_clock(tclk);
/*
* Setup free-running clocksource timer (interrupts
- * disabled.)
+ * disabled).
*/
- writel(0xffffffff, TIMER0_VAL);
- writel(0xffffffff, TIMER0_RELOAD);
- u = readl(BRIDGE_MASK);
- writel(u & ~BRIDGE_INT_TIMER0, BRIDGE_MASK);
- u = readl(TIMER_CTRL);
- writel(u | TIMER0_EN | TIMER0_RELOAD_EN, TIMER_CTRL);
+ writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
+ writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
+ u = readl(bridge_base + BRIDGE_MASK_OFF);
+ writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF);
+ u = readl(timer_base + TIMER_CTRL_OFF);
+ writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
orion_clksrc.mult = clocksource_hz2mult(tclk, orion_clksrc.shift);
clocksource_register(&orion_clksrc);
/*
- * Setup clockevent timer (interrupt-driven.)
+ * Setup clockevent timer (interrupt-driven).
*/
setup_irq(irq, &orion_timer_irq);
orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes.
2010-12-15 2:02 ` [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes Lennert Buytenhek
@ 2010-12-15 2:44 ` Nicolas Pitre
2010-12-15 9:16 ` Lennert Buytenhek
2010-12-15 16:25 ` Russell King - ARM Linux
1 sibling, 1 reply; 36+ messages in thread
From: Nicolas Pitre @ 2010-12-15 2:44 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 15 Dec 2010, Lennert Buytenhek wrote:
> This patch makes the various mach dirs that use the plat-orion time
> code pass in timer and bridge addresses explicitly, instead of having
> plat-orion get those values by including a mach dir include file --
> the latter mechanism is problematic if you want to support multiple
> ARM platforms in the same kernel image.
>
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
[...]
> @@ -57,8 +71,11 @@ static unsigned long tclk2ns_scale;
>
> unsigned long long sched_clock(void)
> {
> - unsigned long long v = cnt32_to_63(0xffffffff - readl(TIMER0_VAL));
> - return (v * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
> + unsigned long val;
> +
> + val = ~readl(timer_base + TIMER0_VAL_OFF);
> +
> + return (cnt32_to_63(val) * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
> }
This is wrong.
The implementation of cnt32_to_63() looks like this:
#define cnt32_to_63(cnt_lo) \
({ \
static u32 __m_cnt_hi; \
union cnt32_to_63 __x; \
__x.hi = __m_cnt_hi; \
smp_rmb(); \
__x.lo = (cnt_lo); \
[...]
Notice the smp_rmb() _before_ the cnt_lo argument is evaluated, and
_after_ __m_cnt_hi is retrieved. Tthis ordering is important for the
lockless algorithm used here, otherwise a racing thread could make the
hardware counter look like it went backward, or that it actually jumped
ahead almost one full period. If you are caching the hardware counter
value in a variable then you are defeating the algorithm.
I realize that this constraint is not properly documented in
cnt32_to_63.h so I should fix that.
Nicolas
^ permalink raw reply [flat|nested] 36+ messages in thread* [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes.
2010-12-15 2:44 ` Nicolas Pitre
@ 2010-12-15 9:16 ` Lennert Buytenhek
2010-12-15 15:37 ` Nicolas Pitre
0 siblings, 1 reply; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 9:16 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Dec 14, 2010 at 09:44:14PM -0500, Nicolas Pitre wrote:
> > This patch makes the various mach dirs that use the plat-orion time
> > code pass in timer and bridge addresses explicitly, instead of having
> > plat-orion get those values by including a mach dir include file --
> > the latter mechanism is problematic if you want to support multiple
> > ARM platforms in the same kernel image.
> >
> > Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> [...]
> > @@ -57,8 +71,11 @@ static unsigned long tclk2ns_scale;
> >
> > unsigned long long sched_clock(void)
> > {
> > - unsigned long long v = cnt32_to_63(0xffffffff - readl(TIMER0_VAL));
> > - return (v * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
> > + unsigned long val;
> > +
> > + val = ~readl(timer_base + TIMER0_VAL_OFF);
> > +
> > + return (cnt32_to_63(val) * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
> > }
>
> This is wrong.
>
> The implementation of cnt32_to_63() looks like this:
>
> #define cnt32_to_63(cnt_lo) \
> ({ \
> static u32 __m_cnt_hi; \
> union cnt32_to_63 __x; \
> __x.hi = __m_cnt_hi; \
> smp_rmb(); \
> __x.lo = (cnt_lo); \
> [...]
>
> Notice the smp_rmb() _before_ the cnt_lo argument is evaluated, and
> _after_ __m_cnt_hi is retrieved. Tthis ordering is important for the
> lockless algorithm used here, otherwise a racing thread could make the
> hardware counter look like it went backward, or that it actually jumped
> ahead almost one full period. If you are caching the hardware counter
> value in a variable then you are defeating the algorithm.
>
> I realize that this constraint is not properly documented in
> cnt32_to_63.h so I should fix that.
OK, I see. Thanks for the explanation.
This version fixes that up.
commit 6903327da544a86415e35c9cc31e93c3c41f70c1
Author: Lennert Buytenhek <buytenh@wantstofly.org>
Date: Fri Oct 15 16:50:26 2010 +0200
ARM: Remove dependency of plat-orion time code on mach directory includes.
This patch makes the various mach dirs that use the plat-orion time
code pass in timer and bridge addresses explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index f7a1258..83817ed 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -67,6 +67,8 @@ static struct map_desc dove_io_desc[] __initdata = {
void __init dove_map_io(void)
{
iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
/*****************************************************************************
@@ -540,7 +542,8 @@ static int get_tclk(void)
static void dove_timer_init(void)
{
- orion_time_init(IRQ_DOVE_BRIDGE, get_tclk());
+ orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_DOVE_BRIDGE, get_tclk());
}
struct sys_timer dove_timer = {
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 214a4c3..226949d 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -26,10 +26,6 @@
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
-#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
-#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 3688123..d67740f 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -60,6 +60,8 @@ static struct map_desc kirkwood_io_desc[] __initdata = {
void __init kirkwood_map_io(void)
{
iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
/*
@@ -864,7 +866,9 @@ int __init kirkwood_find_tclk(void)
static void __init kirkwood_timer_init(void)
{
kirkwood_tclk = kirkwood_find_tclk();
- orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
+
+ orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
}
struct sys_timer kirkwood_timer = {
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index aff0e13..957bd79 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -29,9 +29,6 @@
#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
#define WDT_INT_REQ 0x0008
-#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c
index 818f19d..9206671 100644
--- a/arch/arm/mach-loki/common.c
+++ b/arch/arm/mach-loki/common.c
@@ -18,6 +18,7 @@
#include <asm/timex.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
+#include <mach/bridge-regs.h>
#include <mach/loki.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
@@ -38,6 +39,8 @@ static struct map_desc loki_io_desc[] __initdata = {
void __init loki_map_io(void)
{
iotable_init(loki_io_desc, ARRAY_SIZE(loki_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
@@ -292,7 +295,8 @@ void __init loki_uart1_init(void)
****************************************************************************/
static void loki_timer_init(void)
{
- orion_time_init(IRQ_LOKI_BRIDGE, LOKI_TCLK);
+ orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_LOKI_BRIDGE, LOKI_TCLK);
}
struct sys_timer loki_timer = {
diff --git a/arch/arm/mach-loki/include/mach/bridge-regs.h b/arch/arm/mach-loki/include/mach/bridge-regs.h
index a3fabf7..fd87732 100644
--- a/arch/arm/mach-loki/include/mach/bridge-regs.h
+++ b/arch/arm/mach-loki/include/mach/bridge-regs.h
@@ -17,11 +17,6 @@
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
-#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
-
-#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR 0x0004
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 08465eb..64a97bc 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -162,6 +162,8 @@ void __init mv78xx0_map_io(void)
mv78xx0_io_desc[0].pfn = __phys_to_pfn(phys);
iotable_init(mv78xx0_io_desc, ARRAY_SIZE(mv78xx0_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
@@ -820,7 +822,8 @@ void __init mv78xx0_uart3_init(void)
****************************************************************************/
static void mv78xx0_timer_init(void)
{
- orion_time_init(IRQ_MV78XX0_TIMER_1, get_tclk());
+ orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_MV78XX0_TIMER_1, get_tclk());
}
struct sys_timer mv78xx0_timer = {
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index 2d14c4f..c64dbb9 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -20,10 +20,6 @@
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
-#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
-#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 8dc2c76..74ac68c 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -26,6 +26,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
+#include <mach/bridge-regs.h>
#include <mach/hardware.h>
#include <mach/orion5x.h>
#include <plat/ehci-orion.h>
@@ -65,6 +66,8 @@ static struct map_desc orion5x_io_desc[] __initdata = {
void __init orion5x_map_io(void)
{
iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
+
+ orion_time_set_base(TIMER_VIRT_BASE);
}
@@ -616,7 +619,9 @@ int __init orion5x_find_tclk(void)
static void orion5x_timer_init(void)
{
orion5x_tclk = orion5x_find_tclk();
- orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
+
+ orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
+ IRQ_ORION5X_BRIDGE, orion5x_tclk);
}
struct sys_timer orion5x_timer = {
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 5c9744c..96484bc 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -22,14 +22,12 @@
#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)
+#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
+
#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C)
-#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
#define WDT_INT_REQ 0x0008
-#define BRIDGE_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x114)
-#define BRIDGE_INT_TIMER0 0x0002
-#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200)
diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h
index c06ca35..7ed6aa9 100644
--- a/arch/arm/plat-orion/include/plat/time.h
+++ b/arch/arm/plat-orion/include/plat/time.h
@@ -11,7 +11,10 @@
#ifndef __PLAT_TIME_H
#define __PLAT_TIME_H
-void orion_time_init(unsigned int irq, unsigned int tclk);
+void orion_time_set_base(u32 _timer_base);
+
+void orion_time_init(u32 bridge_base, u32 bridge_timer1_clr_mask,
+ unsigned int irq, unsigned int tclk);
#endif
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 715a301..3633524 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -18,28 +18,42 @@
#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
-#include <asm/mach/time.h>
-#include <mach/bridge-regs.h>
-#include <mach/hardware.h>
/*
- * Number of timer ticks per jiffy.
+ * MBus bridge block registers.
*/
-static u32 ticks_per_jiffy;
+#define BRIDGE_CAUSE_OFF 0x0110
+#define BRIDGE_MASK_OFF 0x0114
+#define BRIDGE_INT_TIMER0 0x0002
+#define BRIDGE_INT_TIMER1 0x0004
/*
* Timer block registers.
*/
-#define TIMER_CTRL (TIMER_VIRT_BASE + 0x0000)
-#define TIMER0_EN 0x0001
-#define TIMER0_RELOAD_EN 0x0002
-#define TIMER1_EN 0x0004
-#define TIMER1_RELOAD_EN 0x0008
-#define TIMER0_RELOAD (TIMER_VIRT_BASE + 0x0010)
-#define TIMER0_VAL (TIMER_VIRT_BASE + 0x0014)
-#define TIMER1_RELOAD (TIMER_VIRT_BASE + 0x0018)
-#define TIMER1_VAL (TIMER_VIRT_BASE + 0x001c)
+#define TIMER_CTRL_OFF 0x0000
+#define TIMER0_EN 0x0001
+#define TIMER0_RELOAD_EN 0x0002
+#define TIMER1_EN 0x0004
+#define TIMER1_RELOAD_EN 0x0008
+#define TIMER0_RELOAD_OFF 0x0010
+#define TIMER0_VAL_OFF 0x0014
+#define TIMER1_RELOAD_OFF 0x0018
+#define TIMER1_VAL_OFF 0x001c
+
+
+/*
+ * SoC-specific data.
+ */
+static void __iomem *bridge_base;
+static u32 bridge_timer1_clr_mask;
+static void __iomem *timer_base;
+
+
+/*
+ * Number of timer ticks per jiffy.
+ */
+static u32 ticks_per_jiffy;
/*
@@ -57,7 +71,7 @@ static unsigned long tclk2ns_scale;
unsigned long long sched_clock(void)
{
- unsigned long long v = cnt32_to_63(0xffffffff - readl(TIMER0_VAL));
+ unsigned long long v = cnt32_to_63(~readl(timer_base + TIMER0_VAL_OFF));
return (v * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
}
@@ -78,6 +92,7 @@ static void __init setup_sched_clock(unsigned long tclk)
v <<= TCLK2NS_SCALE_FACTOR;
v += tclk/2;
do_div(v, tclk);
+
/*
* We want an even value to automatically clear the top bit
* returned by cnt32_to_63() without an additional run time
@@ -97,7 +112,7 @@ static void __init setup_sched_clock(unsigned long tclk)
*/
static cycle_t orion_clksrc_read(struct clocksource *cs)
{
- return 0xffffffff - readl(TIMER0_VAL);
+ return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF);
}
static struct clocksource orion_clksrc = {
@@ -128,23 +143,23 @@ orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev)
/*
* Clear and enable clockevent timer interrupt.
*/
- writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
+ writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
- u = readl(BRIDGE_MASK);
+ u = readl(bridge_base + BRIDGE_MASK_OFF);
u |= BRIDGE_INT_TIMER1;
- writel(u, BRIDGE_MASK);
+ writel(u, bridge_base + BRIDGE_MASK_OFF);
/*
* Setup new clockevent timer value.
*/
- writel(delta, TIMER1_VAL);
+ writel(delta, timer_base + TIMER1_VAL_OFF);
/*
* Enable the timer.
*/
- u = readl(TIMER_CTRL);
+ u = readl(timer_base + TIMER_CTRL_OFF);
u = (u & ~TIMER1_RELOAD_EN) | TIMER1_EN;
- writel(u, TIMER_CTRL);
+ writel(u, timer_base + TIMER_CTRL_OFF);
local_irq_restore(flags);
@@ -162,37 +177,38 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
/*
* Setup timer to fire@1/HZ intervals.
*/
- writel(ticks_per_jiffy - 1, TIMER1_RELOAD);
- writel(ticks_per_jiffy - 1, TIMER1_VAL);
+ writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
+ writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
/*
* Enable timer interrupt.
*/
- u = readl(BRIDGE_MASK);
- writel(u | BRIDGE_INT_TIMER1, BRIDGE_MASK);
+ u = readl(bridge_base + BRIDGE_MASK_OFF);
+ writel(u | BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
/*
* Enable timer.
*/
- u = readl(TIMER_CTRL);
- writel(u | TIMER1_EN | TIMER1_RELOAD_EN, TIMER_CTRL);
+ u = readl(timer_base + TIMER_CTRL_OFF);
+ writel(u | TIMER1_EN | TIMER1_RELOAD_EN,
+ timer_base + TIMER_CTRL_OFF);
} else {
/*
* Disable timer.
*/
- u = readl(TIMER_CTRL);
- writel(u & ~TIMER1_EN, TIMER_CTRL);
+ u = readl(timer_base + TIMER_CTRL_OFF);
+ writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
/*
* Disable timer interrupt.
*/
- u = readl(BRIDGE_MASK);
- writel(u & ~BRIDGE_INT_TIMER1, BRIDGE_MASK);
+ u = readl(bridge_base + BRIDGE_MASK_OFF);
+ writel(u & ~BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
/*
* ACK pending timer interrupt.
*/
- writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
+ writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
}
local_irq_restore(flags);
@@ -212,7 +228,7 @@ static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)
/*
* ACK timer interrupt and call event handler.
*/
- writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
+ writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
orion_clkevt.event_handler(&orion_clkevt);
return IRQ_HANDLED;
@@ -224,32 +240,46 @@ static struct irqaction orion_timer_irq = {
.handler = orion_timer_interrupt
};
-void __init orion_time_init(unsigned int irq, unsigned int tclk)
+void __init
+orion_time_set_base(u32 _timer_base)
+{
+ timer_base = (void __iomem *)_timer_base;
+}
+
+void __init
+orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
+ unsigned int irq, unsigned int tclk)
{
u32 u;
+ /*
+ * Set SoC-specific data.
+ */
+ bridge_base = (void __iomem *)_bridge_base;
+ bridge_timer1_clr_mask = _bridge_timer1_clr_mask;
+
ticks_per_jiffy = (tclk + HZ/2) / HZ;
/*
- * Set scale and timer for sched_clock
+ * Set scale and timer for sched_clock.
*/
setup_sched_clock(tclk);
/*
* Setup free-running clocksource timer (interrupts
- * disabled.)
+ * disabled).
*/
- writel(0xffffffff, TIMER0_VAL);
- writel(0xffffffff, TIMER0_RELOAD);
- u = readl(BRIDGE_MASK);
- writel(u & ~BRIDGE_INT_TIMER0, BRIDGE_MASK);
- u = readl(TIMER_CTRL);
- writel(u | TIMER0_EN | TIMER0_RELOAD_EN, TIMER_CTRL);
+ writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
+ writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
+ u = readl(bridge_base + BRIDGE_MASK_OFF);
+ writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF);
+ u = readl(timer_base + TIMER_CTRL_OFF);
+ writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
orion_clksrc.mult = clocksource_hz2mult(tclk, orion_clksrc.shift);
clocksource_register(&orion_clksrc);
/*
- * Setup clockevent timer (interrupt-driven.)
+ * Setup clockevent timer (interrupt-driven).
*/
setup_irq(irq, &orion_timer_irq);
orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes.
2010-12-15 9:16 ` Lennert Buytenhek
@ 2010-12-15 15:37 ` Nicolas Pitre
0 siblings, 0 replies; 36+ messages in thread
From: Nicolas Pitre @ 2010-12-15 15:37 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 15 Dec 2010, Lennert Buytenhek wrote:
> On Tue, Dec 14, 2010 at 09:44:14PM -0500, Nicolas Pitre wrote:
>
> > > This patch makes the various mach dirs that use the plat-orion time
> > > code pass in timer and bridge addresses explicitly, instead of having
> > > plat-orion get those values by including a mach dir include file --
> > > the latter mechanism is problematic if you want to support multiple
> > > ARM platforms in the same kernel image.
> > >
> > > Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> > [...]
> > > @@ -57,8 +71,11 @@ static unsigned long tclk2ns_scale;
> > >
> > > unsigned long long sched_clock(void)
> > > {
> > > - unsigned long long v = cnt32_to_63(0xffffffff - readl(TIMER0_VAL));
> > > - return (v * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
> > > + unsigned long val;
> > > +
> > > + val = ~readl(timer_base + TIMER0_VAL_OFF);
> > > +
> > > + return (cnt32_to_63(val) * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
> > > }
> >
> > This is wrong.
> >
> > The implementation of cnt32_to_63() looks like this:
> >
> > #define cnt32_to_63(cnt_lo) \
> > ({ \
> > static u32 __m_cnt_hi; \
> > union cnt32_to_63 __x; \
> > __x.hi = __m_cnt_hi; \
> > smp_rmb(); \
> > __x.lo = (cnt_lo); \
> > [...]
> >
> > Notice the smp_rmb() _before_ the cnt_lo argument is evaluated, and
> > _after_ __m_cnt_hi is retrieved. Tthis ordering is important for the
> > lockless algorithm used here, otherwise a racing thread could make the
> > hardware counter look like it went backward, or that it actually jumped
> > ahead almost one full period. If you are caching the hardware counter
> > value in a variable then you are defeating the algorithm.
> >
> > I realize that this constraint is not properly documented in
> > cnt32_to_63.h so I should fix that.
>
> OK, I see. Thanks for the explanation.
>
> This version fixes that up.
>
>
> commit 6903327da544a86415e35c9cc31e93c3c41f70c1
> Author: Lennert Buytenhek <buytenh@wantstofly.org>
> Date: Fri Oct 15 16:50:26 2010 +0200
>
> ARM: Remove dependency of plat-orion time code on mach directory includes.
>
> This patch makes the various mach dirs that use the plat-orion time
> code pass in timer and bridge addresses explicitly, instead of having
> plat-orion get those values by including a mach dir include file --
> the latter mechanism is problematic if you want to support multiple
> ARM platforms in the same kernel image.
>
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
>
> diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
> index f7a1258..83817ed 100644
> --- a/arch/arm/mach-dove/common.c
> +++ b/arch/arm/mach-dove/common.c
> @@ -67,6 +67,8 @@ static struct map_desc dove_io_desc[] __initdata = {
> void __init dove_map_io(void)
> {
> iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
> +
> + orion_time_set_base(TIMER_VIRT_BASE);
> }
>
> /*****************************************************************************
> @@ -540,7 +542,8 @@ static int get_tclk(void)
>
> static void dove_timer_init(void)
> {
> - orion_time_init(IRQ_DOVE_BRIDGE, get_tclk());
> + orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
> + IRQ_DOVE_BRIDGE, get_tclk());
> }
>
> struct sys_timer dove_timer = {
> diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
> index 214a4c3..226949d 100644
> --- a/arch/arm/mach-dove/include/mach/bridge-regs.h
> +++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
> @@ -26,10 +26,6 @@
> #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
> #define SOFT_RESET 0x00000001
>
> -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
> -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
> -#define BRIDGE_INT_TIMER0 0x0002
> -#define BRIDGE_INT_TIMER1 0x0004
> #define BRIDGE_INT_TIMER1_CLR (~0x0004)
>
> #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
> diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
> index 3688123..d67740f 100644
> --- a/arch/arm/mach-kirkwood/common.c
> +++ b/arch/arm/mach-kirkwood/common.c
> @@ -60,6 +60,8 @@ static struct map_desc kirkwood_io_desc[] __initdata = {
> void __init kirkwood_map_io(void)
> {
> iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
> +
> + orion_time_set_base(TIMER_VIRT_BASE);
> }
>
> /*
> @@ -864,7 +866,9 @@ int __init kirkwood_find_tclk(void)
> static void __init kirkwood_timer_init(void)
> {
> kirkwood_tclk = kirkwood_find_tclk();
> - orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
> +
> + orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
> + IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
> }
>
> struct sys_timer kirkwood_timer = {
> diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
> index aff0e13..957bd79 100644
> --- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
> +++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
> @@ -29,9 +29,6 @@
> #define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
> #define WDT_INT_REQ 0x0008
>
> -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
> -#define BRIDGE_INT_TIMER0 0x0002
> -#define BRIDGE_INT_TIMER1 0x0004
> #define BRIDGE_INT_TIMER1_CLR (~0x0004)
>
> #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
> diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c
> index 818f19d..9206671 100644
> --- a/arch/arm/mach-loki/common.c
> +++ b/arch/arm/mach-loki/common.c
> @@ -18,6 +18,7 @@
> #include <asm/timex.h>
> #include <asm/mach/map.h>
> #include <asm/mach/time.h>
> +#include <mach/bridge-regs.h>
> #include <mach/loki.h>
> #include <plat/orion_nand.h>
> #include <plat/time.h>
> @@ -38,6 +39,8 @@ static struct map_desc loki_io_desc[] __initdata = {
> void __init loki_map_io(void)
> {
> iotable_init(loki_io_desc, ARRAY_SIZE(loki_io_desc));
> +
> + orion_time_set_base(TIMER_VIRT_BASE);
> }
>
>
> @@ -292,7 +295,8 @@ void __init loki_uart1_init(void)
> ****************************************************************************/
> static void loki_timer_init(void)
> {
> - orion_time_init(IRQ_LOKI_BRIDGE, LOKI_TCLK);
> + orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
> + IRQ_LOKI_BRIDGE, LOKI_TCLK);
> }
>
> struct sys_timer loki_timer = {
> diff --git a/arch/arm/mach-loki/include/mach/bridge-regs.h b/arch/arm/mach-loki/include/mach/bridge-regs.h
> index a3fabf7..fd87732 100644
> --- a/arch/arm/mach-loki/include/mach/bridge-regs.h
> +++ b/arch/arm/mach-loki/include/mach/bridge-regs.h
> @@ -17,11 +17,6 @@
> #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
> #define SOFT_RESET 0x00000001
>
> -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
> -
> -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
> -#define BRIDGE_INT_TIMER0 0x0002
> -#define BRIDGE_INT_TIMER1 0x0004
> #define BRIDGE_INT_TIMER1_CLR 0x0004
>
> #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
> diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
> index 08465eb..64a97bc 100644
> --- a/arch/arm/mach-mv78xx0/common.c
> +++ b/arch/arm/mach-mv78xx0/common.c
> @@ -162,6 +162,8 @@ void __init mv78xx0_map_io(void)
> mv78xx0_io_desc[0].pfn = __phys_to_pfn(phys);
>
> iotable_init(mv78xx0_io_desc, ARRAY_SIZE(mv78xx0_io_desc));
> +
> + orion_time_set_base(TIMER_VIRT_BASE);
> }
>
>
> @@ -820,7 +822,8 @@ void __init mv78xx0_uart3_init(void)
> ****************************************************************************/
> static void mv78xx0_timer_init(void)
> {
> - orion_time_init(IRQ_MV78XX0_TIMER_1, get_tclk());
> + orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
> + IRQ_MV78XX0_TIMER_1, get_tclk());
> }
>
> struct sys_timer mv78xx0_timer = {
> diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
> index 2d14c4f..c64dbb9 100644
> --- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
> +++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
> @@ -20,10 +20,6 @@
> #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
> #define SOFT_RESET 0x00000001
>
> -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
> -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
> -#define BRIDGE_INT_TIMER0 0x0002
> -#define BRIDGE_INT_TIMER1 0x0004
> #define BRIDGE_INT_TIMER1_CLR (~0x0004)
>
> #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
> diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
> index 8dc2c76..74ac68c 100644
> --- a/arch/arm/mach-orion5x/common.c
> +++ b/arch/arm/mach-orion5x/common.c
> @@ -26,6 +26,7 @@
> #include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> #include <asm/mach/time.h>
> +#include <mach/bridge-regs.h>
> #include <mach/hardware.h>
> #include <mach/orion5x.h>
> #include <plat/ehci-orion.h>
> @@ -65,6 +66,8 @@ static struct map_desc orion5x_io_desc[] __initdata = {
> void __init orion5x_map_io(void)
> {
> iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
> +
> + orion_time_set_base(TIMER_VIRT_BASE);
> }
>
>
> @@ -616,7 +619,9 @@ int __init orion5x_find_tclk(void)
> static void orion5x_timer_init(void)
> {
> orion5x_tclk = orion5x_find_tclk();
> - orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
> +
> + orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
> + IRQ_ORION5X_BRIDGE, orion5x_tclk);
> }
>
> struct sys_timer orion5x_timer = {
> diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
> index 5c9744c..96484bc 100644
> --- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
> +++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
> @@ -22,14 +22,12 @@
>
> #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)
>
> +#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
> +
> #define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C)
>
> -#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
> #define WDT_INT_REQ 0x0008
>
> -#define BRIDGE_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x114)
> -#define BRIDGE_INT_TIMER0 0x0002
> -#define BRIDGE_INT_TIMER1 0x0004
> #define BRIDGE_INT_TIMER1_CLR (~0x0004)
>
> #define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200)
> diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h
> index c06ca35..7ed6aa9 100644
> --- a/arch/arm/plat-orion/include/plat/time.h
> +++ b/arch/arm/plat-orion/include/plat/time.h
> @@ -11,7 +11,10 @@
> #ifndef __PLAT_TIME_H
> #define __PLAT_TIME_H
>
> -void orion_time_init(unsigned int irq, unsigned int tclk);
> +void orion_time_set_base(u32 _timer_base);
> +
> +void orion_time_init(u32 bridge_base, u32 bridge_timer1_clr_mask,
> + unsigned int irq, unsigned int tclk);
>
>
> #endif
> diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
> index 715a301..3633524 100644
> --- a/arch/arm/plat-orion/time.c
> +++ b/arch/arm/plat-orion/time.c
> @@ -18,28 +18,42 @@
> #include <linux/clockchips.h>
> #include <linux/interrupt.h>
> #include <linux/irq.h>
> -#include <asm/mach/time.h>
> -#include <mach/bridge-regs.h>
> -#include <mach/hardware.h>
>
> /*
> - * Number of timer ticks per jiffy.
> + * MBus bridge block registers.
> */
> -static u32 ticks_per_jiffy;
> +#define BRIDGE_CAUSE_OFF 0x0110
> +#define BRIDGE_MASK_OFF 0x0114
> +#define BRIDGE_INT_TIMER0 0x0002
> +#define BRIDGE_INT_TIMER1 0x0004
>
>
> /*
> * Timer block registers.
> */
> -#define TIMER_CTRL (TIMER_VIRT_BASE + 0x0000)
> -#define TIMER0_EN 0x0001
> -#define TIMER0_RELOAD_EN 0x0002
> -#define TIMER1_EN 0x0004
> -#define TIMER1_RELOAD_EN 0x0008
> -#define TIMER0_RELOAD (TIMER_VIRT_BASE + 0x0010)
> -#define TIMER0_VAL (TIMER_VIRT_BASE + 0x0014)
> -#define TIMER1_RELOAD (TIMER_VIRT_BASE + 0x0018)
> -#define TIMER1_VAL (TIMER_VIRT_BASE + 0x001c)
> +#define TIMER_CTRL_OFF 0x0000
> +#define TIMER0_EN 0x0001
> +#define TIMER0_RELOAD_EN 0x0002
> +#define TIMER1_EN 0x0004
> +#define TIMER1_RELOAD_EN 0x0008
> +#define TIMER0_RELOAD_OFF 0x0010
> +#define TIMER0_VAL_OFF 0x0014
> +#define TIMER1_RELOAD_OFF 0x0018
> +#define TIMER1_VAL_OFF 0x001c
> +
> +
> +/*
> + * SoC-specific data.
> + */
> +static void __iomem *bridge_base;
> +static u32 bridge_timer1_clr_mask;
> +static void __iomem *timer_base;
> +
> +
> +/*
> + * Number of timer ticks per jiffy.
> + */
> +static u32 ticks_per_jiffy;
>
>
> /*
> @@ -57,7 +71,7 @@ static unsigned long tclk2ns_scale;
>
> unsigned long long sched_clock(void)
> {
> - unsigned long long v = cnt32_to_63(0xffffffff - readl(TIMER0_VAL));
> + unsigned long long v = cnt32_to_63(~readl(timer_base + TIMER0_VAL_OFF));
> return (v * tclk2ns_scale) >> TCLK2NS_SCALE_FACTOR;
> }
>
> @@ -78,6 +92,7 @@ static void __init setup_sched_clock(unsigned long tclk)
> v <<= TCLK2NS_SCALE_FACTOR;
> v += tclk/2;
> do_div(v, tclk);
> +
> /*
> * We want an even value to automatically clear the top bit
> * returned by cnt32_to_63() without an additional run time
> @@ -97,7 +112,7 @@ static void __init setup_sched_clock(unsigned long tclk)
> */
> static cycle_t orion_clksrc_read(struct clocksource *cs)
> {
> - return 0xffffffff - readl(TIMER0_VAL);
> + return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF);
> }
>
> static struct clocksource orion_clksrc = {
> @@ -128,23 +143,23 @@ orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev)
> /*
> * Clear and enable clockevent timer interrupt.
> */
> - writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
> + writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
>
> - u = readl(BRIDGE_MASK);
> + u = readl(bridge_base + BRIDGE_MASK_OFF);
> u |= BRIDGE_INT_TIMER1;
> - writel(u, BRIDGE_MASK);
> + writel(u, bridge_base + BRIDGE_MASK_OFF);
>
> /*
> * Setup new clockevent timer value.
> */
> - writel(delta, TIMER1_VAL);
> + writel(delta, timer_base + TIMER1_VAL_OFF);
>
> /*
> * Enable the timer.
> */
> - u = readl(TIMER_CTRL);
> + u = readl(timer_base + TIMER_CTRL_OFF);
> u = (u & ~TIMER1_RELOAD_EN) | TIMER1_EN;
> - writel(u, TIMER_CTRL);
> + writel(u, timer_base + TIMER_CTRL_OFF);
>
> local_irq_restore(flags);
>
> @@ -162,37 +177,38 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
> /*
> * Setup timer to fire at 1/HZ intervals.
> */
> - writel(ticks_per_jiffy - 1, TIMER1_RELOAD);
> - writel(ticks_per_jiffy - 1, TIMER1_VAL);
> + writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
> + writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
>
> /*
> * Enable timer interrupt.
> */
> - u = readl(BRIDGE_MASK);
> - writel(u | BRIDGE_INT_TIMER1, BRIDGE_MASK);
> + u = readl(bridge_base + BRIDGE_MASK_OFF);
> + writel(u | BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
>
> /*
> * Enable timer.
> */
> - u = readl(TIMER_CTRL);
> - writel(u | TIMER1_EN | TIMER1_RELOAD_EN, TIMER_CTRL);
> + u = readl(timer_base + TIMER_CTRL_OFF);
> + writel(u | TIMER1_EN | TIMER1_RELOAD_EN,
> + timer_base + TIMER_CTRL_OFF);
> } else {
> /*
> * Disable timer.
> */
> - u = readl(TIMER_CTRL);
> - writel(u & ~TIMER1_EN, TIMER_CTRL);
> + u = readl(timer_base + TIMER_CTRL_OFF);
> + writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
>
> /*
> * Disable timer interrupt.
> */
> - u = readl(BRIDGE_MASK);
> - writel(u & ~BRIDGE_INT_TIMER1, BRIDGE_MASK);
> + u = readl(bridge_base + BRIDGE_MASK_OFF);
> + writel(u & ~BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
>
> /*
> * ACK pending timer interrupt.
> */
> - writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
> + writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
>
> }
> local_irq_restore(flags);
> @@ -212,7 +228,7 @@ static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)
> /*
> * ACK timer interrupt and call event handler.
> */
> - writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
> + writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
> orion_clkevt.event_handler(&orion_clkevt);
>
> return IRQ_HANDLED;
> @@ -224,32 +240,46 @@ static struct irqaction orion_timer_irq = {
> .handler = orion_timer_interrupt
> };
>
> -void __init orion_time_init(unsigned int irq, unsigned int tclk)
> +void __init
> +orion_time_set_base(u32 _timer_base)
> +{
> + timer_base = (void __iomem *)_timer_base;
> +}
> +
> +void __init
> +orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
> + unsigned int irq, unsigned int tclk)
> {
> u32 u;
>
> + /*
> + * Set SoC-specific data.
> + */
> + bridge_base = (void __iomem *)_bridge_base;
> + bridge_timer1_clr_mask = _bridge_timer1_clr_mask;
> +
> ticks_per_jiffy = (tclk + HZ/2) / HZ;
>
> /*
> - * Set scale and timer for sched_clock
> + * Set scale and timer for sched_clock.
> */
> setup_sched_clock(tclk);
>
> /*
> * Setup free-running clocksource timer (interrupts
> - * disabled.)
> + * disabled).
> */
> - writel(0xffffffff, TIMER0_VAL);
> - writel(0xffffffff, TIMER0_RELOAD);
> - u = readl(BRIDGE_MASK);
> - writel(u & ~BRIDGE_INT_TIMER0, BRIDGE_MASK);
> - u = readl(TIMER_CTRL);
> - writel(u | TIMER0_EN | TIMER0_RELOAD_EN, TIMER_CTRL);
> + writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
> + writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
> + u = readl(bridge_base + BRIDGE_MASK_OFF);
> + writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF);
> + u = readl(timer_base + TIMER_CTRL_OFF);
> + writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
> orion_clksrc.mult = clocksource_hz2mult(tclk, orion_clksrc.shift);
> clocksource_register(&orion_clksrc);
>
> /*
> - * Setup clockevent timer (interrupt-driven.)
> + * Setup clockevent timer (interrupt-driven).
> */
> setup_irq(irq, &orion_timer_irq);
> orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
>
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes.
2010-12-15 2:02 ` [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes Lennert Buytenhek
2010-12-15 2:44 ` Nicolas Pitre
@ 2010-12-15 16:25 ` Russell King - ARM Linux
2010-12-15 16:59 ` Nicolas Pitre
1 sibling, 1 reply; 36+ messages in thread
From: Russell King - ARM Linux @ 2010-12-15 16:25 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 15, 2010 at 03:02:28AM +0100, Lennert Buytenhek wrote:
> This patch makes the various mach dirs that use the plat-orion time
> code pass in timer and bridge addresses explicitly, instead of having
> plat-orion get those values by including a mach dir include file --
> the latter mechanism is problematic if you want to support multiple
> ARM platforms in the same kernel image.
I'd prefer you to leave sched_clock() alone - I'm preparing a patch
series which replaces all sched_clock() implementations with something
that fully satisfies the scheduler requirements.
The first step of that is fixing the clocksource mess, which I recently
posted. I have a currently set of three possible further resolutions
which meet the scheduler requirements with varying overheads - some with
more and some with less overhead in the fast path than the current
cnt32_to_63 + multiply + do_div.
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes.
2010-12-15 16:25 ` Russell King - ARM Linux
@ 2010-12-15 16:59 ` Nicolas Pitre
0 siblings, 0 replies; 36+ messages in thread
From: Nicolas Pitre @ 2010-12-15 16:59 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 15 Dec 2010, Russell King - ARM Linux wrote:
> On Wed, Dec 15, 2010 at 03:02:28AM +0100, Lennert Buytenhek wrote:
> > This patch makes the various mach dirs that use the plat-orion time
> > code pass in timer and bridge addresses explicitly, instead of having
> > plat-orion get those values by including a mach dir include file --
> > the latter mechanism is problematic if you want to support multiple
> > ARM platforms in the same kernel image.
>
> I'd prefer you to leave sched_clock() alone - I'm preparing a patch
> series which replaces all sched_clock() implementations with something
> that fully satisfies the scheduler requirements.
>
> The first step of that is fixing the clocksource mess, which I recently
> posted. I have a currently set of three possible further resolutions
> which meet the scheduler requirements with varying overheads - some with
> more and some with less overhead in the fast path than the current
> cnt32_to_63 + multiply + do_div.
OK -- Lennert asked me to carry this patch in the orion Git tree but
I'll hold it back for now.
Looking forward to your sched_clock patch series.
Nicolas
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 02/16] ARM: Remove dependency of plat-orion GPIO code on mach directory includes.
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
2010-12-15 2:02 ` [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes Lennert Buytenhek
@ 2010-12-15 2:02 ` Lennert Buytenhek
2010-12-15 8:08 ` Saeed Bishara
2010-12-15 2:03 ` [PATCH 03/16] ARM: Remove some spurious mach dir includes Lennert Buytenhek
` (13 subsequent siblings)
15 siblings, 1 reply; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:02 UTC (permalink / raw)
To: linux-arm-kernel
This patch makes the various mach dirs that use the plat-orion GPIO
code pass in GPIO-related platform info (GPIO controller base address,
secondary base IRQ number, etc) explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-dove/include/mach/dove.h | 3 +-
arch/arm/mach-dove/include/mach/gpio.h | 40 --
arch/arm/mach-dove/irq.c | 27 +-
arch/arm/mach-kirkwood/include/mach/gpio.h | 29 --
arch/arm/mach-kirkwood/include/mach/kirkwood.h | 2 +
arch/arm/mach-kirkwood/irq.c | 22 +-
arch/arm/mach-kirkwood/mpp.c | 3 -
arch/arm/mach-mv78xx0/include/mach/gpio.h | 31 --
arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 1 +
arch/arm/mach-mv78xx0/irq.c | 22 +-
arch/arm/mach-mv78xx0/mpp.c | 3 -
arch/arm/mach-orion5x/include/mach/gpio.h | 28 --
arch/arm/mach-orion5x/include/mach/orion5x.h | 1 +
arch/arm/mach-orion5x/irq.c | 19 +-
arch/arm/mach-orion5x/mpp.c | 3 -
arch/arm/plat-orion/gpio.c | 475 ++++++++++++++++--------
arch/arm/plat-orion/include/plat/gpio.h | 5 +-
17 files changed, 354 insertions(+), 360 deletions(-)
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index f6a0839..df51131 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -130,7 +130,8 @@
#define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
#define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014)
#define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018)
-#define DOVE_GPIO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
+#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
+#define DOVE_GPIO_HI_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0420)
#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c)
#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
#define DOVE_NAND_GPIO_EN (1 << 0)
diff --git a/arch/arm/mach-dove/include/mach/gpio.h b/arch/arm/mach-dove/include/mach/gpio.h
index 0ee70ff..e7e5101 100644
--- a/arch/arm/mach-dove/include/mach/gpio.h
+++ b/arch/arm/mach-dove/include/mach/gpio.h
@@ -6,44 +6,4 @@
* warranty of any kind, whether express or implied.
*/
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H
-
-#include <asm/errno.h>
-#include <mach/irqs.h>
#include <plat/gpio.h>
-#include <asm-generic/gpio.h> /* cansleep wrappers */
-
-#define GPIO_MAX 64
-
-#define GPIO_BASE_LO (DOVE_GPIO_VIRT_BASE + 0x00)
-#define GPIO_BASE_HI (DOVE_GPIO_VIRT_BASE + 0x20)
-
-#define GPIO_BASE(pin) ((pin < 32) ? GPIO_BASE_LO : GPIO_BASE_HI)
-
-#define GPIO_OUT(pin) (GPIO_BASE(pin) + 0x00)
-#define GPIO_IO_CONF(pin) (GPIO_BASE(pin) + 0x04)
-#define GPIO_BLINK_EN(pin) (GPIO_BASE(pin) + 0x08)
-#define GPIO_IN_POL(pin) (GPIO_BASE(pin) + 0x0c)
-#define GPIO_DATA_IN(pin) (GPIO_BASE(pin) + 0x10)
-#define GPIO_EDGE_CAUSE(pin) (GPIO_BASE(pin) + 0x14)
-#define GPIO_EDGE_MASK(pin) (GPIO_BASE(pin) + 0x18)
-#define GPIO_LEVEL_MASK(pin) (GPIO_BASE(pin) + 0x1c)
-
-static inline int gpio_to_irq(int pin)
-{
- if (pin < NR_GPIO_IRQS)
- return pin + IRQ_DOVE_GPIO_START;
-
- return -EINVAL;
-}
-
-static inline int irq_to_gpio(int irq)
-{
- if (IRQ_DOVE_GPIO_START < irq && irq < NR_IRQS)
- return irq - IRQ_DOVE_GPIO_START;
-
- return -EINVAL;
-}
-
-#endif
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 61bfcb3..a6e9c63 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -99,11 +99,18 @@ void __init dove_init_irq(void)
orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
/*
- * Mask and clear GPIO IRQ interrupts.
+ * Initialize gpiolib for GPIOs 0-63.
*/
- writel(0, GPIO_LEVEL_MASK(0));
- writel(0, GPIO_EDGE_MASK(0));
- writel(0, GPIO_EDGE_CAUSE(0));
+ orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
+ IRQ_DOVE_GPIO_START);
+ set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
+ set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
+ set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
+ set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
+
+ orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
+ IRQ_DOVE_GPIO_START + 32);
+ set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
/*
* Mask and clear PMU interrupts
@@ -111,18 +118,6 @@ void __init dove_init_irq(void)
writel(0, PMU_INTERRUPT_MASK);
writel(0, PMU_INTERRUPT_CAUSE);
- for (i = IRQ_DOVE_GPIO_START; i < IRQ_DOVE_PMU_START; i++) {
- set_irq_chip(i, &orion_gpio_irq_chip);
- set_irq_handler(i, handle_level_irq);
- irq_desc[i].status |= IRQ_LEVEL;
- set_irq_flags(i, IRQF_VALID);
- }
- set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
- set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
- set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
- set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
- set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
-
for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) {
set_irq_chip(i, &pmu_irq_chip);
set_irq_handler(i, handle_level_irq);
diff --git a/arch/arm/mach-kirkwood/include/mach/gpio.h b/arch/arm/mach-kirkwood/include/mach/gpio.h
index 81b335e..84f340b 100644
--- a/arch/arm/mach-kirkwood/include/mach/gpio.h
+++ b/arch/arm/mach-kirkwood/include/mach/gpio.h
@@ -6,33 +6,4 @@
* warranty of any kind, whether express or implied.
*/
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H
-
-#include <mach/irqs.h>
#include <plat/gpio.h>
-#include <asm-generic/gpio.h> /* cansleep wrappers */
-
-#define GPIO_MAX 50
-#define GPIO_OFF(pin) (((pin) >> 5) ? 0x0140 : 0x0100)
-#define GPIO_OUT(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x00)
-#define GPIO_IO_CONF(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x04)
-#define GPIO_BLINK_EN(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x08)
-#define GPIO_IN_POL(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x0c)
-#define GPIO_DATA_IN(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x10)
-#define GPIO_EDGE_CAUSE(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x14)
-#define GPIO_EDGE_MASK(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x18)
-#define GPIO_LEVEL_MASK(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x1c)
-
-static inline int gpio_to_irq(int pin)
-{
- return pin + IRQ_KIRKWOOD_GPIO_START;
-}
-
-static inline int irq_to_gpio(int irq)
-{
- return irq - IRQ_KIRKWOOD_GPIO_START;
-}
-
-
-#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 6e924b3..010bdeb 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -69,6 +69,8 @@
#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x10000)
#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE | 0x0030)
#define DEVICE_ID (DEV_BUS_VIRT_BASE | 0x0034)
+#define GPIO_LOW_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x0100)
+#define GPIO_HIGH_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x0140)
#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0300)
#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0600)
#define I2C_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000)
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 28020ab..cbdb586 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -27,31 +27,21 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
void __init kirkwood_init_irq(void)
{
- int i;
-
orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
/*
- * Mask and clear GPIO IRQ interrupts.
+ * Initialize gpiolib for GPIOs 0-49.
*/
- writel(0, GPIO_LEVEL_MASK(0));
- writel(0, GPIO_EDGE_MASK(0));
- writel(0, GPIO_EDGE_CAUSE(0));
- writel(0, GPIO_LEVEL_MASK(32));
- writel(0, GPIO_EDGE_MASK(32));
- writel(0, GPIO_EDGE_CAUSE(32));
-
- for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) {
- set_irq_chip(i, &orion_gpio_irq_chip);
- set_irq_handler(i, handle_level_irq);
- irq_desc[i].status |= IRQ_LEVEL;
- set_irq_flags(i, IRQF_VALID);
- }
+ orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0,
+ IRQ_KIRKWOOD_GPIO_START);
set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
+
+ orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0,
+ IRQ_KIRKWOOD_GPIO_START + 32);
set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler);
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 27901f7..7ce2018 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -49,9 +49,6 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list)
if (!variant_mask)
return;
- /* Initialize gpiolib. */
- orion_gpio_init();
-
printk(KERN_DEBUG "initial MPP regs:");
for (i = 0; i < MPP_NR_REGS; i++) {
mpp_ctrl[i] = readl(MPP_CTRL(i));
diff --git a/arch/arm/mach-mv78xx0/include/mach/gpio.h b/arch/arm/mach-mv78xx0/include/mach/gpio.h
index d9d1535..77e1b84 100644
--- a/arch/arm/mach-mv78xx0/include/mach/gpio.h
+++ b/arch/arm/mach-mv78xx0/include/mach/gpio.h
@@ -6,35 +6,4 @@
* warranty of any kind, whether express or implied.
*/
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H
-
-#include <mach/irqs.h>
#include <plat/gpio.h>
-#include <asm-generic/gpio.h> /* cansleep wrappers */
-
-extern int mv78xx0_core_index(void);
-
-#define GPIO_MAX 32
-#define GPIO_OUT(pin) (DEV_BUS_VIRT_BASE + 0x0100)
-#define GPIO_IO_CONF(pin) (DEV_BUS_VIRT_BASE + 0x0104)
-#define GPIO_BLINK_EN(pin) (DEV_BUS_VIRT_BASE + 0x0108)
-#define GPIO_IN_POL(pin) (DEV_BUS_VIRT_BASE + 0x010c)
-#define GPIO_DATA_IN(pin) (DEV_BUS_VIRT_BASE + 0x0110)
-#define GPIO_EDGE_CAUSE(pin) (DEV_BUS_VIRT_BASE + 0x0114)
-#define GPIO_MASK_OFF (mv78xx0_core_index() ? 0x18 : 0)
-#define GPIO_EDGE_MASK(pin) (DEV_BUS_VIRT_BASE + 0x0118 + GPIO_MASK_OFF)
-#define GPIO_LEVEL_MASK(pin) (DEV_BUS_VIRT_BASE + 0x011c + GPIO_MASK_OFF)
-
-static inline int gpio_to_irq(int pin)
-{
- return pin + IRQ_MV78XX0_GPIO_START;
-}
-
-static inline int irq_to_gpio(int irq)
-{
- return irq - IRQ_MV78XX0_GPIO_START;
-}
-
-
-#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 788bdac..e02506e 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -71,6 +71,7 @@
#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000)
#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030)
#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034)
+#define GPIO_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x0100)
#define I2C_0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000)
#define I2C_1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1100)
#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000)
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 22b4ff8..08da497 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -26,28 +26,18 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
void __init mv78xx0_init_irq(void)
{
- int i;
-
- /* Initialize gpiolib. */
- orion_gpio_init();
-
orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
/*
- * Mask and clear GPIO IRQ interrupts.
+ * Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask
+ * registers for core #1 are at an offset of 0x18 from those of
+ * core #0.)
*/
- writel(0, GPIO_LEVEL_MASK(0));
- writel(0, GPIO_EDGE_MASK(0));
- writel(0, GPIO_EDGE_CAUSE(0));
-
- for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) {
- set_irq_chip(i, &orion_gpio_irq_chip);
- set_irq_handler(i, handle_level_irq);
- irq_desc[i].status |= IRQ_LEVEL;
- set_irq_flags(i, IRQF_VALID);
- }
+ orion_gpio_init(0, 32, GPIO_VIRT_BASE,
+ mv78xx0_core_index() ? 0x18 : 0,
+ IRQ_MV78XX0_GPIO_START);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index 84db2df..65b72c4 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -44,9 +44,6 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
if (!variant_mask)
return;
- /* Initialize gpiolib. */
- orion_gpio_init();
-
printk(KERN_DEBUG "initial MPP regs:");
for (i = 0; i < MPP_NR_REGS; i++) {
mpp_ctrl[i] = readl(MPP_CTRL(i));
diff --git a/arch/arm/mach-orion5x/include/mach/gpio.h b/arch/arm/mach-orion5x/include/mach/gpio.h
index d8182e8..a1d0b78 100644
--- a/arch/arm/mach-orion5x/include/mach/gpio.h
+++ b/arch/arm/mach-orion5x/include/mach/gpio.h
@@ -6,32 +6,4 @@
* warranty of any kind, whether express or implied.
*/
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H
-
-#include <mach/irqs.h>
#include <plat/gpio.h>
-#include <asm-generic/gpio.h> /* cansleep wrappers */
-
-#define GPIO_MAX 32
-#define GPIO_OUT(pin) ORION5X_DEV_BUS_REG(0x100)
-#define GPIO_IO_CONF(pin) ORION5X_DEV_BUS_REG(0x104)
-#define GPIO_BLINK_EN(pin) ORION5X_DEV_BUS_REG(0x108)
-#define GPIO_IN_POL(pin) ORION5X_DEV_BUS_REG(0x10c)
-#define GPIO_DATA_IN(pin) ORION5X_DEV_BUS_REG(0x110)
-#define GPIO_EDGE_CAUSE(pin) ORION5X_DEV_BUS_REG(0x114)
-#define GPIO_EDGE_MASK(pin) ORION5X_DEV_BUS_REG(0x118)
-#define GPIO_LEVEL_MASK(pin) ORION5X_DEV_BUS_REG(0x11c)
-
-static inline int gpio_to_irq(int pin)
-{
- return pin + IRQ_ORION5X_GPIO_START;
-}
-
-static inline int irq_to_gpio(int irq)
-{
- return irq - IRQ_ORION5X_GPIO_START;
-}
-
-
-#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 2d87665..0a28bbc 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -73,6 +73,7 @@
#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x))
+#define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100)
#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600)
#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000)
#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000)
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index d7512b9..ed85891 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -28,27 +28,12 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
void __init orion5x_init_irq(void)
{
- int i;
-
orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
/*
- * Mask and clear GPIO IRQ interrupts
- */
- writel(0x0, GPIO_LEVEL_MASK(0));
- writel(0x0, GPIO_EDGE_MASK(0));
- writel(0x0, GPIO_EDGE_CAUSE(0));
-
- /*
- * Register chained level handlers for GPIO IRQs by default.
- * User can use set_type() if he wants to use edge types handlers.
+ * Initialize gpiolib for GPIOs 0-31.
*/
- for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) {
- set_irq_chip(i, &orion_gpio_irq_chip);
- set_irq_handler(i, handle_level_irq);
- irq_desc[i].status |= IRQ_LEVEL;
- set_irq_flags(i, IRQF_VALID);
- }
+ orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START);
set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index db485d3..2288207 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -124,9 +124,6 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
u32 mpp_8_15_ctrl = readl(MPP_8_15_CTRL);
u32 mpp_16_19_ctrl = readl(MPP_16_19_CTRL);
- /* Initialize gpiolib. */
- orion_gpio_init();
-
for ( ; mode->mpp >= 0; mode++) {
u32 *reg;
int num_type;
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index e814803..078894b 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -17,55 +17,123 @@
#include <linux/io.h>
#include <linux/gpio.h>
-static DEFINE_SPINLOCK(gpio_lock);
-static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];
-static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];
+/*
+ * GPIO unit register offsets.
+ */
+#define GPIO_OUT_OFF 0x0000
+#define GPIO_IO_CONF_OFF 0x0004
+#define GPIO_BLINK_EN_OFF 0x0008
+#define GPIO_IN_POL_OFF 0x000c
+#define GPIO_DATA_IN_OFF 0x0010
+#define GPIO_EDGE_CAUSE_OFF 0x0014
+#define GPIO_EDGE_MASK_OFF 0x0018
+#define GPIO_LEVEL_MASK_OFF 0x001c
+
+struct orion_gpio_chip {
+ struct gpio_chip chip;
+ spinlock_t lock;
+ void __iomem *base;
+ unsigned long valid_input;
+ unsigned long valid_output;
+ int mask_offset;
+ int secondary_irq_base;
+};
+
+static void __iomem *GPIO_OUT(struct orion_gpio_chip *ochip)
+{
+ return ochip->base + GPIO_OUT_OFF;
+}
+
+static void __iomem *GPIO_IO_CONF(struct orion_gpio_chip *ochip)
+{
+ return ochip->base + GPIO_IO_CONF_OFF;
+}
-static inline void __set_direction(unsigned pin, int input)
+static void __iomem *GPIO_BLINK_EN(struct orion_gpio_chip *ochip)
+{
+ return ochip->base + GPIO_BLINK_EN_OFF;
+}
+
+static void __iomem *GPIO_IN_POL(struct orion_gpio_chip *ochip)
+{
+ return ochip->base + GPIO_IN_POL_OFF;
+}
+
+static void __iomem *GPIO_DATA_IN(struct orion_gpio_chip *ochip)
+{
+ return ochip->base + GPIO_DATA_IN_OFF;
+}
+
+static void __iomem *GPIO_EDGE_CAUSE(struct orion_gpio_chip *ochip)
+{
+ return ochip->base + GPIO_EDGE_CAUSE_OFF;
+}
+
+static void __iomem *GPIO_EDGE_MASK(struct orion_gpio_chip *ochip)
+{
+ return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF;
+}
+
+static void __iomem *GPIO_LEVEL_MASK(struct orion_gpio_chip *ochip)
+{
+ return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF;
+}
+
+
+static struct orion_gpio_chip orion_gpio_chips[2];
+static int orion_gpio_chip_count;
+
+static inline void
+__set_direction(struct orion_gpio_chip *ochip, unsigned pin, int input)
{
u32 u;
- u = readl(GPIO_IO_CONF(pin));
+ u = readl(GPIO_IO_CONF(ochip));
if (input)
- u |= 1 << (pin & 31);
+ u |= 1 << pin;
else
- u &= ~(1 << (pin & 31));
- writel(u, GPIO_IO_CONF(pin));
+ u &= ~(1 << pin);
+ writel(u, GPIO_IO_CONF(ochip));
}
-static void __set_level(unsigned pin, int high)
+static void __set_level(struct orion_gpio_chip *ochip, unsigned pin, int high)
{
u32 u;
- u = readl(GPIO_OUT(pin));
+ u = readl(GPIO_OUT(ochip));
if (high)
- u |= 1 << (pin & 31);
+ u |= 1 << pin;
else
- u &= ~(1 << (pin & 31));
- writel(u, GPIO_OUT(pin));
+ u &= ~(1 << pin);
+ writel(u, GPIO_OUT(ochip));
}
-static inline void __set_blinking(unsigned pin, int blink)
+static inline void
+__set_blinking(struct orion_gpio_chip *ochip, unsigned pin, int blink)
{
u32 u;
- u = readl(GPIO_BLINK_EN(pin));
+ u = readl(GPIO_BLINK_EN(ochip));
if (blink)
- u |= 1 << (pin & 31);
+ u |= 1 << pin;
else
- u &= ~(1 << (pin & 31));
- writel(u, GPIO_BLINK_EN(pin));
+ u &= ~(1 << pin);
+ writel(u, GPIO_BLINK_EN(ochip));
}
-static inline int orion_gpio_is_valid(unsigned pin, int mode)
+static inline int
+orion_gpio_is_valid(struct orion_gpio_chip *ochip, unsigned pin, int mode)
{
- if (pin < GPIO_MAX) {
- if ((mode & GPIO_INPUT_OK) && !test_bit(pin, gpio_valid_input))
- goto err_out;
- if ((mode & GPIO_OUTPUT_OK) && !test_bit(pin, gpio_valid_output))
- goto err_out;
- return true;
- }
+ if (pin >= ochip->chip.ngpio)
+ goto err_out;
+
+ if ((mode & GPIO_INPUT_OK) && !test_bit(pin, &ochip->valid_input))
+ goto err_out;
+
+ if ((mode & GPIO_OUTPUT_OK) && !test_bit(pin, &ochip->valid_output))
+ goto err_out;
+
+ return 1;
err_out:
pr_debug("%s: invalid GPIO %d\n", __func__, pin);
@@ -75,134 +143,155 @@ err_out:
/*
* GENERIC_GPIO primitives.
*/
+static int orion_gpio_request(struct gpio_chip *chip, unsigned pin)
+{
+ struct orion_gpio_chip *ochip =
+ container_of(chip, struct orion_gpio_chip, chip);
+
+ if (orion_gpio_is_valid(ochip, pin, GPIO_INPUT_OK) ||
+ orion_gpio_is_valid(ochip, pin, GPIO_OUTPUT_OK))
+ return 0;
+
+ return -EINVAL;
+}
+
static int orion_gpio_direction_input(struct gpio_chip *chip, unsigned pin)
{
+ struct orion_gpio_chip *ochip =
+ container_of(chip, struct orion_gpio_chip, chip);
unsigned long flags;
- if (!orion_gpio_is_valid(pin, GPIO_INPUT_OK))
+ if (!orion_gpio_is_valid(ochip, pin, GPIO_INPUT_OK))
return -EINVAL;
- spin_lock_irqsave(&gpio_lock, flags);
-
- /* Configure GPIO direction. */
- __set_direction(pin, 1);
-
- spin_unlock_irqrestore(&gpio_lock, flags);
+ spin_lock_irqsave(&ochip->lock, flags);
+ __set_direction(ochip, pin, 1);
+ spin_unlock_irqrestore(&ochip->lock, flags);
return 0;
}
-static int orion_gpio_get_value(struct gpio_chip *chip, unsigned pin)
+static int orion_gpio_get(struct gpio_chip *chip, unsigned pin)
{
+ struct orion_gpio_chip *ochip =
+ container_of(chip, struct orion_gpio_chip, chip);
int val;
- if (readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31)))
- val = readl(GPIO_DATA_IN(pin)) ^ readl(GPIO_IN_POL(pin));
- else
- val = readl(GPIO_OUT(pin));
+ if (readl(GPIO_IO_CONF(ochip)) & (1 << pin)) {
+ val = readl(GPIO_DATA_IN(ochip)) ^ readl(GPIO_IN_POL(ochip));
+ } else {
+ val = readl(GPIO_OUT(ochip));
+ }
- return (val >> (pin & 31)) & 1;
+ return (val >> pin) & 1;
}
-static int orion_gpio_direction_output(struct gpio_chip *chip, unsigned pin,
- int value)
+static int
+orion_gpio_direction_output(struct gpio_chip *chip, unsigned pin, int value)
{
+ struct orion_gpio_chip *ochip =
+ container_of(chip, struct orion_gpio_chip, chip);
unsigned long flags;
- if (!orion_gpio_is_valid(pin, GPIO_OUTPUT_OK))
+ if (!orion_gpio_is_valid(ochip, pin, GPIO_OUTPUT_OK))
return -EINVAL;
- spin_lock_irqsave(&gpio_lock, flags);
-
- /* Disable blinking. */
- __set_blinking(pin, 0);
-
- /* Configure GPIO output value. */
- __set_level(pin, value);
-
- /* Configure GPIO direction. */
- __set_direction(pin, 0);
-
- spin_unlock_irqrestore(&gpio_lock, flags);
+ spin_lock_irqsave(&ochip->lock, flags);
+ __set_blinking(ochip, pin, 0);
+ __set_level(ochip, pin, value);
+ __set_direction(ochip, pin, 0);
+ spin_unlock_irqrestore(&ochip->lock, flags);
return 0;
}
-static void orion_gpio_set_value(struct gpio_chip *chip, unsigned pin,
- int value)
+static void orion_gpio_set(struct gpio_chip *chip, unsigned pin, int value)
{
+ struct orion_gpio_chip *ochip =
+ container_of(chip, struct orion_gpio_chip, chip);
unsigned long flags;
- spin_lock_irqsave(&gpio_lock, flags);
-
- /* Configure GPIO output value. */
- __set_level(pin, value);
-
- spin_unlock_irqrestore(&gpio_lock, flags);
+ spin_lock_irqsave(&ochip->lock, flags);
+ __set_level(ochip, pin, value);
+ spin_unlock_irqrestore(&ochip->lock, flags);
}
-static int orion_gpio_request(struct gpio_chip *chip, unsigned pin)
+static int orion_gpio_to_irq(struct gpio_chip *chip, unsigned pin)
{
- if (orion_gpio_is_valid(pin, GPIO_INPUT_OK) ||
- orion_gpio_is_valid(pin, GPIO_OUTPUT_OK))
- return 0;
- return -EINVAL;
-}
+ struct orion_gpio_chip *ochip =
+ container_of(chip, struct orion_gpio_chip, chip);
-static struct gpio_chip orion_gpiochip = {
- .label = "orion_gpio",
- .direction_input = orion_gpio_direction_input,
- .get = orion_gpio_get_value,
- .direction_output = orion_gpio_direction_output,
- .set = orion_gpio_set_value,
- .request = orion_gpio_request,
- .base = 0,
- .ngpio = GPIO_MAX,
- .can_sleep = 0,
-};
-
-void __init orion_gpio_init(void)
-{
- gpiochip_add(&orion_gpiochip);
+ return ochip->secondary_irq_base + pin;
}
+
/*
* Orion-specific GPIO API extensions.
*/
+static struct orion_gpio_chip *orion_gpio_chip_find(int pin)
+{
+ int i;
+
+ for (i = 0; i < orion_gpio_chip_count; i++) {
+ struct orion_gpio_chip *ochip = orion_gpio_chips + i;
+ struct gpio_chip *chip = &ochip->chip;
+
+ if (pin >= chip->base && pin < chip->base + chip->ngpio)
+ return ochip;
+ }
+
+ return NULL;
+}
+
void __init orion_gpio_set_unused(unsigned pin)
{
+ struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin);
+
+ if (ochip == NULL)
+ return;
+
+ pin -= ochip->chip.base;
+
/* Configure as output, drive low. */
- __set_level(pin, 0);
- __set_direction(pin, 0);
+ __set_level(ochip, pin, 0);
+ __set_direction(ochip, pin, 0);
}
void __init orion_gpio_set_valid(unsigned pin, int mode)
{
+ struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin);
+
+ if (ochip == NULL)
+ return;
+
+ pin -= ochip->chip.base;
+
if (mode == 1)
mode = GPIO_INPUT_OK | GPIO_OUTPUT_OK;
+
if (mode & GPIO_INPUT_OK)
- __set_bit(pin, gpio_valid_input);
+ __set_bit(pin, &ochip->valid_input);
else
- __clear_bit(pin, gpio_valid_input);
+ __clear_bit(pin, &ochip->valid_input);
+
if (mode & GPIO_OUTPUT_OK)
- __set_bit(pin, gpio_valid_output);
+ __set_bit(pin, &ochip->valid_output);
else
- __clear_bit(pin, gpio_valid_output);
+ __clear_bit(pin, &ochip->valid_output);
}
void orion_gpio_set_blink(unsigned pin, int blink)
{
+ struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin);
unsigned long flags;
- spin_lock_irqsave(&gpio_lock, flags);
-
- /* Set output value to zero. */
- __set_level(pin, 0);
+ if (ochip == NULL)
+ return;
- /* Set blinking. */
- __set_blinking(pin, blink);
-
- spin_unlock_irqrestore(&gpio_lock, flags);
+ spin_lock_irqsave(&ochip->lock, flags);
+ __set_level(ochip, pin, 0);
+ __set_blinking(ochip, pin, blink);
+ spin_unlock_irqrestore(&ochip->lock, flags);
}
EXPORT_SYMBOL(orion_gpio_set_blink);
@@ -232,62 +321,80 @@ EXPORT_SYMBOL(orion_gpio_set_blink);
* polarity LEVEL mask
*
****************************************************************************/
-
-static void gpio_irq_ack(u32 irq)
+static void gpio_irq_ack(struct irq_data *d)
{
- int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
+ struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
+ int type;
+
+ type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
- int pin = irq_to_gpio(irq);
- writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin));
+ int pin = d->irq - ochip->secondary_irq_base;
+
+ writel(~(1 << pin), GPIO_EDGE_CAUSE(ochip));
}
}
-static void gpio_irq_mask(u32 irq)
+static void gpio_irq_mask(struct irq_data *d)
{
- int pin = irq_to_gpio(irq);
- int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
- u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
- GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
- u32 u = readl(reg);
- u &= ~(1 << (pin & 31));
- writel(u, reg);
+ struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
+ int type;
+ void __iomem *reg;
+ int pin;
+
+ type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
+ if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
+ reg = GPIO_EDGE_MASK(ochip);
+ else
+ reg = GPIO_LEVEL_MASK(ochip);
+
+ pin = d->irq - ochip->secondary_irq_base;
+
+ writel(readl(reg) & ~(1 << pin), reg);
}
-static void gpio_irq_unmask(u32 irq)
+static void gpio_irq_unmask(struct irq_data *d)
{
- int pin = irq_to_gpio(irq);
- int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
- u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
- GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
- u32 u = readl(reg);
- u |= 1 << (pin & 31);
- writel(u, reg);
+ struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
+ int type;
+ void __iomem *reg;
+ int pin;
+
+ type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
+ if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
+ reg = GPIO_EDGE_MASK(ochip);
+ else
+ reg = GPIO_LEVEL_MASK(ochip);
+
+ pin = d->irq - ochip->secondary_irq_base;
+
+ writel(readl(reg) | (1 << pin), reg);
}
-static int gpio_irq_set_type(u32 irq, u32 type)
+static int gpio_irq_set_type(struct irq_data *d, u32 type)
{
- int pin = irq_to_gpio(irq);
- struct irq_desc *desc;
+ struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
+ int pin;
u32 u;
- u = readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31));
+ pin = d->irq - ochip->secondary_irq_base;
+
+ u = readl(GPIO_IO_CONF(ochip)) & (1 << pin);
if (!u) {
printk(KERN_ERR "orion gpio_irq_set_type failed "
- "(irq %d, pin %d).\n", irq, pin);
+ "(irq %d, pin %d).\n", d->irq, pin);
return -EINVAL;
}
- desc = irq_desc + irq;
-
/*
* Set edge/level type.
*/
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
- desc->handle_irq = handle_edge_irq;
+ set_irq_handler(d->irq, handle_edge_irq);
} else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
- desc->handle_irq = handle_level_irq;
+ set_irq_handler(d->irq, handle_level_irq);
} else {
- printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type);
+ printk(KERN_ERR "failed to set irq=%d (type=%d)\n",
+ d->irq, type);
return -EINVAL;
}
@@ -295,65 +402,121 @@ static int gpio_irq_set_type(u32 irq, u32 type)
* Configure interrupt polarity.
*/
if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH) {
- u = readl(GPIO_IN_POL(pin));
- u &= ~(1 << (pin & 31));
- writel(u, GPIO_IN_POL(pin));
+ u = readl(GPIO_IN_POL(ochip));
+ u &= ~(1 << pin);
+ writel(u, GPIO_IN_POL(ochip));
} else if (type == IRQ_TYPE_EDGE_FALLING || type == IRQ_TYPE_LEVEL_LOW) {
- u = readl(GPIO_IN_POL(pin));
- u |= 1 << (pin & 31);
- writel(u, GPIO_IN_POL(pin));
+ u = readl(GPIO_IN_POL(ochip));
+ u |= 1 << pin;
+ writel(u, GPIO_IN_POL(ochip));
} else if (type == IRQ_TYPE_EDGE_BOTH) {
u32 v;
- v = readl(GPIO_IN_POL(pin)) ^ readl(GPIO_DATA_IN(pin));
+ v = readl(GPIO_IN_POL(ochip)) ^ readl(GPIO_DATA_IN(ochip));
/*
* set initial polarity based on current input level
*/
- u = readl(GPIO_IN_POL(pin));
- if (v & (1 << (pin & 31)))
- u |= 1 << (pin & 31); /* falling */
+ u = readl(GPIO_IN_POL(ochip));
+ if (v & (1 << pin))
+ u |= 1 << pin; /* falling */
else
- u &= ~(1 << (pin & 31)); /* rising */
- writel(u, GPIO_IN_POL(pin));
+ u &= ~(1 << pin); /* rising */
+ writel(u, GPIO_IN_POL(ochip));
}
- desc->status = (desc->status & ~IRQ_TYPE_SENSE_MASK) | type;
-
return 0;
}
struct irq_chip orion_gpio_irq_chip = {
.name = "orion_gpio_irq",
- .ack = gpio_irq_ack,
- .mask = gpio_irq_mask,
- .unmask = gpio_irq_unmask,
- .set_type = gpio_irq_set_type,
+ .irq_ack = gpio_irq_ack,
+ .irq_mask = gpio_irq_mask,
+ .irq_unmask = gpio_irq_unmask,
+ .irq_set_type = gpio_irq_set_type,
};
+void __init orion_gpio_init(int gpio_base, int ngpio,
+ u32 base, int mask_offset, int secondary_irq_base)
+{
+ struct orion_gpio_chip *ochip;
+ int i;
+
+ if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
+ return;
+
+ ochip = orion_gpio_chips + orion_gpio_chip_count;
+ ochip->chip.label = "orion_gpio";
+ ochip->chip.request = orion_gpio_request;
+ ochip->chip.direction_input = orion_gpio_direction_input;
+ ochip->chip.get = orion_gpio_get;
+ ochip->chip.direction_output = orion_gpio_direction_output;
+ ochip->chip.set = orion_gpio_set;
+ ochip->chip.to_irq = orion_gpio_to_irq;
+ ochip->chip.base = gpio_base;
+ ochip->chip.ngpio = ngpio;
+ ochip->chip.can_sleep = 0;
+ spin_lock_init(&ochip->lock);
+ ochip->base = (void __iomem *)base;
+ ochip->valid_input = 0;
+ ochip->valid_output = 0;
+ ochip->mask_offset = mask_offset;
+ ochip->secondary_irq_base = secondary_irq_base;
+
+ gpiochip_add(&ochip->chip);
+
+ orion_gpio_chip_count++;
+
+ /*
+ * Mask and clear GPIO interrupts.
+ */
+ writel(0, GPIO_EDGE_CAUSE(ochip));
+ writel(0, GPIO_EDGE_MASK(ochip));
+ writel(0, GPIO_LEVEL_MASK(ochip));
+
+ for (i = 0; i < ngpio; i++) {
+ unsigned int irq = secondary_irq_base + i;
+
+ set_irq_chip(irq, &orion_gpio_irq_chip);
+ set_irq_handler(irq, handle_level_irq);
+ set_irq_chip_data(irq, ochip);
+ irq_desc[irq].status |= IRQ_LEVEL;
+ set_irq_flags(irq, IRQF_VALID);
+ }
+}
+
void orion_gpio_irq_handler(int pinoff)
{
+ struct orion_gpio_chip *ochip;
u32 cause;
- int pin;
+ int i;
- cause = readl(GPIO_DATA_IN(pinoff)) & readl(GPIO_LEVEL_MASK(pinoff));
- cause |= readl(GPIO_EDGE_CAUSE(pinoff)) & readl(GPIO_EDGE_MASK(pinoff));
+ ochip = orion_gpio_chip_find(pinoff);
+ if (ochip == NULL)
+ return;
- for (pin = pinoff; pin < pinoff + 8; pin++) {
- int irq = gpio_to_irq(pin);
- struct irq_desc *desc = irq_desc + irq;
+ cause = readl(GPIO_DATA_IN(ochip)) & readl(GPIO_LEVEL_MASK(ochip));
+ cause |= readl(GPIO_EDGE_CAUSE(ochip)) & readl(GPIO_EDGE_MASK(ochip));
- if (!(cause & (1 << (pin & 31))))
+ for (i = 0; i < ochip->chip.ngpio; i++) {
+ int irq;
+ struct irq_desc *desc;
+
+ irq = ochip->secondary_irq_base + i;
+
+ if (!(cause & (1 << i)))
continue;
+ desc = irq_desc + irq;
if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
/* Swap polarity (race with GPIO line) */
u32 polarity;
- polarity = readl(GPIO_IN_POL(pin));
- polarity ^= 1 << (pin & 31);
- writel(polarity, GPIO_IN_POL(pin));
+ polarity = readl(GPIO_IN_POL(ochip));
+ polarity ^= 1 << i;
+ writel(polarity, GPIO_IN_POL(ochip));
}
+
desc_handle_irq(irq, desc);
}
}
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h
index 07c430f..5578b98 100644
--- a/arch/arm/plat-orion/include/plat/gpio.h
+++ b/arch/arm/plat-orion/include/plat/gpio.h
@@ -12,6 +12,7 @@
#define __PLAT_GPIO_H
#include <linux/init.h>
+#include <asm-generic/gpio.h>
/*
* GENERIC_GPIO primitives.
@@ -19,6 +20,7 @@
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
+#define gpio_to_irq __gpio_to_irq
/*
* Orion-specific GPIO API extensions.
@@ -31,7 +33,8 @@ void orion_gpio_set_blink(unsigned pin, int blink);
void orion_gpio_set_valid(unsigned pin, int mode);
/* Initialize gpiolib. */
-void __init orion_gpio_init(void);
+void __init orion_gpio_init(int gpio_base, int ngpio,
+ u32 base, int mask_offset, int secondary_irq_base);
/*
* GPIO interrupt handling.
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 02/16] ARM: Remove dependency of plat-orion GPIO code on mach directory includes.
2010-12-15 2:02 ` [PATCH 02/16] ARM: Remove dependency of plat-orion GPIO " Lennert Buytenhek
@ 2010-12-15 8:08 ` Saeed Bishara
2010-12-15 9:10 ` Lennert Buytenhek
2010-12-15 15:34 ` Nicolas Pitre
0 siblings, 2 replies; 36+ messages in thread
From: Saeed Bishara @ 2010-12-15 8:08 UTC (permalink / raw)
To: linux-arm-kernel
>diff --git a/arch/arm/mach-dove/include/mach/dove.h
>b/arch/arm/mach-dove/include/mach/dove.h
>index f6a0839..df51131 100644
>--- a/arch/arm/mach-dove/include/mach/dove.h
>+++ b/arch/arm/mach-dove/include/mach/dove.h
>@@ -130,7 +130,8 @@
> #define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
> #define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014)
> #define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018)
>-#define DOVE_GPIO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
>+#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
>| 0xd0400)
>+#define DOVE_GPIO_HI_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
>| 0xd0420)
> #define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
>| 0xe803c)
> #define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
> #define DOVE_NAND_GPIO_EN (1 << 0)
>diff --git a/arch/arm/mach-dove/include/mach/gpio.h
>b/arch/arm/mach-dove/include/mach/gpio.h
>index 0ee70ff..e7e5101 100644
>--- a/arch/arm/mach-dove/include/mach/gpio.h
>+++ b/arch/arm/mach-dove/include/mach/gpio.h
Lennert, this patch conflicts with 2 paches sent by Mike that deal with dove gpio/mpp
[PATCH v4 1/2] [ARM] Dove: add support for GPIOs 64-71
[PATCH v3 2/2] [ARM] Dove: add support for multi-purpose pins configuration
Nico, I've acked those patches but didn't notice that it wasn't merged in the orion git.
Can you please merge it.
saeed
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 02/16] ARM: Remove dependency of plat-orion GPIO code on mach directory includes.
2010-12-15 8:08 ` Saeed Bishara
@ 2010-12-15 9:10 ` Lennert Buytenhek
2010-12-15 15:34 ` Nicolas Pitre
1 sibling, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 9:10 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 15, 2010 at 10:08:51AM +0200, Saeed Bishara wrote:
> >diff --git a/arch/arm/mach-dove/include/mach/dove.h
> >b/arch/arm/mach-dove/include/mach/dove.h
> >index f6a0839..df51131 100644
> >--- a/arch/arm/mach-dove/include/mach/dove.h
> >+++ b/arch/arm/mach-dove/include/mach/dove.h
> >@@ -130,7 +130,8 @@
> > #define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
> > #define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014)
> > #define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018)
> >-#define DOVE_GPIO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
> >+#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
> >| 0xd0400)
> >+#define DOVE_GPIO_HI_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
> >| 0xd0420)
> > #define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
> >| 0xe803c)
> > #define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
> > #define DOVE_NAND_GPIO_EN (1 << 0)
> >diff --git a/arch/arm/mach-dove/include/mach/gpio.h
> >b/arch/arm/mach-dove/include/mach/gpio.h
> >index 0ee70ff..e7e5101 100644
> >--- a/arch/arm/mach-dove/include/mach/gpio.h
> >+++ b/arch/arm/mach-dove/include/mach/gpio.h
>
> Lennert, this patch conflicts with 2 paches sent by Mike that deal with dove gpio/mpp
> [PATCH v4 1/2] [ARM] Dove: add support for GPIOs 64-71
> [PATCH v3 2/2] [ARM] Dove: add support for multi-purpose pins configuration
>
> Nico, I've acked those patches but didn't notice that it wasn't merged in the orion git.
> Can you please merge it.
OK, I'll rework this patch once they are merged.
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 02/16] ARM: Remove dependency of plat-orion GPIO code on mach directory includes.
2010-12-15 8:08 ` Saeed Bishara
2010-12-15 9:10 ` Lennert Buytenhek
@ 2010-12-15 15:34 ` Nicolas Pitre
1 sibling, 0 replies; 36+ messages in thread
From: Nicolas Pitre @ 2010-12-15 15:34 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 15 Dec 2010, Saeed Bishara wrote:
> >diff --git a/arch/arm/mach-dove/include/mach/dove.h
> >b/arch/arm/mach-dove/include/mach/dove.h
> >index f6a0839..df51131 100644
> >--- a/arch/arm/mach-dove/include/mach/dove.h
> >+++ b/arch/arm/mach-dove/include/mach/dove.h
> >@@ -130,7 +130,8 @@
> > #define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
> > #define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014)
> > #define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018)
> >-#define DOVE_GPIO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
> >+#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
> >| 0xd0400)
> >+#define DOVE_GPIO_HI_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
> >| 0xd0420)
> > #define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE
> >| 0xe803c)
> > #define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
> > #define DOVE_NAND_GPIO_EN (1 << 0)
> >diff --git a/arch/arm/mach-dove/include/mach/gpio.h
> >b/arch/arm/mach-dove/include/mach/gpio.h
> >index 0ee70ff..e7e5101 100644
> >--- a/arch/arm/mach-dove/include/mach/gpio.h
> >+++ b/arch/arm/mach-dove/include/mach/gpio.h
>
> Lennert, this patch conflicts with 2 paches sent by Mike that deal with dove gpio/mpp
> [PATCH v4 1/2] [ARM] Dove: add support for GPIOs 64-71
> [PATCH v3 2/2] [ARM] Dove: add support for multi-purpose pins configuration
>
> Nico, I've acked those patches but didn't notice that it wasn't merged in the orion git.
> Can you please merge it.
Oops, sorry. They are merged now.
BTW don't hesitate to ping me if things don't appear in a timely manner.
Nicolas
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 03/16] ARM: Remove some spurious mach dir includes.
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
2010-12-15 2:02 ` [PATCH 01/16] ARM: Remove dependency of plat-orion time code on mach directory includes Lennert Buytenhek
2010-12-15 2:02 ` [PATCH 02/16] ARM: Remove dependency of plat-orion GPIO " Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 2:03 ` [PATCH 04/16] ARM: Dove: Remove PXA compatibility IRQ defines Lennert Buytenhek
` (12 subsequent siblings)
15 siblings, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/include/asm/mc146818rtc.h | 1 -
arch/arm/plat-orion/pcie.c | 1 -
2 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/mc146818rtc.h b/arch/arm/include/asm/mc146818rtc.h
index 6b884d2..d535470 100644
--- a/arch/arm/include/asm/mc146818rtc.h
+++ b/arch/arm/include/asm/mc146818rtc.h
@@ -5,7 +5,6 @@
#define _ASM_MC146818RTC_H
#include <linux/io.h>
-#include <mach/irqs.h>
#ifndef RTC_PORT
#define RTC_PORT(x) (0x70 + (x))
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index af2d733..cf670f3 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/mbus.h>
-#include <asm/mach/pci.h>
#include <plat/pcie.h>
#include <linux/delay.h>
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 04/16] ARM: Dove: Remove PXA compatibility IRQ defines.
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (2 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 03/16] ARM: Remove some spurious mach dir includes Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 8:10 ` Saeed Bishara
2010-12-15 13:13 ` Sergei Shtylyov
2010-12-15 2:03 ` [PATCH 05/16] ARM: Always reassign PCI bus numbers Lennert Buytenhek
` (11 subsequent siblings)
15 siblings, 2 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
These are not currently used anywhere, but when the relevant
peripherals are enabled on the Dove port, the IRQ numbers should be
passed into the drivers via platform device resources rather than
having the drivers get them from platform headers directly.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-dove/include/mach/irqs.h | 7 +------
1 files changed, 1 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-dove/include/mach/irqs.h b/arch/arm/mach-dove/include/mach/irqs.h
index 4668146..03d401d 100644
--- a/arch/arm/mach-dove/include/mach/irqs.h
+++ b/arch/arm/mach-dove/include/mach/irqs.h
@@ -92,10 +92,5 @@
#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS)
-/* Required for compatability with PXA AC97 driver. */
-#define IRQ_AC97 IRQ_DOVE_AC97
-/* Required for compatability with PXA DMA driver. */
-#define IRQ_DMA IRQ_DOVE_PDMA
-/* Required for compatability with PXA NAND driver */
-#define IRQ_NAND IRQ_DOVE_NAND
+
#endif
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 04/16] ARM: Dove: Remove PXA compatibility IRQ defines.
2010-12-15 2:03 ` [PATCH 04/16] ARM: Dove: Remove PXA compatibility IRQ defines Lennert Buytenhek
@ 2010-12-15 8:10 ` Saeed Bishara
2010-12-15 13:13 ` Sergei Shtylyov
1 sibling, 0 replies; 36+ messages in thread
From: Saeed Bishara @ 2010-12-15 8:10 UTC (permalink / raw)
To: linux-arm-kernel
>-----Original Message-----
>From: Lennert Buytenhek [mailto:buytenh at wantstofly.org]
>Sent: Wednesday, December 15, 2010 4:03 AM
>To: Saeed Bishara
>Cc: linux-arm-kernel at lists.infradead.org
>Subject: [PATCH 04/16] ARM: Dove: Remove PXA compatibility IRQ defines.
>
>These are not currently used anywhere, but when the relevant
>peripherals are enabled on the Dove port, the IRQ numbers should be
>passed into the drivers via platform device resources rather than
>having the drivers get them from platform headers directly.
>
>Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
>---
> arch/arm/mach-dove/include/mach/irqs.h | 7 +------
> 1 files changed, 1 insertions(+), 6 deletions(-)
>
>diff --git a/arch/arm/mach-dove/include/mach/irqs.h
>b/arch/arm/mach-dove/include/mach/irqs.h
>index 4668146..03d401d 100644
>--- a/arch/arm/mach-dove/include/mach/irqs.h
>+++ b/arch/arm/mach-dove/include/mach/irqs.h
>@@ -92,10 +92,5 @@
>
> #define NR_IRQS (IRQ_DOVE_PMU_START +
>NR_PMU_IRQS)
>
>-/* Required for compatability with PXA AC97 driver. */
>-#define IRQ_AC97 IRQ_DOVE_AC97
>-/* Required for compatability with PXA DMA driver. */
>-#define IRQ_DMA IRQ_DOVE_PDMA
>-/* Required for compatability with PXA NAND driver */
>-#define IRQ_NAND IRQ_DOVE_NAND
>+
> #endif
>--
Acked-by: Saeed Bishara <saeed@marvell.com>
saeed
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 04/16] ARM: Dove: Remove PXA compatibility IRQ defines.
2010-12-15 2:03 ` [PATCH 04/16] ARM: Dove: Remove PXA compatibility IRQ defines Lennert Buytenhek
2010-12-15 8:10 ` Saeed Bishara
@ 2010-12-15 13:13 ` Sergei Shtylyov
1 sibling, 0 replies; 36+ messages in thread
From: Sergei Shtylyov @ 2010-12-15 13:13 UTC (permalink / raw)
To: linux-arm-kernel
Hello.
On 15-12-2010 5:03, Lennert Buytenhek wrote:
> These are not currently used anywhere, but when the relevant
> peripherals are enabled on the Dove port, the IRQ numbers should be
> passed into the drivers via platform device resources rather than
> having the drivers get them from platform headers directly.
> Signed-off-by: Lennert Buytenhek<buytenh@secretlab.ca>
[...]
> diff --git a/arch/arm/mach-dove/include/mach/irqs.h b/arch/arm/mach-dove/include/mach/irqs.h
> index 4668146..03d401d 100644
> --- a/arch/arm/mach-dove/include/mach/irqs.h
> +++ b/arch/arm/mach-dove/include/mach/irqs.h
> @@ -92,10 +92,5 @@
>
> #define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS)
>
> -/* Required for compatability with PXA AC97 driver. */
> -#define IRQ_AC97 IRQ_DOVE_AC97
> -/* Required for compatability with PXA DMA driver. */
> -#define IRQ_DMA IRQ_DOVE_PDMA
> -/* Required for compatability with PXA NAND driver */
> -#define IRQ_NAND IRQ_DOVE_NAND
> +
The second new line is not needed here.
> #endif
WBR, Sergei
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 05/16] ARM: Always reassign PCI bus numbers.
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (3 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 04/16] ARM: Dove: Remove PXA compatibility IRQ defines Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 2:03 ` [PATCH 06/16] ARM: iop13xx: Make PCIBIOS_MIN_* constants Lennert Buytenhek
` (10 subsequent siblings)
15 siblings, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Out of all ARM platforms that implement pcibios_assign_all_busses(),
only three currently define it to zero:
- ep93xx, but this platform doesn't even support PCI.
- ixp2000 and ixp23xx, but while these platforms have restrictions
on Linux reallocating BARs (which is problematic as there are
several very large BARs in the PCI domain), there aren't really
any restrictions on Linux reassigning bus numbers.
Therefore, this commit moves the definition of
pcibios_assign_all_busses() from the per-mach include directories
to <asm/pci.h>, and makes it always return 1.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/include/asm/pci.h | 5 +++++
arch/arm/mach-bcmring/include/mach/hardware.h | 2 --
arch/arm/mach-cns3xxx/include/mach/hardware.h | 1 -
arch/arm/mach-dove/include/mach/hardware.h | 2 --
arch/arm/mach-ep93xx/include/mach/hardware.h | 2 --
| 2 --
arch/arm/mach-integrator/include/mach/hardware.h | 2 --
arch/arm/mach-iop13xx/include/mach/hardware.h | 2 --
arch/arm/mach-iop32x/include/mach/hardware.h | 1 -
arch/arm/mach-iop33x/include/mach/hardware.h | 1 -
arch/arm/mach-ixp2000/include/mach/hardware.h | 2 --
arch/arm/mach-ixp23xx/include/mach/hardware.h | 2 --
arch/arm/mach-ixp4xx/include/mach/hardware.h | 2 --
arch/arm/mach-kirkwood/include/mach/hardware.h | 2 --
arch/arm/mach-ks8695/include/mach/hardware.h | 2 --
arch/arm/mach-mv78xx0/include/mach/hardware.h | 2 --
arch/arm/mach-orion5x/include/mach/hardware.h | 2 --
arch/arm/mach-pxa/include/mach/hardware.h | 1 -
arch/arm/mach-shark/include/mach/hardware.h | 2 --
arch/arm/mach-tegra/include/mach/hardware.h | 1 -
arch/arm/mach-versatile/include/mach/hardware.h | 2 --
21 files changed, 5 insertions(+), 35 deletions(-)
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 92e2a83..038da6e 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -33,6 +33,11 @@ static inline void pcibios_set_master(struct pci_dev *dev)
}
#endif
+static inline int pcibios_assign_all_busses(void)
+{
+ return 1;
+}
+
static inline void pcibios_penalize_isa_irq(int irq, int active)
{
/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/arm/mach-bcmring/include/mach/hardware.h b/arch/arm/mach-bcmring/include/mach/hardware.h
index 447eb34..70b9f6f 100644
--- a/arch/arm/mach-bcmring/include/mach/hardware.h
+++ b/arch/arm/mach-bcmring/include/mach/hardware.h
@@ -36,8 +36,6 @@
#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
#define RAM_BASE PAGE_OFFSET
-#define pcibios_assign_all_busses() 1
-
/* Macros to make managing spinlocks a bit more controlled in terms of naming. */
/* See reg_gpio.h, reg_irq.h, arch.c, gpio.c for example usage. */
#if defined(__KERNEL__)
diff --git a/arch/arm/mach-cns3xxx/include/mach/hardware.h b/arch/arm/mach-cns3xxx/include/mach/hardware.h
index 57e0983..82a0d4e 100644
--- a/arch/arm/mach-cns3xxx/include/mach/hardware.h
+++ b/arch/arm/mach-cns3xxx/include/mach/hardware.h
@@ -17,6 +17,5 @@
/* macro to get at IO space when running virtually */
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
-#define pcibios_assign_all_busses() 1
#endif
diff --git a/arch/arm/mach-dove/include/mach/hardware.h b/arch/arm/mach-dove/include/mach/hardware.h
index 32b0826..f619fb9 100644
--- a/arch/arm/mach-dove/include/mach/hardware.h
+++ b/arch/arm/mach-dove/include/mach/hardware.h
@@ -11,8 +11,6 @@
#include "dove.h"
-#define pcibios_assign_all_busses() 1
-
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x01000000
#define PCIMEM_BASE DOVE_PCIE0_MEM_PHYS_BASE
diff --git a/arch/arm/mach-ep93xx/include/mach/hardware.h b/arch/arm/mach-ep93xx/include/mach/hardware.h
index 5a3ce02..4df8428 100644
--- a/arch/arm/mach-ep93xx/include/mach/hardware.h
+++ b/arch/arm/mach-ep93xx/include/mach/hardware.h
@@ -8,8 +8,6 @@
#include <mach/ep93xx-regs.h>
#include <mach/platform.h>
-#define pcibios_assign_all_busses() 0
-
/*
* The EP93xx has two external crystal oscillators. To generate the
* required high-frequency clocks, the processor uses two phase-locked-
--git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index 51dd902..541aa70 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -93,8 +93,6 @@ extern unsigned int nw_gpio_read(void);
extern void nw_cpld_modify(unsigned int mask, unsigned int set);
#endif
-#define pcibios_assign_all_busses() 1
-
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x81000000
diff --git a/arch/arm/mach-integrator/include/mach/hardware.h b/arch/arm/mach-integrator/include/mach/hardware.h
index 57f51ba..37323ea 100644
--- a/arch/arm/mach-integrator/include/mach/hardware.h
+++ b/arch/arm/mach-integrator/include/mach/hardware.h
@@ -34,8 +34,6 @@
#define PCIMEM_BASE PCI_MEMORY_VADDR
-#define pcibios_assign_all_busses() 1
-
#define PCIBIOS_MIN_IO 0x6000
#define PCIBIOS_MIN_MEM 0x00100000
diff --git a/arch/arm/mach-iop13xx/include/mach/hardware.h b/arch/arm/mach-iop13xx/include/mach/hardware.h
index 8e1d562..ba81e50 100644
--- a/arch/arm/mach-iop13xx/include/mach/hardware.h
+++ b/arch/arm/mach-iop13xx/include/mach/hardware.h
@@ -2,8 +2,6 @@
#define __ASM_ARCH_HARDWARE_H
#include <asm/types.h>
-#define pcibios_assign_all_busses() 1
-
#ifndef __ASSEMBLY__
extern unsigned long iop13xx_pcibios_min_io;
extern unsigned long iop13xx_pcibios_min_mem;
diff --git a/arch/arm/mach-iop32x/include/mach/hardware.h b/arch/arm/mach-iop32x/include/mach/hardware.h
index d559c4e..e68bf97 100644
--- a/arch/arm/mach-iop32x/include/mach/hardware.h
+++ b/arch/arm/mach-iop32x/include/mach/hardware.h
@@ -18,7 +18,6 @@
* but when we read them, we convert them to virtual addresses. See
* arch/arm/plat-iop/pci.c.
*/
-#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
diff --git a/arch/arm/mach-iop33x/include/mach/hardware.h b/arch/arm/mach-iop33x/include/mach/hardware.h
index 8c10e43..215065b 100644
--- a/arch/arm/mach-iop33x/include/mach/hardware.h
+++ b/arch/arm/mach-iop33x/include/mach/hardware.h
@@ -18,7 +18,6 @@
* but when we read them, we convert them to virtual addresses. See
* arch/arm/mach-iop3xx/iop3xx-pci.c
*/
-#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
diff --git a/arch/arm/mach-ixp2000/include/mach/hardware.h b/arch/arm/mach-ixp2000/include/mach/hardware.h
index f033de4..6c92008 100644
--- a/arch/arm/mach-ixp2000/include/mach/hardware.h
+++ b/arch/arm/mach-ixp2000/include/mach/hardware.h
@@ -27,8 +27,6 @@
#include "ixp2000-regs.h" /* Chipset Registers */
-#define pcibios_assign_all_busses() 0
-
/*
* Platform helper functions
*/
diff --git a/arch/arm/mach-ixp23xx/include/mach/hardware.h b/arch/arm/mach-ixp23xx/include/mach/hardware.h
index 57b508b..b8bb781 100644
--- a/arch/arm/mach-ixp23xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp23xx/include/mach/hardware.h
@@ -20,8 +20,6 @@
#include "ixp23xx.h"
-#define pcibios_assign_all_busses() 0
-
/*
* Platform helper functions
*/
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index 8138371..163e506 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -28,8 +28,6 @@
#define ARCH_HAS_DMA_SET_COHERENT_MASK
-#define pcibios_assign_all_busses() 1
-
/* Register locations and bits */
#include "ixp4xx-regs.h"
diff --git a/arch/arm/mach-kirkwood/include/mach/hardware.h b/arch/arm/mach-kirkwood/include/mach/hardware.h
index cde8528..79f0641 100644
--- a/arch/arm/mach-kirkwood/include/mach/hardware.h
+++ b/arch/arm/mach-kirkwood/include/mach/hardware.h
@@ -11,8 +11,6 @@
#include "kirkwood.h"
-#define pcibios_assign_all_busses() 1
-
#define PCIBIOS_MIN_IO 0x00001000
#define PCIBIOS_MIN_MEM 0x01000000
#define PCIMEM_BASE KIRKWOOD_PCIE_MEM_PHYS_BASE /* mem base for VGA */
diff --git a/arch/arm/mach-ks8695/include/mach/hardware.h b/arch/arm/mach-ks8695/include/mach/hardware.h
index e0f911d..a46be88 100644
--- a/arch/arm/mach-ks8695/include/mach/hardware.h
+++ b/arch/arm/mach-ks8695/include/mach/hardware.h
@@ -46,8 +46,6 @@
/*
* PCI support
*/
-#define pcibios_assign_all_busses() 1
-
#define PCIBIOS_MIN_IO 0
#define PCIBIOS_MIN_MEM 0
diff --git a/arch/arm/mach-mv78xx0/include/mach/hardware.h b/arch/arm/mach-mv78xx0/include/mach/hardware.h
index 5d88755..c76b93f 100644
--- a/arch/arm/mach-mv78xx0/include/mach/hardware.h
+++ b/arch/arm/mach-mv78xx0/include/mach/hardware.h
@@ -11,8 +11,6 @@
#include "mv78xx0.h"
-#define pcibios_assign_all_busses() 1
-
#define PCIBIOS_MIN_IO 0x00001000
#define PCIBIOS_MIN_MEM 0x01000000
#define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */
diff --git a/arch/arm/mach-orion5x/include/mach/hardware.h b/arch/arm/mach-orion5x/include/mach/hardware.h
index e51aaf4..a42b743 100644
--- a/arch/arm/mach-orion5x/include/mach/hardware.h
+++ b/arch/arm/mach-orion5x/include/mach/hardware.h
@@ -11,8 +11,6 @@
#include "orion5x.h"
-#define pcibios_assign_all_busses() 1
-
#define PCIBIOS_MIN_IO 0x00001000
#define PCIBIOS_MIN_MEM 0x01000000
#define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 814f145..ad448af 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -320,7 +320,6 @@ extern unsigned long get_clock_tick_rate(void);
#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
#define PCIBIOS_MIN_IO 0
#define PCIBIOS_MIN_MEM 0
-#define pcibios_assign_all_busses() 1
#define ARCH_HAS_DMA_SET_COHERENT_MASK
#endif
diff --git a/arch/arm/mach-shark/include/mach/hardware.h b/arch/arm/mach-shark/include/mach/hardware.h
index 94d84b2..24639ce 100644
--- a/arch/arm/mach-shark/include/mach/hardware.h
+++ b/arch/arm/mach-shark/include/mach/hardware.h
@@ -12,8 +12,6 @@
#define UNCACHEABLE_ADDR 0xdf010000
-#define pcibios_assign_all_busses() 1
-
#define PCIBIOS_MIN_IO 0x6000
#define PCIBIOS_MIN_MEM 0x50000000
#define PCIMEM_BASE 0xe8000000
diff --git a/arch/arm/mach-tegra/include/mach/hardware.h b/arch/arm/mach-tegra/include/mach/hardware.h
index 56e43b3..84c2658 100644
--- a/arch/arm/mach-tegra/include/mach/hardware.h
+++ b/arch/arm/mach-tegra/include/mach/hardware.h
@@ -23,6 +23,5 @@
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0
-#define pcibios_assign_all_busses() 1
#endif
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index b5e75bb..74e0ea8 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -34,8 +34,6 @@
#define PCIBIOS_MIN_IO 0x44000000
#define PCIBIOS_MIN_MEM 0x50000000
-#define pcibios_assign_all_busses() 1
-
/* macro to get at IO space when running virtually */
#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 06/16] ARM: iop13xx: Make PCIBIOS_MIN_* constants.
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (4 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 05/16] ARM: Always reassign PCI bus numbers Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 2:03 ` [PATCH 07/16] ARM: Make PCIBIOS_* into global variables Lennert Buytenhek
` (9 subsequent siblings)
15 siblings, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
iop13xx does a dance with PCIBIOS_MIN_* by defining them to global
variables iop13xx_pcibios_min_{io,mem} so that they can be conditionally
assigned, but that isn't ever done -- iop13xx_pci_init() never sets
iop13xx_pcibios_min_io, leaving it at its default value of zero, and
unconditionally sets iop13xx_pcibios_min_mem to IOP13XX_PCIX_LOWER_MEM_BA.
So, just define these statically.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-iop13xx/include/mach/hardware.h | 6 ++----
arch/arm/mach-iop13xx/pci.c | 5 -----
2 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-iop13xx/include/mach/hardware.h b/arch/arm/mach-iop13xx/include/mach/hardware.h
index ba81e50..8e8ec74 100644
--- a/arch/arm/mach-iop13xx/include/mach/hardware.h
+++ b/arch/arm/mach-iop13xx/include/mach/hardware.h
@@ -3,14 +3,12 @@
#include <asm/types.h>
#ifndef __ASSEMBLY__
-extern unsigned long iop13xx_pcibios_min_io;
-extern unsigned long iop13xx_pcibios_min_mem;
extern u16 iop13xx_dev_id(void);
extern void iop13xx_set_atu_mmr_bases(void);
#endif
-#define PCIBIOS_MIN_IO (iop13xx_pcibios_min_io)
-#define PCIBIOS_MIN_MEM (iop13xx_pcibios_min_mem)
+#define PCIBIOS_MIN_IO 0x00000000
+#define PCIBIOS_MIN_MEM IOP13XX_PCIX_LOWER_MEM_BA
/*
* Generic chipset bits
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 773ea0c..f21ef82 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -39,8 +39,6 @@ u32 iop13xx_atue_mem_base;
u32 iop13xx_atux_mem_base;
size_t iop13xx_atue_mem_size;
size_t iop13xx_atux_mem_size;
-unsigned long iop13xx_pcibios_min_io = 0;
-unsigned long iop13xx_pcibios_min_mem = 0;
EXPORT_SYMBOL(iop13xx_atue_mem_base);
EXPORT_SYMBOL(iop13xx_atux_mem_base);
@@ -970,9 +968,6 @@ void __init iop13xx_pci_init(void)
/* clear pre-existing south bridge errors */
__raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR);
- /* Setup the Min Address for PCI memory... */
- iop13xx_pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA;
-
/* if Linux is given control of an ATU
* clear out its prior configuration,
* otherwise do not touch the registers
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 07/16] ARM: Make PCIBIOS_* into global variables.
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (5 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 06/16] ARM: iop13xx: Make PCIBIOS_MIN_* constants Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-16 6:51 ` Mike Rapoport
2010-12-15 2:03 ` [PATCH 08/16] ARM: at91: Switch over to gpiolib ->to_irq() and __gpio_to_irq() Lennert Buytenhek
` (8 subsequent siblings)
15 siblings, 1 reply; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
From: Eric Miao <eric.miao@canonical.com>
And initialized with pci_common_init(), so that now <asm/pci.h>
doesn't depend on <mach/hardware.h> any more.
Signed-off-by: Eric Miao <eric.miao@canonical.com>
[ buytenh at wantstofly.org: adapt to "Always reassign PCI bus numbers"
change, added support for cns3xxx, ixp4xx/vulcan-pci.c, mv78xx0,
tegra, rename platform PCIBIOS_MIN_* defines to avoid namespace
clashes, rename the arch-wide global variables themselves to
PCIBIOS_MIN_* to match mips/sh, build fixes. ]
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/include/asm/mach/pci.h | 2 +-
arch/arm/include/asm/pci.h | 4 +++-
arch/arm/kernel/bios32.c | 12 +++++++++++-
arch/arm/mach-cns3xxx/include/mach/hardware.h | 5 +++--
arch/arm/mach-cns3xxx/pcie.c | 4 +++-
arch/arm/mach-dove/include/mach/hardware.h | 5 +++--
arch/arm/mach-dove/pcie.c | 3 ++-
| 8 ++++++--
| 8 ++++++--
| 4 ++--
| 8 ++++++--
| 8 ++++++--
arch/arm/mach-integrator/include/mach/hardware.h | 4 ++--
arch/arm/mach-integrator/pci.c | 8 ++++++--
arch/arm/mach-iop13xx/include/mach/hardware.h | 4 ++--
arch/arm/mach-iop13xx/iq81340mc.c | 3 ++-
arch/arm/mach-iop13xx/iq81340sc.c | 3 ++-
arch/arm/mach-iop32x/em7210.c | 6 ++++--
arch/arm/mach-iop32x/glantank.c | 6 ++++--
arch/arm/mach-iop32x/include/mach/hardware.h | 4 ++--
arch/arm/mach-iop32x/iq31244.c | 9 +++++----
arch/arm/mach-iop32x/iq80321.c | 6 ++++--
arch/arm/mach-iop32x/n2100.c | 6 ++++--
arch/arm/mach-iop33x/include/mach/hardware.h | 4 ++--
arch/arm/mach-iop33x/iq80331.c | 6 ++++--
arch/arm/mach-iop33x/iq80332.c | 6 ++++--
arch/arm/mach-ixp2000/enp2611.c | 6 ++++--
arch/arm/mach-ixp2000/include/mach/hardware.h | 4 ++--
arch/arm/mach-ixp2000/ixdp2400.c | 6 ++++--
arch/arm/mach-ixp2000/ixdp2800.c | 4 +++-
arch/arm/mach-ixp2000/ixdp2x01.c | 6 ++++--
arch/arm/mach-ixp23xx/include/mach/hardware.h | 4 ++--
arch/arm/mach-ixp23xx/ixdp2351.c | 6 ++++--
arch/arm/mach-ixp23xx/roadrunner.c | 6 ++++--
arch/arm/mach-ixp4xx/avila-pci.c | 7 +++++--
arch/arm/mach-ixp4xx/common-pci.c | 4 ++--
arch/arm/mach-ixp4xx/coyote-pci.c | 7 +++++--
arch/arm/mach-ixp4xx/dsmg600-pci.c | 7 +++++--
arch/arm/mach-ixp4xx/fsg-pci.c | 8 ++++++--
arch/arm/mach-ixp4xx/gateway7001-pci.c | 7 +++++--
arch/arm/mach-ixp4xx/goramo_mlr.c | 8 ++++++--
arch/arm/mach-ixp4xx/gtwx5715-pci.c | 6 ++++--
arch/arm/mach-ixp4xx/include/mach/hardware.h | 10 +++++-----
arch/arm/mach-ixp4xx/include/mach/io.h | 2 +-
arch/arm/mach-ixp4xx/ixdp425-pci.c | 7 +++++--
arch/arm/mach-ixp4xx/ixdpg425-pci.c | 7 +++++--
arch/arm/mach-ixp4xx/nas100d-pci.c | 7 +++++--
arch/arm/mach-ixp4xx/nslu2-pci.c | 7 +++++--
arch/arm/mach-ixp4xx/vulcan-pci.c | 8 ++++++--
arch/arm/mach-ixp4xx/wg302v2-pci.c | 7 +++++--
arch/arm/mach-kirkwood/include/mach/hardware.h | 5 +++--
arch/arm/mach-kirkwood/pcie.c | 4 +++-
arch/arm/mach-ks8695/include/mach/hardware.h | 4 ++--
arch/arm/mach-ks8695/pci.c | 3 ++-
arch/arm/mach-mv78xx0/include/mach/hardware.h | 5 +++--
arch/arm/mach-mv78xx0/pcie.c | 4 +++-
arch/arm/mach-orion5x/db88f5281-setup.c | 7 +++++--
arch/arm/mach-orion5x/dns323-setup.c | 7 +++++--
arch/arm/mach-orion5x/include/mach/hardware.h | 7 ++++---
arch/arm/mach-orion5x/kurobox_pro-setup.c | 4 +++-
arch/arm/mach-orion5x/mss2-setup.c | 7 +++++--
arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 4 +++-
arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 4 +++-
arch/arm/mach-orion5x/rd88f5182-setup.c | 7 +++++--
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 4 +++-
arch/arm/mach-orion5x/terastation_pro2-setup.c | 7 +++++--
arch/arm/mach-orion5x/ts209-setup.c | 7 +++++--
arch/arm/mach-orion5x/ts409-setup.c | 7 +++++--
arch/arm/mach-orion5x/wnr854t-setup.c | 7 +++++--
arch/arm/mach-orion5x/wrt350n-v2-setup.c | 7 +++++--
arch/arm/mach-pxa/cm-x2xx-pci.c | 8 ++++++--
arch/arm/mach-pxa/include/mach/hardware.h | 4 ++--
arch/arm/mach-shark/include/mach/hardware.h | 5 +++--
arch/arm/mach-shark/pci.c | 8 ++++++--
arch/arm/mach-tegra/include/mach/hardware.h | 5 +++--
arch/arm/mach-tegra/pcie.c | 8 +++++---
arch/arm/mach-versatile/include/mach/hardware.h | 4 ++--
arch/arm/mach-versatile/pci.c | 4 +++-
78 files changed, 308 insertions(+), 146 deletions(-)
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 16330bd..d16e81a 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -57,7 +57,7 @@ struct pci_sys_data {
/*
* Call this with your hw_pci struct to initialise the PCI system.
*/
-void pci_common_init(struct hw_pci *);
+void pci_common_init(struct hw_pci *, unsigned long, unsigned long);
/*
* PCI controllers
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 038da6e..122679a 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -5,7 +5,9 @@
#include <asm-generic/pci-dma-compat.h>
#include <asm/mach/pci.h> /* for pci_sys_data */
-#include <mach/hardware.h> /* for PCIBIOS_MIN_* */
+
+extern unsigned long PCIBIOS_MIN_IO;
+extern unsigned long PCIBIOS_MIN_MEM;
#ifdef CONFIG_PCI_DOMAINS
static inline int pci_domain_nr(struct pci_bus *bus)
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index c6273a3..acc4f95 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -18,6 +18,12 @@
static int debug_pci;
static int use_firmware;
+unsigned long PCIBIOS_MIN_IO;
+EXPORT_SYMBOL(PCIBIOS_MIN_IO);
+
+unsigned long PCIBIOS_MIN_MEM;
+EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
+
/*
* We can't use pci_find_device() here since we are
* called from interrupt context.
@@ -556,12 +562,16 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
}
}
-void __init pci_common_init(struct hw_pci *hw)
+void __init
+pci_common_init(struct hw_pci *hw, unsigned long min_io, unsigned long min_mem)
{
struct pci_sys_data *sys;
INIT_LIST_HEAD(&hw->buses);
+ PCIBIOS_MIN_IO = min_io;
+ PCIBIOS_MIN_MEM = min_mem;
+
if (hw->preinit)
hw->preinit();
pcibios_init_hw(hw);
diff --git a/arch/arm/mach-cns3xxx/include/mach/hardware.h b/arch/arm/mach-cns3xxx/include/mach/hardware.h
index 82a0d4e..c194e25 100644
--- a/arch/arm/mach-cns3xxx/include/mach/hardware.h
+++ b/arch/arm/mach-cns3xxx/include/mach/hardware.h
@@ -15,7 +15,8 @@
#include <asm/sizes.h>
/* macro to get at IO space when running virtually */
-#define PCIBIOS_MIN_IO 0x00000000
-#define PCIBIOS_MIN_MEM 0x00000000
+#define CNS3XXX_PCIBIOS_MIN_IO 0x00000000
+#define CNS3XXX_PCIBIOS_MIN_MEM 0x00000000
+
#endif
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 78defd7..fd89456 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -21,6 +21,7 @@
#include <linux/ptrace.h>
#include <asm/mach/map.h>
#include <mach/cns3xxx.h>
+#include <mach/hardware.h>
#include "core.h"
enum cns3xxx_access_type {
@@ -379,7 +380,8 @@ static int __init cns3xxx_pcie_init(void)
cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i));
cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
- pci_common_init(&cns3xxx_pcie[i].hw_pci);
+ pci_common_init(&cns3xxx_pcie[i].hw_pci, CNS3XXX_PCIBIOS_MIN_IO,
+ CNS3XXX_PCIBIOS_MIN_MEM);
}
pci_assign_unassigned_resources();
diff --git a/arch/arm/mach-dove/include/mach/hardware.h b/arch/arm/mach-dove/include/mach/hardware.h
index f619fb9..87a22e6 100644
--- a/arch/arm/mach-dove/include/mach/hardware.h
+++ b/arch/arm/mach-dove/include/mach/hardware.h
@@ -11,8 +11,9 @@
#include "dove.h"
-#define PCIBIOS_MIN_IO 0x1000
-#define PCIBIOS_MIN_MEM 0x01000000
+#define DOVE_PCIBIOS_MIN_IO 0x1000
+#define DOVE_PCIBIOS_MIN_MEM 0x01000000
+
#define PCIMEM_BASE DOVE_PCIE0_MEM_PHYS_BASE
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 502d1ca..f93fd41 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -18,6 +18,7 @@
#include <plat/pcie.h>
#include <mach/irqs.h>
#include <mach/bridge-regs.h>
+#include <mach/hardware.h>
#include "common.h"
struct pcie_port {
@@ -234,5 +235,5 @@ void __init dove_pcie_init(int init_port0, int init_port1)
if (init_port1)
add_pcie_port(1, DOVE_PCIE1_VIRT_BASE);
- pci_common_init(&dove_pci);
+ pci_common_init(&dove_pci, DOVE_PCIBIOS_MIN_IO, DOVE_PCIBIOS_MIN_MEM);
}
--git a/arch/arm/mach-footbridge/cats-pci.c b/arch/arm/mach-footbridge/cats-pci.c
index ae3e1c8..8c9bf30 100644
--- a/arch/arm/mach-footbridge/cats-pci.c
+++ b/arch/arm/mach-footbridge/cats-pci.c
@@ -12,6 +12,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include <mach/hardware.h>
/* cats host-specific stuff */
static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
@@ -50,8 +51,11 @@ static struct hw_pci cats_pci __initdata = {
static int __init cats_pci_init(void)
{
- if (machine_is_cats())
- pci_common_init(&cats_pci);
+ if (machine_is_cats()) {
+ pci_common_init(&cats_pci, FOOTBRIDGE_PCIBIOS_MIN_IO,
+ FOOTBRIDGE_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
--git a/arch/arm/mach-footbridge/ebsa285-pci.c b/arch/arm/mach-footbridge/ebsa285-pci.c
index e5ab5bd..d369a86 100644
--- a/arch/arm/mach-footbridge/ebsa285-pci.c
+++ b/arch/arm/mach-footbridge/ebsa285-pci.c
@@ -12,6 +12,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include <mach/hardware.h>
static int irqmap_ebsa285[] __initdata = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI };
@@ -40,8 +41,11 @@ static struct hw_pci ebsa285_pci __initdata = {
static int __init ebsa285_init_pci(void)
{
- if (machine_is_ebsa285())
- pci_common_init(&ebsa285_pci);
+ if (machine_is_ebsa285()) {
+ pci_common_init(&ebsa285_pci, FOOTBRIDGE_PCIBIOS_MIN_IO,
+ FOOTBRIDGE_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
--git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index 541aa70..1f3950b 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -93,7 +93,7 @@ extern unsigned int nw_gpio_read(void);
extern void nw_cpld_modify(unsigned int mask, unsigned int set);
#endif
-#define PCIBIOS_MIN_IO 0x1000
-#define PCIBIOS_MIN_MEM 0x81000000
+#define FOOTBRIDGE_PCIBIOS_MIN_IO 0x1000
+#define FOOTBRIDGE_PCIBIOS_MIN_MEM 0x81000000
#endif
--git a/arch/arm/mach-footbridge/netwinder-pci.c b/arch/arm/mach-footbridge/netwinder-pci.c
index e263d6d..722a1e6 100644
--- a/arch/arm/mach-footbridge/netwinder-pci.c
+++ b/arch/arm/mach-footbridge/netwinder-pci.c
@@ -12,6 +12,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include <mach/hardware.h>
/*
* We now use the slot ID instead of the device identifiers to select
@@ -54,8 +55,11 @@ static struct hw_pci netwinder_pci __initdata = {
static int __init netwinder_pci_init(void)
{
- if (machine_is_netwinder())
- pci_common_init(&netwinder_pci);
+ if (machine_is_netwinder()) {
+ pci_common_init(&netwinder_pci, FOOTBRIDGE_PCIBIOS_MIN_IO,
+ FOOTBRIDGE_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
--git a/arch/arm/mach-footbridge/personal-pci.c b/arch/arm/mach-footbridge/personal-pci.c
index d5fca95..4064060 100644
--- a/arch/arm/mach-footbridge/personal-pci.c
+++ b/arch/arm/mach-footbridge/personal-pci.c
@@ -12,6 +12,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include <mach/hardware.h>
static int irqmap_personal_server[] __initdata = {
IRQ_IN0, IRQ_IN1, IRQ_IN2, IRQ_IN3, 0, 0, 0,
@@ -48,8 +49,11 @@ static struct hw_pci personal_server_pci __initdata = {
static int __init personal_pci_init(void)
{
- if (machine_is_personal_server())
- pci_common_init(&personal_server_pci);
+ if (machine_is_personal_server()) {
+ pci_common_init(&personal_server_pci, FOOTBRIDGE_PCIBIOS_MIN_IO,
+ FOOTBRIDGE_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-integrator/include/mach/hardware.h b/arch/arm/mach-integrator/include/mach/hardware.h
index 37323ea..4b9c9a7 100644
--- a/arch/arm/mach-integrator/include/mach/hardware.h
+++ b/arch/arm/mach-integrator/include/mach/hardware.h
@@ -34,8 +34,8 @@
#define PCIMEM_BASE PCI_MEMORY_VADDR
-#define PCIBIOS_MIN_IO 0x6000
-#define PCIBIOS_MIN_MEM 0x00100000
+#define INTEGRATOR_PCIBIOS_MIN_IO 0x6000
+#define INTEGRATOR_PCIBIOS_MIN_MEM 0x00100000
/* macro to get at IO space when running virtually */
#ifdef CONFIG_MMU
diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c
index 2fdb954..4bfb0c2 100644
--- a/arch/arm/mach-integrator/pci.c
+++ b/arch/arm/mach-integrator/pci.c
@@ -30,6 +30,7 @@
#include <asm/system.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include <mach/hardware.h>
/*
* A small note about bridges and interrupts. The DECchip 21050 (and
@@ -116,8 +117,11 @@ static struct hw_pci integrator_pci __initdata = {
static int __init integrator_pci_init(void)
{
- if (machine_is_integrator())
- pci_common_init(&integrator_pci);
+ if (machine_is_integrator()) {
+ pci_common_init(&integrator_pci, INTEGRATOR_PCIBIOS_MIN_IO,
+ INTEGRATOR_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-iop13xx/include/mach/hardware.h b/arch/arm/mach-iop13xx/include/mach/hardware.h
index 8e8ec74..75c0159 100644
--- a/arch/arm/mach-iop13xx/include/mach/hardware.h
+++ b/arch/arm/mach-iop13xx/include/mach/hardware.h
@@ -7,8 +7,8 @@ extern u16 iop13xx_dev_id(void);
extern void iop13xx_set_atu_mmr_bases(void);
#endif
-#define PCIBIOS_MIN_IO 0x00000000
-#define PCIBIOS_MIN_MEM IOP13XX_PCIX_LOWER_MEM_BA
+#define IOP13XX_PCIBIOS_MIN_IO 0x00000000
+#define IOP13XX_PCIBIOS_MIN_MEM IOP13XX_PCIX_LOWER_MEM_BA
/*
* Generic chipset bits
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 9b5a63f..3e37d1b 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -65,7 +65,8 @@ static struct hw_pci iq81340mc_pci __initdata = {
static int __init iq81340mc_pci_init(void)
{
iop13xx_atu_select(&iq81340mc_pci);
- pci_common_init(&iq81340mc_pci);
+ pci_common_init(&iq81340mc_pci, IOP13XX_PCIBIOS_MIN_IO,
+ IOP13XX_PCIBIOS_MIN_MEM);
iop13xx_map_pci_memory();
return 0;
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index df3492a..6ba9771 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -67,7 +67,8 @@ static struct hw_pci iq81340sc_pci __initdata = {
static int __init iq81340sc_pci_init(void)
{
iop13xx_atu_select(&iq81340sc_pci);
- pci_common_init(&iq81340sc_pci);
+ pci_common_init(&iq81340sc_pci, IOP13XX_PCIBIOS_MIN_IO,
+ IOP13XX_PCIBIOS_MIN_MEM);
iop13xx_map_pci_memory();
return 0;
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 779f924..ead3c18 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -113,8 +113,10 @@ static struct hw_pci em7210_pci __initdata = {
static int __init em7210_pci_init(void)
{
- if (machine_is_em7210())
- pci_common_init(&em7210_pci);
+ if (machine_is_em7210()) {
+ pci_common_init(&em7210_pci, IOP32X_PCIBIOS_MIN_IO,
+ IOP32X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index c6b6f9c..5b952c7 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -106,8 +106,10 @@ static struct hw_pci glantank_pci __initdata = {
static int __init glantank_pci_init(void)
{
- if (machine_is_glantank())
- pci_common_init(&glantank_pci);
+ if (machine_is_glantank()) {
+ pci_common_init(&glantank_pci, IOP32X_PCIBIOS_MIN_IO,
+ IOP32X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-iop32x/include/mach/hardware.h b/arch/arm/mach-iop32x/include/mach/hardware.h
index e68bf97..2857d93 100644
--- a/arch/arm/mach-iop32x/include/mach/hardware.h
+++ b/arch/arm/mach-iop32x/include/mach/hardware.h
@@ -18,8 +18,8 @@
* but when we read them, we convert them to virtual addresses. See
* arch/arm/plat-iop/pci.c.
*/
-#define PCIBIOS_MIN_IO 0x00000000
-#define PCIBIOS_MIN_MEM 0x00000000
+#define IOP32X_PCIBIOS_MIN_IO 0x00000000
+#define IOP32X_PCIBIOS_MIN_MEM 0x00000000
#ifndef __ASSEMBLY__
void iop32x_init_irq(void);
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index fde962c..686743a 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -176,9 +176,10 @@ static struct hw_pci iq31244_pci __initdata = {
static int __init iq31244_pci_init(void)
{
- if (is_ep80219())
- pci_common_init(&ep80219_pci);
- else if (machine_is_iq31244()) {
+ if (is_ep80219()) {
+ pci_common_init(&ep80219_pci, IOP32X_PCIBIOS_MIN_IO,
+ IOP32X_PCIBIOS_MIN_MEM);
+ } else if (machine_is_iq31244()) {
if (is_80219()) {
printk("note: iq31244 board type has been selected\n");
printk("note: to select ep80219 operation:\n");
@@ -187,7 +188,7 @@ static int __init iq31244_pci_init(void)
printk("\t2/ update boot loader to pass"
" the ep80219 id: %d\n", MACH_TYPE_EP80219);
}
- pci_common_init(&iq31244_pci);
+ pci_common_init(&iq31244_pci, PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM);
}
return 0;
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 3a95950..c5b4cfe 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -112,8 +112,10 @@ static struct hw_pci iq80321_pci __initdata = {
static int __init iq80321_pci_init(void)
{
if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
- machine_is_iq80321())
- pci_common_init(&iq80321_pci);
+ machine_is_iq80321()) {
+ pci_common_init(&iq80321_pci, IOP32X_PCIBIOS_MIN_IO,
+ IOP32X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 626aa37..e515129 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -138,8 +138,10 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_REALTEK, PCI_ANY_ID, n2100_fixup_r8169);
static int __init n2100_pci_init(void)
{
- if (machine_is_n2100())
- pci_common_init(&n2100_pci);
+ if (machine_is_n2100()) {
+ pci_common_init(&n2100_pci, IOP32X_PCIBIOS_MIN_IO,
+ IOP32X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-iop33x/include/mach/hardware.h b/arch/arm/mach-iop33x/include/mach/hardware.h
index 215065b..428fc66 100644
--- a/arch/arm/mach-iop33x/include/mach/hardware.h
+++ b/arch/arm/mach-iop33x/include/mach/hardware.h
@@ -18,8 +18,8 @@
* but when we read them, we convert them to virtual addresses. See
* arch/arm/mach-iop3xx/iop3xx-pci.c
*/
-#define PCIBIOS_MIN_IO 0x00000000
-#define PCIBIOS_MIN_MEM 0x00000000
+#define IOP33X_PCIBIOS_MIN_IO 0x00000000
+#define IOP33X_PCIBIOS_MIN_MEM 0x00000000
#ifndef __ASSEMBLY__
void iop33x_init_irq(void);
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index c565f8d..3268484 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -95,8 +95,10 @@ static struct hw_pci iq80331_pci __initdata = {
static int __init iq80331_pci_init(void)
{
if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
- machine_is_iq80331())
- pci_common_init(&iq80331_pci);
+ machine_is_iq80331()) {
+ pci_common_init(&iq80331_pci, IOP33X_PCIBIOS_MIN_IO,
+ IOP33X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 36a9efb..f8ba3b8 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -95,8 +95,10 @@ static struct hw_pci iq80332_pci __initdata = {
static int __init iq80332_pci_init(void)
{
if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
- machine_is_iq80332())
- pci_common_init(&iq80332_pci);
+ machine_is_iq80332()) {
+ pci_common_init(&iq80332_pci, IOP33X_PCIBIOS_MIN_IO,
+ IOP33X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index 88663ab..b1c8661 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -187,8 +187,10 @@ struct hw_pci enp2611_pci __initdata = {
int __init enp2611_pci_init(void)
{
- if (machine_is_enp2611())
- pci_common_init(&enp2611_pci);
+ if (machine_is_enp2611()) {
+ pci_common_init(&enp2611_pci, IXP2000_PCIBIOS_MIN_IO,
+ IXP2000_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp2000/include/mach/hardware.h b/arch/arm/mach-ixp2000/include/mach/hardware.h
index 6c92008..b8a6ce7 100644
--- a/arch/arm/mach-ixp2000/include/mach/hardware.h
+++ b/arch/arm/mach-ixp2000/include/mach/hardware.h
@@ -22,8 +22,8 @@
/*
* This needs to be platform-specific?
*/
-#define PCIBIOS_MIN_IO 0x00000000
-#define PCIBIOS_MIN_MEM 0x00000000
+#define IXP2000_PCIBIOS_MIN_IO 0x00000000
+#define IXP2000_PCIBIOS_MIN_MEM 0x00000000
#include "ixp2000-regs.h" /* Chipset Registers */
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index dfffc1e..54285c1 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -155,8 +155,10 @@ static struct hw_pci ixdp2400_pci __initdata = {
int __init ixdp2400_pci_init(void)
{
- if (machine_is_ixdp2400())
- pci_common_init(&ixdp2400_pci);
+ if (machine_is_ixdp2400()) {
+ pci_common_init(&ixdp2400_pci, IXP2000_PCIBIOS_MIN_IO,
+ IXP2000_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index cd4c9bc..c73ebe1 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -258,7 +258,9 @@ int __init ixdp2800_pci_init(void)
if (machine_is_ixdp2800()) {
struct pci_dev *dev;
- pci_common_init(&ixdp2800_pci);
+ pci_common_init(&ixdp2800_pci, IXP2000_PCIBIOS_MIN_IO,
+ IXP2000_PCIBIOS_MIN_MEM);
+
if (ixdp2x00_master_npu()) {
dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN);
pci_remove_bus_device(dev);
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 6c121bd..9edcd87 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -336,8 +336,10 @@ struct hw_pci ixdp2x01_pci __initdata = {
int __init ixdp2x01_pci_init(void)
{
if (machine_is_ixdp2401() || machine_is_ixdp2801() ||\
- machine_is_ixdp28x5())
- pci_common_init(&ixdp2x01_pci);
+ machine_is_ixdp28x5()) {
+ pci_common_init(&ixdp2x01_pci, IXP2000_PCIBIOS_MIN_IO,
+ IXP2000_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp23xx/include/mach/hardware.h b/arch/arm/mach-ixp23xx/include/mach/hardware.h
index b8bb781..658cb03 100644
--- a/arch/arm/mach-ixp23xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp23xx/include/mach/hardware.h
@@ -15,8 +15,8 @@
#define __ASM_ARCH_HARDWARE_H
/* PCI IO info */
-#define PCIBIOS_MIN_IO 0x00000000
-#define PCIBIOS_MIN_MEM 0xe0000000
+#define IXP23XX_PCIBIOS_MIN_IO 0x00000000
+#define IXP23XX_PCIBIOS_MIN_MEM 0xe0000000
#include "ixp23xx.h"
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 664e39c..bcc56c4 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -260,8 +260,10 @@ struct hw_pci ixdp2351_pci __initdata = {
int __init ixdp2351_pci_init(void)
{
- if (machine_is_ixdp2351())
- pci_common_init(&ixdp2351_pci);
+ if (machine_is_ixdp2351()) {
+ pci_common_init(&ixdp2351_pci, IXP23XX_PCIBIOS_MIN_IO,
+ IXP23XX_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 76c61ba..e6c321a 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -126,8 +126,10 @@ static struct hw_pci roadrunner_pci __initdata = {
static int __init roadrunner_pci_init(void)
{
- if (machine_is_roadrunner())
- pci_common_init(&roadrunner_pci);
+ if (machine_is_roadrunner()) {
+ pci_common_init(&roadrunner_pci, IXP23XX_PCIBIOS_MIN_IO,
+ IXP23XX_PCIBIOS_MIN_MEM);
+ }
return 0;
};
diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c
index 845e1b5..f40ccd8 100644
--- a/arch/arm/mach-ixp4xx/avila-pci.c
+++ b/arch/arm/mach-ixp4xx/avila-pci.c
@@ -74,8 +74,11 @@ struct hw_pci avila_pci __initdata = {
int __init avila_pci_init(void)
{
- if (machine_is_avila() || machine_is_loft())
- pci_common_init(&avila_pci);
+ if (machine_is_avila() || machine_is_loft()) {
+ pci_common_init(&avila_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 24498a9..24f4f58 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -481,8 +481,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
res[0].flags = IORESOURCE_IO;
res[1].name = "PCI Memory Space";
- res[1].start = PCIBIOS_MIN_MEM;
- res[1].end = PCIBIOS_MAX_MEM;
+ res[1].start = IXP4XX_PCIBIOS_MIN_MEM;
+ res[1].end = IXP4XX_PCIBIOS_MAX_MEM;
res[1].flags = IORESOURCE_MEM;
request_resource(&ioport_resource, &res[0]);
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index b978ea8..66fbab2 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -57,8 +57,11 @@ struct hw_pci coyote_pci __initdata = {
int __init coyote_pci_init(void)
{
- if (machine_is_adi_coyote())
- pci_common_init(&coyote_pci);
+ if (machine_is_adi_coyote()) {
+ pci_common_init(&coyote_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c
index fa70fed..e13d3bc 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-pci.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c
@@ -19,6 +19,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <mach/hardware.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
@@ -71,8 +72,10 @@ struct hw_pci __initdata dsmg600_pci = {
int __init dsmg600_pci_init(void)
{
- if (machine_is_dsmg600())
- pci_common_init(&dsmg600_pci);
+ if (machine_is_dsmg600()) {
+ pci_common_init(&dsmg600_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c
index 5a810c9..79becbd 100644
--- a/arch/arm/mach-ixp4xx/fsg-pci.c
+++ b/arch/arm/mach-ixp4xx/fsg-pci.c
@@ -19,6 +19,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <mach/hardware.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
@@ -68,8 +69,11 @@ struct hw_pci fsg_pci __initdata = {
int __init fsg_pci_init(void)
{
- if (machine_is_fsg())
- pci_common_init(&fsg_pci);
+ if (machine_is_fsg()) {
+ pci_common_init(&fsg_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c
index 7e93a09..2917679 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-pci.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c
@@ -55,8 +55,11 @@ struct hw_pci gateway7001_pci __initdata = {
int __init gateway7001_pci_init(void)
{
- if (machine_is_gateway7001())
- pci_common_init(&gateway7001_pci);
+ if (machine_is_gateway7001()) {
+ pci_common_init(&gateway7001_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index d0e4861..5dde50c 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/serial_8250.h>
+#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/system.h>
#include <asm/mach/arch.h>
@@ -485,8 +486,11 @@ static struct hw_pci gmlr_hw_pci __initdata = {
static int __init gmlr_pci_init(void)
{
if (machine_is_goramo_mlr() &&
- (hw_bits & (CFG_HW_USB_PORTS | CFG_HW_HAS_PCI_SLOT)))
- pci_common_init(&gmlr_hw_pci);
+ (hw_bits & (CFG_HW_USB_PORTS | CFG_HW_HAS_PCI_SLOT))) {
+ pci_common_init(&gmlr_hw_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
index 25d2c33..7359a95 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
@@ -76,8 +76,10 @@ struct hw_pci gtwx5715_pci __initdata = {
int __init gtwx5715_pci_init(void)
{
- if (machine_is_gtwx5715())
- pci_common_init(>wx5715_pci);
+ if (machine_is_gtwx5715()) {
+ pci_common_init(>wx5715_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index 163e506..63fc093 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -17,13 +17,13 @@
#ifndef __ASM_ARCH_HARDWARE_H__
#define __ASM_ARCH_HARDWARE_H__
-#define PCIBIOS_MIN_IO 0x00001000
+#define IXP4XX_PCIBIOS_MIN_IO 0x00001000
#ifdef CONFIG_IXP4XX_INDIRECT_PCI
-#define PCIBIOS_MIN_MEM 0x10000000 /* 1 GB of indirect PCI MMIO space */
-#define PCIBIOS_MAX_MEM 0x4FFFFFFF
+#define IXP4XX_PCIBIOS_MIN_MEM 0x10000000 /* 1 GB of indirect PCI MMIO space */
+#define IXP4XX_PCIBIOS_MAX_MEM 0x4FFFFFFF
#else
-#define PCIBIOS_MIN_MEM 0x48000000 /* 64 MB of PCI MMIO space */
-#define PCIBIOS_MAX_MEM 0x4BFFFFFF
+#define IXP4XX_PCIBIOS_MIN_MEM 0x48000000 /* 64 MB of PCI MMIO space */
+#define IXP4XX_PCIBIOS_MAX_MEM 0x4BFFFFFF
#endif
#define ARCH_HAS_DMA_SET_COHERENT_MASK
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index de274a1..2885ffd 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -56,7 +56,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
static inline int is_pci_memory(u32 addr)
{
- return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
+ return (addr >= IXP4XX_PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
}
static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index 1ba165a..94681c6 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -70,8 +70,11 @@ struct hw_pci ixdp425_pci __initdata = {
int __init ixdp425_pci_init(void)
{
if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
- machine_is_ixdp465() || machine_is_kixrp435())
- pci_common_init(&ixdp425_pci);
+ machine_is_ixdp465() || machine_is_kixrp435()) {
+ pci_common_init(&ixdp425_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index 4ed7ac6..9886406 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -51,8 +51,11 @@ struct hw_pci ixdpg425_pci __initdata = {
int __init ixdpg425_pci_init(void)
{
- if (machine_is_ixdpg425())
- pci_common_init(&ixdpg425_pci);
+ if (machine_is_ixdpg425()) {
+ pci_common_init(&ixdpg425_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
index d0cea34..e37e380 100644
--- a/arch/arm/mach-ixp4xx/nas100d-pci.c
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -18,6 +18,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <mach/hardware.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
@@ -67,8 +68,10 @@ struct hw_pci __initdata nas100d_pci = {
int __init nas100d_pci_init(void)
{
- if (machine_is_nas100d())
- pci_common_init(&nas100d_pci);
+ if (machine_is_nas100d()) {
+ pci_common_init(&nas100d_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index 1eb5a90..495d65f 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -18,6 +18,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <mach/hardware.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
@@ -63,8 +64,10 @@ struct hw_pci __initdata nslu2_pci = {
int __init nslu2_pci_init(void) /* monkey see, monkey do */
{
- if (machine_is_nslu2())
- pci_common_init(&nslu2_pci);
+ if (machine_is_nslu2()) {
+ pci_common_init(&nslu2_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c
index f3111c6..cd99d1a 100644
--- a/arch/arm/mach-ixp4xx/vulcan-pci.c
+++ b/arch/arm/mach-ixp4xx/vulcan-pci.c
@@ -18,6 +18,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <mach/hardware.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
@@ -65,8 +66,11 @@ struct hw_pci vulcan_pci __initdata = {
int __init vulcan_pci_init(void)
{
- if (machine_is_arcom_vulcan())
- pci_common_init(&vulcan_pci);
+ if (machine_is_arcom_vulcan()) {
+ pci_common_init(&vulcan_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c
index 9b59ed0..4ddde25 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-pci.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c
@@ -55,8 +55,11 @@ struct hw_pci wg302v2_pci __initdata = {
int __init wg302v2_pci_init(void)
{
- if (machine_is_wg302v2())
- pci_common_init(&wg302v2_pci);
+ if (machine_is_wg302v2()) {
+ pci_common_init(&wg302v2_pci, IXP4XX_PCIBIOS_MIN_IO,
+ IXP4XX_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-kirkwood/include/mach/hardware.h b/arch/arm/mach-kirkwood/include/mach/hardware.h
index 79f0641..72763e7 100644
--- a/arch/arm/mach-kirkwood/include/mach/hardware.h
+++ b/arch/arm/mach-kirkwood/include/mach/hardware.h
@@ -11,8 +11,9 @@
#include "kirkwood.h"
-#define PCIBIOS_MIN_IO 0x00001000
-#define PCIBIOS_MIN_MEM 0x01000000
+#define KIRKWOOD_PCIBIOS_MIN_IO 0x00001000
+#define KIRKWOOD_PCIBIOS_MIN_MEM 0x01000000
+
#define PCIMEM_BASE KIRKWOOD_PCIE_MEM_PHYS_BASE /* mem base for VGA */
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 513ad31..ee38ad5 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -16,6 +16,7 @@
#include <asm/mach/pci.h>
#include <plat/pcie.h>
#include <mach/bridge-regs.h>
+#include <mach/hardware.h>
#include "common.h"
void __init kirkwood_pcie_id(u32 *dev, u32 *rev)
@@ -270,5 +271,6 @@ void __init kirkwood_pcie_init(unsigned int portmask)
add_pcie_port(1, PCIE1_VIRT_BASE);
kirkwood_pci.nr_controllers = num_pcie_ports;
- pci_common_init(&kirkwood_pci);
+ pci_common_init(&kirkwood_pci, KIRKWOOD_PCIBIOS_MIN_IO,
+ KIRKWOOD_PCIBIOS_MIN_MEM);
}
diff --git a/arch/arm/mach-ks8695/include/mach/hardware.h b/arch/arm/mach-ks8695/include/mach/hardware.h
index a46be88..54e0638 100644
--- a/arch/arm/mach-ks8695/include/mach/hardware.h
+++ b/arch/arm/mach-ks8695/include/mach/hardware.h
@@ -46,7 +46,7 @@
/*
* PCI support
*/
-#define PCIBIOS_MIN_IO 0
-#define PCIBIOS_MIN_MEM 0
+#define KS8695_PCIBIOS_MIN_IO 0
+#define KS8695_PCIBIOS_MIN_MEM 0
#endif
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c
index 5fcd082..eb272af 100644
--- a/arch/arm/mach-ks8695/pci.c
+++ b/arch/arm/mach-ks8695/pci.c
@@ -325,5 +325,6 @@ void __init ks8695_init_pci(struct ks8695_pci_cfg *cfg)
ks8695_pci.map_irq = cfg->map_irq; /* board-specific map_irq method */
- pci_common_init(&ks8695_pci);
+ pci_common_init(&ks8695_pci, KS8695_PCIBIOS_MIN_IO,
+ KS8695_PCIBIOS_MIN_MEM);
}
diff --git a/arch/arm/mach-mv78xx0/include/mach/hardware.h b/arch/arm/mach-mv78xx0/include/mach/hardware.h
index c76b93f..69f9588 100644
--- a/arch/arm/mach-mv78xx0/include/mach/hardware.h
+++ b/arch/arm/mach-mv78xx0/include/mach/hardware.h
@@ -11,8 +11,9 @@
#include "mv78xx0.h"
-#define PCIBIOS_MIN_IO 0x00001000
-#define PCIBIOS_MIN_MEM 0x01000000
+#define MV78XX0_PCIBIOS_MIN_IO 0x00001000
+#define MV78XX0_PCIBIOS_MIN_MEM 0x01000000
+
#define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index a560439..f6558f1 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/mbus.h>
+#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <plat/pcie.h>
@@ -315,5 +316,6 @@ void __init mv78xx0_pcie_init(int init_port0, int init_port1)
}
}
- pci_common_init(&mv78xx0_pci);
+ pci_common_init(&mv78xx0_pci, MV78XX0_PCIBIOS_MIN_IO,
+ MV78XX0_PCIBIOS_MIN_MEM);
}
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index df1083f..f46b478 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -25,6 +25,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include <plat/orion_nand.h>
#include "common.h"
#include "mpp.h"
@@ -273,8 +274,10 @@ static struct hw_pci db88f5281_pci __initdata = {
static int __init db88f5281_pci_init(void)
{
- if (machine_is_db88f5281())
- pci_common_init(&db88f5281_pci);
+ if (machine_is_db88f5281()) {
+ pci_common_init(&db88f5281_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 3a7bc0e..6f6edd7 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -34,6 +34,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -97,8 +98,10 @@ static int __init dns323_pci_init(void)
/* Rev B1 and C1 doesn't really use its PCI bus, and initialising PCI
* gets in the way of initialising the SATA controller.
*/
- if (machine_is_dns323() && system_rev == DNS323_REV_A1)
- pci_common_init(&dns323_pci);
+ if (machine_is_dns323() && system_rev == DNS323_REV_A1) {
+ pci_common_init(&dns323_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-orion5x/include/mach/hardware.h b/arch/arm/mach-orion5x/include/mach/hardware.h
index a42b743..921abd1 100644
--- a/arch/arm/mach-orion5x/include/mach/hardware.h
+++ b/arch/arm/mach-orion5x/include/mach/hardware.h
@@ -11,9 +11,10 @@
#include "orion5x.h"
-#define PCIBIOS_MIN_IO 0x00001000
-#define PCIBIOS_MIN_MEM 0x01000000
-#define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE
+#define ORION5X_PCIBIOS_MIN_IO 0x00001000
+#define ORION5X_PCIBIOS_MIN_MEM 0x01000000
+
+#define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE
#endif
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index 4be9aa0..84de118 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -25,6 +25,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include <plat/orion_nand.h>
#include "common.h"
#include "mpp.h"
@@ -148,7 +149,8 @@ static int __init kurobox_pro_pci_init(void)
{
if (machine_is_kurobox_pro()) {
orion5x_pci_disable();
- pci_common_init(&kurobox_pro_pci);
+ pci_common_init(&kurobox_pro_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
}
return 0;
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 2f0e16c..9af4b7b 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -27,6 +27,7 @@
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include <mach/bridge-regs.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -97,8 +98,10 @@ static struct hw_pci mss2_pci __initdata = {
static int __init mss2_pci_init(void)
{
- if (machine_is_mss2())
- pci_common_init(&mss2_pci);
+ if (machine_is_mss2()) {
+ pci_common_init(&mss2_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index f4c26fd..c438504 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -23,6 +23,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -160,7 +161,8 @@ static int __init rd88f5181l_fxo_pci_init(void)
{
if (machine_is_rd88f5181l_fxo()) {
orion5x_pci_set_cardbus_mode();
- pci_common_init(&rd88f5181l_fxo_pci);
+ pci_common_init(&rd88f5181l_fxo_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
}
return 0;
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index b594290..8ae3336 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -24,6 +24,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -172,7 +173,8 @@ static int __init rd88f5181l_ge_pci_init(void)
{
if (machine_is_rd88f5181l_ge()) {
orion5x_pci_set_cardbus_mode();
- pci_common_init(&rd88f5181l_ge_pci);
+ pci_common_init(&rd88f5181l_ge_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
}
return 0;
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 165ed87..ff66a7b 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -25,6 +25,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -208,8 +209,10 @@ static struct hw_pci rd88f5182_pci __initdata = {
static int __init rd88f5182_pci_init(void)
{
- if (machine_is_rd88f5182())
- pci_common_init(&rd88f5182_pci);
+ if (machine_is_rd88f5182()) {
+ pci_common_init(&rd88f5182_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 02ff45f..6ceba26 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -26,6 +26,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -114,7 +115,8 @@ static int __init rd88f6183ap_ge_pci_init(void)
{
if (machine_is_rd88f6183ap_ge()) {
orion5x_pci_disable();
- pci_common_init(&rd88f6183ap_ge_pci);
+ pci_common_init(&rd88f6183ap_ge_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
}
return 0;
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 4403fae..d85be46 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -24,6 +24,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -131,8 +132,10 @@ static struct hw_pci tsp2_pci __initdata = {
static int __init tsp2_pci_init(void)
{
- if (machine_is_terastation_pro2())
- pci_common_init(&tsp2_pci);
+ if (machine_is_terastation_pro2()) {
+ pci_common_init(&tsp2_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 1e19612..c36c698 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -27,6 +27,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
#include "tsx09-common.h"
@@ -178,8 +179,10 @@ static struct hw_pci qnap_ts209_pci __initdata = {
static int __init qnap_ts209_pci_init(void)
{
- if (machine_is_ts_x09())
- pci_common_init(&qnap_ts209_pci);
+ if (machine_is_ts_x09()) {
+ pci_common_init(&qnap_ts209_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 428af20..89e20e4 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -29,6 +29,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
#include "tsx09-common.h"
@@ -148,8 +149,10 @@ static struct hw_pci qnap_ts409_pci __initdata = {
static int __init qnap_ts409_pci_init(void)
{
- if (machine_is_ts409())
- pci_common_init(&qnap_ts409_pci);
+ if (machine_is_ts409()) {
+ pci_common_init(&qnap_ts409_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index 7994d6e..46aa7ee 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -21,6 +21,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -163,8 +164,10 @@ static struct hw_pci wnr854t_pci __initdata = {
static int __init wnr854t_pci_init(void)
{
- if (machine_is_wnr854t())
- pci_common_init(&wnr854t_pci);
+ if (machine_is_wnr854t()) {
+ pci_common_init(&wnr854t_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index a5989b7..083906f 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -24,6 +24,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
+#include <mach/hardware.h>
#include "common.h"
#include "mpp.h"
@@ -251,8 +252,10 @@ static struct hw_pci wrt350n_v2_pci __initdata = {
static int __init wrt350n_v2_pci_init(void)
{
- if (machine_is_wrt350n_v2())
- pci_common_init(&wrt350n_v2_pci);
+ if (machine_is_wrt350n_v2()) {
+ pci_common_init(&wrt350n_v2_pci, ORION5X_PCIBIOS_MIN_IO,
+ ORION5X_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 0f31305..f810a0e 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -21,6 +21,8 @@
#include <linux/irq.h>
#include <linux/gpio.h>
+#include <mach/hardware.h>
+
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
@@ -214,8 +216,10 @@ static struct hw_pci cmx2xx_pci __initdata = {
static int __init cmx2xx_init_pci(void)
{
- if (machine_is_armcore())
- pci_common_init(&cmx2xx_pci);
+ if (machine_is_armcore()) {
+ pci_common_init(&cmx2xx_pci, PXA_PCIBIOS_MIN_IO,
+ PXA_PCIBIOS_MIN_MEM);
+ }
return 0;
}
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index ad448af..86ea43f 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -318,8 +318,8 @@ extern unsigned long get_clock_tick_rate(void);
#endif
#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
-#define PCIBIOS_MIN_IO 0
-#define PCIBIOS_MIN_MEM 0
+#define PXA_PCIBIOS_MIN_IO 0
+#define PXA_PCIBIOS_MIN_MEM 0
#define ARCH_HAS_DMA_SET_COHERENT_MASK
#endif
diff --git a/arch/arm/mach-shark/include/mach/hardware.h b/arch/arm/mach-shark/include/mach/hardware.h
index 24639ce..7d3f0e3 100644
--- a/arch/arm/mach-shark/include/mach/hardware.h
+++ b/arch/arm/mach-shark/include/mach/hardware.h
@@ -12,8 +12,9 @@
#define UNCACHEABLE_ADDR 0xdf010000
-#define PCIBIOS_MIN_IO 0x6000
-#define PCIBIOS_MIN_MEM 0x50000000
+#define SHARK_PCIBIOS_MIN_IO 0x6000
+#define SHARK_PCIBIOS_MIN_MEM 0x50000000
+
#define PCIMEM_BASE 0xe8000000
#endif
diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c
index 89d175c..89bef74 100644
--- a/arch/arm/mach-shark/pci.c
+++ b/arch/arm/mach-shark/pci.c
@@ -12,6 +12,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include <mach/hardware.h>
static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
@@ -37,8 +38,11 @@ static struct hw_pci shark_pci __initdata = {
static int __init shark_pci_init(void)
{
- if (machine_is_shark())
- pci_common_init(&shark_pci);
+ if (machine_is_shark()) {
+ pci_common_init(&shark_pci, SHARK_PCIBIOS_MIN_IO,
+ SHARK_PCIBIOS_MIN_MEM);
+ }
+
return 0;
}
diff --git a/arch/arm/mach-tegra/include/mach/hardware.h b/arch/arm/mach-tegra/include/mach/hardware.h
index 84c2658..c0cc236 100644
--- a/arch/arm/mach-tegra/include/mach/hardware.h
+++ b/arch/arm/mach-tegra/include/mach/hardware.h
@@ -21,7 +21,8 @@
#ifndef __MACH_TEGRA_HARDWARE_H
#define __MACH_TEGRA_HARDWARE_H
-#define PCIBIOS_MIN_IO 0x1000
-#define PCIBIOS_MIN_MEM 0
+#define TEGRA_PCIBIOS_MIN_IO 0x1000
+#define TEGRA_PCIBIOS_MIN_MEM 0
+
#endif
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 53f5fa3..8ef8dc4 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -39,6 +39,7 @@
#include <mach/pinmux.h>
#include <mach/iomap.h>
#include <mach/clk.h>
+#include <mach/hardware.h>
/* register definitions */
#define AFI_OFFSET 0x3800
@@ -396,10 +397,10 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0;
pp->res[0].name = pp->io_space_name;
if (pp->index == 0) {
- pp->res[0].start = PCIBIOS_MIN_IO;
+ pp->res[0].start = TEGRA_PCIBIOS_MIN_IO;
pp->res[0].end = pp->res[0].start + SZ_32K - 1;
} else {
- pp->res[0].start = PCIBIOS_MIN_IO + SZ_32K;
+ pp->res[0].start = TEGRA_PCIBIOS_MIN_IO + SZ_32K;
pp->res[0].end = IO_SPACE_LIMIT;
}
pp->res[0].flags = IORESOURCE_IO;
@@ -909,7 +910,8 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1)
if (init_port1)
tegra_pcie_add_port(1, RP1_OFFSET, AFI_PEX1_CTRL);
- pci_common_init(&tegra_pcie_hw);
+ pci_common_init(&tegra_pcie_hw, TEGRA_PCIBIOS_MIN_IO,
+ TEGRA_PCIBIOS_MIN_MEM);
return 0;
}
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index 74e0ea8..5511a22 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -31,8 +31,8 @@
#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul
/* CIK guesswork */
-#define PCIBIOS_MIN_IO 0x44000000
-#define PCIBIOS_MIN_MEM 0x50000000
+#define VERSATILE_PCIBIOS_MIN_IO 0x44000000
+#define VERSATILE_PCIBIOS_MIN_MEM 0x50000000
/* macro to get at IO space when running virtually */
#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 13c7e5f..7ed57f8 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -354,7 +354,9 @@ static struct hw_pci versatile_pci __initdata = {
static int __init versatile_pci_init(void)
{
- pci_common_init(&versatile_pci);
+ pci_common_init(&versatile_pci, VERSATILE_PCIBIOS_MIN_IO,
+ VERSATILE_PCIBIOS_MIN_MEM);
+
return 0;
}
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 07/16] ARM: Make PCIBIOS_* into global variables.
2010-12-15 2:03 ` [PATCH 07/16] ARM: Make PCIBIOS_* into global variables Lennert Buytenhek
@ 2010-12-16 6:51 ` Mike Rapoport
0 siblings, 0 replies; 36+ messages in thread
From: Mike Rapoport @ 2010-12-16 6:51 UTC (permalink / raw)
To: linux-arm-kernel
On 12/15/10 04:03, Lennert Buytenhek wrote:
> From: Eric Miao <eric.miao@canonical.com>
>
> And initialized with pci_common_init(), so that now <asm/pci.h>
> doesn't depend on <mach/hardware.h> any more.
>
> Signed-off-by: Eric Miao <eric.miao@canonical.com>
>
> [ buytenh at wantstofly.org: adapt to "Always reassign PCI bus numbers"
> change, added support for cns3xxx, ixp4xx/vulcan-pci.c, mv78xx0,
> tegra, rename platform PCIBIOS_MIN_* defines to avoid namespace
> clashes, rename the arch-wide global variables themselves to
> PCIBIOS_MIN_* to match mips/sh, build fixes. ]
>
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
[ snip ]
> diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
> index 0f31305..f810a0e 100644
> --- a/arch/arm/mach-pxa/cm-x2xx-pci.c
> +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
> @@ -21,6 +21,8 @@
> #include <linux/irq.h>
> #include <linux/gpio.h>
>
> +#include <mach/hardware.h>
> +
> #include <asm/mach/pci.h>
> #include <asm/mach-types.h>
>
> @@ -214,8 +216,10 @@ static struct hw_pci cmx2xx_pci __initdata = {
>
> static int __init cmx2xx_init_pci(void)
> {
> - if (machine_is_armcore())
> - pci_common_init(&cmx2xx_pci);
> + if (machine_is_armcore()) {
> + pci_common_init(&cmx2xx_pci, PXA_PCIBIOS_MIN_IO,
> + PXA_PCIBIOS_MIN_MEM);
> + }
>
> return 0;
> }
> diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
> index ad448af..86ea43f 100644
> --- a/arch/arm/mach-pxa/include/mach/hardware.h
> +++ b/arch/arm/mach-pxa/include/mach/hardware.h
> @@ -318,8 +318,8 @@ extern unsigned long get_clock_tick_rate(void);
> #endif
>
> #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
> -#define PCIBIOS_MIN_IO 0
> -#define PCIBIOS_MIN_MEM 0
> +#define PXA_PCIBIOS_MIN_IO 0
> +#define PXA_PCIBIOS_MIN_MEM 0
> #define ARCH_HAS_DMA_SET_COHERENT_MASK
> #endif
>
I think that in PXA case the PCIBIOS_MIN_{IO,MEM} can be completely dropped from
the mach/hardware.h and defined locally in the cm-x2xx-pci.c. Since PXA does not
have on-SoC PCI controller, there's no much sense to define
PXA_PCIBIOS_MIN_{IO,MEM} at all.
> diff --git a/arch/arm/mach-shark/include/mach/hardware.h b/arch/arm/mach-shark/include/mach/hardware.h
> index 24639ce..7d3f0e3 100644
> --- a/arch/arm/mach-shark/include/mach/hardware.h
> +++ b/arch/arm/mach-shark/include/mach/hardware.h
> @@ -12,8 +12,9 @@
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 08/16] ARM: at91: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (6 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 07/16] ARM: Make PCIBIOS_* into global variables Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-17 9:55 ` Nicolas Ferre
2010-12-15 2:03 ` [PATCH 09/16] ARM: ep93xx: " Lennert Buytenhek
` (7 subsequent siblings)
15 siblings, 1 reply; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-at91/gpio.c | 7 +++++++
arch/arm/mach-at91/include/mach/gpio.h | 6 +-----
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index ae4772e..efcfe8b 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -44,6 +44,7 @@ static int at91_gpiolib_direction_output(struct gpio_chip *chip,
unsigned offset, int val);
static int at91_gpiolib_direction_input(struct gpio_chip *chip,
unsigned offset);
+static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset);
#define AT91_GPIO_CHIP(name, base_gpio, nr_gpio) \
{ \
@@ -53,6 +54,7 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
.direction_output = at91_gpiolib_direction_output, \
.get = at91_gpiolib_get, \
.set = at91_gpiolib_set, \
+ .to_irq = at91_gpiolib_to_irq, \
.dbg_show = at91_gpiolib_dbg_show, \
.base = base_gpio, \
.ngpio = nr_gpio, \
@@ -586,6 +588,11 @@ static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val)
__raw_writel(mask, pio + (val ? PIO_SODR : PIO_CODR));
}
+static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ return chip->base + offset;
+}
+
static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{
int i;
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index bfdd8ab..1e557f4 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -219,11 +219,7 @@ extern void at91_gpio_resume(void);
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
-
-static inline int gpio_to_irq(unsigned gpio)
-{
- return gpio;
-}
+#define gpio_to_irq __gpio_to_irq
static inline int irq_to_gpio(unsigned irq)
{
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 08/16] ARM: at91: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
2010-12-15 2:03 ` [PATCH 08/16] ARM: at91: Switch over to gpiolib ->to_irq() and __gpio_to_irq() Lennert Buytenhek
@ 2010-12-17 9:55 ` Nicolas Ferre
2010-12-17 13:00 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 36+ messages in thread
From: Nicolas Ferre @ 2010-12-17 9:55 UTC (permalink / raw)
To: linux-arm-kernel
Le 15/12/2010 03:03, Lennert Buytenhek :
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> arch/arm/mach-at91/gpio.c | 7 +++++++
> arch/arm/mach-at91/include/mach/gpio.h | 6 +-----
> 2 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
> index ae4772e..efcfe8b 100644
> --- a/arch/arm/mach-at91/gpio.c
> +++ b/arch/arm/mach-at91/gpio.c
> @@ -44,6 +44,7 @@ static int at91_gpiolib_direction_output(struct gpio_chip *chip,
> unsigned offset, int val);
> static int at91_gpiolib_direction_input(struct gpio_chip *chip,
> unsigned offset);
> +static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset);
>
> #define AT91_GPIO_CHIP(name, base_gpio, nr_gpio) \
> { \
> @@ -53,6 +54,7 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
> .direction_output = at91_gpiolib_direction_output, \
> .get = at91_gpiolib_get, \
> .set = at91_gpiolib_set, \
> + .to_irq = at91_gpiolib_to_irq, \
> .dbg_show = at91_gpiolib_dbg_show, \
> .base = base_gpio, \
> .ngpio = nr_gpio, \
> @@ -586,6 +588,11 @@ static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val)
> __raw_writel(mask, pio + (val ? PIO_SODR : PIO_CODR));
> }
>
> +static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset)
> +{
> + return chip->base + offset;
> +}
> +
> static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
> {
> int i;
> diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
> index bfdd8ab..1e557f4 100644
> --- a/arch/arm/mach-at91/include/mach/gpio.h
> +++ b/arch/arm/mach-at91/include/mach/gpio.h
> @@ -219,11 +219,7 @@ extern void at91_gpio_resume(void);
> #define gpio_get_value __gpio_get_value
> #define gpio_set_value __gpio_set_value
> #define gpio_cansleep __gpio_cansleep
> -
> -static inline int gpio_to_irq(unsigned gpio)
> -{
> - return gpio;
> -}
> +#define gpio_to_irq __gpio_to_irq
>
> static inline int irq_to_gpio(unsigned irq)
> {
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 09/16] ARM: ep93xx: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (7 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 08/16] ARM: at91: Switch over to gpiolib ->to_irq() and __gpio_to_irq() Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 2:03 ` [PATCH 10/16] ARM: gemini: " Lennert Buytenhek
` (6 subsequent siblings)
15 siblings, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-ep93xx/gpio.c | 31 +++++++++++++++++++++--------
arch/arm/mach-ep93xx/include/mach/gpio.h | 8 +++---
arch/arm/mach-ep93xx/include/mach/irqs.h | 4 +++
3 files changed, 30 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index cf547ad..d2b8d77 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -258,6 +258,7 @@ struct ep93xx_gpio_chip {
void __iomem *data_reg;
void __iomem *data_dir_reg;
+ int base_irq;
};
#define to_ep93xx_gpio_chip(c) container_of(c, struct ep93xx_gpio_chip, chip)
@@ -335,6 +336,16 @@ static void ep93xx_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
local_irq_restore(flags);
}
+static int ep93xx_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
+
+ if (ep93xx_chip->base_irq != NO_IRQ)
+ return ep93xx_chip->base_irq + offset;
+
+ return -EINVAL;
+}
+
static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{
struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
@@ -396,7 +407,7 @@ static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
}
}
-#define EP93XX_GPIO_BANK(name, dr, ddr, base_gpio) \
+#define EP93XX_GPIO_BANK(name, dr, ddr, base_gpio, _base_irq) \
{ \
.chip = { \
.label = name, \
@@ -404,23 +415,25 @@ static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
.direction_output = ep93xx_gpio_direction_output, \
.get = ep93xx_gpio_get, \
.set = ep93xx_gpio_set, \
+ .to_irq = ep93xx_gpio_to_irq, \
.dbg_show = ep93xx_gpio_dbg_show, \
.base = base_gpio, \
.ngpio = 8, \
}, \
.data_reg = EP93XX_GPIO_REG(dr), \
.data_dir_reg = EP93XX_GPIO_REG(ddr), \
+ .base_irq = _base_irq, \
}
static struct ep93xx_gpio_chip ep93xx_gpio_banks[] = {
- EP93XX_GPIO_BANK("A", 0x00, 0x10, 0),
- EP93XX_GPIO_BANK("B", 0x04, 0x14, 8),
- EP93XX_GPIO_BANK("C", 0x08, 0x18, 40),
- EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24),
- EP93XX_GPIO_BANK("E", 0x20, 0x24, 32),
- EP93XX_GPIO_BANK("F", 0x30, 0x34, 16),
- EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48),
- EP93XX_GPIO_BANK("H", 0x40, 0x44, 56),
+ EP93XX_GPIO_BANK("A", 0x00, 0x10, 0, IRQ_EP93XX_GPIO_A),
+ EP93XX_GPIO_BANK("B", 0x04, 0x14, 8, IRQ_EP93XX_GPIO_B),
+ EP93XX_GPIO_BANK("C", 0x08, 0x18, 40, NO_IRQ),
+ EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24, NO_IRQ),
+ EP93XX_GPIO_BANK("E", 0x20, 0x24, 32, NO_IRQ),
+ EP93XX_GPIO_BANK("F", 0x30, 0x34, 16, IRQ_EP93XX_GPIO_F),
+ EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48, NO_IRQ),
+ EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, NO_IRQ),
};
void __init ep93xx_gpio_init(void)
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h
index c991b14..a43d992 100644
--- a/arch/arm/mach-ep93xx/include/mach/gpio.h
+++ b/arch/arm/mach-ep93xx/include/mach/gpio.h
@@ -5,6 +5,8 @@
#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H
+#include <mach/irqs.h>
+
/* GPIO port A. */
#define EP93XX_GPIO_LINE_A(x) ((x) + 0)
#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
@@ -108,15 +110,13 @@ extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable);
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
+#define gpio_to_irq __gpio_to_irq
/*
* Map GPIO A0..A7 (0..7) to irq 64..71,
* B0..B7 (7..15) to irq 72..79, and
* F0..F7 (16..24) to irq 80..87.
*/
-#define gpio_to_irq(gpio) \
- (((gpio) <= EP93XX_GPIO_LINE_MAX_IRQ) ? (64 + (gpio)) : -EINVAL)
-
-#define irq_to_gpio(irq) ((irq) - gpio_to_irq(0))
+#define irq_to_gpio(irq) ((irq) - IRQ_EP93XX_GPIO_A)
#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/irqs.h b/arch/arm/mach-ep93xx/include/mach/irqs.h
index ff98390..ee95ac5 100644
--- a/arch/arm/mach-ep93xx/include/mach/irqs.h
+++ b/arch/arm/mach-ep93xx/include/mach/irqs.h
@@ -67,6 +67,10 @@
#define IRQ_EP93XX_SAI 60
#define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff
+#define IRQ_EP93XX_GPIO_A 64
+#define IRQ_EP93XX_GPIO_B 72
+#define IRQ_EP93XX_GPIO_F 80
+
#define NR_EP93XX_IRQS (64 + 24)
#define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x))
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 10/16] ARM: gemini: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (8 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 09/16] ARM: ep93xx: " Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-17 12:03 ` Hans Ulli Kroll
2010-12-15 2:03 ` [PATCH 11/16] ARM: mxc: " Lennert Buytenhek
` (5 subsequent siblings)
15 siblings, 1 reply; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-gemini/gpio.c | 6 ++++++
arch/arm/mach-gemini/include/mach/gpio.h | 2 +-
2 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index fe3bd5a..40259b7 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -197,12 +197,18 @@ static int gemini_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
return 0;
}
+static int gemini_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ return GPIO_IRQ_BASE + offset;
+}
+
static struct gpio_chip gemini_gpio_chip = {
.label = "Gemini",
.direction_input = gemini_gpio_direction_input,
.get = gemini_gpio_get,
.direction_output = gemini_gpio_direction_output,
.set = gemini_gpio_set,
+ .to_irq = gemini_gpio_to_irq,
.base = 0,
.ngpio = GPIO_PORT_NUM * 32,
};
diff --git a/arch/arm/mach-gemini/include/mach/gpio.h b/arch/arm/mach-gemini/include/mach/gpio.h
index 3bc2c70..41f8f6a 100644
--- a/arch/arm/mach-gemini/include/mach/gpio.h
+++ b/arch/arm/mach-gemini/include/mach/gpio.h
@@ -18,8 +18,8 @@
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
+#define gpio_to_irq __gpio_to_irq
-#define gpio_to_irq(x) ((x) + GPIO_IRQ_BASE)
#define irq_to_gpio(x) ((x) - GPIO_IRQ_BASE)
#endif /* __MACH_GPIO_H__ */
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 10/16] ARM: gemini: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
2010-12-15 2:03 ` [PATCH 10/16] ARM: gemini: " Lennert Buytenhek
@ 2010-12-17 12:03 ` Hans Ulli Kroll
0 siblings, 0 replies; 36+ messages in thread
From: Hans Ulli Kroll @ 2010-12-17 12:03 UTC (permalink / raw)
To: linux-arm-kernel
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
On Wed, 15 Dec 2010, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
> arch/arm/mach-gemini/gpio.c | 6 ++++++
> arch/arm/mach-gemini/include/mach/gpio.h | 2 +-
> 2 files changed, 7 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
> index fe3bd5a..40259b7 100644
> --- a/arch/arm/mach-gemini/gpio.c
> +++ b/arch/arm/mach-gemini/gpio.c
> @@ -197,12 +197,18 @@ static int gemini_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
> return 0;
> }
>
> +static int gemini_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
> +{
> + return GPIO_IRQ_BASE + offset;
> +}
> +
> static struct gpio_chip gemini_gpio_chip = {
> .label = "Gemini",
> .direction_input = gemini_gpio_direction_input,
> .get = gemini_gpio_get,
> .direction_output = gemini_gpio_direction_output,
> .set = gemini_gpio_set,
> + .to_irq = gemini_gpio_to_irq,
> .base = 0,
> .ngpio = GPIO_PORT_NUM * 32,
> };
> diff --git a/arch/arm/mach-gemini/include/mach/gpio.h b/arch/arm/mach-gemini/include/mach/gpio.h
> index 3bc2c70..41f8f6a 100644
> --- a/arch/arm/mach-gemini/include/mach/gpio.h
> +++ b/arch/arm/mach-gemini/include/mach/gpio.h
> @@ -18,8 +18,8 @@
> #define gpio_get_value __gpio_get_value
> #define gpio_set_value __gpio_set_value
> #define gpio_cansleep __gpio_cansleep
> +#define gpio_to_irq __gpio_to_irq
>
> -#define gpio_to_irq(x) ((x) + GPIO_IRQ_BASE)
> #define irq_to_gpio(x) ((x) - GPIO_IRQ_BASE)
>
> #endif /* __MACH_GPIO_H__ */
> --
> 1.7.1
>
>
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 11/16] ARM: mxc: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (9 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 10/16] ARM: gemini: " Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 14:22 ` Sascha Hauer
2010-12-15 2:03 ` [PATCH 12/16] ARM: pxa: Provide gpiolib ->to_irq() implementation Lennert Buytenhek
` (4 subsequent siblings)
15 siblings, 1 reply; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/plat-mxc/gpio.c | 9 +++++++++
arch/arm/plat-mxc/include/mach/gpio.h | 2 +-
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 9c3e362..8e97976 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -272,6 +272,14 @@ static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
spin_unlock_irqrestore(&port->lock, flags);
}
+static int mxc_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ struct mxc_gpio_port *port =
+ container_of(chip, struct mxc_gpio_port, chip);
+
+ return port->virtual_irq_start + offset;
+}
+
static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
{
struct mxc_gpio_port *port =
@@ -320,6 +328,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
port[i].chip.direction_output = mxc_gpio_direction_output;
port[i].chip.get = mxc_gpio_get;
port[i].chip.set = mxc_gpio_set;
+ port[i].chip.to_irq = mxc_gpio_to_irq;
port[i].chip.base = i * 32;
port[i].chip.ngpio = 32;
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
index af33b74..9062fe3 100644
--- a/arch/arm/plat-mxc/include/mach/gpio.h
+++ b/arch/arm/plat-mxc/include/mach/gpio.h
@@ -27,8 +27,8 @@
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
+#define gpio_to_irq __gpio_to_irq
-#define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio))
#define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START)
struct mxc_gpio_port {
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 11/16] ARM: mxc: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
2010-12-15 2:03 ` [PATCH 11/16] ARM: mxc: " Lennert Buytenhek
@ 2010-12-15 14:22 ` Sascha Hauer
2010-12-16 9:00 ` Shawn Guo
0 siblings, 1 reply; 36+ messages in thread
From: Sascha Hauer @ 2010-12-15 14:22 UTC (permalink / raw)
To: linux-arm-kernel
Hi Lennert,
[added Eric B?nard to Cc]
On Wed, Dec 15, 2010 at 03:03:45AM +0100, Lennert Buytenhek wrote:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Generally Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
We have some static initializers in the tree though which do not work
with this patch:
arch/arm/mach-mx3/mach-cpuimx35.c:71: .irq = gpio_to_irq(TSC2007_IRQGPIO),
arch/arm/mach-mx5/board-cpuimx51sd.c:139: .irq = gpio_to_irq(TSC2007_IRQGPIO),
arch/arm/mach-mx5/board-cpuimx51sd.c:250: .irq = gpio_to_irq(CAN_IRQGPIO)
Sascha
> ---
> arch/arm/plat-mxc/gpio.c | 9 +++++++++
> arch/arm/plat-mxc/include/mach/gpio.h | 2 +-
> 2 files changed, 10 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
> index 9c3e362..8e97976 100644
> --- a/arch/arm/plat-mxc/gpio.c
> +++ b/arch/arm/plat-mxc/gpio.c
> @@ -272,6 +272,14 @@ static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
> spin_unlock_irqrestore(&port->lock, flags);
> }
>
> +static int mxc_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
> +{
> + struct mxc_gpio_port *port =
> + container_of(chip, struct mxc_gpio_port, chip);
> +
> + return port->virtual_irq_start + offset;
> +}
> +
> static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
> {
> struct mxc_gpio_port *port =
> @@ -320,6 +328,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
> port[i].chip.direction_output = mxc_gpio_direction_output;
> port[i].chip.get = mxc_gpio_get;
> port[i].chip.set = mxc_gpio_set;
> + port[i].chip.to_irq = mxc_gpio_to_irq;
> port[i].chip.base = i * 32;
> port[i].chip.ngpio = 32;
>
> diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
> index af33b74..9062fe3 100644
> --- a/arch/arm/plat-mxc/include/mach/gpio.h
> +++ b/arch/arm/plat-mxc/include/mach/gpio.h
> @@ -27,8 +27,8 @@
> #define gpio_get_value __gpio_get_value
> #define gpio_set_value __gpio_set_value
> #define gpio_cansleep __gpio_cansleep
> +#define gpio_to_irq __gpio_to_irq
>
> -#define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio))
> #define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START)
>
> struct mxc_gpio_port {
> --
> 1.7.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 36+ messages in thread* [PATCH 11/16] ARM: mxc: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
2010-12-15 14:22 ` Sascha Hauer
@ 2010-12-16 9:00 ` Shawn Guo
2010-12-16 9:58 ` Uwe Kleine-König
0 siblings, 1 reply; 36+ messages in thread
From: Shawn Guo @ 2010-12-16 9:00 UTC (permalink / raw)
To: linux-arm-kernel
Hi Uwe,
Do I need to pick this up in my v7 of mxs patch-set?
On Wed, Dec 15, 2010 at 10:22 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> Hi Lennert,
>
> [added Eric B?nard to Cc]
>
> On Wed, Dec 15, 2010 at 03:03:45AM +0100, Lennert Buytenhek wrote:
>> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
>
> Generally Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
>
> We have some static initializers in the tree though which do not work
> with this patch:
>
> arch/arm/mach-mx3/mach-cpuimx35.c:71: ? ? ? ? ? .irq ? ? ? ? ? ?= gpio_to_irq(TSC2007_IRQGPIO),
> arch/arm/mach-mx5/board-cpuimx51sd.c:139: ? ? ? ? ? ? ? .irq = gpio_to_irq(TSC2007_IRQGPIO),
> arch/arm/mach-mx5/board-cpuimx51sd.c:250: ? ? ? ? ? ? ? .irq = gpio_to_irq(CAN_IRQGPIO)
>
> Sascha
>
>> ---
>> ?arch/arm/plat-mxc/gpio.c ? ? ? ? ? ? ?| ? ?9 +++++++++
>> ?arch/arm/plat-mxc/include/mach/gpio.h | ? ?2 +-
>> ?2 files changed, 10 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
>> index 9c3e362..8e97976 100644
>> --- a/arch/arm/plat-mxc/gpio.c
>> +++ b/arch/arm/plat-mxc/gpio.c
>> @@ -272,6 +272,14 @@ static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
>> ? ? ? spin_unlock_irqrestore(&port->lock, flags);
>> ?}
>>
>> +static int mxc_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
>> +{
>> + ? ? struct mxc_gpio_port *port =
>> + ? ? ? ? ? ? container_of(chip, struct mxc_gpio_port, chip);
>> +
>> + ? ? return port->virtual_irq_start + offset;
>> +}
>> +
>> ?static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
>> ?{
>> ? ? ? struct mxc_gpio_port *port =
>> @@ -320,6 +328,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
>> ? ? ? ? ? ? ? port[i].chip.direction_output = mxc_gpio_direction_output;
>> ? ? ? ? ? ? ? port[i].chip.get = mxc_gpio_get;
>> ? ? ? ? ? ? ? port[i].chip.set = mxc_gpio_set;
>> + ? ? ? ? ? ? port[i].chip.to_irq = mxc_gpio_to_irq;
>> ? ? ? ? ? ? ? port[i].chip.base = i * 32;
>> ? ? ? ? ? ? ? port[i].chip.ngpio = 32;
>>
>> diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
>> index af33b74..9062fe3 100644
>> --- a/arch/arm/plat-mxc/include/mach/gpio.h
>> +++ b/arch/arm/plat-mxc/include/mach/gpio.h
>> @@ -27,8 +27,8 @@
>> ?#define gpio_get_value ? ? ? ? ? ? ? __gpio_get_value
>> ?#define gpio_set_value ? ? ? ? ? ? ? __gpio_set_value
>> ?#define gpio_cansleep ? ? ? ? ? ? ? ?__gpio_cansleep
>> +#define gpio_to_irq ? ? ? ? ?__gpio_to_irq
>>
>> -#define gpio_to_irq(gpio) ? ?(MXC_GPIO_IRQ_START + (gpio))
>> ?#define irq_to_gpio(irq) ? ? ((irq) - MXC_GPIO_IRQ_START)
>>
>> ?struct mxc_gpio_port {
>> --
>> 1.7.1
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>
> --
> Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ? ? ? ? ? ? ? ? ? ? ? ? ? |
> Industrial Linux Solutions ? ? ? ? ? ? ? ? | http://www.pengutronix.de/ ?|
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 ? ?|
> Amtsgericht Hildesheim, HRA 2686 ? ? ? ? ? | Fax: ? +49-5121-206917-5555 |
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
Regards,
Shawn
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 12/16] ARM: pxa: Provide gpiolib ->to_irq() implementation.
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (10 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 11/16] ARM: mxc: " Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 2:03 ` [PATCH 13/16] ARM: mmp: Switch over to gpiolib's version of __gpio_to_irq() Lennert Buytenhek
` (3 subsequent siblings)
15 siblings, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-mmp/mmp2.c | 3 ++-
arch/arm/mach-mmp/pxa168.c | 3 ++-
arch/arm/mach-mmp/pxa910.c | 3 ++-
arch/arm/mach-pxa/pxa25x.c | 6 ++++--
arch/arm/mach-pxa/pxa27x.c | 3 ++-
arch/arm/mach-pxa/pxa3xx.c | 3 ++-
arch/arm/plat-pxa/gpio.c | 19 ++++++++++++++++++-
arch/arm/plat-pxa/include/plat/gpio.h | 5 ++++-
8 files changed, 36 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index daf3993..8fcfad3 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -106,7 +106,8 @@ static void __init mmp2_init_gpio(void)
for (i = 0; i < 6; i++)
__raw_writel(0xffffffff, APMASK(i));
- pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
+ pxa_init_gpio(IRQ_MMP2_GPIO, IRQ_GPIO_START, IRQ_GPIO_START,
+ 0, 167, NULL);
}
void __init mmp2_init_irq(void)
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 72b4e76..a4bf158 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -54,7 +54,8 @@ static void __init pxa168_init_gpio(void)
for (i = 0; i < 4; i++)
__raw_writel(0xffffffff, APMASK(i));
- pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
+ pxa_init_gpio(IRQ_PXA168_GPIOX, IRQ_GPIO_START, IRQ_GPIO_START,
+ 0, 127, NULL);
}
void __init pxa168_init_irq(void)
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 46f2d69..c0c25d0 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -91,7 +91,8 @@ static void __init pxa910_init_gpio(void)
for (i = 0; i < 4; i++)
__raw_writel(0xffffffff, APMASK(i));
- pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL);
+ pxa_init_gpio(IRQ_PXA910_AP_GPIO, IRQ_GPIO_START, IRQ_GPIO_START,
+ 0, 127, NULL);
}
void __init pxa910_init_irq(void)
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index de53f2e..9b943f1 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -309,14 +309,16 @@ set_pwer:
void __init pxa25x_init_irq(void)
{
pxa_init_irq(32, pxa25x_set_wake);
- pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake);
+ pxa_init_gpio(IRQ_GPIO_2_x, IRQ_GPIO0, PXA_GPIO_IRQ_BASE,
+ 2, 84, pxa25x_set_wake);
}
#ifdef CONFIG_CPU_PXA26x
void __init pxa26x_init_irq(void)
{
pxa_init_irq(32, pxa25x_set_wake);
- pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake);
+ pxa_init_gpio(IRQ_GPIO_2_x, IRQ_GPIO0, PXA_GPIO_IRQ_BASE,
+ 2, 89, pxa25x_set_wake);
}
#endif
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d1fbf29..bf0d7e9 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -367,7 +367,8 @@ static int pxa27x_set_wake(unsigned int irq, unsigned int on)
void __init pxa27x_init_irq(void)
{
pxa_init_irq(34, pxa27x_set_wake);
- pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
+ pxa_init_gpio(IRQ_GPIO_2_x, IRQ_GPIO0, PXA_GPIO_IRQ_BASE,
+ 2, 120, pxa27x_set_wake);
}
/*
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index d1c747c..41c7fc3 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -577,7 +577,8 @@ void __init pxa3xx_init_irq(void)
pxa_init_irq(56, pxa3xx_set_wake);
pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
- pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
+ pxa_init_gpio(IRQ_GPIO_2_x, IRQ_GPIO0, PXA_GPIO_IRQ_BASE,
+ 2, 127, NULL);
}
/*
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index 98548c6..1df5f13 100644
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -20,6 +20,8 @@
#include <mach/gpio.h>
+int pxa_secondary_irq_0_base;
+int pxa_secondary_irq_2_base;
int pxa_last_gpio;
struct pxa_gpio_chip {
@@ -107,6 +109,16 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
(value ? GPSR_OFFSET : GPCR_OFFSET));
}
+static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ int gpio = chip->base + offset;
+
+ if (gpio < 2)
+ return pxa_secondary_irq_0_base + gpio;
+ else
+ return pxa_secondary_irq_2_base + gpio;
+}
+
static int __init pxa_init_gpio_chip(int gpio_end)
{
int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1;
@@ -131,6 +143,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
c->direction_output = pxa_gpio_direction_output;
c->get = pxa_gpio_get;
c->set = pxa_gpio_set;
+ c->to_irq = pxa_gpio_to_irq;
/* number of GPIOs on last bank may be less than 32 */
c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32;
@@ -266,11 +279,15 @@ static struct irq_chip pxa_muxed_gpio_chip = {
.set_type = pxa_gpio_irq_type,
};
-void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
+void __init pxa_init_gpio(int mux_irq, int secondary_irq_0_base,
+ int secondary_irq_2_base,
+ int start, int end, set_wake_t fn)
{
struct pxa_gpio_chip *c;
int gpio, irq;
+ pxa_secondary_irq_0_base = secondary_irq_0_base;
+ pxa_secondary_irq_2_base = secondary_irq_2_base;
pxa_last_gpio = end;
/* Initialize GPIO chips */
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
index 44248cb..60c0f83 100644
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ b/arch/arm/plat-pxa/include/plat/gpio.h
@@ -58,5 +58,8 @@ extern int pxa_last_gpio;
typedef int (*set_wake_t)(unsigned int irq, unsigned int on);
-extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
+extern void pxa_init_gpio(int mux_irq, int secondary_irq_0_base,
+ int secondary_irq_2_base,
+ int start, int end, set_wake_t fn);
+
#endif /* __PLAT_GPIO_H */
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 13/16] ARM: mmp: Switch over to gpiolib's version of __gpio_to_irq().
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (11 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 12/16] ARM: pxa: Provide gpiolib ->to_irq() implementation Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 2:03 ` [PATCH 14/16] ARM: pxa: " Lennert Buytenhek
` (2 subsequent siblings)
15 siblings, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-mmp/aspenite.c | 4 ++--
arch/arm/mach-mmp/flint.c | 4 ++--
arch/arm/mach-mmp/include/mach/gpio.h | 3 ++-
arch/arm/mach-mmp/tavorevb.c | 4 ++--
arch/arm/mach-mmp/teton_bga.c | 2 +-
5 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 06b5fa8..bae9e65 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -120,8 +120,8 @@ static struct resource smc91x_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(27),
- .end = gpio_to_irq(27),
+ .start = IRQ_GPIO_START + 27,
+ .end = IRQ_GPIO_START + 27,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index bdeb6db..4c5b63e 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -87,8 +87,8 @@ static struct resource smc91x_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(155),
- .end = gpio_to_irq(155),
+ .start = IRQ_GPIO_START + 155,
+ .end = IRQ_GPIO_START + 155,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index ee8b02e..c3e799f 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -12,8 +12,9 @@
#define NR_BUILTIN_GPIO (192)
+#define gpio_to_irq __gpio_to_irq
+
#define gpio_to_bank(gpio) ((gpio) >> 5)
-#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio))
#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START)
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index c296b75..dffdcba 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -71,8 +71,8 @@ static struct resource smc91x_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(80),
- .end = gpio_to_irq(80),
+ .start = IRQ_GPIO_START + 80,
+ .end = IRQ_GPIO_START + 80,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index bbe4727..f070603 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -66,7 +66,7 @@ static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
{
I2C_BOARD_INFO("ds1337", 0x68),
- .irq = gpio_to_irq(RTC_INT_GPIO)
+ .irq = IRQ_GPIO_START + RTC_INT_GPIO,
},
};
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 14/16] ARM: pxa: Switch over to gpiolib's version of __gpio_to_irq().
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (12 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 13/16] ARM: mmp: Switch over to gpiolib's version of __gpio_to_irq() Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 2:03 ` [PATCH 15/16] ARM: sa1100: Switch over to gpiolib ->to_irq() and __gpio_to_irq() Lennert Buytenhek
2010-12-15 2:04 ` [PATCH 16/16] ARM: w90x900: " Lennert Buytenhek
15 siblings, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-pxa/capc7117.c | 12 ++++++------
arch/arm/mach-pxa/cm-x270.c | 2 +-
arch/arm/mach-pxa/colibri-pxa270.c | 6 +++---
arch/arm/mach-pxa/colibri-pxa300.c | 4 ++--
arch/arm/mach-pxa/colibri-pxa320.c | 4 ++--
arch/arm/mach-pxa/corgi.c | 2 +-
arch/arm/mach-pxa/hx4700.c | 18 +++++++++---------
arch/arm/mach-pxa/icontrol.c | 8 ++++----
arch/arm/mach-pxa/include/mach/csb726.h | 4 ++--
arch/arm/mach-pxa/include/mach/gpio.h | 3 ++-
arch/arm/mach-pxa/littleton.c | 2 +-
arch/arm/mach-pxa/magician.c | 8 ++++----
arch/arm/mach-pxa/mioa701.c | 8 ++++----
arch/arm/mach-pxa/mxm8x10.c | 4 ++--
arch/arm/mach-pxa/poodle.c | 2 +-
arch/arm/mach-pxa/raumfeld.c | 8 ++++----
arch/arm/mach-pxa/saar.c | 6 +++---
arch/arm/mach-pxa/spitz.c | 2 +-
arch/arm/mach-pxa/stargate2.c | 4 ++--
arch/arm/mach-pxa/tavorevb.c | 4 ++--
arch/arm/mach-pxa/tavorevb3.c | 2 +-
arch/arm/mach-pxa/tosa.c | 4 ++--
arch/arm/mach-pxa/viper.c | 12 ++++++------
arch/arm/mach-pxa/vpac270.c | 4 ++--
arch/arm/mach-pxa/z2.c | 2 +-
arch/arm/mach-pxa/zeus.c | 20 ++++++++++----------
26 files changed, 78 insertions(+), 77 deletions(-)
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 4bd7a3c..92d4966 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -50,8 +50,8 @@ static struct resource capc7117_ide_resources[] = {
.flags = IORESOURCE_MEM
},
[2] = {
- .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
- .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
+ .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO76)),
+ .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO76)),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
}
};
@@ -80,7 +80,7 @@ static void __init capc7117_ide_init(void)
static struct plat_serial8250_port ti16c752_platform_data[] = {
[0] = {
.mapbase = 0x14000000,
- .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)),
+ .irq = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO78)),
.irqflags = IRQF_TRIGGER_RISING,
.flags = TI16C752_FLAGS,
.iotype = UPIO_MEM,
@@ -89,7 +89,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
},
[1] = {
.mapbase = 0x14000040,
- .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)),
+ .irq = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO79)),
.irqflags = IRQF_TRIGGER_RISING,
.flags = TI16C752_FLAGS,
.iotype = UPIO_MEM,
@@ -98,7 +98,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
},
[2] = {
.mapbase = 0x14000080,
- .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)),
+ .irq = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO80)),
.irqflags = IRQF_TRIGGER_RISING,
.flags = TI16C752_FLAGS,
.iotype = UPIO_MEM,
@@ -107,7 +107,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
},
[3] = {
.mapbase = 0x140000c0,
- .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)),
+ .irq = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO81)),
.irqflags = IRQF_TRIGGER_RISING,
.flags = TI16C752_FLAGS,
.iotype = UPIO_MEM,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index a9926bb..b26387c 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -381,7 +381,7 @@ static struct spi_board_info cm_x270_spi_devices[] __initdata = {
.modalias = "libertas_spi",
.max_speed_hz = 13000000,
.bus_num = 2,
- .irq = gpio_to_irq(95),
+ .irq = IRQ_GPIO(95),
.chip_select = 0,
.controller_data = &cm_x270_libertas_chip,
.platform_data = &cm_x270_libertas_pdata,
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index bc04510..b2603d8 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -121,8 +121,8 @@ static struct resource colibri_pxa270_dm9000_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
- .end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
+ .start = IRQ_GPIO(GPIO114_COLIBRI_PXA270_ETH_IRQ),
+ .end = IRQ_GPIO(GPIO114_COLIBRI_PXA270_ETH_IRQ),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
},
};
@@ -152,7 +152,7 @@ static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
};
static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
- .irq = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ),
+ .irq = IRQ_GPIO(GPIO113_COLIBRI_PXA270_TS_IRQ),
};
static struct platform_device colibri_pxa270_ucb1400_device = {
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index a70b256..2beb10a 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -49,8 +49,8 @@ static struct resource colibri_asix_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
- .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
+ .start = IRQ_GPIO(COLIBRI_ETH_IRQ_GPIO),
+ .end = IRQ_GPIO(COLIBRI_ETH_IRQ_GPIO),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
}
};
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index ca5f29e..6eba496 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -53,8 +53,8 @@ static struct resource colibri_asix_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
- .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
+ .start = IRQ_GPIO(COLIBRI_ETH_IRQ_GPIO),
+ .end = IRQ_GPIO(COLIBRI_ETH_IRQ_GPIO),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
}
};
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 821229a..3582b29 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -531,7 +531,7 @@ static struct spi_board_info corgi_spi_devices[] = {
.chip_select = 0,
.platform_data = &corgi_ads7846_info,
.controller_data= &corgi_ads7846_chip,
- .irq = gpio_to_irq(CORGI_GPIO_TP_INT),
+ .irq = IRQ_GPIO(CORGI_GPIO_TP_INT),
}, {
.modalias = "corgi-lcd",
.max_speed_hz = 50000,
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 76d93a2..4416db5 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -288,8 +288,8 @@ static struct resource asic3_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
- .end = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
+ .start = IRQ_GPIO(GPIO12_HX4700_ASIC3_IRQ),
+ .end = IRQ_GPIO(GPIO12_HX4700_ASIC3_IRQ),
.flags = IORESOURCE_IRQ,
},
/* SD part */
@@ -299,8 +299,8 @@ static struct resource asic3_resources[] = {
.flags = IORESOURCE_MEM,
},
[3] = {
- .start = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
- .end = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
+ .start = IRQ_GPIO(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
+ .end = IRQ_GPIO(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
.flags = IORESOURCE_IRQ,
},
};
@@ -623,7 +623,7 @@ static struct spi_board_info tsc2046_board_info[] __initdata = {
.modalias = "ads7846",
.bus_num = 2,
.max_speed_hz = 2600000, /* 100 kHz sample rate */
- .irq = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ),
+ .irq = IRQ_GPIO(GPIO58_HX4700_TSC2046_nPENIRQ),
.platform_data = &tsc2046_info,
.controller_data = &tsc2046_chip,
},
@@ -671,15 +671,15 @@ static struct resource power_supply_resources[] = {
.name = "ac",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE,
- .start = gpio_to_irq(GPIOD9_nAC_IN),
- .end = gpio_to_irq(GPIOD9_nAC_IN),
+ .start = IRQ_GPIO(GPIOD9_nAC_IN),
+ .end = IRQ_GPIO(GPIOD9_nAC_IN),
},
[1] = {
.name = "usb",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE,
- .start = gpio_to_irq(GPIOD14_nUSBC_DETECT),
- .end = gpio_to_irq(GPIOD14_nUSBC_DETECT),
+ .start = IRQ_GPIO(GPIOD14_nUSBC_DETECT),
+ .end = IRQ_GPIO(GPIOD14_nUSBC_DETECT),
},
};
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index d51ee3d..eea11de 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -86,7 +86,7 @@ static struct spi_board_info mcp251x_board_info[] = {
.chip_select = 0,
.platform_data = &mcp251x_info,
.controller_data = &mcp251x_chip_info1,
- .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ1)
+ .irq = IRQ_GPIO(ICONTROL_MCP251x_nIRQ1)
},
{
.modalias = "mcp2515",
@@ -95,7 +95,7 @@ static struct spi_board_info mcp251x_board_info[] = {
.chip_select = 1,
.platform_data = &mcp251x_info,
.controller_data = &mcp251x_chip_info2,
- .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ2)
+ .irq = IRQ_GPIO(ICONTROL_MCP251x_nIRQ2)
},
{
.modalias = "mcp2515",
@@ -104,7 +104,7 @@ static struct spi_board_info mcp251x_board_info[] = {
.chip_select = 0,
.platform_data = &mcp251x_info,
.controller_data = &mcp251x_chip_info3,
- .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ3)
+ .irq = IRQ_GPIO(ICONTROL_MCP251x_nIRQ3)
},
{
.modalias = "mcp2515",
@@ -113,7 +113,7 @@ static struct spi_board_info mcp251x_board_info[] = {
.chip_select = 1,
.platform_data = &mcp251x_info,
.controller_data = &mcp251x_chip_info4,
- .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ4)
+ .irq = IRQ_GPIO(ICONTROL_MCP251x_nIRQ4)
}
};
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h
index 747ab1a..6eafb1a 100644
--- a/arch/arm/mach-pxa/include/mach/csb726.h
+++ b/arch/arm/mach-pxa/include/mach/csb726.h
@@ -19,8 +19,8 @@
#define CSB726_FLASH_SIZE (64 * 1024 * 1024)
#define CSB726_FLASH_uMON (8 * 1024 * 1024)
-#define CSB726_IRQ_LAN gpio_to_irq(CSB726_GPIO_IRQ_LAN)
-#define CSB726_IRQ_SM501 gpio_to_irq(CSB726_GPIO_IRQ_SM501)
+#define CSB726_IRQ_LAN IRQ_GPIO(CSB726_GPIO_IRQ_LAN)
+#define CSB726_IRQ_SM501 IRQ_GPIO(CSB726_GPIO_IRQ_SM501)
#endif
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index b024a8b..12d7ea9 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -101,8 +101,9 @@
#define NR_BUILTIN_GPIO 128
+#define gpio_to_irq __gpio_to_irq
+
#define gpio_to_bank(gpio) ((gpio) >> 5)
-#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
#define irq_to_gpio(irq) IRQ_TO_GPIO(irq)
#ifdef CONFIG_CPU_PXA26x
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 41aa89e..20681b2 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -395,7 +395,7 @@ static struct i2c_board_info littleton_i2c_info[] = {
.type = "da9034",
.addr = 0x34,
.platform_data = &littleton_da9034_info,
- .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)),
+ .irq = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO18)),
},
[1] = {
.type = "max7320",
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 9066376..41a7d80 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -184,8 +184,8 @@ static struct resource egpio_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ),
- .end = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ),
+ .start = IRQ_GPIO(GPIO13_MAGICIAN_CPLD_IRQ),
+ .end = IRQ_GPIO(GPIO13_MAGICIAN_CPLD_IRQ),
.flags = IORESOURCE_IRQ,
},
};
@@ -477,8 +477,8 @@ static struct resource pasic3_resources[] = {
},
/* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */
[1] = {
- .start = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ),
- .end = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ),
+ .start = IRQ_GPIO(GPIO107_MAGICIAN_DS1WM_IRQ),
+ .end = IRQ_GPIO(GPIO107_MAGICIAN_DS1WM_IRQ),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index f5fb915..3eaeee0 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -612,15 +612,15 @@ static struct pda_power_pdata power_pdata = {
static struct resource power_resources[] = {
[0] = {
.name = "ac",
- .start = gpio_to_irq(GPIO96_AC_DETECT),
- .end = gpio_to_irq(GPIO96_AC_DETECT),
+ .start = IRQ_GPIO(GPIO96_AC_DETECT),
+ .end = IRQ_GPIO(GPIO96_AC_DETECT),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE,
},
[1] = {
.name = "usb",
- .start = gpio_to_irq(GPIO13_nUSB_DETECT),
- .end = gpio_to_irq(GPIO13_nUSB_DETECT),
+ .start = IRQ_GPIO(GPIO13_nUSB_DETECT),
+ .end = IRQ_GPIO(GPIO13_nUSB_DETECT),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE,
},
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 462167a..c36f566 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -416,8 +416,8 @@ static struct resource dm9k_resources[] = {
.flags = IORESOURCE_MEM
},
[2] = {
- .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
- .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
+ .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO9)),
+ .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO9)),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
}
};
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 93a191c..414aaf7 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -211,7 +211,7 @@ static struct spi_board_info poodle_spi_devices[] = {
.bus_num = 1,
.platform_data = &poodle_ads7846_info,
.controller_data= &poodle_ads7846_chip,
- .irq = gpio_to_irq(POODLE_GPIO_TP_INT),
+ .irq = IRQ_GPIO(POODLE_GPIO_TP_INT),
},
};
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 4121d03..07757f0 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -296,8 +296,8 @@ static struct resource smc91x_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = gpio_to_irq(GPIO_ETH_IRQ),
- .end = gpio_to_irq(GPIO_ETH_IRQ),
+ .start = IRQ_GPIO(GPIO_ETH_IRQ),
+ .end = IRQ_GPIO(GPIO_ETH_IRQ),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
}
};
@@ -668,7 +668,7 @@ static struct lis3lv02d_platform_data lis3_pdata = {
.chip_select = 1, \
.controller_data = (void *) GPIO_ACCEL_CS, \
.platform_data = &lis3_pdata, \
- .irq = gpio_to_irq(GPIO_ACCEL_IRQ), \
+ .irq = IRQ_GPIO(GPIO_ACCEL_IRQ), \
}
#define SPI_DAC7512 \
@@ -952,7 +952,7 @@ static struct eeti_ts_platform_data eeti_ts_pdata = {
static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
.type = "eeti_ts",
.addr = 0x0a,
- .irq = gpio_to_irq(GPIO_TOUCH_IRQ),
+ .irq = IRQ_GPIO(GPIO_TOUCH_IRQ),
.platform_data = &eeti_ts_pdata,
};
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index ffa50e6..5c98132 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -96,8 +96,8 @@ static struct resource smc91x_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
- .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
+ .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO97)),
+ .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO97)),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
@@ -502,7 +502,7 @@ static struct i2c_board_info saar_i2c_info[] = {
.type = "da9034",
.addr = 0x34,
.platform_data = &saar_da9034_info,
- .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+ .irq = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO83)),
},
};
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index f736119..bd68a26 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -550,7 +550,7 @@ static struct spi_board_info spitz_spi_devices[] = {
.chip_select = 0,
.platform_data = &spitz_ads7846_info,
.controller_data = &spitz_ads7846_chip,
- .irq = gpio_to_irq(SPITZ_GPIO_TP_INT),
+ .irq = IRQ_GPIO(SPITZ_GPIO_TP_INT),
}, {
.modalias = "corgi-lcd",
.max_speed_hz = 50000,
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 738adc1..8160af9 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -545,7 +545,7 @@ static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
.type = "da9030",
.addr = 0x49,
.platform_data = &imote2_da9030_pdata,
- .irq = gpio_to_irq(1),
+ .irq = IRQ_GPIO(1),
},
};
@@ -912,7 +912,7 @@ static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
.type = "da9030",
.addr = 0x49,
.platform_data = &stargate2_da9030_pdata,
- .irq = gpio_to_irq(1),
+ .irq = IRQ_GPIO(1),
},
};
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 2ea7545..b1780f2 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -85,8 +85,8 @@ static struct resource smc91x_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
- .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
+ .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO47)),
+ .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO47)),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index dc30116..90471a8 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -102,7 +102,7 @@ static struct i2c_board_info evb3_i2c_info[] = {
.type = "88PM860x",
.addr = 0x34,
.platform_data = &evb3_pm8607_info,
- .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+ .irq = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO83)),
},
};
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 0ee1df4..42028a0 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -394,8 +394,8 @@ static struct pda_power_pdata tosa_power_data = {
static struct resource tosa_power_resource[] = {
{
.name = "ac",
- .start = gpio_to_irq(TOSA_GPIO_AC_IN),
- .end = gpio_to_irq(TOSA_GPIO_AC_IN),
+ .start = IRQ_GPIO(TOSA_GPIO_AC_IN),
+ .end = IRQ_GPIO(TOSA_GPIO_AC_IN),
.flags = IORESOURCE_IRQ |
IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 438fc9a..3abec52 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -422,8 +422,8 @@ static struct resource smc91x_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = gpio_to_irq(VIPER_ETH_GPIO),
- .end = gpio_to_irq(VIPER_ETH_GPIO),
+ .start = IRQ_GPIO(VIPER_ETH_GPIO),
+ .end = IRQ_GPIO(VIPER_ETH_GPIO),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
},
[2] = {
@@ -546,7 +546,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
/* External UARTs */
{
.mapbase = VIPER_UARTA_PHYS,
- .irq = gpio_to_irq(VIPER_UARTA_GPIO),
+ .irq = IRQ_GPIO(VIPER_UARTA_GPIO),
.irqflags = IRQF_TRIGGER_RISING,
.uartclk = 1843200,
.regshift = 1,
@@ -556,7 +556,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
},
{
.mapbase = VIPER_UARTB_PHYS,
- .irq = gpio_to_irq(VIPER_UARTB_GPIO),
+ .irq = IRQ_GPIO(VIPER_UARTB_GPIO),
.irqflags = IRQF_TRIGGER_RISING,
.uartclk = 1843200,
.regshift = 1,
@@ -596,8 +596,8 @@ static struct resource isp116x_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
- .start = gpio_to_irq(VIPER_USB_GPIO),
- .end = gpio_to_irq(VIPER_USB_GPIO),
+ .start = IRQ_GPIO(VIPER_USB_GPIO),
+ .end = IRQ_GPIO(VIPER_USB_GPIO),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
},
};
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index f45ac09..7906125 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -612,8 +612,8 @@ static struct resource vpac270_ide_resources[] = {
.flags = IORESOURCE_DMA
},
[3] = { /* IDE IRQ pin */
- .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
- .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
+ .start = IRQ_GPIO(GPIO36_VPAC270_IDE_IRQ),
+ .end = IRQ_GPIO(GPIO36_VPAC270_IDE_IRQ),
.flags = IORESOURCE_IRQ
}
};
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index fefde98..cac7e09 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -574,7 +574,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
.modalias = "libertas_spi",
.platform_data = &z2_lbs_pdata,
.controller_data = &z2_lbs_chip_info,
- .irq = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ),
+ .irq = IRQ_GPIO(GPIO36_ZIPITZ2_WIFI_IRQ),
.max_speed_hz = 13000000,
.bus_num = 1,
.chip_select = 0,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index dea46a2..60a959a 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -232,7 +232,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
/* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
{ /* COM1 */
.mapbase = 0x10000000,
- .irq = gpio_to_irq(ZEUS_UARTA_GPIO),
+ .irq = IRQ_GPIO(ZEUS_UARTA_GPIO),
.irqflags = IRQF_TRIGGER_RISING,
.uartclk = 14745600,
.regshift = 1,
@@ -241,7 +241,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
},
{ /* COM2 */
.mapbase = 0x10800000,
- .irq = gpio_to_irq(ZEUS_UARTB_GPIO),
+ .irq = IRQ_GPIO(ZEUS_UARTB_GPIO),
.irqflags = IRQF_TRIGGER_RISING,
.uartclk = 14745600,
.regshift = 1,
@@ -250,7 +250,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
},
{ /* COM3 */
.mapbase = 0x11000000,
- .irq = gpio_to_irq(ZEUS_UARTC_GPIO),
+ .irq = IRQ_GPIO(ZEUS_UARTC_GPIO),
.irqflags = IRQF_TRIGGER_RISING,
.uartclk = 14745600,
.regshift = 1,
@@ -259,7 +259,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
},
{ /* COM4 */
.mapbase = 0x11800000,
- .irq = gpio_to_irq(ZEUS_UARTD_GPIO),
+ .irq = IRQ_GPIO(ZEUS_UARTD_GPIO),
.irqflags = IRQF_TRIGGER_RISING,
.uartclk = 14745600,
.regshift = 1,
@@ -320,8 +320,8 @@ static struct resource zeus_dm9k0_resource[] = {
.flags = IORESOURCE_MEM
},
[2] = {
- .start = gpio_to_irq(ZEUS_ETH0_GPIO),
- .end = gpio_to_irq(ZEUS_ETH0_GPIO),
+ .start = IRQ_GPIO(ZEUS_ETH0_GPIO),
+ .end = IRQ_GPIO(ZEUS_ETH0_GPIO),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
},
};
@@ -338,8 +338,8 @@ static struct resource zeus_dm9k1_resource[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
- .start = gpio_to_irq(ZEUS_ETH1_GPIO),
- .end = gpio_to_irq(ZEUS_ETH1_GPIO),
+ .start = IRQ_GPIO(ZEUS_ETH1_GPIO),
+ .end = IRQ_GPIO(ZEUS_ETH1_GPIO),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
},
};
@@ -422,7 +422,7 @@ static struct spi_board_info zeus_spi_board_info[] = {
[0] = {
.modalias = "mcp2515",
.platform_data = &zeus_mcp2515_pdata,
- .irq = gpio_to_irq(ZEUS_CAN_GPIO),
+ .irq = IRQ_GPIO(ZEUS_CAN_GPIO),
.max_speed_hz = 1*1000*1000,
.bus_num = 3,
.mode = SPI_MODE_0,
@@ -752,7 +752,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
{
I2C_BOARD_INFO("pca9535", 0x20),
.platform_data = &zeus_pca953x_pdata[2],
- .irq = gpio_to_irq(ZEUS_EXTGPIO_GPIO),
+ .irq = IRQ_GPIO(ZEUS_EXTGPIO_GPIO),
},
{ I2C_BOARD_INFO("lm75a", 0x48) },
{ I2C_BOARD_INFO("24c01", 0x50) },
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 15/16] ARM: sa1100: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (13 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 14/16] ARM: pxa: " Lennert Buytenhek
@ 2010-12-15 2:03 ` Lennert Buytenhek
2010-12-15 2:04 ` [PATCH 16/16] ARM: w90x900: " Lennert Buytenhek
15 siblings, 0 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:03 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-sa1100/gpio.c | 9 +++++++++
arch/arm/mach-sa1100/include/mach/gpio.h | 3 +--
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-sa1100/gpio.c b/arch/arm/mach-sa1100/gpio.c
index 0d3829a..07fda32 100644
--- a/arch/arm/mach-sa1100/gpio.c
+++ b/arch/arm/mach-sa1100/gpio.c
@@ -49,12 +49,21 @@ static int sa1100_direction_output(struct gpio_chip *chip, unsigned offset, int
return 0;
}
+static int sa1100_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ if (offset <= 10)
+ return IRQ_GPIO0 + offset;
+
+ return IRQ_GPIO11 + (offset - 11);
+}
+
static struct gpio_chip sa1100_gpio_chip = {
.label = "gpio",
.direction_input = sa1100_direction_input,
.direction_output = sa1100_direction_output,
.set = sa1100_gpio_set,
.get = sa1100_gpio_get,
+ .to_irq = sa1100_gpio_to_irq,
.base = 0,
.ngpio = GPIO_MAX + 1,
};
diff --git a/arch/arm/mach-sa1100/include/mach/gpio.h b/arch/arm/mach-sa1100/include/mach/gpio.h
index 7befc10..982b8f0 100644
--- a/arch/arm/mach-sa1100/include/mach/gpio.h
+++ b/arch/arm/mach-sa1100/include/mach/gpio.h
@@ -48,9 +48,8 @@ static inline void gpio_set_value(unsigned gpio, int value)
}
#define gpio_cansleep __gpio_cansleep
+#define gpio_to_irq __gpio_to_irq
-#define gpio_to_irq(gpio) ((gpio < 11) ? (IRQ_GPIO0 + gpio) : \
- (IRQ_GPIO11 - 11 + gpio))
#define irq_to_gpio(irq) ((irq < IRQ_GPIO11_27) ? (irq - IRQ_GPIO0) : \
(irq - IRQ_GPIO11 + 11))
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 16/16] ARM: w90x900: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
[not found] <cover.1292377339.git.buytenh@wantstofly.org>
` (14 preceding siblings ...)
2010-12-15 2:03 ` [PATCH 15/16] ARM: sa1100: Switch over to gpiolib ->to_irq() and __gpio_to_irq() Lennert Buytenhek
@ 2010-12-15 2:04 ` Lennert Buytenhek
2010-12-15 2:08 ` Wan ZongShun
` (2 more replies)
15 siblings, 3 replies; 36+ messages in thread
From: Lennert Buytenhek @ 2010-12-15 2:04 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
---
arch/arm/mach-w90x900/gpio.c | 6 ++++++
arch/arm/mach-w90x900/include/mach/gpio.h | 6 +-----
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-w90x900/gpio.c b/arch/arm/mach-w90x900/gpio.c
index ba05aec..dbf1825 100644
--- a/arch/arm/mach-w90x900/gpio.c
+++ b/arch/arm/mach-w90x900/gpio.c
@@ -40,6 +40,7 @@
.direction_output = nuc900_dir_output, \
.get = nuc900_gpio_get, \
.set = nuc900_gpio_set, \
+ .to_irq = nuc900_gpio_to_irq, \
.base = base_gpio, \
.ngpio = nr_gpio, \
} \
@@ -130,6 +131,11 @@ static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
return 0;
}
+static int nuc900_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ return chip->base + offset;
+}
+
static struct nuc900_gpio_chip nuc900_gpio[] = {
NUC900_GPIO_CHIP("GROUPC", 0, 16),
NUC900_GPIO_CHIP("GROUPD", 16, 10),
diff --git a/arch/arm/mach-w90x900/include/mach/gpio.h b/arch/arm/mach-w90x900/include/mach/gpio.h
index 034da3e..f9b9a37 100644
--- a/arch/arm/mach-w90x900/include/mach/gpio.h
+++ b/arch/arm/mach-w90x900/include/mach/gpio.h
@@ -20,11 +20,7 @@
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
-
-static inline int gpio_to_irq(unsigned gpio)
-{
- return gpio;
-}
+#define gpio_to_irq __gpio_to_irq
static inline int irq_to_gpio(unsigned irq)
{
--
1.7.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 16/16] ARM: w90x900: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
2010-12-15 2:04 ` [PATCH 16/16] ARM: w90x900: " Lennert Buytenhek
@ 2010-12-15 2:08 ` Wan ZongShun
2010-12-15 2:09 ` Wan ZongShun
2010-12-15 2:18 ` Wan ZongShun
2 siblings, 0 replies; 36+ messages in thread
From: Wan ZongShun @ 2010-12-15 2:08 UTC (permalink / raw)
To: linux-arm-kernel
2010/12/15 Lennert Buytenhek <buytenh@wantstofly.org>:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
> ?arch/arm/mach-w90x900/gpio.c ? ? ? ? ? ? ?| ? ?6 ++++++
> ?arch/arm/mach-w90x900/include/mach/gpio.h | ? ?6 +-----
> ?2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-w90x900/gpio.c b/arch/arm/mach-w90x900/gpio.c
> index ba05aec..dbf1825 100644
> --- a/arch/arm/mach-w90x900/gpio.c
> +++ b/arch/arm/mach-w90x900/gpio.c
> @@ -40,6 +40,7 @@
> ? ? ? ? ? ? ? ? ? ? ? ?.direction_output = nuc900_dir_output, ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.get ? ? ? ? ? ? ?= nuc900_gpio_get, ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.set ? ? ? ? ? ? ?= nuc900_gpio_set, ? ? ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? .to_irq ? ? ? ? ? = nuc900_gpio_to_irq, ? ? ? ? \
> ? ? ? ? ? ? ? ? ? ? ? ?.base ? ? ? ? ? ? = base_gpio, ? ? ? ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.ngpio ? ? ? ? ? ?= nr_gpio, ? ? ? ? ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ?} ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? \
> @@ -130,6 +131,11 @@ static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
> ? ? ? ?return 0;
> ?}
>
> +static int nuc900_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
> +{
> + ? ? ? return chip->base + offset;
> +}
> +
> ?static struct nuc900_gpio_chip nuc900_gpio[] = {
> ? ? ? ?NUC900_GPIO_CHIP("GROUPC", 0, 16),
> ? ? ? ?NUC900_GPIO_CHIP("GROUPD", 16, 10),
> diff --git a/arch/arm/mach-w90x900/include/mach/gpio.h b/arch/arm/mach-w90x900/include/mach/gpio.h
> index 034da3e..f9b9a37 100644
> --- a/arch/arm/mach-w90x900/include/mach/gpio.h
> +++ b/arch/arm/mach-w90x900/include/mach/gpio.h
> @@ -20,11 +20,7 @@
> ?#define gpio_get_value __gpio_get_value
> ?#define gpio_set_value __gpio_set_value
> ?#define gpio_cansleep ?__gpio_cansleep
> -
> -static inline int gpio_to_irq(unsigned gpio)
> -{
> - ? ? ? return gpio;
> -}
> +#define gpio_to_irq ? ?__gpio_to_irq
>
> ?static inline int irq_to_gpio(unsigned irq)
> ?{
Acked-by : Wan zongshun <mcuos.com@gmail.com>
> --
> 1.7.1
>
--
*linux-arm-kernel mailing list
mail addr:linux-arm-kernel at lists.infradead.org
you can subscribe by:
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
* linux-arm-NUC900 mailing list
mail addr:NUC900 at googlegroups.com
main web: https://groups.google.com/group/NUC900
you can subscribe it by sending me mail:
mcuos.com at gmail.com
^ permalink raw reply [flat|nested] 36+ messages in thread* [PATCH 16/16] ARM: w90x900: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
2010-12-15 2:04 ` [PATCH 16/16] ARM: w90x900: " Lennert Buytenhek
2010-12-15 2:08 ` Wan ZongShun
@ 2010-12-15 2:09 ` Wan ZongShun
2010-12-15 2:18 ` Wan ZongShun
2 siblings, 0 replies; 36+ messages in thread
From: Wan ZongShun @ 2010-12-15 2:09 UTC (permalink / raw)
To: linux-arm-kernel
2010/12/15 Lennert Buytenhek <buytenh@wantstofly.org>:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
> ?arch/arm/mach-w90x900/gpio.c ? ? ? ? ? ? ?| ? ?6 ++++++
> ?arch/arm/mach-w90x900/include/mach/gpio.h | ? ?6 +-----
> ?2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-w90x900/gpio.c b/arch/arm/mach-w90x900/gpio.c
> index ba05aec..dbf1825 100644
> --- a/arch/arm/mach-w90x900/gpio.c
> +++ b/arch/arm/mach-w90x900/gpio.c
> @@ -40,6 +40,7 @@
> ? ? ? ? ? ? ? ? ? ? ? ?.direction_output = nuc900_dir_output, ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.get ? ? ? ? ? ? ?= nuc900_gpio_get, ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.set ? ? ? ? ? ? ?= nuc900_gpio_set, ? ? ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? .to_irq ? ? ? ? ? = nuc900_gpio_to_irq, ? ? ? ? \
> ? ? ? ? ? ? ? ? ? ? ? ?.base ? ? ? ? ? ? = base_gpio, ? ? ? ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.ngpio ? ? ? ? ? ?= nr_gpio, ? ? ? ? ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ?} ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? \
> @@ -130,6 +131,11 @@ static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
> ? ? ? ?return 0;
> ?}
>
> +static int nuc900_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
> +{
> + ? ? ? return chip->base + offset;
> +}
> +
> ?static struct nuc900_gpio_chip nuc900_gpio[] = {
> ? ? ? ?NUC900_GPIO_CHIP("GROUPC", 0, 16),
> ? ? ? ?NUC900_GPIO_CHIP("GROUPD", 16, 10),
> diff --git a/arch/arm/mach-w90x900/include/mach/gpio.h b/arch/arm/mach-w90x900/include/mach/gpio.h
> index 034da3e..f9b9a37 100644
> --- a/arch/arm/mach-w90x900/include/mach/gpio.h
> +++ b/arch/arm/mach-w90x900/include/mach/gpio.h
> @@ -20,11 +20,7 @@
> ?#define gpio_get_value __gpio_get_value
> ?#define gpio_set_value __gpio_set_value
> ?#define gpio_cansleep ?__gpio_cansleep
> -
> -static inline int gpio_to_irq(unsigned gpio)
> -{
> - ? ? ? return gpio;
> -}
> +#define gpio_to_irq ? ?__gpio_to_irq
>
> ?static inline int irq_to_gpio(unsigned irq)
> ?{
Acked-by : Wan zongshun <mcuos.com@gmail.com>
> --
> 1.7.1
>
--
*linux-arm-kernel mailing list
mail addr:linux-arm-kernel at lists.infradead.org
you can subscribe by:
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
* linux-arm-NUC900 mailing list
mail addr:NUC900 at googlegroups.com
main web: https://groups.google.com/group/NUC900
you can subscribe it by sending me mail:
mcuos.com at gmail.com
^ permalink raw reply [flat|nested] 36+ messages in thread* [PATCH 16/16] ARM: w90x900: Switch over to gpiolib ->to_irq() and __gpio_to_irq().
2010-12-15 2:04 ` [PATCH 16/16] ARM: w90x900: " Lennert Buytenhek
2010-12-15 2:08 ` Wan ZongShun
2010-12-15 2:09 ` Wan ZongShun
@ 2010-12-15 2:18 ` Wan ZongShun
2 siblings, 0 replies; 36+ messages in thread
From: Wan ZongShun @ 2010-12-15 2:18 UTC (permalink / raw)
To: linux-arm-kernel
2010/12/15 Lennert Buytenhek <buytenh@wantstofly.org>:
> Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
> ---
> ?arch/arm/mach-w90x900/gpio.c ? ? ? ? ? ? ?| ? ?6 ++++++
> ?arch/arm/mach-w90x900/include/mach/gpio.h | ? ?6 +-----
> ?2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-w90x900/gpio.c b/arch/arm/mach-w90x900/gpio.c
> index ba05aec..dbf1825 100644
> --- a/arch/arm/mach-w90x900/gpio.c
> +++ b/arch/arm/mach-w90x900/gpio.c
> @@ -40,6 +40,7 @@
> ? ? ? ? ? ? ? ? ? ? ? ?.direction_output = nuc900_dir_output, ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.get ? ? ? ? ? ? ?= nuc900_gpio_get, ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.set ? ? ? ? ? ? ?= nuc900_gpio_set, ? ? ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? .to_irq ? ? ? ? ? = nuc900_gpio_to_irq, ? ? ? ? \
> ? ? ? ? ? ? ? ? ? ? ? ?.base ? ? ? ? ? ? = base_gpio, ? ? ? ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ? ? ? ? ?.ngpio ? ? ? ? ? ?= nr_gpio, ? ? ? ? ? ? ? ? ? ?\
> ? ? ? ? ? ? ? ?} ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? \
> @@ -130,6 +131,11 @@ static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
> ? ? ? ?return 0;
> ?}
>
> +static int nuc900_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
> +{
> + ? ? ? return chip->base + offset;
> +}
> +
> ?static struct nuc900_gpio_chip nuc900_gpio[] = {
> ? ? ? ?NUC900_GPIO_CHIP("GROUPC", 0, 16),
> ? ? ? ?NUC900_GPIO_CHIP("GROUPD", 16, 10),
> diff --git a/arch/arm/mach-w90x900/include/mach/gpio.h b/arch/arm/mach-w90x900/include/mach/gpio.h
> index 034da3e..f9b9a37 100644
> --- a/arch/arm/mach-w90x900/include/mach/gpio.h
> +++ b/arch/arm/mach-w90x900/include/mach/gpio.h
> @@ -20,11 +20,7 @@
> ?#define gpio_get_value __gpio_get_value
> ?#define gpio_set_value __gpio_set_value
> ?#define gpio_cansleep ?__gpio_cansleep
> -
> -static inline int gpio_to_irq(unsigned gpio)
> -{
> - ? ? ? return gpio;
> -}
> +#define gpio_to_irq ? ?__gpio_to_irq
>
> ?static inline int irq_to_gpio(unsigned irq)
> ?{
Acked-by : Wan zongshun <mcuos.com@gmail.com>
> --
> 1.7.1
>
--
*linux-arm-kernel mailing list
mail addr:linux-arm-kernel at lists.infradead.org
you can subscribe by:
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
* linux-arm-NUC900 mailing list
mail addr:NUC900 at googlegroups.com
main web: https://groups.google.com/group/NUC900
you can subscribe it by sending me mail:
mcuos.com at gmail.com
^ permalink raw reply [flat|nested] 36+ messages in thread