From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2] ARM: S5PV310: Implement kernel timers using MCT
Date: Thu, 6 Jan 2011 15:53:58 +0000 [thread overview]
Message-ID: <20110106155358.GH31708@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <1294107527-27915-1-git-send-email-kgene.kim@samsung.com>
On Tue, Jan 04, 2011 at 11:18:47AM +0900, Kukjin Kim wrote:
> From: Changhwan Youn <chaos.youn@samsung.com>
>
> The Multi-Core Timer(MCT) of S5PV310 is designed for implementing
> clock source timer and clock event timers. This patch implements
> 1 clock source timer with 64 bit free running counter of MCT and
> 2 clock event timers with two of 31-bit tick counters.
I want to wait until after this merge window before commenting too much
on this; some of this patch will be impacted by changes in this merge
window.
> +static void s5pv310_frc_suspend(struct clocksource *cs)
> +{
> + time_suspended = s5pv310_frc_read(cs);
> +};
> +
> +static void s5pv310_frc_resume(struct clocksource *cs)
> +{
> + s5pv310_mct_frc_start((u32)(time_suspended >> 32), (u32)time_suspended);
> +};
Is this something which other clocksource drivers need to do, or does the
core automatically deal with the clocksource being irregular across a
suspend/resume event?
> +irqreturn_t s5pv310_mct_tick0_isr(int irq, void *dev_id)
> +{
> + struct clock_event_device *evt = dev_id;
> +
> + /*
> + * This is for supporting oneshot mode.
> + * Mct would generate interrupt periodically
> + * without explicit stopping.
> + */
> + if (evt->mode != CLOCK_EVT_MODE_PERIODIC)
> + s5pv310_mct_tick_stop(MCT_TICK0);
> +
> + /* Clear the MCT tick0 interrupt */
> + s5pv310_mct_write(0x1, S5PV310_MCT_L0_INT_CSTAT);
> +
> + evt->event_handler(evt);
> +
> + return IRQ_HANDLED;
> +}
> +
> +irqreturn_t s5pv310_mct_tick1_isr(int irq, void *dev_id)
> +{
> + struct clock_event_device *evt = dev_id;
> +
> + /*
> + * This is for supporting oneshot mode.
> + * Mct would generate interrupt periodically
> + * without explicit stopping.
> + */
> + if (evt->mode != CLOCK_EVT_MODE_PERIODIC)
> + s5pv310_mct_tick_stop(MCT_TICK1);
> +
> + /* Clear the MCT tick1 interrupt */
> + s5pv310_mct_write(0x1, S5PV310_MCT_L1_INT_CSTAT);
> +
> + evt->event_handler(evt);
> +
> + return IRQ_HANDLED;
> +}
Umm, why not wrap up the clock_event_device into your own structure,
which then carries the base address of the MCT to be used - rather than
duplicating the code just because the base address is different. Eg,
struct mct_clock_event_device {
struct clock_event_device evt;
void __iomem *base;
};
next prev parent reply other threads:[~2011-01-06 15:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-04 2:18 [PATCH V2] ARM: S5PV310: Implement kernel timers using MCT Kukjin Kim
2011-01-06 15:53 ` Russell King - ARM Linux [this message]
2011-01-07 12:05 ` Kukjin Kim
2011-01-07 12:11 ` Russell King - ARM Linux
2011-01-10 4:03 ` Kukjin Kim
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