[PATCH 1/6] ARM: mxc: update defconfigs

[PATCH 1/6] ARM: mxc: update defconfigs

[Uwe Kleine-König]

- enable new machines:
  - IMX27IPCAM (mx27)
  - VPR200 (mx3)
  - EUKREA_CPUIMX51SD (mx51)
  - MX51_EFIKAMX (mx51)
  - MX51_EFIKASB (mx51)
- disable SYSFS_DEPRECATED_V2 (mx1, mx21, mx3)
- enable CPU_IDLE (mx27)
- enable MXC_PWM (mx1, mx51)
- drop PM=y, defaults to y since
	1eb208a (PM: Make CONFIG_PM depend on (CONFIG_PM_SLEEP || CONFIG_PM_RUNTIME))
  (mx1, mx27, mx3, mx51)
- enable CAN_MCP251X (mx27, mx51) and CAN_SJA1000 (mx27)
- enable MTD_NAND_MXC and UBI (mx51)
- add MISC_DEVICES=y, defaults to n since
	5f2365d (misc devices: do not enable by default)
  (EEPROM_AT24 depends on MISC_DEVICES) (mx27, mx3)
  or drop MISC_DEVICES=n (mx1, mx51)
- enable EEPROM_AT25 (mx27)
- drop INOTIFY; is gone since
	2dfc1ca (inotify: remove inotify in kernel interface)
  (mx1)
- drop VGA_CONSOLE; isn't selectable on imx any more since
	fb78b51 (ARM: Disable VGA console for ARM in most cases)
  (mx21)
- drop FEC=y, defaults to y since
	085e79e (net/fec: consolidate all i.MX options to CONFIG_ARM)
  (mx27, mx3, mx51)
- drop CRYPTO_ANSI_CPRNG=n; depends on CRYPTO which is unset (mx1)
- drop VIDEO_ALLOW_V4L1=n; gone since
	58c66df ([media] Remove VIDEO_V4L1 Kconfig option)
  (mx3)
- enable mc13xxx including regulator, rtc, touch and led (mx27, mx3, mx51)
- enable KEYBOARD_GPIO (mx27, mx3) and KEYBOARD_IMX (mx27, mx3, mx51)
- drop SERIO=n as KEYBOARD_ATKBD (default y since INPUT=y) selects SERIO
  (mx27, mx3)
- enable I2C_IMX and SPI_IMX (mx51)
- enable SND_IMX_SOC including platfrom glue (mx27, mx3, mx51)
- enable SOC_CAMERA_MT9{T031,V022} (mx27)
- enable VIDEO_MX2 (mx27)
- enable LEDS_GPIO and LEDS_PWM (mx27, mx3, mx51)
- enable USB_EHCI_MXC (mx27)
- enable IMX_DMA (mx1, mx21, mx27)
- enable IMX_SDMA (mx3, mx51)
- RCU_CPU_STALL_DETECTOR isn't selectable any more since
	687d7a9 (rcu: restrict TREE_RCU to SMP builds with !PREEMPT)
  (mx51)
- MMC_MXC isn't selectable any more since
	170cba8 (mmc: mmc_mxc: Allow selection only for the correct platforms)
  (mx1)
- drop MTD_CONCAT; gone since
	f53fdeb (mtd: drop MTD_CONCAT from Kconfig entirely)
  (mx51)
- drop AUTOFS_FS=y; is in staging since
	db7bee2 (autofs3: move to drivers/staging)
  (mx51)
- change CRYPTO_DEFLATE and CRYPTO_LZO to =m as they depend on
  CRYPTO since
	cce9e06 ([CRYPTO] api: Split out low-level API)
  and CRYPTO is only =m. (mx51)

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/configs/mx1_defconfig  |   11 +++-----
 arch/arm/configs/mx21_defconfig |    8 +++---
 arch/arm/configs/mx27_defconfig |   45 ++++++++++++++++++++++++++++----
 arch/arm/configs/mx3_defconfig  |   40 +++++++++++++++++++++--------
 arch/arm/configs/mx51_defconfig |   53 +++++++++++++++++++++++++++++++-------
 5 files changed, 119 insertions(+), 38 deletions(-)

diff --git a/arch/arm/configs/mx1_defconfig b/arch/arm/configs/mx1_defconfig
index b39b5ce..ff96e8f 100644
--- a/arch/arm/configs/mx1_defconfig
+++ b/arch/arm/configs/mx1_defconfig
@@ -3,7 +3,6 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
@@ -16,6 +15,7 @@ CONFIG_ARCH_MX1=y
 CONFIG_ARCH_MX1ADS=y
 CONFIG_MACH_SCB9328=y
 CONFIG_MXC_IRQ_PRIOR=y
+CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
@@ -23,7 +23,6 @@ CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
-CONFIG_PM=y
 CONFIG_PM_DEBUG=y
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -47,7 +46,6 @@ CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_PHYSMAP=y
 # CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
 CONFIG_NETDEVICES=y
 CONFIG_PHYLIB=y
 CONFIG_SMSC_PHY=y
@@ -58,9 +56,9 @@ CONFIG_DM9000=y
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -74,9 +72,9 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_IMX=y
 CONFIG_USB_ETH=m
 CONFIG_MMC=y
-CONFIG_MMC_MXC=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_DMA=y
 # CONFIG_DNOTIFY is not set
-CONFIG_INOTIFY=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_NFS_FS=y
@@ -87,4 +85,3 @@ CONFIG_ROOT_NFS=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/mx21_defconfig b/arch/arm/configs/mx21_defconfig
index 411f88d..27261f6 100644
--- a/arch/arm/configs/mx21_defconfig
+++ b/arch/arm/configs/mx21_defconfig
@@ -2,7 +2,6 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
@@ -51,8 +50,8 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_MXC=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+CONFIG_NET_ETHERNET=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
@@ -62,12 +61,12 @@ CONFIG_INPUT_EVDEV=y
 CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_SERIO is not set
 # CONFIG_CONSOLE_TRANSLATIONS is not set
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=1
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -76,7 +75,6 @@ CONFIG_SPI=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
 CONFIG_FB_IMX=y
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
@@ -85,6 +83,8 @@ CONFIG_LOGO=y
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
 CONFIG_MMC_MXC=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_DMA=y
 # CONFIG_DNOTIFY is not set
 CONFIG_MSDOS_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig
index 9ad4c656..220e84f 100644
--- a/arch/arm/configs/mx27_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -29,6 +29,7 @@ CONFIG_MACH_IMX27_VISSTRIM_M10=y
 CONFIG_MACH_IMX27LITE=y
 CONFIG_MACH_PCA100=y
 CONFIG_MACH_MXT_TD60=y
+CONFIG_MACH_IMX27IPCAM=y
 CONFIG_MXC_IRQ_PRIOR=y
 CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
@@ -37,9 +38,9 @@ CONFIG_PREEMPT=y
 CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_IDLE=y
 CONFIG_FPE_NWFPE=y
 CONFIG_FPE_NWFPE_XP=y
-CONFIG_PM=y
 CONFIG_PM_DEBUG=y
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -54,6 +55,11 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 # CONFIG_IPV6 is not set
+CONFIG_CAN=y
+CONFIG_CAN_DEV=y
+CONFIG_CAN_MCP251X=y
+CONFIG_CAN_SJA1000=y
+CONFIG_CAN_SJA1000_PLATFORM=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
 CONFIG_MTD_PARTITIONS=y
@@ -71,23 +77,24 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_MXC=y
 CONFIG_MTD_UBI=y
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
-CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=y
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ADS7846=m
-# CONFIG_SERIO is not set
+CONFIG_TOUCHSCREEN_MC13783=y
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=m
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -98,19 +105,45 @@ CONFIG_W1=y
 CONFIG_W1_MASTER_MXC=y
 CONFIG_W1_SLAVE_THERM=y
 # CONFIG_HWMON is not set
+CONFIG_MFD_MC13XXX=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_MC13783=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_VIDEO_DEV=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_MT9T031=y
+CONFIG_SOC_CAMERA_MT9V022=y
+CONFIG_VIDEO_MX2=y
 CONFIG_FB=y
 CONFIG_FB_IMX=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_SOC_MX27VIS_AIC32X4=y
+CONFIG_SND_SOC_PHYCORE_AC97=y
+CONFIG_SND_SOC_EUKREA_TLV320=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB=m
 # CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_MXC=y
 CONFIG_USB_ULPI=y
 CONFIG_MMC=y
 CONFIG_MMC_MXC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_MC13783=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PCF8563=y
+CONFIG_RTC_DRV_MC13XXX=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_DMA=y
 # CONFIG_DNOTIFY is not set
 # CONFIG_PROC_PAGE_MONITOR is not set
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig
index 7c4b30b..3f45331 100644
--- a/arch/arm/configs/mx3_defconfig
+++ b/arch/arm/configs/mx3_defconfig
@@ -3,7 +3,6 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
@@ -13,18 +12,19 @@ CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_MXC=y
 CONFIG_MACH_MX31ADS_WM1133_EV1=y
+CONFIG_MACH_MX31LILLY=y
+CONFIG_MACH_MX31LITE=y
 CONFIG_MACH_PCM037=y
 CONFIG_MACH_PCM037_EET=y
-CONFIG_MACH_MX31LITE=y
 CONFIG_MACH_MX31_3DS=y
 CONFIG_MACH_MX31MOBOARD=y
-CONFIG_MACH_MX31LILLY=y
 CONFIG_MACH_QONG=y
-CONFIG_MACH_PCM043=y
 CONFIG_MACH_ARMADILLO5X0=y
-CONFIG_MACH_MX35_3DS=y
 CONFIG_MACH_KZM_ARM11_01=y
+CONFIG_MACH_PCM043=y
+CONFIG_MACH_MX35_3DS=y
 CONFIG_MACH_EUKREA_CPUIMX35=y
+CONFIG_MACH_VPR200=y
 CONFIG_MXC_IRQ_PRIOR=y
 CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
@@ -35,7 +35,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
 CONFIG_VFP=y
-CONFIG_PM=y
 CONFIG_PM_DEBUG=y
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -62,24 +61,26 @@ CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_MXC=y
 CONFIG_MTD_UBI=y
 # CONFIG_BLK_DEV is not set
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_NETDEVICES=y
 CONFIG_SMSC_PHY=y
 CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
 CONFIG_DNET=y
-CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_MC13783=y
 # CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=m
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -90,11 +91,12 @@ CONFIG_W1_MASTER_MXC=y
 CONFIG_W1_SLAVE_THERM=y
 # CONFIG_HWMON is not set
 CONFIG_MFD_WM8350_I2C=y
+CONFIG_MFD_MC13XXX=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_WM8350=y
+CONFIG_REGULATOR_MC13783=y
 CONFIG_MEDIA_SUPPORT=y
 CONFIG_VIDEO_DEV=y
-# CONFIG_VIDEO_ALLOW_V4L1 is not set
 CONFIG_SOC_CAMERA=y
 CONFIG_SOC_CAMERA_MT9M001=y
 CONFIG_SOC_CAMERA_MT9M111=y
@@ -105,10 +107,26 @@ CONFIG_SOC_CAMERA_OV772X=y
 CONFIG_VIDEO_MX3=y
 # CONFIG_RADIO_ADAPTERS is not set
 CONFIG_FB=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_MXC_SOC_WM1133_EV1=y
+CONFIG_SND_SOC_PHYCORE_AC97=y
+CONFIG_SND_SOC_EUKREA_TLV320=y
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
 CONFIG_MMC_MXC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_MC13783=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_MC13XXX=y
 CONFIG_DMADEVICES=y
+CONFIG_IMX_SDMA=y
 # CONFIG_DNOTIFY is not set
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
index e3c9032..d193e76 100644
--- a/arch/arm/configs/mx51_defconfig
+++ b/arch/arm/configs/mx51_defconfig
@@ -17,6 +17,10 @@ CONFIG_ARCH_MX5=y
 CONFIG_MACH_MX51_BABBAGE=y
 CONFIG_MACH_MX51_3DS=y
 CONFIG_MACH_EUKREA_CPUIMX51=y
+CONFIG_MACH_EUKREA_CPUIMX51SD=y
+CONFIG_MACH_MX51_EFIKAMX=y
+CONFIG_MACH_MX51_EFIKASB=y
+CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT_VOLUNTARY=y
@@ -27,7 +31,6 @@ CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=192.168.0.
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
 CONFIG_PM_DEBUG=y
 CONFIG_PM_TEST_SUSPEND=y
 CONFIG_NET=y
@@ -41,13 +44,25 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+CONFIG_CAN_MCP251X=y
 # CONFIG_WIRELESS is not set
 # CONFIG_STANDALONE is not set
 CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_UBI=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
-# CONFIG_MISC_DEVICES is not set
 CONFIG_SCSI=y
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_BLK_DEV_SD=y
@@ -58,6 +73,7 @@ CONFIG_SCSI_SCAN_ASYNC=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_ATA=m
 CONFIG_NETDEVICES=y
+CONFIG_MII=m
 CONFIG_MARVELL_PHY=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_QSEMI_PHY=y
@@ -74,24 +90,25 @@ CONFIG_LSI_ET1011C_PHY=y
 CONFIG_MDIO_BITBANG=y
 CONFIG_MDIO_GPIO=y
 CONFIG_NET_ETHERNET=y
-CONFIG_MII=m
-CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_WLAN is not set
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
 CONFIG_INPUT_EVBUG=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=y
 CONFIG_MOUSE_PS2=m
 CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_MC13783=y
 CONFIG_SERIO_SERPORT=m
 CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_LEGACY_PTYS is not set
 # CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 CONFIG_HW_RANDOM=y
 CONFIG_I2C=y
 # CONFIG_I2C_COMPAT is not set
@@ -100,8 +117,21 @@ CONFIG_I2C_CHARDEV=m
 CONFIG_I2C_ALGOBIT=m
 CONFIG_I2C_ALGOPCF=m
 CONFIG_I2C_ALGOPCA=m
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=y
 CONFIG_GPIO_SYSFS=y
 # CONFIG_HWMON is not set
+CONFIG_MFD_MC13XXX=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_MC13783=y
+CONFIG_REGULATOR_MC13892=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_IMX_SOC=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
@@ -111,8 +141,13 @@ CONFIG_MMC_BLOCK=m
 CONFIG_MMC_SDHCI=m
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_MC13783=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_RTC_DRV_MC13XXX=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_SDMA=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
@@ -126,7 +161,6 @@ CONFIG_EXT4_FS_SECURITY=y
 CONFIG_QUOTA=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_PRINT_QUOTA_WARNING is not set
-CONFIG_AUTOFS_FS=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_FUSE_FS=y
 CONFIG_ISO9660_FS=m
@@ -153,14 +187,13 @@ CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_SCHED_DEBUG is not set
 # CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_FTRACE is not set
 # CONFIG_ARM_UNWIND is not set
 CONFIG_DEBUG_LL=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_SECURITYFS=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_LZO=m
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
 CONFIG_CRC_CCITT=m
-- 
1.7.2.3

[PATCH 2/6] ARM: mxc: don't use the symbols in the CPU family choice to select others

[Uwe Kleine-König]

The symbols in this choice should only be used to select between the
available machines that can be built into a single kernel. As these sets
(will) differ e.g. depending on ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR
letting them select other symbols makes the logic more complex and needs
to duplicate some things. So let the machines select the corresponding
symbols (indirectly via SOC_XYZ).

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-imx/Kconfig |    3 +++
 arch/arm/mach-mx5/Kconfig |    6 ++++++
 arch/arm/plat-mxc/Kconfig |    4 ----
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 13e6f81..7914283 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -43,6 +43,7 @@ config SOC_IMX27
 
 config SOC_IMX31
 	bool
+	select CPU_V6
 	select IMX_HAVE_PLATFORM_MXC_RNGA
 	select ARCH_MXC_AUDMUX_V2
 	select ARCH_MX31
@@ -50,6 +51,7 @@ config SOC_IMX31
 
 config SOC_IMX35
 	bool
+	select CPU_V6
 	select ARCH_MXC_IOMUX_V3
 	select ARCH_MXC_AUDMUX_V2
 	select HAVE_EPIT
@@ -66,6 +68,7 @@ config MACH_MXLADS
 config ARCH_MX1ADS
 	bool "MX1ADS platform"
 	select MACH_MXLADS
+	select SOC_IMX1
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
 	help
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 49b5661..b3570e6 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -13,6 +13,8 @@ config ARCH_MX53
 
 config SOC_IMX50
 	bool
+	select CPU_V7
+	select ARM_L1_CACHE_SHIFT_6
 	select MXC_TZIC
 	select ARCH_MXC_IOMUX_V3
 	select ARCH_MXC_AUDMUX_V2
@@ -21,6 +23,8 @@ config SOC_IMX50
 
 config	SOC_IMX51
 	bool
+	select CPU_V7
+	select ARM_L1_CACHE_SHIFT_6
 	select MXC_TZIC
 	select ARCH_MXC_IOMUX_V3
 	select ARCH_MXC_AUDMUX_V2
@@ -29,6 +33,8 @@ config	SOC_IMX51
 
 config	SOC_IMX53
 	bool
+	select CPU_V7
+	select ARM_L1_CACHE_SHIFT_6
 	select MXC_TZIC
 	select ARCH_MXC_IOMUX_V3
 	select ARCH_MX53
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 97f12a4..b9cf1c5 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -10,7 +10,6 @@ choice
 
 config ARCH_MX1
 	bool "MX1-based"
-	select SOC_IMX1
 	help
 	  This enables support for systems based on the Freescale i.MX1 family
 
@@ -26,14 +25,11 @@ config ARCH_MX25
 
 config ARCH_MX3
 	bool "MX3-based"
-	select CPU_V6
 	help
 	  This enables support for systems based on the Freescale i.MX3 family
 
 config ARCH_MX5
 	bool "MX5-based"
-	select CPU_V7
-	select ARM_L1_CACHE_SHIFT_6
 	help
 	  This enables support for systems based on the Freescale i.MX51 family
 
-- 
1.7.2.3

[PATCH 3/6] ARM: mxc: simplify platform selection for i.MX21 and i.MX27

[Uwe Kleine-König]

This moves the choice between i.MX21 and i.MX27 (that appeared when
choosing "MX2-based" in the mxc-global CPU family choice) to the global
choice.

Now this global choice isn't about "CPU families" anymore but this isn't
currently possible anyhow (e.g. because i.MX25 doesn't match many
expectations that are called MX2 and we cannot compile i.MX51 and i.MX53
into a single (runnable) kernel) and will change further in the future.

Note that reduced .config files for i.MX21 need some care not to switch
so a i.MX31/35 config which is the default in the global choice.
mx21_defconfig is adapted accordingly.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
Hello,

this is a more complete version of

	http://mid.gmane.org/1299086585-22707-1-git-send-email-u.kleine-koenig at pengutronix.de

. Back then Sascha suggested to do a more complete switch to a structure
that allows to take ARM_PATCH_PHYS_VIRT into account. But as we're not
yet there to support this on i.MX and because I think this justifies a
seperate patch I this up again.

Best regards
Uwe

 arch/arm/configs/mx21_defconfig |    2 +-
 arch/arm/configs/mx27_defconfig |    1 -
 arch/arm/mach-imx/Kconfig       |   30 ++++++++----------------------
 arch/arm/plat-mxc/Kconfig       |   26 +++++++++++++++++---------
 4 files changed, 26 insertions(+), 33 deletions(-)

diff --git a/arch/arm/configs/mx21_defconfig b/arch/arm/configs/mx21_defconfig
index 27261f6..4590a12 100644
--- a/arch/arm/configs/mx21_defconfig
+++ b/arch/arm/configs/mx21_defconfig
@@ -12,7 +12,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MX2=y
+CONFIG_MACH_MX21=y
 CONFIG_MACH_MX21ADS=y
 CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig
index 220e84f..11f1283 100644
--- a/arch/arm/configs/mx27_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -17,7 +17,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MX2=y
 CONFIG_MACH_MX27=y
 CONFIG_MACH_MX27ADS=y
 CONFIG_MACH_PCM038=y
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 7914283..0382301 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,10 +1,14 @@
 config IMX_HAVE_DMA_V1
 	bool
 #
-# ARCH_MX31 and ARCH_MX35 are left for compatibility
+# ARCH_MX2, ARCH_MX31 and ARCH_MX35 are left for compatibility
 # Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
 # To easily distinguish good and reviewed from unreviewed usages new (and IMHO
-# more sensible) names are used: SOC_IMX31 and SOC_IMX35
+# more sensible) names are used: SOC_IMX21, SOC_IMX27, SOC_IMX31 and SOC_IMX35
+config ARCH_MX2
+	# note that i.MX25 doesn't select this
+	bool
+
 config ARCH_MX31
 	bool
 
@@ -20,6 +24,7 @@ config SOC_IMX1
 
 config SOC_IMX21
 	bool
+	select ARCH_MX2
 	select CPU_ARM926T
 	select ARCH_MXC_AUDMUX_V1
 	select IMX_HAVE_DMA_V1
@@ -35,6 +40,7 @@ config SOC_IMX25
 
 config SOC_IMX27
 	bool
+	select ARCH_MX2
 	select CPU_ARM926T
 	select ARCH_MXC_AUDMUX_V1
 	select IMX_HAVE_DMA_V1
@@ -82,26 +88,6 @@ config MACH_SCB9328
 
 endif
 
-if ARCH_MX2
-
-choice
-	prompt "CPUs:"
-	default MACH_MX21
-
-config MACH_MX21
-	bool "i.MX21 support"
-	help
-	  This enables support for Freescale's MX2 based i.MX21 processor.
-
-config MACH_MX27
-	bool "i.MX27 support"
-	help
-	  This enables support for Freescale's MX2 based i.MX27 processor.
-
-endchoice
-
-endif
-
 if MACH_MX21
 
 comment "MX21 platforms:"
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b9cf1c5..ce6ed5e 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -5,28 +5,36 @@ source "arch/arm/plat-mxc/devices/Kconfig"
 menu "Freescale MXC Implementations"
 
 choice
-	prompt "Freescale CPU family:"
+	prompt "Set of supported SoCs:"
 	default ARCH_MX3
 
+# don't use the symbols available in this choice in code. They should only be
+# used to select the machines that can be compiled into a single kernel.
 config ARCH_MX1
-	bool "MX1-based"
+	bool "MX1"
 	help
 	  This enables support for systems based on the Freescale i.MX1 family
 
-config ARCH_MX2
-	bool "MX2-based"
+config MACH_MX21
+	bool "i.MX21"
 	help
-	  This enables support for systems based on the Freescale i.MX2 family
+	  This enables support for machines using Freescale's i.MX21 processor.
 
 config ARCH_MX25
-	bool "MX25-based"
+	bool "i.MX25"
 	help
-	  This enables support for systems based on the Freescale i.MX25 family
+	  This enables support for machines using Freescale's i.MX25 processor.
+
+config MACH_MX27
+	bool "i.MX27"
+	help
+	  This enables support for machines using Freescale's i.MX27 processor.
 
 config ARCH_MX3
-	bool "MX3-based"
+	bool "i.MX31 + i.MX35"
 	help
-	  This enables support for systems based on the Freescale i.MX3 family
+	  This enables support for machines using Freescale's i.MX31 and i.MX35
+	  processors.
 
 config ARCH_MX5
 	bool "MX5-based"
-- 
1.7.2.3

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
compile a single (working) kernel for these.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/configs/mx51_defconfig |    2 +-
 arch/arm/mach-mx5/Kconfig       |   51 +++++++++++++++++++++++++-------------
 arch/arm/plat-mxc/Kconfig       |   19 +++++++++++++-
 3 files changed, 51 insertions(+), 21 deletions(-)

diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
index d193e76..1260bc0 100644
--- a/arch/arm/configs/mx51_defconfig
+++ b/arch/arm/configs/mx51_defconfig
@@ -13,7 +13,7 @@ CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MX5=y
+CONFIG_ARCH_MX51=y
 CONFIG_MACH_MX51_BABBAGE=y
 CONFIG_MACH_MX51_3DS=y
 CONFIG_MACH_EUKREA_CPUIMX51=y
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index b3570e6..799fbc4 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -1,11 +1,11 @@
-if ARCH_MX5
-# ARCH_MX50/51/53 are left to mark places where prevent multi-soc in single
+if ARCH_MX503 || ARCH_MX51
+# ARCH_MX5/50/53 are left to mark places where prevent multi-soc in single
 # image. So for most time, SOC_IMX50/51/53 should be used.
 
-config ARCH_MX50
+config ARCH_MX5
 	bool
 
-config ARCH_MX51
+config ARCH_MX50
 	bool
 
 config ARCH_MX53
@@ -19,6 +19,7 @@ config SOC_IMX50
 	select ARCH_MXC_IOMUX_V3
 	select ARCH_MXC_AUDMUX_V2
 	select ARCH_HAS_CPUFREQ
+	select ARCH_MX5
 	select ARCH_MX50
 
 config	SOC_IMX51
@@ -29,7 +30,7 @@ config	SOC_IMX51
 	select ARCH_MXC_IOMUX_V3
 	select ARCH_MXC_AUDMUX_V2
 	select ARCH_HAS_CPUFREQ
-	select ARCH_MX51
+	select ARCH_MX5
 
 config	SOC_IMX53
 	bool
@@ -37,9 +38,29 @@ config	SOC_IMX53
 	select ARM_L1_CACHE_SHIFT_6
 	select MXC_TZIC
 	select ARCH_MXC_IOMUX_V3
+	select ARCH_MX5
 	select ARCH_MX53
 
-comment "MX5 platforms:"
+if ARCH_MX50_SUPPORTED
+#comment "i.MX50 machines:"
+
+config MACH_MX50_RDP
+	bool "Support MX50 reference design platform"
+	depends on BROKEN
+	select SOC_IMX50
+	select IMX_HAVE_PLATFORM_IMX_I2C
+	select IMX_HAVE_PLATFORM_IMX_UART
+	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+	select IMX_HAVE_PLATFORM_SPI_IMX
+	select IMX_HAVE_PLATFORM_FEC
+	help
+	  Include support for MX50 reference design platform (RDP) board. This
+	  includes specific configurations for the board and its peripherals.
+
+endif # ARCH_MX50_SUPPORTED
+
+if ARCH_MX51
+comment "i.MX51 machines:"
 
 config MACH_MX51_BABBAGE
 	bool "Support MX51 BABBAGE platforms"
@@ -142,6 +163,11 @@ config MACH_MX51_EFIKASB
 	  Include support for Genesi Efika Smartbook. This includes specific
 	  configurations for the board and its peripherals.
 
+endif # ARCH_MX51
+
+if ARCH_MX53_SUPPORTED
+comment "i.MX53 machines:"
+
 config MACH_MX53_EVK
 	bool "Support MX53 EVK platforms"
 	select SOC_IMX53
@@ -177,17 +203,6 @@ config MACH_MX53_LOCO
 	  Include support for MX53 LOCO platform. This includes specific
 	  configurations for the board and its peripherals.
 
-config MACH_MX50_RDP
-	bool "Support MX50 reference design platform"
-	depends on BROKEN
-	select SOC_IMX50
-	select IMX_HAVE_PLATFORM_IMX_I2C
-	select IMX_HAVE_PLATFORM_IMX_UART
-	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-	select IMX_HAVE_PLATFORM_SPI_IMX
-	select IMX_HAVE_PLATFORM_FEC
-	help
-	  Include support for MX50 reference design platform (RDP) board. This
-	  includes specific configurations for the board and its peripherals.
+endif # ARCH_MX53_SUPPORTED
 
 endif
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index ce6ed5e..aa4234b 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -4,6 +4,12 @@ source "arch/arm/plat-mxc/devices/Kconfig"
 
 menu "Freescale MXC Implementations"
 
+config ARCH_MX50_SUPPORTED
+	bool
+
+config ARCH_MX53_SUPPORTED
+	bool
+
 choice
 	prompt "Set of supported SoCs:"
 	default ARCH_MX3
@@ -36,8 +42,17 @@ config ARCH_MX3
 	  This enables support for machines using Freescale's i.MX31 and i.MX35
 	  processors.
 
-config ARCH_MX5
-	bool "MX5-based"
+config ARCH_MX503
+	bool "i.MX50 + i.MX53"
+	select ARCH_MX50_SUPPORTED
+	select ARCH_MX53_SUPPORTED
+	help
+	  This enables support for machines using Freescale's i.MX50 and i.MX51
+	  processors.
+
+config ARCH_MX51
+	bool "i.MX51"
+	select ARCH_MX51_SUPPORTED
 	help
 	  This enables support for systems based on the Freescale i.MX51 family
 
-- 
1.7.2.3

[PATCH 5/6] ARM: mx3: make ioremap quirk ready for multi-SoC kernels

[Uwe Kleine-König]

To be able to compile e.g. i.MX31 and i.MX51 in a single kernel image
the ioremap quirk needs a runtime check.

While touching this code make the comment more understandable by adding
a sentence from the commit log that introduced it
(eadefef ([ARM] MX3: Use ioremap wrapper to map SoC devices nonshared)).

As mach/io.h now uses cpu_is_ some header reshuffling in mach/hardware.h
was necessary. (mach/mx27.h and mach/mx31.h #include <linux/io.h> which
\#includes <mach/io.h>. So mach/mxc.h which provides the cpu_is_ macros
needs to be included before mach/mx27.h and mach/mx31.h.)

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/plat-mxc/include/mach/hardware.h |    4 ++--
 arch/arm/plat-mxc/include/mach/io.h       |   23 +++++++++++++++--------
 2 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index a881db5..67d3e2b 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -95,6 +95,8 @@
 
 #define IMX_IO_ADDRESS(x)	IOMEM(IMX_IO_P2V(x))
 
+#include <mach/mxc.h>
+
 #ifdef CONFIG_ARCH_MX5
 #include <mach/mx50.h>
 #include <mach/mx51.h>
@@ -125,8 +127,6 @@
 # include <mach/mx25.h>
 #endif
 
-#include <mach/mxc.h>
-
 #define imx_map_entry(soc, name, _type)	{				\
 	.virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR),	\
 	.pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR),		\
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
index b4f2de7..4347a87 100644
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ b/arch/arm/plat-mxc/include/mach/io.h
@@ -14,19 +14,26 @@
 /* Allow IO space to be anywhere in the memory */
 #define IO_SPACE_LIMIT 0xffffffff
 
-#ifdef CONFIG_ARCH_MX3
-#define __arch_ioremap __mx3_ioremap
+#if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35)
+#include <mach/hardware.h>
+
+#define __arch_ioremap __imx_ioremap
 #define __arch_iounmap __iounmap
 
+#define addr_in_module(addr, mod) \
+	((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
+
 static inline void __iomem *
-__mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
+__imx_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
 {
-	if (mtype == MT_DEVICE) {
-		/* Access all peripherals below 0x80000000 as nonshared device
-		 * but leave l2cc alone.
+	if (mtype == MT_DEVICE && (cpu_is_mx31() || cpu_is_mx35())) {
+		/*
+		 * Access all peripherals below 0x80000000 as nonshared device
+		 * on mx3, but leave l2cc alone.  Otherwise cache corruptions
+		 * can occur.
 		 */
-		if ((phys_addr < 0x80000000) && ((phys_addr < 0x30000000) ||
-			(phys_addr >= 0x30000000 + SZ_1M)))
+		if (phys_addr < 0x80000000 &&
+				!addr_in_module(phys_addr, MX3x_L2CC))
 			mtype = MT_DEVICE_NONSHARED;
 	}
 
-- 
1.7.2.3

[PATCH 6/6] ARM: imx: remove some deprecated and unused #defines

[Uwe Kleine-König]

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/plat-mxc/include/mach/mxc.h |    7 -------
 1 files changed, 0 insertions(+), 7 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 0aba8b1..4ac53ce 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -194,13 +194,6 @@ enum mxc_cpu_pwr_mode {
 extern struct cpu_op *(*get_cpu_op)(int *op);
 #endif
 
-#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
-/* These are deprecated, use mx[23][157]_setup_weimcs instead. */
-#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10))
-#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4))
-#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8))
-#endif
-
 #define cpu_is_mx3()	(cpu_is_mx31() || cpu_is_mx35())
 #define cpu_is_mx2()	(cpu_is_mx21() || cpu_is_mx27())
 
-- 
1.7.2.3

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Nicolas Pitre]

On Sun, 10 Apr 2011, Uwe Kleine-K?nig wrote:

> The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
> compile a single (working) kernel for these.

Really?

Have a look at CONFIG_ARM_PATCH_PHYS_VIRT.  It's in mainline and fully 
functional.


Nicolas

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

On Sun, Apr 10, 2011 at 10:02:03PM -0400, Nicolas Pitre wrote:
> On Sun, 10 Apr 2011, Uwe Kleine-K?nig wrote:
> 
> > The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
> > compile a single (working) kernel for these.
> 
> Really?
> 
> Have a look at CONFIG_ARM_PATCH_PHYS_VIRT.  It's in mainline and fully 
> functional.
I'm aware of this config item. But still if it's off there must be a
distinction that's provided by this patch. Currently you can build a
kernel for i.MX51 + i.MX53 but IIRC it works on no machine.
When considering ARM_PATCH_PHYS_VIRT there are more SoCs that could be
built into a single image and so needs a more complicated logic.
And I don't want to depend on ARM_PATCH_PHYS_VIRT (yet), e.g. because
it's new and still depends on EXPERIMENTAL.

Best regards
Uwe


-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Nicolas Pitre]

On Mon, 11 Apr 2011, Uwe Kleine-K?nig wrote:

> On Sun, Apr 10, 2011 at 10:02:03PM -0400, Nicolas Pitre wrote:
> > On Sun, 10 Apr 2011, Uwe Kleine-K?nig wrote:
> > 
> > > The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
> > > compile a single (working) kernel for these.
> > 
> > Really?
> > 
> > Have a look at CONFIG_ARM_PATCH_PHYS_VIRT.  It's in mainline and fully 
> > functional.
> I'm aware of this config item. But still if it's off there must be a
> distinction that's provided by this patch.

Sure.  Instead of a compile time expansion of virt_to_phys() and 
phys_to_virt(), you get a run time patching of the kernel binary 
according to the runtime deduced PHYS_OFFSET.  See commit logs for "git 
log 6fc31d54..b511d75" for the details.

> Currently you can build a
> kernel for i.MX51 + i.MX53 but IIRC it works on no machine.

Maybe it should be fixed?

> When considering ARM_PATCH_PHYS_VIRT there are more SoCs that could be
> built into a single image and so needs a more complicated logic.

The ultimate goal is to structure the code so we can build as many SOCs 
together as possible.

> And I don't want to depend on ARM_PATCH_PHYS_VIRT (yet), e.g. because
> it's new and still depends on EXPERIMENTAL.

When will it be no experimental anymore if no one starts using it?  RMK 
talked about making it enabled by default, and that could allow for the 
removal of a bunch of arch/arm/*/include/mach/memory.h files.


Nicolas

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Matt Sealey]

Well, whoever's responsibility it is to fix this, whereever it needs
to be fixed, it needs to be fixed, as it is absolutely nuts that you
cannot run an MX51 and MX53 board off the same kernel.

If nobody knows or agrees, can anyone can identify exactly what needs
to be fixed and where, and how much work this would actually be, so
they or someone else can actually go do it, instead of us just
debating about how experimental it might be?

As far as I see it the only reason it depends on EXPERIMENTAL is
because it breaks at least one subarch, it breaks XIP kernels and it
breaks Thumb2 kernels (this last one is not so much a showstopper for
enabling it by default, unless I am mistaken in my assumption that
Thumb2 kernels still don't work reliably right now anyway?)

-- 
Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.



2011/4/11 Nicolas Pitre <nico@fluxnic.net>:
> On Mon, 11 Apr 2011, Uwe Kleine-K?nig wrote:
>
>> On Sun, Apr 10, 2011 at 10:02:03PM -0400, Nicolas Pitre wrote:
>> > On Sun, 10 Apr 2011, Uwe Kleine-K?nig wrote:
>> >
>> > > The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
>> > > compile a single (working) kernel for these.
>> >
>> > Really?
>> >
>> > Have a look at CONFIG_ARM_PATCH_PHYS_VIRT. ?It's in mainline and fully
>> > functional.
>> I'm aware of this config item. But still if it's off there must be a
>> distinction that's provided by this patch.
>
> Sure. ?Instead of a compile time expansion of virt_to_phys() and
> phys_to_virt(), you get a run time patching of the kernel binary
> according to the runtime deduced PHYS_OFFSET. ?See commit logs for "git
> log 6fc31d54..b511d75" for the details.
>
>> Currently you can build a
>> kernel for i.MX51 + i.MX53 but IIRC it works on no machine.
>
> Maybe it should be fixed?
>
>> When considering ARM_PATCH_PHYS_VIRT there are more SoCs that could be
>> built into a single image and so needs a more complicated logic.
>
> The ultimate goal is to structure the code so we can build as many SOCs
> together as possible.
>
>> And I don't want to depend on ARM_PATCH_PHYS_VIRT (yet), e.g. because
>> it's new and still depends on EXPERIMENTAL.
>
> When will it be no experimental anymore if no one starts using it? ?RMK
> talked about making it enabled by default, and that could allow for the
> removal of a bunch of arch/arm/*/include/mach/memory.h files.
>
>
> Nicolas
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

On Mon, Apr 11, 2011 at 10:15:09AM -0400, Nicolas Pitre wrote:
> On Mon, 11 Apr 2011, Uwe Kleine-K?nig wrote:
> 
> > On Sun, Apr 10, 2011 at 10:02:03PM -0400, Nicolas Pitre wrote:
> > > On Sun, 10 Apr 2011, Uwe Kleine-K?nig wrote:
> > > 
> > > > The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
> > > > compile a single (working) kernel for these.
> > > 
> > > Really?
> > > 
> > > Have a look at CONFIG_ARM_PATCH_PHYS_VIRT.  It's in mainline and fully 
> > > functional.
> > I'm aware of this config item. But still if it's off there must be a
> > distinction that's provided by this patch.
> 
> Sure.  Instead of a compile time expansion of virt_to_phys() and 
> phys_to_virt(), you get a run time patching of the kernel binary 
> according to the runtime deduced PHYS_OFFSET.  See commit logs for "git 
> log 6fc31d54..b511d75" for the details.
I'm well aware of the details, too. I just said that if
ARM_PATCH_PHYS_VIRT is off, i.MX51 and i.MX53 cannot be supported by the
same kernel, so I changed the Kconfig logic to reflect this. You can be
sure I will follow up with a patch that checks for ARM_PATCH_PHYS_VIRT
and will allow more SoCs in a single kernel.
 
> > Currently you can build a
> > kernel for i.MX51 + i.MX53 but IIRC it works on no machine.
> 
> Maybe it should be fixed?
My patch does. :-)

> > When considering ARM_PATCH_PHYS_VIRT there are more SoCs that could be
> > built into a single image and so needs a more complicated logic.
> 
> The ultimate goal is to structure the code so we can build as many SOCs 
> together as possible.
Yeah, and I think we're on a good way for mxc, don't you?

> > And I don't want to depend on ARM_PATCH_PHYS_VIRT (yet), e.g. because
> > it's new and still depends on EXPERIMENTAL.
> 
> When will it be no experimental anymore if no one starts using it?  RMK 
> talked about making it enabled by default, and that could allow for the 
> removal of a bunch of arch/arm/*/include/mach/memory.h files.
I will using it, but I don't want to make the mx5 port depend on it and
so on EXPERIMENTAL. I don't know about you, but I have to satisfy two
worlds: the ARM community with all the new stuff and industrial
customers that want a system that just works. And I don't want to
explain a member of the latter group who has read the help text of
EXPERIMENTAL why this is needed for his fundamentally important system
that has to be reliable 100%.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 1/6] ARM: mxc: update defconfigs

[Shawn Guo]

Hi Uwe,

On Sun, Apr 10, 2011 at 09:48:58PM +0200, Uwe Kleine-K?nig wrote:
> 
[...]
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> ---
>  arch/arm/configs/mx1_defconfig  |   11 +++-----
>  arch/arm/configs/mx21_defconfig |    8 +++---
>  arch/arm/configs/mx27_defconfig |   45 ++++++++++++++++++++++++++++----
>  arch/arm/configs/mx3_defconfig  |   40 +++++++++++++++++++++--------
>  arch/arm/configs/mx51_defconfig |   53 +++++++++++++++++++++++++++++++-------

Would you consider to enable mx5 ESDHC by default?  I guess Linaro
will appreciate it, as they are using ext3 rootfs on SD/MMC for their
releases.

-- 
Regards,
Shawn

[PATCH 1/6] ARM: mxc: update defconfigs

[Uwe Kleine-König]

On Tue, Apr 12, 2011 at 03:59:32PM +0800, Shawn Guo wrote:
> Hi Uwe,
> 
> On Sun, Apr 10, 2011 at 09:48:58PM +0200, Uwe Kleine-K?nig wrote:
> > 
> [...]
> > Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> > ---
> >  arch/arm/configs/mx1_defconfig  |   11 +++-----
> >  arch/arm/configs/mx21_defconfig |    8 +++---
> >  arch/arm/configs/mx27_defconfig |   45 ++++++++++++++++++++++++++++----
> >  arch/arm/configs/mx3_defconfig  |   40 +++++++++++++++++++++--------
> >  arch/arm/configs/mx51_defconfig |   53 +++++++++++++++++++++++++++++++-------
> 
> Would you consider to enable mx5 ESDHC by default?  I guess Linaro
> will appreciate it, as they are using ext3 rootfs on SD/MMC for their
> releases.
I assume this means

	+CONFIG_MMC_SDHCI_PLTFM=m
	+CONFIG_MMC_SDHCI_ESDHC_IMX=y

seems sensible for mx3, too. I will look after that.

Thanks
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH v2] ARM: mxc: update defconfigs

[Uwe Kleine-König]

- enable new machines:
  - IMX27IPCAM (mx27)
  - VPR200 (mx3)
  - EUKREA_CPUIMX51SD (mx51)
  - MX51_EFIKAMX (mx51)
  - MX51_EFIKASB (mx51)
- disable SYSFS_DEPRECATED_V2 (mx1, mx21, mx3)
- enable CPU_IDLE (mx27)
- enable MXC_PWM (mx1, mx51)
- drop PM=y, defaults to y since
	1eb208a (PM: Make CONFIG_PM depend on (CONFIG_PM_SLEEP || CONFIG_PM_RUNTIME))
  (mx1, mx27, mx3, mx51)
- enable CAN_MCP251X (mx27, mx51) and CAN_SJA1000 (mx27)
- enable MTD_NAND_MXC and UBI (mx51)
- add MISC_DEVICES=y, defaults to n since
	5f2365d (misc devices: do not enable by default)
  (EEPROM_AT24 depends on MISC_DEVICES) (mx27, mx3)
  or drop MISC_DEVICES=n (mx1, mx51)
- enable EEPROM_AT25 (mx27)
- drop INOTIFY; is gone since
	2dfc1ca (inotify: remove inotify in kernel interface)
  (mx1)
- drop VGA_CONSOLE; isn't selectable on imx any more since
	fb78b51 (ARM: Disable VGA console for ARM in most cases)
  (mx21)
- drop FEC=y, defaults to y since
	085e79e (net/fec: consolidate all i.MX options to CONFIG_ARM)
  (mx27, mx3, mx51)
- drop CRYPTO_ANSI_CPRNG=n; depends on CRYPTO which is unset (mx1)
- drop VIDEO_ALLOW_V4L1=n; gone since
	58c66df ([media] Remove VIDEO_V4L1 Kconfig option)
  (mx3)
- enable mc13xxx including regulator, rtc, touch and led (mx27, mx3, mx51)
- enable KEYBOARD_GPIO (mx27, mx3) and KEYBOARD_IMX (mx27, mx3, mx51)
- drop SERIO=n as KEYBOARD_ATKBD (default y since INPUT=y) selects SERIO
  (mx27, mx3)
- enable I2C_IMX and SPI_IMX (mx51)
- enable SND_IMX_SOC including platfrom glue (mx27, mx3, mx51)
- enable SOC_CAMERA_MT9{T031,V022} (mx27)
- enable VIDEO_MX2 (mx27)
- enable LEDS_GPIO and LEDS_PWM (mx27, mx3, mx51)
- enable USB_EHCI_MXC (mx27)
- enable IMX_DMA (mx1, mx21, mx27)
- enable IMX_SDMA (mx3, mx51)
- RCU_CPU_STALL_DETECTOR isn't selectable any more since
	687d7a9 (rcu: restrict TREE_RCU to SMP builds with !PREEMPT)
  (mx51)
- MMC_MXC isn't selectable any more since
	170cba8 (mmc: mmc_mxc: Allow selection only for the correct platforms)
  (mx1)
- drop MTD_CONCAT; gone since
	f53fdeb (mtd: drop MTD_CONCAT from Kconfig entirely)
  (mx51)
- drop AUTOFS_FS=y; is in staging since
	db7bee2 (autofs3: move to drivers/staging)
  (mx51)
- change CRYPTO_DEFLATE and CRYPTO_LZO to =m as they depend on
  CRYPTO since
	cce9e06 ([CRYPTO] api: Split out low-level API)
  and CRYPTO is only =m. (mx51)
- enable MMC_SDHCI_ESDHC_IMX (mx3, mx51)

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
changes since v1:
  enable MMC_SDHCI_ESDHC_IMX (mx3, mx51)

 arch/arm/configs/mx1_defconfig  |   11 +++-----
 arch/arm/configs/mx21_defconfig |    8 +++---
 arch/arm/configs/mx27_defconfig |   45 +++++++++++++++++++++++++++----
 arch/arm/configs/mx3_defconfig  |   43 ++++++++++++++++++++++--------
 arch/arm/configs/mx51_defconfig |   55 +++++++++++++++++++++++++++++++-------
 5 files changed, 124 insertions(+), 38 deletions(-)

diff --git a/arch/arm/configs/mx1_defconfig b/arch/arm/configs/mx1_defconfig
index b39b5ce..ff96e8f 100644
--- a/arch/arm/configs/mx1_defconfig
+++ b/arch/arm/configs/mx1_defconfig
@@ -3,7 +3,6 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
@@ -16,6 +15,7 @@ CONFIG_ARCH_MX1=y
 CONFIG_ARCH_MX1ADS=y
 CONFIG_MACH_SCB9328=y
 CONFIG_MXC_IRQ_PRIOR=y
+CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
@@ -23,7 +23,6 @@ CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
-CONFIG_PM=y
 CONFIG_PM_DEBUG=y
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -47,7 +46,6 @@ CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_PHYSMAP=y
 # CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
 CONFIG_NETDEVICES=y
 CONFIG_PHYLIB=y
 CONFIG_SMSC_PHY=y
@@ -58,9 +56,9 @@ CONFIG_DM9000=y
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -74,9 +72,9 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_IMX=y
 CONFIG_USB_ETH=m
 CONFIG_MMC=y
-CONFIG_MMC_MXC=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_DMA=y
 # CONFIG_DNOTIFY is not set
-CONFIG_INOTIFY=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_NFS_FS=y
@@ -87,4 +85,3 @@ CONFIG_ROOT_NFS=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/mx21_defconfig b/arch/arm/configs/mx21_defconfig
index 411f88d..27261f6 100644
--- a/arch/arm/configs/mx21_defconfig
+++ b/arch/arm/configs/mx21_defconfig
@@ -2,7 +2,6 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
@@ -51,8 +50,8 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_MXC=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+CONFIG_NET_ETHERNET=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
@@ -62,12 +61,12 @@ CONFIG_INPUT_EVDEV=y
 CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_SERIO is not set
 # CONFIG_CONSOLE_TRANSLATIONS is not set
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=1
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -76,7 +75,6 @@ CONFIG_SPI=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
 CONFIG_FB_IMX=y
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
@@ -85,6 +83,8 @@ CONFIG_LOGO=y
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
 CONFIG_MMC_MXC=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_DMA=y
 # CONFIG_DNOTIFY is not set
 CONFIG_MSDOS_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig
index 9ad4c656..220e84f 100644
--- a/arch/arm/configs/mx27_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -29,6 +29,7 @@ CONFIG_MACH_IMX27_VISSTRIM_M10=y
 CONFIG_MACH_IMX27LITE=y
 CONFIG_MACH_PCA100=y
 CONFIG_MACH_MXT_TD60=y
+CONFIG_MACH_IMX27IPCAM=y
 CONFIG_MXC_IRQ_PRIOR=y
 CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
@@ -37,9 +38,9 @@ CONFIG_PREEMPT=y
 CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_IDLE=y
 CONFIG_FPE_NWFPE=y
 CONFIG_FPE_NWFPE_XP=y
-CONFIG_PM=y
 CONFIG_PM_DEBUG=y
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -54,6 +55,11 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
 # CONFIG_IPV6 is not set
+CONFIG_CAN=y
+CONFIG_CAN_DEV=y
+CONFIG_CAN_MCP251X=y
+CONFIG_CAN_SJA1000=y
+CONFIG_CAN_SJA1000_PLATFORM=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
 CONFIG_MTD_PARTITIONS=y
@@ -71,23 +77,24 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_MXC=y
 CONFIG_MTD_UBI=y
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
-CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=y
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ADS7846=m
-# CONFIG_SERIO is not set
+CONFIG_TOUCHSCREEN_MC13783=y
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=m
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -98,19 +105,45 @@ CONFIG_W1=y
 CONFIG_W1_MASTER_MXC=y
 CONFIG_W1_SLAVE_THERM=y
 # CONFIG_HWMON is not set
+CONFIG_MFD_MC13XXX=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_MC13783=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_VIDEO_DEV=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_MT9T031=y
+CONFIG_SOC_CAMERA_MT9V022=y
+CONFIG_VIDEO_MX2=y
 CONFIG_FB=y
 CONFIG_FB_IMX=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_SOC_MX27VIS_AIC32X4=y
+CONFIG_SND_SOC_PHYCORE_AC97=y
+CONFIG_SND_SOC_EUKREA_TLV320=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB=m
 # CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_MXC=y
 CONFIG_USB_ULPI=y
 CONFIG_MMC=y
 CONFIG_MMC_MXC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_MC13783=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PCF8563=y
+CONFIG_RTC_DRV_MC13XXX=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_DMA=y
 # CONFIG_DNOTIFY is not set
 # CONFIG_PROC_PAGE_MONITOR is not set
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig
index 7c4b30b..0436f8a 100644
--- a/arch/arm/configs/mx3_defconfig
+++ b/arch/arm/configs/mx3_defconfig
@@ -3,7 +3,6 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
@@ -13,18 +12,19 @@ CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_MXC=y
 CONFIG_MACH_MX31ADS_WM1133_EV1=y
+CONFIG_MACH_MX31LILLY=y
+CONFIG_MACH_MX31LITE=y
 CONFIG_MACH_PCM037=y
 CONFIG_MACH_PCM037_EET=y
-CONFIG_MACH_MX31LITE=y
 CONFIG_MACH_MX31_3DS=y
 CONFIG_MACH_MX31MOBOARD=y
-CONFIG_MACH_MX31LILLY=y
 CONFIG_MACH_QONG=y
-CONFIG_MACH_PCM043=y
 CONFIG_MACH_ARMADILLO5X0=y
-CONFIG_MACH_MX35_3DS=y
 CONFIG_MACH_KZM_ARM11_01=y
+CONFIG_MACH_PCM043=y
+CONFIG_MACH_MX35_3DS=y
 CONFIG_MACH_EUKREA_CPUIMX35=y
+CONFIG_MACH_VPR200=y
 CONFIG_MXC_IRQ_PRIOR=y
 CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
@@ -35,7 +35,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
 CONFIG_VFP=y
-CONFIG_PM=y
 CONFIG_PM_DEBUG=y
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -62,24 +61,26 @@ CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_MXC=y
 CONFIG_MTD_UBI=y
 # CONFIG_BLK_DEV is not set
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_NETDEVICES=y
 CONFIG_SMSC_PHY=y
 CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
 CONFIG_DNET=y
-CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_MC13783=y
 # CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=m
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -90,11 +91,12 @@ CONFIG_W1_MASTER_MXC=y
 CONFIG_W1_SLAVE_THERM=y
 # CONFIG_HWMON is not set
 CONFIG_MFD_WM8350_I2C=y
+CONFIG_MFD_MC13XXX=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_WM8350=y
+CONFIG_REGULATOR_MC13783=y
 CONFIG_MEDIA_SUPPORT=y
 CONFIG_VIDEO_DEV=y
-# CONFIG_VIDEO_ALLOW_V4L1 is not set
 CONFIG_SOC_CAMERA=y
 CONFIG_SOC_CAMERA_MT9M001=y
 CONFIG_SOC_CAMERA_MT9M111=y
@@ -105,10 +107,29 @@ CONFIG_SOC_CAMERA_OV772X=y
 CONFIG_VIDEO_MX3=y
 # CONFIG_RADIO_ADAPTERS is not set
 CONFIG_FB=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_MXC_SOC_WM1133_EV1=y
+CONFIG_SND_SOC_PHYCORE_AC97=y
+CONFIG_SND_SOC_EUKREA_TLV320=y
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
+CONFIG_MMC_SDHCI=m
+CONFIG_MMC_SDHCI_PLTFM=m
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
 CONFIG_MMC_MXC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_MC13783=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_MC13XXX=y
 CONFIG_DMADEVICES=y
+CONFIG_IMX_SDMA=y
 # CONFIG_DNOTIFY is not set
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
index e3c9032..51ed279 100644
--- a/arch/arm/configs/mx51_defconfig
+++ b/arch/arm/configs/mx51_defconfig
@@ -17,6 +17,10 @@ CONFIG_ARCH_MX5=y
 CONFIG_MACH_MX51_BABBAGE=y
 CONFIG_MACH_MX51_3DS=y
 CONFIG_MACH_EUKREA_CPUIMX51=y
+CONFIG_MACH_EUKREA_CPUIMX51SD=y
+CONFIG_MACH_MX51_EFIKAMX=y
+CONFIG_MACH_MX51_EFIKASB=y
+CONFIG_MXC_PWM=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT_VOLUNTARY=y
@@ -27,7 +31,6 @@ CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=192.168.0.
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
 CONFIG_PM_DEBUG=y
 CONFIG_PM_TEST_SUSPEND=y
 CONFIG_NET=y
@@ -41,13 +44,25 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+CONFIG_CAN_MCP251X=y
 # CONFIG_WIRELESS is not set
 # CONFIG_STANDALONE is not set
 CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_UBI=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
-# CONFIG_MISC_DEVICES is not set
 CONFIG_SCSI=y
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_BLK_DEV_SD=y
@@ -58,6 +73,7 @@ CONFIG_SCSI_SCAN_ASYNC=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_ATA=m
 CONFIG_NETDEVICES=y
+CONFIG_MII=m
 CONFIG_MARVELL_PHY=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_QSEMI_PHY=y
@@ -74,24 +90,25 @@ CONFIG_LSI_ET1011C_PHY=y
 CONFIG_MDIO_BITBANG=y
 CONFIG_MDIO_GPIO=y
 CONFIG_NET_ETHERNET=y
-CONFIG_MII=m
-CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_WLAN is not set
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
 CONFIG_INPUT_EVBUG=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=y
 CONFIG_MOUSE_PS2=m
 CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_MC13783=y
 CONFIG_SERIO_SERPORT=m
 CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_LEGACY_PTYS is not set
 # CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
 CONFIG_HW_RANDOM=y
 CONFIG_I2C=y
 # CONFIG_I2C_COMPAT is not set
@@ -100,8 +117,21 @@ CONFIG_I2C_CHARDEV=m
 CONFIG_I2C_ALGOBIT=m
 CONFIG_I2C_ALGOPCF=m
 CONFIG_I2C_ALGOPCA=m
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=y
 CONFIG_GPIO_SYSFS=y
 # CONFIG_HWMON is not set
+CONFIG_MFD_MC13XXX=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_MC13783=y
+CONFIG_REGULATOR_MC13892=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_IMX_SOC=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
@@ -109,10 +139,17 @@ CONFIG_USB_EHCI_MXC=y
 CONFIG_MMC=y
 CONFIG_MMC_BLOCK=m
 CONFIG_MMC_SDHCI=m
+CONFIG_MMC_SDHCI_PLTFM=m
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_MC13783=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_RTC_DRV_MC13XXX=y
+CONFIG_DMADEVICES=y
+CONFIG_IMX_SDMA=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
@@ -126,7 +163,6 @@ CONFIG_EXT4_FS_SECURITY=y
 CONFIG_QUOTA=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_PRINT_QUOTA_WARNING is not set
-CONFIG_AUTOFS_FS=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_FUSE_FS=y
 CONFIG_ISO9660_FS=m
@@ -153,14 +189,13 @@ CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_SCHED_DEBUG is not set
 # CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_FTRACE is not set
 # CONFIG_ARM_UNWIND is not set
 CONFIG_DEBUG_LL=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_SECURITYFS=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_LZO=m
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
 CONFIG_CRC_CCITT=m
-- 
1.7.2.3

[PATCH 1/6] ARM: mxc: update defconfigs

[Shawn Guo]

On Tue, Apr 12, 2011 at 10:08:51AM +0200, Uwe Kleine-K?nig wrote:
> On Tue, Apr 12, 2011 at 03:59:32PM +0800, Shawn Guo wrote:
> > Hi Uwe,
> > 
> > On Sun, Apr 10, 2011 at 09:48:58PM +0200, Uwe Kleine-K?nig wrote:
> > > 
> > [...]
> > > Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> > > ---
> > >  arch/arm/configs/mx1_defconfig  |   11 +++-----
> > >  arch/arm/configs/mx21_defconfig |    8 +++---
> > >  arch/arm/configs/mx27_defconfig |   45 ++++++++++++++++++++++++++++----
> > >  arch/arm/configs/mx3_defconfig  |   40 +++++++++++++++++++++--------
> > >  arch/arm/configs/mx51_defconfig |   53 +++++++++++++++++++++++++++++++-------
> > 
> > Would you consider to enable mx5 ESDHC by default?  I guess Linaro
> > will appreciate it, as they are using ext3 rootfs on SD/MMC for their
> > releases.
> I assume this means
> 
> 	+CONFIG_MMC_SDHCI_PLTFM=m
> 	+CONFIG_MMC_SDHCI_ESDHC_IMX=y
> 
To get the system up with rootfs mounted on SD/MMC, I have to do the
following.

CONFIG_MMC_BLOCK=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y

-- 
Regards,
Shawn

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Russell King - ARM Linux]

Do _not_ top post.

On Mon, Apr 11, 2011 at 04:50:48PM -0500, Matt Sealey wrote:
> Well, whoever's responsibility it is to fix this, whereever it needs
> to be fixed, it needs to be fixed, as it is absolutely nuts that you
> cannot run an MX51 and MX53 board off the same kernel.
> 
> If nobody knows or agrees, can anyone can identify exactly what needs
> to be fixed and where, and how much work this would actually be, so
> they or someone else can actually go do it, instead of us just
> debating about how experimental it might be?
> 
> As far as I see it the only reason it depends on EXPERIMENTAL is
> because it breaks at least one subarch, it breaks XIP kernels and it
> breaks Thumb2 kernels (this last one is not so much a showstopper for
> enabling it by default, unless I am mistaken in my assumption that
> Thumb2 kernels still don't work reliably right now anyway?)

I can only guess that you're talking about the dynamic patching of the
virt_to_phys stuff - but that's only a guess because there is _no_
_context_ because you _top_ _posted_.

It is marked as EXPERIMENTAL because it is a new feature which has just
gone in, and hasn't had sufficient testing out in the wild to justify
removal of EXPERIMENTAL.  Therefore, the EXPERIMENTAL tag tells people
that the feature may not be as stable as it should be.

It can be removed _after_ the next merge window when we have a higher
confidence that no one has seen any major problems with it.

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Jason Liu]

2011/4/11 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> On Sun, Apr 10, 2011 at 10:02:03PM -0400, Nicolas Pitre wrote:
>> On Sun, 10 Apr 2011, Uwe Kleine-K?nig wrote:
>>
>> > The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
>> > compile a single (working) kernel for these.
>>
>> Really?
>>
>> Have a look at CONFIG_ARM_PATCH_PHYS_VIRT. ?It's in mainline and fully
>> functional.
> I'm aware of this config item. But still if it's off there must be a
> distinction that's provided by this patch. Currently you can build a
> kernel for i.MX51 + i.MX53 but IIRC it works on no machine.
> When considering ARM_PATCH_PHYS_VIRT there are more SoCs that could be
> built into a single image and so needs a more complicated logic.
> And I don't want to depend on ARM_PATCH_PHYS_VIRT (yet), e.g. because
> it's new and still depends on EXPERIMENTAL.

Uwe, did you enable CONFIG_AUTO_ZRELADDR=y? Besides this if use uboot to
load uImage and run, it also need fix uboot since uImage will hard
code the load address.
In other word, uImage will have mx53 PHY_OFFSET for both mx51 and
mx53, which will
make mx51 failed with bootm command.

BR,
Jason

>
> Best regards
> Uwe
>
>
> --
> Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? | Uwe Kleine-K?nig ? ? ? ? ? ?|
> Industrial Linux Solutions ? ? ? ? ? ? ? ? | http://www.pengutronix.de/ ?|
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

Hello Jason,

On Tue, Apr 12, 2011 at 05:16:44PM +0800, Jason Liu wrote:
> 2011/4/11 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> > On Sun, Apr 10, 2011 at 10:02:03PM -0400, Nicolas Pitre wrote:
> >> On Sun, 10 Apr 2011, Uwe Kleine-K?nig wrote:
> >>
> >> > The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
> >> > compile a single (working) kernel for these.
> >>
> >> Really?
> >>
> >> Have a look at CONFIG_ARM_PATCH_PHYS_VIRT. ?It's in mainline and fully
> >> functional.
> > I'm aware of this config item. But still if it's off there must be a
> > distinction that's provided by this patch. Currently you can build a
> > kernel for i.MX51 + i.MX53 but IIRC it works on no machine.
> > When considering ARM_PATCH_PHYS_VIRT there are more SoCs that could be
> > built into a single image and so needs a more complicated logic.
> > And I don't want to depend on ARM_PATCH_PHYS_VIRT (yet), e.g. because
> > it's new and still depends on EXPERIMENTAL.
> 
> Uwe, did you enable CONFIG_AUTO_ZRELADDR=y? Besides this if use uboot to
> load uImage and run, it also need fix uboot since uImage will hard
> code the load address.
> In other word, uImage will have mx53 PHY_OFFSET for both mx51 and
> mx53, which will
> make mx51 failed with bootm command.
an uboot image (at least the ones created by the kernel build system's
make uImage) is more system dependant than the kernel image itself.
There is nothing that can be fixed considering that Russell doesn't want
more sophisticated support for u-boot images for ARM.
So you have to create the uImage yourself.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

Hello,

On Mon, Apr 11, 2011 at 10:15:09AM -0400, Nicolas Pitre wrote:
> On Mon, 11 Apr 2011, Uwe Kleine-K?nig wrote:
> > Currently you can build a
> > kernel for i.MX51 + i.MX53 but IIRC it works on no machine.
> 
> Maybe it should be fixed?
To catch similar errors earlier next time, I'd like the compiler to wail
if the physoffsets don't match (in the !ARM_PATCH_PHYS_VIRT case).

The best thing I could come up with up to now is:

#if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
# if defined CONFIG_ARCH_MX1
#  define PLAT_PHYS_OFFSET              MX1_PHYS_OFFSET
# endif
# if defined CONFIG_MACH_MX21 && (!defined(PLAT_PHYS_OFFSET) || PLAT_PHYS_OFFSET != MX21_PHYS_OFFSET)
#  define PLAT_PHYS_OFFSET              MX21_PHYS_OFFSET
# endif
# if defined CONFIG_ARCH_MX25 && (!defined(PLAT_PHYS_OFFSET) || PLAT_PHYS_OFFSET != MX25_PHYS_OFFSET)
#  define PLAT_PHYS_OFFSET              MX25_PHYS_OFFSET
# endif
...

this is really ugly.  And even to make this work I have to do 

diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 431077c..957cd7e 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -16,8 +16,6 @@
 #include <linux/compiler.h>
 #include <linux/const.h>
 #include <linux/types.h>
-#include <mach/memory.h>
-#include <asm/sizes.h>
 
 /*
  * Allow for constants defined here to be used from assembly code
@@ -25,6 +23,9 @@
  */
 #define UL(x) _AC(x, UL)
 
+#include <mach/memory.h>
+#include <asm/sizes.h>
+
 #ifdef CONFIG_MMU
 
 /*

because cpp can only compare integers and so needs a definition for UL.
Even when keeping the definition as it is now (i.e. asserting a single
definition by using #ifelse) adding something like:

#if defined(PLAT_PHYS_OFFSET)
# if defined(CONFIG_ARCH_MX1) && (PLAT_PHYS_OFFSET != MX1_PHYS_OFFSET)
#error something
# endif
# ...
#endif

needs the UL macro.

Does someone has a better idea? If not it's probably not worth the change.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Russell King - ARM Linux]

On Tue, Apr 12, 2011 at 11:54:46AM +0200, Uwe Kleine-K?nig wrote:
> #if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
> # if defined CONFIG_ARCH_MX1
> #  define PLAT_PHYS_OFFSET              MX1_PHYS_OFFSET
> # endif
> # if defined CONFIG_MACH_MX21 && (!defined(PLAT_PHYS_OFFSET) || PLAT_PHYS_OFFSET != MX21_PHYS_OFFSET)
> #  define PLAT_PHYS_OFFSET              MX21_PHYS_OFFSET
> # endif
> # if defined CONFIG_ARCH_MX25 && (!defined(PLAT_PHYS_OFFSET) || PLAT_PHYS_OFFSET != MX25_PHYS_OFFSET)
> #  define PLAT_PHYS_OFFSET              MX25_PHYS_OFFSET
> # endif

And what's wrong with:

#if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
#ifdef CONFIG_ARCH_MX1
#ifdef PLAT_PHYS_OFFSET
#error Invalid configuration - PLAT_PHYS_OFFSET already defined
#endif
#define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET
#endif

#ifdef CONFIG_MACH_MX21
#ifdef PLAT_PHYS_OFFSET
#error Invalid configuration - PLAT_PHYS_OFFSET already defined
#endif
#define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET
#endif
...
#endif

?

Or this _may_ work:

#if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
#if CONFIG_ARCH_MX1 + CONFIG_MACH_MX21 + ... > 1
#error Invalid configuration - unable to handle different phys base addresses
#endif
...
#endif

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

Hi Russell,

On Tue, Apr 12, 2011 at 09:27:34PM +0100, Russell King - ARM Linux wrote:
> On Tue, Apr 12, 2011 at 11:54:46AM +0200, Uwe Kleine-K?nig wrote:
> > #if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
> > # if defined CONFIG_ARCH_MX1
> > #  define PLAT_PHYS_OFFSET              MX1_PHYS_OFFSET
> > # endif
> > # if defined CONFIG_MACH_MX21 && (!defined(PLAT_PHYS_OFFSET) || PLAT_PHYS_OFFSET != MX21_PHYS_OFFSET)
> > #  define PLAT_PHYS_OFFSET              MX21_PHYS_OFFSET
> > # endif
> > # if defined CONFIG_ARCH_MX25 && (!defined(PLAT_PHYS_OFFSET) || PLAT_PHYS_OFFSET != MX25_PHYS_OFFSET)
> > #  define PLAT_PHYS_OFFSET              MX25_PHYS_OFFSET
> > # endif
> 
> And what's wrong with:
> 
> #if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
> #ifdef CONFIG_ARCH_MX1
> #ifdef PLAT_PHYS_OFFSET
> #error Invalid configuration - PLAT_PHYS_OFFSET already defined
> #endif
> #define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET
> #endif
> 
> #ifdef CONFIG_MACH_MX21
> #ifdef PLAT_PHYS_OFFSET
> #error Invalid configuration - PLAT_PHYS_OFFSET already defined
> #endif
> #define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET
> #endif
> ...
> #endif
> 
> ?
i.MX25 and i.MX31 have the same PHYS_OFFSET, so the error should
not trigger if these two are enabled. So testing only #ifdef
PLAT_PHYS_OFFSET is wrong.

> Or this _may_ work:
> 
> #if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
> #if CONFIG_ARCH_MX1 + CONFIG_MACH_MX21 + ... > 1
> #error Invalid configuration - unable to handle different phys base addresses
> #endif
Same problem (and I guess it yields some cpp warnings about
CONFIG_ARCH_MX1 not being defined for an i.MX21-only build, but I didn't
test).
> ...
> #endif
> 

Thanks for your try,
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Russell King - ARM Linux]

On Tue, Apr 12, 2011 at 10:37:30PM +0200, Uwe Kleine-K?nig wrote:
> > #if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
> > #if CONFIG_ARCH_MX1 + CONFIG_MACH_MX21 + ... > 1
> > #error Invalid configuration - unable to handle different phys base addresses
> > #endif
> Same problem (and I guess it yields some cpp warnings about
> CONFIG_ARCH_MX1 not being defined for an i.MX21-only build, but I didn't
> test).

Well then,

#if (CONFIG_ARCH_MX1 | CONFIG_MACH_MX21) + (...) + ... > 1

where each group of | cover those which share the same phys base.

No idea what those are because each MX SoC hides its phys base behind
some SoC private definition.  This is definitely a case where more
preprocessor junk reduces the code readability and makes it harder to
understand.  Removal of preprocessor indirection sounds like a candidate
for the consolidation effort to me.

I think we're at the point where "no" to that is not acceptable.  Make
it happen please.  We must reduce the size of arch/arm by all means
possible.

[PATCH] ARM: remove ns9xxx port

[Uwe Kleine-König]

The port is actually unmaintained and only received global
cleanups and a few build fixes since mid 2008.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
Hello,

On Tue, Apr 12, 2011 at 09:53:44PM +0100, Russell King - ARM Linux wrote:
> We must reduce the size of arch/arm by all means possible.

What about this? You considered to do this some time ago[1] already and I
asked to wait because Digi planned to continue the mainline efforts
around spring 2010.

Best regards
Uwe

[1] http://mid.gmane.org/20091121105009.GD7998 at n2100.arm.linux.org.uk

 arch/arm/Kconfig                                   |   14 --
 arch/arm/Makefile                                  |    1 -
 arch/arm/configs/ns9xxx_defconfig                  |   56 -----
 arch/arm/mach-ns9xxx/Kconfig                       |   40 ----
 arch/arm/mach-ns9xxx/Makefile                      |   12 -
 arch/arm/mach-ns9xxx/Makefile.boot                 |    2 -
 arch/arm/mach-ns9xxx/board-a9m9750dev.c            |  156 --------------
 arch/arm/mach-ns9xxx/board-a9m9750dev.h            |   15 --
 arch/arm/mach-ns9xxx/board-jscc9p9360.c            |   17 --
 arch/arm/mach-ns9xxx/board-jscc9p9360.h            |   13 --
 arch/arm/mach-ns9xxx/clock.c                       |  215 --------------------
 arch/arm/mach-ns9xxx/clock.h                       |   35 ----
 arch/arm/mach-ns9xxx/generic.c                     |   19 --
 arch/arm/mach-ns9xxx/generic.h                     |   16 --
 arch/arm/mach-ns9xxx/gpio-ns9360.c                 |  118 -----------
 arch/arm/mach-ns9xxx/gpio-ns9360.h                 |   13 --
 arch/arm/mach-ns9xxx/gpio.c                        |  147 -------------
 arch/arm/mach-ns9xxx/include/mach/board.h          |   40 ----
 arch/arm/mach-ns9xxx/include/mach/debug-macro.S    |   21 --
 arch/arm/mach-ns9xxx/include/mach/entry-macro.S    |   28 ---
 arch/arm/mach-ns9xxx/include/mach/gpio.h           |   47 -----
 arch/arm/mach-ns9xxx/include/mach/hardware.h       |   77 -------
 arch/arm/mach-ns9xxx/include/mach/io.h             |   20 --
 arch/arm/mach-ns9xxx/include/mach/irqs.h           |   86 --------
 arch/arm/mach-ns9xxx/include/mach/memory.h         |   24 ---
 arch/arm/mach-ns9xxx/include/mach/module.h         |   55 -----
 .../mach-ns9xxx/include/mach/processor-ns9360.h    |   32 ---
 arch/arm/mach-ns9xxx/include/mach/processor.h      |   42 ----
 arch/arm/mach-ns9xxx/include/mach/regs-bbu.h       |   45 ----
 .../include/mach/regs-board-a9m9750dev.h           |   24 ---
 arch/arm/mach-ns9xxx/include/mach/regs-mem.h       |  135 ------------
 .../arm/mach-ns9xxx/include/mach/regs-sys-common.h |   31 ---
 .../arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h |  148 --------------
 arch/arm/mach-ns9xxx/include/mach/system.h         |   35 ----
 arch/arm/mach-ns9xxx/include/mach/timex.h          |   20 --
 arch/arm/mach-ns9xxx/include/mach/uncompress.h     |  164 ---------------
 arch/arm/mach-ns9xxx/include/mach/vmalloc.h        |   16 --
 arch/arm/mach-ns9xxx/irq.c                         |   74 -------
 arch/arm/mach-ns9xxx/mach-cc9p9360dev.c            |   43 ----
 arch/arm/mach-ns9xxx/mach-cc9p9360js.c             |   31 ---
 arch/arm/mach-ns9xxx/plat-serial8250.c             |   70 -------
 arch/arm/mach-ns9xxx/processor-ns9360.c            |   53 -----
 arch/arm/mach-ns9xxx/time-ns9360.c                 |  181 ----------------
 43 files changed, 0 insertions(+), 2431 deletions(-)
 delete mode 100644 arch/arm/configs/ns9xxx_defconfig
 delete mode 100644 arch/arm/mach-ns9xxx/Kconfig
 delete mode 100644 arch/arm/mach-ns9xxx/Makefile
 delete mode 100644 arch/arm/mach-ns9xxx/Makefile.boot
 delete mode 100644 arch/arm/mach-ns9xxx/board-a9m9750dev.c
 delete mode 100644 arch/arm/mach-ns9xxx/board-a9m9750dev.h
 delete mode 100644 arch/arm/mach-ns9xxx/board-jscc9p9360.c
 delete mode 100644 arch/arm/mach-ns9xxx/board-jscc9p9360.h
 delete mode 100644 arch/arm/mach-ns9xxx/clock.c
 delete mode 100644 arch/arm/mach-ns9xxx/clock.h
 delete mode 100644 arch/arm/mach-ns9xxx/generic.c
 delete mode 100644 arch/arm/mach-ns9xxx/generic.h
 delete mode 100644 arch/arm/mach-ns9xxx/gpio-ns9360.c
 delete mode 100644 arch/arm/mach-ns9xxx/gpio-ns9360.h
 delete mode 100644 arch/arm/mach-ns9xxx/gpio.c
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/board.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/debug-macro.S
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/entry-macro.S
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/gpio.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/hardware.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/io.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/irqs.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/memory.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/module.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/processor.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/regs-mem.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/system.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/timex.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/uncompress.h
 delete mode 100644 arch/arm/mach-ns9xxx/include/mach/vmalloc.h
 delete mode 100644 arch/arm/mach-ns9xxx/irq.c
 delete mode 100644 arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
 delete mode 100644 arch/arm/mach-ns9xxx/mach-cc9p9360js.c
 delete mode 100644 arch/arm/mach-ns9xxx/plat-serial8250.c
 delete mode 100644 arch/arm/mach-ns9xxx/processor-ns9360.c
 delete mode 100644 arch/arm/mach-ns9xxx/time-ns9360.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5b9f78b..a8bd3c5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -554,18 +554,6 @@ config ARCH_KS8695
 	  Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 	  System-on-Chip devices.
 
-config ARCH_NS9XXX
-	bool "NetSilicon NS9xxx"
-	select CPU_ARM926T
-	select GENERIC_GPIO
-	select GENERIC_CLOCKEVENTS
-	select HAVE_CLK
-	help
-	  Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
-	  System.
-
-	  <http://www.digi.com/products/microprocessors/index.jsp>
-
 config ARCH_W90X900
 	bool "Nuvoton W90X900 CPU"
 	select CPU_ARM926T
@@ -951,8 +939,6 @@ source "arch/arm/mach-netx/Kconfig"
 source "arch/arm/mach-nomadik/Kconfig"
 source "arch/arm/plat-nomadik/Kconfig"
 
-source "arch/arm/mach-ns9xxx/Kconfig"
-
 source "arch/arm/mach-nuc93x/Kconfig"
 
 source "arch/arm/plat-omap/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 2b39030..285ca1c 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -163,7 +163,6 @@ machine-$(CONFIG_ARCH_MX5)		:= mx5
 machine-$(CONFIG_ARCH_MXS)		:= mxs
 machine-$(CONFIG_ARCH_NETX)		:= netx
 machine-$(CONFIG_ARCH_NOMADIK)		:= nomadik
-machine-$(CONFIG_ARCH_NS9XXX)		:= ns9xxx
 machine-$(CONFIG_ARCH_OMAP1)		:= omap1
 machine-$(CONFIG_ARCH_OMAP2)		:= omap2
 machine-$(CONFIG_ARCH_OMAP3)		:= omap2
diff --git a/arch/arm/configs/ns9xxx_defconfig b/arch/arm/configs/ns9xxx_defconfig
deleted file mode 100644
index 1f528a0..0000000
--- a/arch/arm/configs/ns9xxx_defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_NS9XXX=y
-CONFIG_MACH_CC9P9360DEV=y
-CONFIG_MACH_CC9P9360JS=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_SYN_COOKIES=y
-CONFIG_MTD=m
-CONFIG_MTD_CONCAT=m
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLOCK=m
-CONFIG_MTD_CFI=m
-CONFIG_MTD_JEDECPROBE=m
-CONFIG_MTD_CFI_AMDSTD=m
-CONFIG_MTD_PHYSMAP=m
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=m
-CONFIG_I2C_GPIO=m
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=m
-CONFIG_LEDS_GPIO=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=m
-CONFIG_LEDS_TRIGGER_HEARTBEAT=m
-CONFIG_RTC_CLASS=m
-CONFIG_EXT2_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=m
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
diff --git a/arch/arm/mach-ns9xxx/Kconfig b/arch/arm/mach-ns9xxx/Kconfig
deleted file mode 100644
index dd0cd5a..0000000
--- a/arch/arm/mach-ns9xxx/Kconfig
+++ /dev/null
@@ -1,40 +0,0 @@
-if ARCH_NS9XXX
-
-menu "NS9xxx Implementations"
-
-config NS9XXX_HAVE_SERIAL8250
-	bool
-
-config PROCESSOR_NS9360
-	bool
-
-config MODULE_CC9P9360
-	bool
-	select PROCESSOR_NS9360
-
-config BOARD_A9M9750DEV
-	select NS9XXX_HAVE_SERIAL8250
-	bool
-
-config BOARD_JSCC9P9360
-	bool
-
-config MACH_CC9P9360DEV
-	bool "ConnectCore 9P 9360 on an A9M9750 Devboard"
-	select MODULE_CC9P9360
-	select BOARD_A9M9750DEV
-	help
-	  Say Y here if you are using the Digi ConnectCore 9P 9360
-	  on an A9M9750 Development Board.
-
-config MACH_CC9P9360JS
-	bool "ConnectCore 9P 9360 on a JSCC9P9360 Devboard"
-	select MODULE_CC9P9360
-	select BOARD_JSCC9P9360
-	help
-	  Say Y here if you are using the Digi ConnectCore 9P 9360
-	  on an JSCC9P9360 Development Board.
-
-endmenu
-
-endif
diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile
deleted file mode 100644
index 41efaf9..0000000
--- a/arch/arm/mach-ns9xxx/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-obj-y := clock.o generic.o gpio.o irq.o
-
-obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o
-obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o
-
-obj-$(CONFIG_PROCESSOR_NS9360) += gpio-ns9360.o processor-ns9360.o time-ns9360.o
-
-obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o
-obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o
-
-# platform devices
-obj-$(CONFIG_NS9XXX_HAVE_SERIAL8250) += plat-serial8250.o
diff --git a/arch/arm/mach-ns9xxx/Makefile.boot b/arch/arm/mach-ns9xxx/Makefile.boot
deleted file mode 100644
index 5465491..0000000
--- a/arch/arm/mach-ns9xxx/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
-zreladdr-y := 0x8000
-params_phys-y := 0x100
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
deleted file mode 100644
index e27687d..0000000
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/board-a9m9750dev.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/irq.h>
-
-#include <asm/mach/map.h>
-#include <asm/gpio.h>
-
-#include <mach/board.h>
-#include <mach/processor-ns9360.h>
-#include <mach/regs-sys-ns9360.h>
-#include <mach/regs-mem.h>
-#include <mach/regs-bbu.h>
-#include <mach/regs-board-a9m9750dev.h>
-
-#include "board-a9m9750dev.h"
-
-static struct map_desc board_a9m9750dev_io_desc[] __initdata = {
-	{ /* FPGA on CS0 */
-		.virtual = io_p2v(NS9XXX_CSxSTAT_PHYS(0)),
-		.pfn = __phys_to_pfn(NS9XXX_CSxSTAT_PHYS(0)),
-		.length = NS9XXX_CS0STAT_LENGTH,
-		.type = MT_DEVICE,
-	},
-};
-
-void __init board_a9m9750dev_map_io(void)
-{
-	iotable_init(board_a9m9750dev_io_desc,
-		     ARRAY_SIZE(board_a9m9750dev_io_desc));
-}
-
-static void a9m9750dev_fpga_ack_irq(struct irq_data *d)
-{
-	/* nothing */
-}
-
-static void a9m9750dev_fpga_mask_irq(struct irq_data *d)
-{
-	u8 ier;
-
-	ier = __raw_readb(FPGA_IER);
-
-	ier &= ~(1 << (d->irq - FPGA_IRQ(0)));
-
-	__raw_writeb(ier, FPGA_IER);
-}
-
-static void a9m9750dev_fpga_maskack_irq(struct irq_data *d)
-{
-	a9m9750dev_fpga_mask_irq(d);
-	a9m9750dev_fpga_ack_irq(d);
-}
-
-static void a9m9750dev_fpga_unmask_irq(struct irq_data *d)
-{
-	u8 ier;
-
-	ier = __raw_readb(FPGA_IER);
-
-	ier |= 1 << (d->irq - FPGA_IRQ(0));
-
-	__raw_writeb(ier, FPGA_IER);
-}
-
-static struct irq_chip a9m9750dev_fpga_chip = {
-	.irq_ack	= a9m9750dev_fpga_ack_irq,
-	.irq_mask	= a9m9750dev_fpga_mask_irq,
-	.irq_mask_ack	= a9m9750dev_fpga_maskack_irq,
-	.irq_unmask	= a9m9750dev_fpga_unmask_irq,
-};
-
-static void a9m9750dev_fpga_demux_handler(unsigned int irq,
-		struct irq_desc *desc)
-{
-	u8 stat = __raw_readb(FPGA_ISR);
-
-	desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
-
-	while (stat != 0) {
-		int irqno = fls(stat) - 1;
-
-		stat &= ~(1 << irqno);
-
-		generic_handle_irq(FPGA_IRQ(irqno));
-	}
-
-	desc->irq_data.chip->irq_unmask(&desc->irq_data);
-}
-
-void __init board_a9m9750dev_init_irq(void)
-{
-	u32 eic;
-	int i;
-
-	if (gpio_request(11, "board a9m9750dev extirq2") == 0)
-		ns9360_gpio_configure(11, 0, 1);
-	else
-		printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_NS9XXX_EXT2\n",
-				__func__);
-
-	for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
-		irq_set_chip_and_handler(i, &a9m9750dev_fpga_chip,
-					 handle_level_irq);
-		set_irq_flags(i, IRQF_VALID);
-	}
-
-	/* IRQ_NS9XXX_EXT2: level sensitive + active low */
-	eic = __raw_readl(SYS_EIC(2));
-	REGSET(eic, SYS_EIC, PLTY, AL);
-	REGSET(eic, SYS_EIC, LVEDG, LEVEL);
-	__raw_writel(eic, SYS_EIC(2));
-
-	irq_set_chained_handler(IRQ_NS9XXX_EXT2,
-				a9m9750dev_fpga_demux_handler);
-}
-
-void __init board_a9m9750dev_init_machine(void)
-{
-	u32 reg;
-
-	/* setup static CS0: memory base ... */
-	reg = __raw_readl(SYS_SMCSSMB(0));
-	REGSETIM(reg, SYS_SMCSSMB, CSxB, NS9XXX_CSxSTAT_PHYS(0) >> 12);
-	__raw_writel(reg, SYS_SMCSSMB(0));
-
-	/* ... and mask */
-	reg = __raw_readl(SYS_SMCSSMM(0));
-	REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff);
-	REGSET(reg, SYS_SMCSSMM, CSEx, EN);
-	__raw_writel(reg, SYS_SMCSSMM(0));
-
-	/* setup static CS0: memory configuration */
-	reg = __raw_readl(MEM_SMC(0));
-	REGSET(reg, MEM_SMC, PSMC, OFF);
-	REGSET(reg, MEM_SMC, BSMC, OFF);
-	REGSET(reg, MEM_SMC, EW, OFF);
-	REGSET(reg, MEM_SMC, PB, 1);
-	REGSET(reg, MEM_SMC, PC, AL);
-	REGSET(reg, MEM_SMC, PM, DIS);
-	REGSET(reg, MEM_SMC, MW, 8);
-	__raw_writel(reg, MEM_SMC(0));
-
-	/* setup static CS0: timing */
-	__raw_writel(0x2, MEM_SMWED(0));
-	__raw_writel(0x2, MEM_SMOED(0));
-	__raw_writel(0x6, MEM_SMRD(0));
-	__raw_writel(0x6, MEM_SMWD(0));
-}
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.h b/arch/arm/mach-ns9xxx/board-a9m9750dev.h
deleted file mode 100644
index edc75ab..0000000
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/board-a9m9750dev.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/init.h>
-
-void __init board_a9m9750dev_map_io(void);
-void __init board_a9m9750dev_init_machine(void);
-void __init board_a9m9750dev_init_irq(void);
diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.c b/arch/arm/mach-ns9xxx/board-jscc9p9360.c
deleted file mode 100644
index 4bd3eec..0000000
--- a/arch/arm/mach-ns9xxx/board-jscc9p9360.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/board-jscc9p9360.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include "board-jscc9p9360.h"
-
-void __init board_jscc9p9360_init_machine(void)
-{
-	/* TODO: reserve GPIOs for push buttons, etc pp */
-}
-
diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.h b/arch/arm/mach-ns9xxx/board-jscc9p9360.h
deleted file mode 100644
index 1a81a07..0000000
--- a/arch/arm/mach-ns9xxx/board-jscc9p9360.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/board-jscc9p9360.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/init.h>
-
-void __init board_jscc9p9360_init_machine(void);
diff --git a/arch/arm/mach-ns9xxx/clock.c b/arch/arm/mach-ns9xxx/clock.c
deleted file mode 100644
index cf81cbc..0000000
--- a/arch/arm/mach-ns9xxx/clock.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/clock.c
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/err.h>
-#include <linux/module.h>
-#include <linux/list.h>
-#include <linux/clk.h>
-#include <linux/string.h>
-#include <linux/platform_device.h>
-#include <linux/semaphore.h>
-
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_SPINLOCK(clk_lock);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-	struct clk *p, *ret = NULL, *retgen = NULL;
-	unsigned long flags;
-	int idno;
-
-	if (dev == NULL || dev->bus != &platform_bus_type)
-		idno = -1;
-	else
-		idno = to_platform_device(dev)->id;
-
-	spin_lock_irqsave(&clk_lock, flags);
-	list_for_each_entry(p, &clocks, node) {
-		if (strcmp(id, p->name) == 0) {
-			if (p->id == idno) {
-				if (!try_module_get(p->owner))
-					continue;
-				ret = p;
-				break;
-			} else if (p->id == -1)
-				/* remember match with id == -1 in case there is
-				 * no clock for idno */
-				retgen = p;
-		}
-	}
-
-	if (!ret && retgen && try_module_get(retgen->owner))
-		ret = retgen;
-
-	if (ret)
-		++ret->refcount;
-
-	spin_unlock_irqrestore(&clk_lock, flags);
-
-	return ret ? ret : ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-	module_put(clk->owner);
-	--clk->refcount;
-}
-EXPORT_SYMBOL(clk_put);
-
-static int clk_enable_unlocked(struct clk *clk)
-{
-	int ret = 0;
-	if (clk->parent) {
-		ret = clk_enable_unlocked(clk->parent);
-		if (ret)
-			return ret;
-	}
-
-	if (clk->usage++ == 0 && clk->endisable)
-		ret = clk->endisable(clk, 1);
-
-	return ret;
-}
-
-int clk_enable(struct clk *clk)
-{
-	int ret;
-	unsigned long flags;
-
-	spin_lock_irqsave(&clk_lock, flags);
-
-	ret = clk_enable_unlocked(clk);
-
-	spin_unlock_irqrestore(&clk_lock, flags);
-
-	return ret;
-}
-EXPORT_SYMBOL(clk_enable);
-
-static void clk_disable_unlocked(struct clk *clk)
-{
-	if (--clk->usage == 0 && clk->endisable)
-		clk->endisable(clk, 0);
-
-	if (clk->parent)
-		clk_disable_unlocked(clk->parent);
-}
-
-void clk_disable(struct clk *clk)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&clk_lock, flags);
-
-	clk_disable_unlocked(clk);
-
-	spin_unlock_irqrestore(&clk_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-	if (clk->get_rate)
-		return clk->get_rate(clk);
-
-	if (clk->rate)
-		return clk->rate;
-
-	if (clk->parent)
-		return clk_get_rate(clk->parent);
-
-	return 0;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-int clk_register(struct clk *clk)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&clk_lock, flags);
-
-	list_add(&clk->node, &clocks);
-
-	if (clk->parent)
-		++clk->parent->refcount;
-
-	spin_unlock_irqrestore(&clk_lock, flags);
-
-	return 0;
-}
-
-int clk_unregister(struct clk *clk)
-{
-	int ret = 0;
-	unsigned long flags;
-
-	spin_lock_irqsave(&clk_lock, flags);
-
-	if (clk->usage || clk->refcount)
-		ret = -EBUSY;
-	else
-		list_del(&clk->node);
-
-	if (clk->parent)
-		--clk->parent->refcount;
-
-	spin_unlock_irqrestore(&clk_lock, flags);
-
-	return ret;
-}
-
-#if defined CONFIG_DEBUG_FS
-
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-
-static int clk_debugfs_show(struct seq_file *s, void *null)
-{
-	unsigned long flags;
-	struct clk *p;
-
-	spin_lock_irqsave(&clk_lock, flags);
-
-	list_for_each_entry(p, &clocks, node)
-		seq_printf(s, "%s.%d: usage=%lu refcount=%lu rate=%lu\n",
-				p->name, p->id, p->usage, p->refcount,
-				p->usage ? clk_get_rate(p) : 0);
-
-	spin_unlock_irqrestore(&clk_lock, flags);
-
-	return 0;
-}
-
-static int clk_debugfs_open(struct inode *inode, struct file *file)
-{
-	return single_open(file, clk_debugfs_show, NULL);
-}
-
-static const struct file_operations clk_debugfs_operations = {
-	.open = clk_debugfs_open,
-	.read = seq_read,
-	.llseek = seq_lseek,
-	.release = single_release,
-};
-
-static int __init clk_debugfs_init(void)
-{
-	struct dentry *dentry;
-
-	dentry = debugfs_create_file("clk", S_IFREG | S_IRUGO, NULL, NULL,
-			&clk_debugfs_operations);
-	return IS_ERR(dentry) ? PTR_ERR(dentry) : 0;
-}
-subsys_initcall(clk_debugfs_init);
-
-#endif /* if defined CONFIG_DEBUG_FS */
diff --git a/arch/arm/mach-ns9xxx/clock.h b/arch/arm/mach-ns9xxx/clock.h
deleted file mode 100644
index b86c30d..0000000
--- a/arch/arm/mach-ns9xxx/clock.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/clock.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __NS9XXX_CLOCK_H
-#define __NS9XXX_CLOCK_H
-
-#include <linux/list.h>
-
-struct clk {
-	struct module *owner;
-	const char *name;
-	int id;
-
-	struct clk *parent;
-
-	unsigned long rate;
-	int (*endisable)(struct clk *, int enable);
-	unsigned long (*get_rate)(struct clk *);
-
-	struct list_head node;
-	unsigned long refcount;
-	unsigned long usage;
-};
-
-int clk_register(struct clk *clk);
-int clk_unregister(struct clk *clk);
-
-#endif /* ifndef __NS9XXX_CLOCK_H */
diff --git a/arch/arm/mach-ns9xxx/generic.c b/arch/arm/mach-ns9xxx/generic.c
deleted file mode 100644
index 1e0f467..0000000
--- a/arch/arm/mach-ns9xxx/generic.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/generic.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <asm/memory.h>
-
-#include "generic.h"
-
-void __init ns9xxx_init_machine(void)
-{
-}
diff --git a/arch/arm/mach-ns9xxx/generic.h b/arch/arm/mach-ns9xxx/generic.h
deleted file mode 100644
index 8249319..0000000
--- a/arch/arm/mach-ns9xxx/generic.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/generic.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/time.h>
-#include <asm/mach/time.h>
-#include <linux/init.h>
-
-void __init ns9xxx_init_irq(void);
-void __init ns9xxx_init_machine(void);
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.c b/arch/arm/mach-ns9xxx/gpio-ns9360.c
deleted file mode 100644
index 377330c..0000000
--- a/arch/arm/mach-ns9xxx/gpio-ns9360.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/gpio-ns9360.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/bug.h>
-#include <linux/errno.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-
-#include <mach/regs-bbu.h>
-#include <mach/processor-ns9360.h>
-
-#include "gpio-ns9360.h"
-
-static inline int ns9360_valid_gpio(unsigned gpio)
-{
-	return gpio <= 72;
-}
-
-static inline void __iomem *ns9360_gpio_get_gconfaddr(unsigned gpio)
-{
-	if (gpio < 56)
-		return BBU_GCONFb1(gpio / 8);
-	else
-		/*
-		 * this could be optimised away on
-		 * ns9750 only builds, but it isn't ...
-		 */
-		return BBU_GCONFb2((gpio - 56) / 8);
-}
-
-static inline void __iomem *ns9360_gpio_get_gctrladdr(unsigned gpio)
-{
-	if (gpio < 32)
-		return BBU_GCTRL1;
-	else if (gpio < 64)
-		return BBU_GCTRL2;
-	else
-		/* this could be optimised away on ns9750 only builds */
-		return BBU_GCTRL3;
-}
-
-static inline void __iomem *ns9360_gpio_get_gstataddr(unsigned gpio)
-{
-	if (gpio < 32)
-		return BBU_GSTAT1;
-	else if (gpio < 64)
-		return BBU_GSTAT2;
-	else
-		/* this could be optimised away on ns9750 only builds */
-		return BBU_GSTAT3;
-}
-
-/*
- * each gpio can serve for 4 different purposes [0..3].  These are called
- * "functions" and passed in the parameter func.  Functions 0-2 are always some
- * special things, function 3 is GPIO.  If func == 3 dir specifies input or
- * output, and with inv you can enable an inverter (independent of func).
- */
-int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func)
-{
-	void __iomem *conf = ns9360_gpio_get_gconfaddr(gpio);
-	u32 confval;
-
-	confval = __raw_readl(conf);
-	REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
-	REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
-	REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
-	__raw_writel(confval, conf);
-
-	return 0;
-}
-
-int ns9360_gpio_configure(unsigned gpio, int inv, int func)
-{
-	if (likely(ns9360_valid_gpio(gpio))) {
-		if (func == 3) {
-			printk(KERN_WARNING "use gpio_direction_input "
-					"or gpio_direction_output\n");
-			return -EINVAL;
-		} else
-			return __ns9360_gpio_configure(gpio, 0, inv, func);
-	} else
-		return -EINVAL;
-}
-EXPORT_SYMBOL(ns9360_gpio_configure);
-
-int ns9360_gpio_get_value(unsigned gpio)
-{
-	void __iomem *stat = ns9360_gpio_get_gstataddr(gpio);
-	int ret;
-
-	ret = 1 & (__raw_readl(stat) >> (gpio & 31));
-
-	return ret;
-}
-
-void ns9360_gpio_set_value(unsigned gpio, int value)
-{
-	void __iomem *ctrl = ns9360_gpio_get_gctrladdr(gpio);
-	u32 ctrlval;
-
-	ctrlval = __raw_readl(ctrl);
-
-	if (value)
-		ctrlval |= 1 << (gpio & 31);
-	else
-		ctrlval &= ~(1 << (gpio & 31));
-
-	__raw_writel(ctrlval, ctrl);
-}
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.h b/arch/arm/mach-ns9xxx/gpio-ns9360.h
deleted file mode 100644
index 131cd17..0000000
--- a/arch/arm/mach-ns9xxx/gpio-ns9360.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/gpio-ns9360.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func);
-int ns9360_gpio_get_value(unsigned gpio);
-void ns9360_gpio_set_value(unsigned gpio, int value);
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c
deleted file mode 100644
index 5503ca0..0000000
--- a/arch/arm/mach-ns9xxx/gpio.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/gpio.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/compiler.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/module.h>
-#include <linux/bitops.h>
-
-#include <mach/gpio.h>
-#include <mach/processor.h>
-#include <mach/processor-ns9360.h>
-#include <asm/bug.h>
-#include <asm/types.h>
-
-#include "gpio-ns9360.h"
-
-#if defined(CONFIG_PROCESSOR_NS9360)
-#define GPIO_MAX 72
-#elif defined(CONFIG_PROCESSOR_NS9750)
-#define GPIO_MAX 49
-#endif
-
-/* protects BBU_GCONFx and BBU_GCTRLx */
-static spinlock_t gpio_lock = __SPIN_LOCK_UNLOCKED(gpio_lock);
-
-/* only access gpiores with atomic ops */
-static DECLARE_BITMAP(gpiores, GPIO_MAX + 1);
-
-static inline int ns9xxx_valid_gpio(unsigned gpio)
-{
-#if defined(CONFIG_PROCESSOR_NS9360)
-	if (processor_is_ns9360())
-		return gpio <= 72;
-	else
-#endif
-#if defined(CONFIG_PROCESSOR_NS9750)
-	if (processor_is_ns9750())
-		return gpio <= 49;
-	else
-#endif
-	{
-		BUG();
-		return 0;
-	}
-}
-
-int gpio_request(unsigned gpio, const char *label)
-{
-	if (likely(ns9xxx_valid_gpio(gpio)))
-		return test_and_set_bit(gpio, gpiores) ? -EBUSY : 0;
-	else
-		return -EINVAL;
-}
-EXPORT_SYMBOL(gpio_request);
-
-void gpio_free(unsigned gpio)
-{
-	might_sleep();
-	clear_bit(gpio, gpiores);
-	return;
-}
-EXPORT_SYMBOL(gpio_free);
-
-int gpio_direction_input(unsigned gpio)
-{
-	if (likely(ns9xxx_valid_gpio(gpio))) {
-		int ret = -EINVAL;
-		unsigned long flags;
-
-		spin_lock_irqsave(&gpio_lock, flags);
-#if defined(CONFIG_PROCESSOR_NS9360)
-		if (processor_is_ns9360())
-			ret = __ns9360_gpio_configure(gpio, 0, 0, 3);
-		else
-#endif
-			BUG();
-
-		spin_unlock_irqrestore(&gpio_lock, flags);
-
-		return ret;
-
-	} else
-		return -EINVAL;
-}
-EXPORT_SYMBOL(gpio_direction_input);
-
-int gpio_direction_output(unsigned gpio, int value)
-{
-	if (likely(ns9xxx_valid_gpio(gpio))) {
-		int ret = -EINVAL;
-		unsigned long flags;
-
-		gpio_set_value(gpio, value);
-
-		spin_lock_irqsave(&gpio_lock, flags);
-#if defined(CONFIG_PROCESSOR_NS9360)
-		if (processor_is_ns9360())
-			ret = __ns9360_gpio_configure(gpio, 1, 0, 3);
-		else
-#endif
-			BUG();
-
-		spin_unlock_irqrestore(&gpio_lock, flags);
-
-		return ret;
-	} else
-		return -EINVAL;
-}
-EXPORT_SYMBOL(gpio_direction_output);
-
-int gpio_get_value(unsigned gpio)
-{
-#if defined(CONFIG_PROCESSOR_NS9360)
-	if (processor_is_ns9360())
-		return ns9360_gpio_get_value(gpio);
-	else
-#endif
-	{
-		BUG();
-		return -EINVAL;
-	}
-}
-EXPORT_SYMBOL(gpio_get_value);
-
-void gpio_set_value(unsigned gpio, int value)
-{
-	unsigned long flags;
-	spin_lock_irqsave(&gpio_lock, flags);
-#if defined(CONFIG_PROCESSOR_NS9360)
-	if (processor_is_ns9360())
-		ns9360_gpio_set_value(gpio, value);
-	else
-#endif
-		BUG();
-
-	spin_unlock_irqrestore(&gpio_lock, flags);
-}
-EXPORT_SYMBOL(gpio_set_value);
diff --git a/arch/arm/mach-ns9xxx/include/mach/board.h b/arch/arm/mach-ns9xxx/include/mach/board.h
deleted file mode 100644
index 19ca6de..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/board.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/board.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_BOARD_H
-#define __ASM_ARCH_BOARD_H
-
-#include <asm/mach-types.h>
-
-#define board_is_a9m9750dev()	(0			\
-		|| machine_is_cc9p9750dev()		\
-		)
-
-#define board_is_a9mvali()	(0			\
-		|| machine_is_cc9p9750val()		\
-		)
-
-#define board_is_jscc9p9210()	(0			\
-		|| machine_is_cc9p9210js()		\
-		)
-
-#define board_is_jscc9p9215()	(0			\
-		|| machine_is_cc9p9215js()		\
-		)
-
-#define board_is_jscc9p9360()	(0			\
-		|| machine_is_cc9p9360js()		\
-		)
-
-#define board_is_uncbas()	(0			\
-		|| machine_is_cc7ucamry()		\
-		)
-
-#endif /* ifndef __ASM_ARCH_BOARD_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
deleted file mode 100644
index 5a2acbd..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/debug-macro.S
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <mach/hardware.h>
-#include <asm/memory.h>
-
-#include <mach/regs-board-a9m9750dev.h>
-
-		.macro	addruart, rp, rv
-		ldr	\rp, =NS9XXX_CSxSTAT_PHYS(0)
-		ldr	\rv, =io_p2v(NS9XXX_CSxSTAT_PHYS(0))
-		.endm
-
-#define UART_SHIFT	2
-#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-ns9xxx/include/mach/entry-macro.S b/arch/arm/mach-ns9xxx/include/mach/entry-macro.S
deleted file mode 100644
index 71ca031..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/entry-macro.S
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <mach/hardware.h>
-#include <mach/regs-sys-common.h>
-
-		.macro	get_irqnr_preamble, base, tmp
-		ldr	\base, =SYS_ISRADDR
-		.endm
-
-		.macro	arch_ret_to_user, tmp1, tmp2
-		.endm
-
-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		ldr	\irqstat, [\base, #(SYS_ISA - SYS_ISRADDR)]
-		cmp	\irqstat, #0
-		ldrne	\irqnr, [\base]
-		.endm
-
-		.macro	disable_fiq
-		.endm
diff --git a/arch/arm/mach-ns9xxx/include/mach/gpio.h b/arch/arm/mach-ns9xxx/include/mach/gpio.h
deleted file mode 100644
index 5eb3490..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/gpio.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/gpio.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H
-
-#include <asm/errno.h>
-
-int gpio_request(unsigned gpio, const char *label);
-
-void gpio_free(unsigned gpio);
-
-int ns9xxx_gpio_configure(unsigned gpio, int inv, int func);
-
-int gpio_direction_input(unsigned gpio);
-
-int gpio_direction_output(unsigned gpio, int value);
-
-int gpio_get_value(unsigned gpio);
-
-void gpio_set_value(unsigned gpio, int value);
-
-/*
- * ns9xxx can use gpio pins to trigger an irq, but it's not generic
- * enough to be supported by the gpio_to_irq/irq_to_gpio interface
- */
-static inline int gpio_to_irq(unsigned gpio)
-{
-	return -EINVAL;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
-	return -EINVAL;
-}
-
-/* get the cansleep() stubs */
-#include <asm-generic/gpio.h>
-
-#endif /* ifndef __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/hardware.h b/arch/arm/mach-ns9xxx/include/mach/hardware.h
deleted file mode 100644
index 7663112..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/hardware.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/hardware.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-/*
- * NetSilicon NS9xxx internal mapping:
- *
- * physical                <--> virtual
- * 0x90000000 - 0x906fffff <--> 0xf9000000 - 0xf96fffff
- * 0xa0100000 - 0xa0afffff <--> 0xfa100000 - 0xfaafffff
- */
-#define io_p2v(x)	(0xf0000000 \
-			 + (((x) & 0xf0000000) >> 4) \
-			 + ((x) & 0x00ffffff))
-
-#define io_v2p(x)	((((x) & 0x0f000000) << 4) \
-			 + ((x) & 0x00ffffff))
-
-#define __REGSHIFT(mask)	((mask) & (-(mask)))
-
-#define __REGBIT(bit)		((u32)1 << (bit))
-#define __REGBITS(hbit, lbit)	((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit))
-#define __REGVAL(mask, value)	(((value) * __REGSHIFT(mask)) & (mask))
-
-#ifndef __ASSEMBLY__
-
-#  define __REG(x)	((void __iomem __force *)io_p2v((x)))
-#  define __REG2(x, y)	((void __iomem __force *)(io_p2v((x)) + 4 * (y)))
-
-#  define __REGSET(var, field, value)					\
-	((var) = (((var) & ~((field) & ~(value))) | (value)))
-
-#  define REGSET(var, reg, field, value)				\
-	__REGSET(var, reg ## _ ## field, reg ## _ ## field ## _ ## value)
-
-#  define REGSET_IDX(var, reg, field, idx, value)			\
-	__REGSET(var, reg ## _ ## field((idx)), reg ## _ ## field ## _ ## value((idx)))
-
-#  define REGSETIM(var, reg, field, value)				\
-	__REGSET(var, reg ## _ ## field, __REGVAL(reg ## _ ## field, (value)))
-
-#  define REGSETIM_IDX(var, reg, field, idx, value)			\
-	__REGSET(var, reg ## _ ## field((idx)), __REGVAL(reg ## _ ## field((idx)), (value)))
-
-#  define __REGGET(var, field)						\
-	(((var) & (field)))
-
-#  define REGGET(var, reg, field)					\
-	 __REGGET(var, reg ## _ ## field)
-
-#  define REGGET_IDX(var, reg, field, idx)				\
-	 __REGGET(var, reg ## _ ## field((idx)))
-
-#  define REGGETIM(var, reg, field)					\
-	 __REGGET(var, reg ## _ ## field) / __REGSHIFT(reg ## _ ## field)
-
-#  define REGGETIM_IDX(var, reg, field, idx)				\
-	 __REGGET(var, reg ## _ ## field((idx))) /			\
-	 __REGSHIFT(reg ## _ ## field((idx)))
-
-#else
-
-#  define __REG(x)	io_p2v(x)
-#  define __REG2(x, y)	io_p2v((x) + 4 * (y))
-
-#endif
-
-#endif /* ifndef __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/io.h b/arch/arm/mach-ns9xxx/include/mach/io.h
deleted file mode 100644
index f08451d..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/io.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT  0xffffffff /* XXX */
-
-#define __io(a)		__typesafe_io(a)
-#define __mem_pci(a)    (a)
-#define __mem_isa(a)    (IO_BASE + (a))
-
-#endif /* ifndef __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/irqs.h b/arch/arm/mach-ns9xxx/include/mach/irqs.h
deleted file mode 100644
index 1348394..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/irqs.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/irqs.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H
-
-/* NetSilicon 9360 */
-#define IRQ_NS9XXX_WATCHDOG	0
-#define IRQ_NS9XXX_AHBBUSERR	1
-#define IRQ_NS9360_BBUSAGG	2
-/* irq 3 is reserved for NS9360 */
-#define IRQ_NS9XXX_ETHRX	4
-#define IRQ_NS9XXX_ETHTX	5
-#define IRQ_NS9XXX_ETHPHY	6
-#define IRQ_NS9360_LCD		7
-#define IRQ_NS9360_SERBRX	8
-#define IRQ_NS9360_SERBTX	9
-#define IRQ_NS9360_SERARX	10
-#define IRQ_NS9360_SERATX	11
-#define IRQ_NS9360_SERCRX	12
-#define IRQ_NS9360_SERCTX	13
-#define IRQ_NS9360_I2C		14
-#define IRQ_NS9360_BBUSDMA	15
-#define IRQ_NS9360_TIMER0	16
-#define IRQ_NS9360_TIMER1	17
-#define IRQ_NS9360_TIMER2	18
-#define IRQ_NS9360_TIMER3	19
-#define IRQ_NS9360_TIMER4	20
-#define IRQ_NS9360_TIMER5	21
-#define IRQ_NS9360_TIMER6	22
-#define IRQ_NS9360_TIMER7	23
-#define IRQ_NS9360_RTC		24
-#define IRQ_NS9360_USBHOST	25
-#define IRQ_NS9360_USBDEVICE	26
-#define IRQ_NS9360_IEEE1284	27
-#define IRQ_NS9XXX_EXT0		28
-#define IRQ_NS9XXX_EXT1		29
-#define IRQ_NS9XXX_EXT2		30
-#define IRQ_NS9XXX_EXT3		31
-
-#define BBUS_IRQ(irq)	(32 + irq)
-
-#define IRQ_BBUS_DMA		BBUS_IRQ(0)
-#define IRQ_BBUS_SERBRX		BBUS_IRQ(2)
-#define IRQ_BBUS_SERBTX		BBUS_IRQ(3)
-#define IRQ_BBUS_SERARX		BBUS_IRQ(4)
-#define IRQ_BBUS_SERATX		BBUS_IRQ(5)
-#define IRQ_BBUS_SERCRX		BBUS_IRQ(6)
-#define IRQ_BBUS_SERCTX		BBUS_IRQ(7)
-#define IRQ_BBUS_SERDRX		BBUS_IRQ(8)
-#define IRQ_BBUS_SERDTX		BBUS_IRQ(9)
-#define IRQ_BBUS_I2C		BBUS_IRQ(10)
-#define IRQ_BBUS_1284		BBUS_IRQ(11)
-#define IRQ_BBUS_UTIL		BBUS_IRQ(12)
-#define IRQ_BBUS_RTC		BBUS_IRQ(13)
-#define IRQ_BBUS_USBHST		BBUS_IRQ(14)
-#define IRQ_BBUS_USBDEV		BBUS_IRQ(15)
-#define IRQ_BBUS_AHBDMA1	BBUS_IRQ(24)
-#define IRQ_BBUS_AHBDMA2	BBUS_IRQ(25)
-
-/*
- * these Interrupts are specific for the a9m9750dev board.
- * They are generated by an FPGA that interrupts the CPU on
- * IRQ_NS9360_EXT2
- */
-#define FPGA_IRQ(irq)	(64 + irq)
-
-#define IRQ_FPGA_UARTA		FPGA_IRQ(0)
-#define IRQ_FPGA_UARTB		FPGA_IRQ(1)
-#define IRQ_FPGA_UARTC		FPGA_IRQ(2)
-#define IRQ_FPGA_UARTD		FPGA_IRQ(3)
-#define IRQ_FPGA_TOUCH		FPGA_IRQ(4)
-#define IRQ_FPGA_CF		FPGA_IRQ(5)
-#define IRQ_FPGA_CAN0		FPGA_IRQ(6)
-#define IRQ_FPGA_CAN1		FPGA_IRQ(7)
-
-#define NR_IRQS	72
-
-#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/memory.h b/arch/arm/mach-ns9xxx/include/mach/memory.h
deleted file mode 100644
index 5c65aee..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/memory.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/memory.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/* x in [0..3] */
-#define NS9XXX_CSxSTAT_PHYS(x)	UL(((x) + 4) << 28)
-
-#define NS9XXX_CS0STAT_LENGTH	UL(0x1000)
-#define NS9XXX_CS1STAT_LENGTH	UL(0x1000)
-#define NS9XXX_CS2STAT_LENGTH	UL(0x1000)
-#define NS9XXX_CS3STAT_LENGTH	UL(0x1000)
-
-#define PLAT_PHYS_OFFSET	UL(0x00000000)
-
-#endif
diff --git a/arch/arm/mach-ns9xxx/include/mach/module.h b/arch/arm/mach-ns9xxx/include/mach/module.h
deleted file mode 100644
index 628e975..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/module.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/module.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_MODULE_H
-#define __ASM_ARCH_MODULE_H
-
-#include <asm/mach-types.h>
-
-#define module_is_cc7ucamry()	(0			\
-		|| machine_is_cc7ucamry()		\
-		)
-
-#define module_is_cc9c()	(0			\
-		)
-
-#define module_is_cc9p9210()	(0			\
-		|| machine_is_cc9p9210()		\
-		|| machine_is_cc9p9210js()		\
-		)
-
-#define module_is_cc9p9215()	(0			\
-		|| machine_is_cc9p9215()		\
-		|| machine_is_cc9p9215js()		\
-		)
-
-#define module_is_cc9p9360()	(0			\
-		|| machine_is_cc9p9360dev()		\
-		|| machine_is_cc9p9360js()		\
-		)
-
-#define module_is_cc9p9750()	(0			\
-		|| machine_is_a9m9750()			\
-		|| machine_is_cc9p9750js()		\
-		|| machine_is_cc9p9750val()		\
-		)
-
-#define module_is_ccw9c()	(0			\
-		)
-
-#define module_is_inc20otter()	(0			\
-		|| machine_is_inc20otter()		\
-		)
-
-#define module_is_otter()	(0			\
-		|| machine_is_otter()			\
-		)
-
-#endif /* ifndef __ASM_ARCH_MODULE_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h b/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
deleted file mode 100644
index f41deda..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_PROCESSORNS9360_H
-#define __ASM_ARCH_PROCESSORNS9360_H
-
-#include <linux/init.h>
-
-void ns9360_reset(char mode);
-
-unsigned long ns9360_systemclock(void) __attribute__((const));
-
-static inline unsigned long ns9360_cpuclock(void) __attribute__((const));
-static inline unsigned long ns9360_cpuclock(void)
-{
-	return ns9360_systemclock() / 2;
-}
-
-void __init ns9360_map_io(void);
-
-extern struct sys_timer ns9360_timer;
-
-int ns9360_gpio_configure(unsigned gpio, int inv, int func);
-
-#endif /* ifndef __ASM_ARCH_PROCESSORNS9360_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/processor.h b/arch/arm/mach-ns9xxx/include/mach/processor.h
deleted file mode 100644
index 9f77f74..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/processor.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/processor.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_PROCESSOR_H
-#define __ASM_ARCH_PROCESSOR_H
-
-#include <mach/module.h>
-
-#define processor_is_ns9210()	(0			\
-		|| module_is_cc7ucamry()		\
-		|| module_is_cc9p9210()			\
-		|| module_is_inc20otter()		\
-		|| module_is_otter()			\
-		)
-
-#define processor_is_ns9215()	(0			\
-		|| module_is_cc9p9215()			\
-		)
-
-#define processor_is_ns9360()	(0			\
-		|| module_is_cc9p9360()			\
-		|| module_is_cc9c()			\
-		|| module_is_ccw9c()			\
-		)
-
-#define processor_is_ns9750()	(0			\
-		|| module_is_cc9p9750()			\
-		)
-
-#define processor_is_ns921x()	(0			\
-		|| processor_is_ns9210()		\
-		|| processor_is_ns9215()		\
-		)
-
-#endif /* ifndef __ASM_ARCH_PROCESSOR_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h b/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
deleted file mode 100644
index af227c0..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_REGSBBU_H
-#define __ASM_ARCH_REGSBBU_H
-
-#include <mach/hardware.h>
-
-/* BBus Utility */
-
-/* GPIO Configuration Registers block 1 */
-/* NOTE: the HRM starts counting at 1 for the GPIO registers, here the start is
- * at 0 for each block.  That is, BBU_GCONFb1(0) is GPIO Configuration Register
- * #1, BBU_GCONFb2(0) is GPIO Configuration Register #8. */
-#define BBU_GCONFb1(x)	__REG2(0x90600010, (x))
-#define BBU_GCONFb2(x)	__REG2(0x90600100, (x))
-
-#define BBU_GCONFx_DIR(m)	__REGBIT(3 + (((m) & 7) << 2))
-#define BBU_GCONFx_DIR_INPUT(m)	__REGVAL(BBU_GCONFx_DIR(m), 0)
-#define BBU_GCONFx_DIR_OUTPUT(m)	__REGVAL(BBU_GCONFx_DIR(m), 1)
-#define BBU_GCONFx_INV(m)	__REGBIT(2 + (((m) & 7) << 2))
-#define BBU_GCONFx_INV_NO(m)		__REGVAL(BBU_GCONFx_INV(m), 0)
-#define BBU_GCONFx_INV_YES(m)		__REGVAL(BBU_GCONFx_INV(m), 1)
-#define BBU_GCONFx_FUNC(m)	__REGBITS(1 + (((m) & 7) << 2), ((m) & 7) << 2)
-#define BBU_GCONFx_FUNC_0(m)		__REGVAL(BBU_GCONFx_FUNC(m), 0)
-#define BBU_GCONFx_FUNC_1(m)		__REGVAL(BBU_GCONFx_FUNC(m), 1)
-#define BBU_GCONFx_FUNC_2(m)		__REGVAL(BBU_GCONFx_FUNC(m), 2)
-#define BBU_GCONFx_FUNC_3(m)		__REGVAL(BBU_GCONFx_FUNC(m), 3)
-
-#define BBU_GCTRL1	__REG(0x90600030)
-#define BBU_GCTRL2	__REG(0x90600034)
-#define BBU_GCTRL3	__REG(0x90600120)
-
-#define BBU_GSTAT1	__REG(0x90600040)
-#define BBU_GSTAT2	__REG(0x90600044)
-#define BBU_GSTAT3	__REG(0x90600130)
-
-#endif /* ifndef __ASM_ARCH_REGSBBU_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h b/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
deleted file mode 100644
index cd15936..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_REGSBOARDA9M9750_H
-#define __ASM_ARCH_REGSBOARDA9M9750_H
-
-#include <mach/hardware.h>
-
-#define FPGA_UARTA_BASE	io_p2v(NS9XXX_CSxSTAT_PHYS(0))
-#define FPGA_UARTB_BASE	io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08)
-#define FPGA_UARTC_BASE	io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10)
-#define FPGA_UARTD_BASE	io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18)
-
-#define FPGA_IER	__REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
-#define FPGA_ISR	__REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
-
-#endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-mem.h b/arch/arm/mach-ns9xxx/include/mach/regs-mem.h
deleted file mode 100644
index f1625bf..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-mem.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-mem.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_REGSMEM_H
-#define __ASM_ARCH_REGSMEM_H
-
-#include <mach/hardware.h>
-
-/* Memory Module */
-
-/* Control register */
-#define MEM_CTRL	__REG(0xa0700000)
-
-/* Status register */
-#define MEM_STAT	__REG(0xa0700004)
-
-/* Configuration register */
-#define MEM_CONF	__REG(0xa0700008)
-
-/* Dynamic Memory Control register */
-#define MEM_DMCTRL	__REG(0xa0700020)
-
-/* Dynamic Memory Refresh Timer */
-#define MEM_DMRT	__REG(0xa0700024)
-
-/* Dynamic Memory Read Configuration register */
-#define MEM_DMRC	__REG(0xa0700028)
-
-/* Dynamic Memory Precharge Command Period (tRP) */
-#define MEM_DMPCP	__REG(0xa0700030)
-
-/* Dynamic Memory Active to Precharge Command Period (tRAS) */
-#define MEM_DMAPCP	__REG(0xa0700034)
-
-/* Dynamic Memory Self-Refresh Exit Time (tSREX) */
-#define MEM_DMSRET	__REG(0xa0700038)
-
-/* Dynamic Memory Last Data Out to Active Time (tAPR) */
-#define MEM_DMLDOAT	__REG(0xa070003c)
-
-/* Dynamic Memory Data-in to Active Command Time (tDAL or TAPW) */
-#define MEM_DMDIACT	__REG(0xa0700040)
-
-/* Dynamic Memory Write Recovery Time (tWR, tDPL, tRWL, tRDL) */
-#define MEM_DMWRT	__REG(0xa0700044)
-
-/* Dynamic Memory Active to Active Command Period (tRC) */
-#define MEM_DMAACP	__REG(0xa0700048)
-
-/* Dynamic Memory Auto Refresh Period, and Auto Refresh to Active Command Period (tRFC) */
-#define MEM_DMARP	__REG(0xa070004c)
-
-/* Dynamic Memory Exit Self-Refresh to Active Command (tXSR) */
-#define MEM_DMESRAC	__REG(0xa0700050)
-
-/* Dynamic Memory Active Bank A to Active B Time (tRRD) */
-#define MEM_DMABAABT	__REG(0xa0700054)
-
-/* Dynamic Memory Load Mode register to Active Command Time (tMRD) */
-#define MEM_DMLMACT	__REG(0xa0700058)
-
-/* Static Memory Extended Wait */
-#define MEM_SMEW	__REG(0xa0700080)
-
-/* Dynamic Memory Configuration Register x */
-#define MEM_DMCONF(x) 	__REG2(0xa0700100, (x) << 3)
-
-/* Dynamic Memory RAS and CAS Delay x */
-#define MEM_DMRCD(x)	__REG2(0xa0700104, (x) << 3)
-
-/* Static Memory Configuration Register x */
-#define MEM_SMC(x)	__REG2(0xa0700200, (x) << 3)
-
-/* Static Memory Configuration Register x: Write protect */
-#define MEM_SMC_PSMC		__REGBIT(20)
-#define MEM_SMC_PSMC_OFF		__REGVAL(MEM_SMC_PSMC, 0)
-#define MEM_SMC_PSMC_ON			__REGVAL(MEM_SMC_PSMC, 1)
-
-/* Static Memory Configuration Register x: Buffer enable */
-#define MEM_SMC_BSMC		__REGBIT(19)
-#define MEM_SMC_BSMC_OFF		__REGVAL(MEM_SMC_BSMC, 0)
-#define MEM_SMC_BSMC_ON			__REGVAL(MEM_SMC_BSMC, 1)
-
-/* Static Memory Configuration Register x: Extended Wait */
-#define MEM_SMC_EW		__REGBIT(8)
-#define MEM_SMC_EW_OFF			__REGVAL(MEM_SMC_EW, 0)
-#define MEM_SMC_EW_ON			__REGVAL(MEM_SMC_EW, 1)
-
-/* Static Memory Configuration Register x: Byte lane state */
-#define MEM_SMC_PB		__REGBIT(7)
-#define MEM_SMC_PB_0			__REGVAL(MEM_SMC_PB, 0)
-#define MEM_SMC_PB_1			__REGVAL(MEM_SMC_PB, 1)
-
-/* Static Memory Configuration Register x: Chip select polarity */
-#define MEM_SMC_PC		__REGBIT(6)
-#define MEM_SMC_PC_AL			__REGVAL(MEM_SMC_PC, 0)
-#define MEM_SMC_PC_AH			__REGVAL(MEM_SMC_PC, 1)
-
-/* static memory configuration register x: page mode*/
-#define MEM_SMC_PM		__REGBIT(3)
-#define MEM_SMC_PM_DIS			__REGVAL(MEM_SMC_PM, 0)
-#define MEM_SMC_PM_ASYNC		__REGVAL(MEM_SMC_PM, 1)
-
-/* static memory configuration register x: Memory width */
-#define MEM_SMC_MW		__REGBITS(1, 0)
-#define MEM_SMC_MW_8			__REGVAL(MEM_SMC_MW, 0)
-#define MEM_SMC_MW_16			__REGVAL(MEM_SMC_MW, 1)
-#define MEM_SMC_MW_32			__REGVAL(MEM_SMC_MW, 2)
-
-/* Static Memory Write Enable Delay x */
-#define MEM_SMWED(x)	__REG2(0xa0700204, (x) << 3)
-
-/* Static Memory Output Enable Delay x */
-#define MEM_SMOED(x)	__REG2(0xa0700208, (x) << 3)
-
-/* Static Memory Read Delay x */
-#define MEM_SMRD(x)	__REG2(0xa070020c, (x) << 3)
-
-/* Static Memory Page Mode Read Delay 0 */
-#define MEM_SMPMRD(x)	__REG2(0xa0700210, (x) << 3)
-
-/* Static Memory Write Delay */
-#define MEM_SMWD(x)	__REG2(0xa0700214, (x) << 3)
-
-/* Static Memory Turn Round Delay x */
-#define MEM_SWT(x)	__REG2(0xa0700218, (x) << 3)
-
-#endif /* ifndef __ASM_ARCH_REGSMEM_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h b/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
deleted file mode 100644
index 14f91df..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_REGSSYSCOMMON_H
-#define __ASM_ARCH_REGSSYSCOMMON_H
-#include <mach/hardware.h>
-
-/* Interrupt Vector Address Register Level x */
-#define SYS_IVA(x)	__REG2(0xa09000c4, (x))
-
-/* Interrupt Configuration registers */
-#define SYS_IC(x)	__REG2(0xa0900144, (x))
-
-/* ISRADDR */
-#define SYS_ISRADDR     __REG(0xa0900164)
-
-/* Interrupt Status Active */
-#define SYS_ISA		__REG(0xa0900168)
-
-/* Interrupt Status Raw */
-#define SYS_ISR		__REG(0xa090016c)
-
-#endif /* ifndef __ASM_ARCH_REGSSYSCOMMON_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h b/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
deleted file mode 100644
index 8ff254d..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_REGSSYSNS9360_H
-#define __ASM_ARCH_REGSSYSNS9360_H
-
-#include <mach/hardware.h>
-
-/* System Control Module */
-
-/* AHB Arbiter Gen Configuration */
-#define SYS_AHBAGENCONF	__REG(0xa0900000)
-
-/* BRC */
-#define SYS_BRC(x)	__REG2(0xa0900004, (x))
-
-/* Timer x Reload Count register */
-#define SYS_TRC(x)	__REG2(0xa0900044, (x))
-
-/* Timer x Read register */
-#define SYS_TR(x)	__REG2(0xa0900084, (x))
-
-/* Timer Interrupt Status register */
-#define SYS_TIS		__REG(0xa0900170)
-
-/* PLL Configuration register */
-#define SYS_PLL		__REG(0xa0900188)
-
-/* PLL FS status */
-#define SYS_PLL_FS		__REGBITS(24, 23)
-
-/* PLL ND status */
-#define SYS_PLL_ND		__REGBITS(20, 16)
-
-/* PLL Configuration register: PLL SW change */
-#define SYS_PLL_SWC		__REGBIT(15)
-#define SYS_PLL_SWC_NO			__REGVAL(SYS_PLL_SWC, 0)
-#define SYS_PLL_SWC_YES			__REGVAL(SYS_PLL_SWC, 1)
-
-/* Timer x Control register */
-#define SYS_TC(x)	__REG2(0xa0900190, (x))
-
-/* Timer x Control register: Timer enable */
-#define SYS_TCx_TEN		__REGBIT(15)
-#define SYS_TCx_TEN_DIS			__REGVAL(SYS_TCx_TEN, 0)
-#define SYS_TCx_TEN_EN			__REGVAL(SYS_TCx_TEN, 1)
-
-/* Timer x Control register: CPU debug mode */
-#define SYS_TCx_TDBG		__REGBIT(10)
-#define SYS_TCx_TDBG_CONT		__REGVAL(SYS_TCx_TDBG, 0)
-#define SYS_TCx_TDBG_STOP		__REGVAL(SYS_TCx_TDBG, 1)
-
-/* Timer x Control register: Interrupt clear */
-#define SYS_TCx_INTC		__REGBIT(9)
-#define SYS_TCx_INTC_UNSET		__REGVAL(SYS_TCx_INTC, 0)
-#define SYS_TCx_INTC_SET		__REGVAL(SYS_TCx_INTC, 1)
-
-/* Timer x Control register: Timer clock select */
-#define SYS_TCx_TLCS		__REGBITS(8, 6)
-#define SYS_TCx_TLCS_CPU		__REGVAL(SYS_TCx_TLCS, 0)	/* CPU clock */
-#define SYS_TCx_TLCS_DIV2		__REGVAL(SYS_TCx_TLCS, 1)	/* CPU clock / 2 */
-#define SYS_TCx_TLCS_DIV4		__REGVAL(SYS_TCx_TLCS, 2)	/* CPU clock / 4 */
-#define SYS_TCx_TLCS_DIV8		__REGVAL(SYS_TCx_TLCS, 3)	/* CPU clock / 8 */
-#define SYS_TCx_TLCS_DIV16		__REGVAL(SYS_TCx_TLCS, 4)	/* CPU clock / 16 */
-#define SYS_TCx_TLCS_DIV32		__REGVAL(SYS_TCx_TLCS, 5)	/* CPU clock / 32 */
-#define SYS_TCx_TLCS_DIV64		__REGVAL(SYS_TCx_TLCS, 6)	/* CPU clock / 64 */
-#define SYS_TCx_TLCS_EXT		__REGVAL(SYS_TCx_TLCS, 7)
-
-/* Timer x Control register: Timer mode */
-#define SYS_TCx_TM		__REGBITS(5, 4)
-#define SYS_TCx_TM_IEE			__REGVAL(SYS_TCx_TM, 0)		/* Internal timer or external event */
-#define SYS_TCx_TM_ELL			__REGVAL(SYS_TCx_TM, 1)		/* External low-level, gated timer */
-#define SYS_TCx_TM_EHL			__REGVAL(SYS_TCx_TM, 2)		/* External high-level, gated timer */
-#define SYS_TCx_TM_CONCAT		__REGVAL(SYS_TCx_TM, 3)		/* Concatenate the lower timer. */
-
-/* Timer x Control register: Interrupt select */
-#define SYS_TCx_INTS		__REGBIT(3)
-#define SYS_TCx_INTS_DIS		__REGVAL(SYS_TCx_INTS, 0)
-#define SYS_TCx_INTS_EN			__REGVAL(SYS_TCx_INTS, 1)
-
-/* Timer x Control register: Up/down select */
-#define SYS_TCx_UDS		__REGBIT(2)
-#define SYS_TCx_UDS_UP			__REGVAL(SYS_TCx_UDS, 0)
-#define SYS_TCx_UDS_DOWN		__REGVAL(SYS_TCx_UDS, 1)
-
-/* Timer x Control register: 32- or 16-bit timer */
-#define SYS_TCx_TSZ		__REGBIT(1)
-#define SYS_TCx_TSZ_16			__REGVAL(SYS_TCx_TSZ, 0)
-#define SYS_TCx_TSZ_32			__REGVAL(SYS_TCx_TSZ, 1)
-
-/* Timer x Control register: Reload enable */
-#define SYS_TCx_REN		__REGBIT(0)
-#define SYS_TCx_REN_DIS			__REGVAL(SYS_TCx_REN, 0)
-#define SYS_TCx_REN_EN			__REGVAL(SYS_TCx_REN, 1)
-
-/* System Memory Chip Select x Dynamic Memory Base */
-#define SYS_SMCSDMB(x)	__REG2(0xa09001d0, (x) << 1)
-
-/* System Memory Chip Select x Dynamic Memory Mask */
-#define SYS_SMCSDMM(x)	__REG2(0xa09001d4, (x) << 1)
-
-/* System Memory Chip Select x Static Memory Base */
-#define SYS_SMCSSMB(x)	__REG2(0xa09001f0, (x) << 1)
-
-/* System Memory Chip Select x Static Memory Base: Chip select x base */
-#define SYS_SMCSSMB_CSxB	__REGBITS(31, 12)
-
-/* System Memory Chip Select x Static Memory Mask */
-#define SYS_SMCSSMM(x)	__REG2(0xa09001f4, (x) << 1)
-
-/* System Memory Chip Select x Static Memory Mask: Chip select x mask */
-#define SYS_SMCSSMM_CSxM	__REGBITS(31, 12)
-
-/* System Memory Chip Select x Static Memory Mask: Chip select x enable */
-#define SYS_SMCSSMM_CSEx	__REGBIT(0)
-#define SYS_SMCSSMM_CSEx_DIS		__REGVAL(SYS_SMCSSMM_CSEx, 0)
-#define SYS_SMCSSMM_CSEx_EN		__REGVAL(SYS_SMCSSMM_CSEx, 1)
-
-/* General purpose, user-defined ID register */
-#define SYS_GENID	__REG(0xa0900210)
-
-/* External Interrupt x Control register */
-#define SYS_EIC(x)	__REG2(0xa0900214, (x))
-
-/* External Interrupt x Control register: Status */
-#define SYS_EIC_STS		__REGBIT(3)
-
-/* External Interrupt x Control register: Clear */
-#define SYS_EIC_CLR		__REGBIT(2)
-
-/* External Interrupt x Control register: Polarity */
-#define SYS_EIC_PLTY		__REGBIT(1)
-#define SYS_EIC_PLTY_AH			__REGVAL(SYS_EIC_PLTY, 0)
-#define SYS_EIC_PLTY_AL			__REGVAL(SYS_EIC_PLTY, 1)
-
-/* External Interrupt x Control register: Level edge */
-#define SYS_EIC_LVEDG		__REGBIT(0)
-#define SYS_EIC_LVEDG_LEVEL		__REGVAL(SYS_EIC_LVEDG, 0)
-#define SYS_EIC_LVEDG_EDGE		__REGVAL(SYS_EIC_LVEDG, 1)
-
-#endif /* ifndef __ASM_ARCH_REGSSYSNS9360_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/system.h b/arch/arm/mach-ns9xxx/include/mach/system.h
deleted file mode 100644
index 1561588..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/system.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/system.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <asm/proc-fns.h>
-#include <mach/processor.h>
-#include <mach/processor-ns9360.h>
-
-static inline void arch_idle(void)
-{
-	cpu_do_idle();
-}
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-#ifdef CONFIG_PROCESSOR_NS9360
-	if (processor_is_ns9360())
-		ns9360_reset(mode);
-	else
-#endif
-		BUG();
-
-	BUG();
-}
-
-#endif /* ifndef __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/timex.h b/arch/arm/mach-ns9xxx/include/mach/timex.h
deleted file mode 100644
index 734a8d8..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/timex.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/timex.h
- *
- * Copyright (C) 2005-2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_TIMEX_H
-#define __ASM_ARCH_TIMEX_H
-
-/*
- * value for CLOCK_TICK_RATE stolen from arch/arm/mach-s3c2410/include/mach/timex.h.
- * See there for an explanation.
- */
-#define CLOCK_TICK_RATE         12000000
-
-#endif /* ifndef __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h
deleted file mode 100644
index 770a68c..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/uncompress.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/uncompress.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
-
-#include <linux/io.h>
-
-#define __REG(x)	((void __iomem __force *)(x))
-
-static void putc_dummy(char c, void __iomem *base)
-{
-	/* nothing */
-}
-
-static int timeout;
-
-static void putc_ns9360(char c, void __iomem *base)
-{
-	do {
-		if (timeout)
-			--timeout;
-
-		if (__raw_readl(base + 8) & (1 << 3)) {
-			__raw_writeb(c, base + 16);
-			timeout = 0x10000;
-			break;
-		}
-	} while (timeout);
-}
-
-static void putc_a9m9750dev(char c, void __iomem *base)
-{
-	do {
-		if (timeout)
-			--timeout;
-
-		if (__raw_readb(base + 5) & (1 << 5)) {
-			__raw_writeb(c, base);
-			timeout = 0x10000;
-			break;
-		}
-	} while (timeout);
-
-}
-
-static void putc_ns921x(char c, void __iomem *base)
-{
-	do {
-		if (timeout)
-			--timeout;
-
-		if (!(__raw_readl(base) & (1 << 11))) {
-			__raw_writeb(c, base + 0x0028);
-			timeout = 0x10000;
-			break;
-		}
-	} while (timeout);
-}
-
-#define MSCS __REG(0xA0900184)
-
-#define NS9360_UARTA	__REG(0x90200040)
-#define NS9360_UARTB	__REG(0x90200000)
-#define NS9360_UARTC	__REG(0x90300000)
-#define NS9360_UARTD	__REG(0x90300040)
-
-#define NS9360_UART_ENABLED(base)					\
-		(__raw_readl(NS9360_UARTA) & (1 << 31))
-
-#define A9M9750DEV_UARTA	__REG(0x40000000)
-
-#define NS921XSYS_CLOCK	__REG(0xa090017c)
-#define NS921X_UARTA	__REG(0x90010000)
-#define NS921X_UARTB	__REG(0x90018000)
-#define NS921X_UARTC	__REG(0x90020000)
-#define NS921X_UARTD	__REG(0x90028000)
-
-#define NS921X_UART_ENABLED(base)					\
-		(__raw_readl((base) + 0x1000) & (1 << 29))
-
-static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base)
-{
-	timeout = 0x10000;
-	if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) {
-		/* ns9360 or ns9750 */
-		if (NS9360_UART_ENABLED(NS9360_UARTA)) {
-			*putc = putc_ns9360;
-			*base = NS9360_UARTA;
-			return;
-		} else if (NS9360_UART_ENABLED(NS9360_UARTB)) {
-			*putc = putc_ns9360;
-			*base = NS9360_UARTB;
-			return;
-		} else if (NS9360_UART_ENABLED(NS9360_UARTC)) {
-			*putc = putc_ns9360;
-			*base = NS9360_UARTC;
-			return;
-		} else if (NS9360_UART_ENABLED(NS9360_UARTD)) {
-			*putc = putc_ns9360;
-			*base = NS9360_UARTD;
-			return;
-		} else if (__raw_readl(__REG(0xa09001f4)) == 0xfffff001) {
-			*putc = putc_a9m9750dev;
-			*base = A9M9750DEV_UARTA;
-			return;
-		}
-	} else if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x02) {
-		/* ns921x */
-		u32 clock = __raw_readl(NS921XSYS_CLOCK);
-
-		if ((clock & (1 << 1)) &&
-				NS921X_UART_ENABLED(NS921X_UARTA)) {
-			*putc = putc_ns921x;
-			*base = NS921X_UARTA;
-			return;
-		} else if ((clock & (1 << 2)) &&
-				NS921X_UART_ENABLED(NS921X_UARTB)) {
-			*putc = putc_ns921x;
-			*base = NS921X_UARTB;
-			return;
-		} else if ((clock & (1 << 3)) &&
-				NS921X_UART_ENABLED(NS921X_UARTC)) {
-			*putc = putc_ns921x;
-			*base = NS921X_UARTC;
-			return;
-		} else if ((clock & (1 << 4)) &&
-				NS921X_UART_ENABLED(NS921X_UARTD)) {
-			*putc = putc_ns921x;
-			*base = NS921X_UARTD;
-			return;
-		}
-	}
-
-	*putc = putc_dummy;
-}
-
-void (*myputc)(char, void __iomem *);
-void __iomem *base;
-
-static void putc(char c)
-{
-	myputc(c, base);
-}
-
-static void arch_decomp_setup(void)
-{
-	autodetect(&myputc, &base);
-}
-#define arch_decomp_wdog()
-
-static void flush(void)
-{
-	/* nothing */
-}
-
-#endif /* ifndef __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/vmalloc.h b/arch/arm/mach-ns9xxx/include/mach/vmalloc.h
deleted file mode 100644
index c865197..0000000
--- a/arch/arm/mach-ns9xxx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/vmalloc.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END     (0xf0000000UL)
-
-#endif /* ifndef __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
deleted file mode 100644
index 37ab0a2..0000000
--- a/arch/arm/mach-ns9xxx/irq.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/irq.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <linux/io.h>
-#include <asm/mach/irq.h>
-#include <mach/regs-sys-common.h>
-#include <mach/irqs.h>
-#include <mach/board.h>
-
-#include "generic.h"
-
-/* simple interrupt prio table: prio(x) < prio(y) <=> x < y */
-#define irq2prio(i) (i)
-#define prio2irq(p) (p)
-
-static void ns9xxx_mask_irq(struct irq_data *d)
-{
-	/* XXX: better use cpp symbols */
-	int prio = irq2prio(d->irq);
-	u32 ic = __raw_readl(SYS_IC(prio / 4));
-	ic &= ~(1 << (7 + 8 * (3 - (prio & 3))));
-	__raw_writel(ic, SYS_IC(prio / 4));
-}
-
-static void ns9xxx_eoi_irq(struct irq_data *d)
-{
-	__raw_writel(0, SYS_ISRADDR);
-}
-
-static void ns9xxx_unmask_irq(struct irq_data *d)
-{
-	/* XXX: better use cpp symbols */
-	int prio = irq2prio(d->irq);
-	u32 ic = __raw_readl(SYS_IC(prio / 4));
-	ic |= 1 << (7 + 8 * (3 - (prio & 3)));
-	__raw_writel(ic, SYS_IC(prio / 4));
-}
-
-static struct irq_chip ns9xxx_chip = {
-	.irq_eoi	= ns9xxx_eoi_irq,
-	.irq_mask	= ns9xxx_mask_irq,
-	.irq_unmask	= ns9xxx_unmask_irq,
-};
-
-void __init ns9xxx_init_irq(void)
-{
-	int i;
-
-	/* disable all IRQs */
-	for (i = 0; i < 8; ++i)
-		__raw_writel(prio2irq(4 * i) << 24 |
-				prio2irq(4 * i + 1) << 16 |
-				prio2irq(4 * i + 2) << 8 |
-				prio2irq(4 * i + 3),
-				SYS_IC(i));
-
-	for (i = 0; i < 32; ++i)
-		__raw_writel(prio2irq(i), SYS_IVA(i));
-
-	for (i = 0; i <= 31; ++i) {
-		irq_set_chip_and_handler(i, &ns9xxx_chip, handle_fasteoi_irq);
-		set_irq_flags(i, IRQF_VALID);
-		irq_set_status_flags(i, IRQ_LEVEL);
-	}
-}
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
deleted file mode 100644
index 2858417..0000000
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/processor-ns9360.h>
-
-#include "board-a9m9750dev.h"
-#include "generic.h"
-
-static void __init mach_cc9p9360dev_map_io(void)
-{
-	ns9360_map_io();
-	board_a9m9750dev_map_io();
-}
-
-static void __init mach_cc9p9360dev_init_irq(void)
-{
-	ns9xxx_init_irq();
-	board_a9m9750dev_init_irq();
-}
-
-static void __init mach_cc9p9360dev_init_machine(void)
-{
-	ns9xxx_init_machine();
-	board_a9m9750dev_init_machine();
-}
-
-MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an A9M9750 Devboard")
-	.map_io = mach_cc9p9360dev_map_io,
-	.init_irq = mach_cc9p9360dev_init_irq,
-	.init_machine = mach_cc9p9360dev_init_machine,
-	.timer = &ns9360_timer,
-	.boot_params = 0x100,
-MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
deleted file mode 100644
index 729f68d..0000000
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/mach-cc9p9360js.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/processor-ns9360.h>
-
-#include "board-jscc9p9360.h"
-#include "generic.h"
-
-static void __init mach_cc9p9360js_init_machine(void)
-{
-	ns9xxx_init_machine();
-	board_jscc9p9360_init_machine();
-}
-
-MACHINE_START(CC9P9360JS, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard")
-	.map_io = ns9360_map_io,
-	.init_irq = ns9xxx_init_irq,
-	.init_machine = mach_cc9p9360js_init_machine,
-	.timer = &ns9360_timer,
-	.boot_params = 0x100,
-MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/plat-serial8250.c b/arch/arm/mach-ns9xxx/plat-serial8250.c
deleted file mode 100644
index 463e924..0000000
--- a/arch/arm/mach-ns9xxx/plat-serial8250.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/plat-serial8250.c
- *
- * Copyright (C) 2008 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/platform_device.h>
-#include <linux/serial_8250.h>
-#include <linux/slab.h>
-
-#include <mach/regs-board-a9m9750dev.h>
-#include <mach/board.h>
-
-#define DRIVER_NAME "serial8250"
-
-static int __init ns9xxx_plat_serial8250_init(void)
-{
-	struct plat_serial8250_port *pdata;
-	struct platform_device *pdev;
-	int ret = -ENOMEM;
-	int i;
-
-	if (!board_is_a9m9750dev())
-		return -ENODEV;
-
-	pdev = platform_device_alloc(DRIVER_NAME, 0);
-	if (!pdev)
-		goto err;
-
-	pdata = kzalloc(5 * sizeof(*pdata), GFP_KERNEL);
-	if (!pdata)
-		goto err;
-
-	pdev->dev.platform_data = pdata;
-
-	pdata[0].iobase = FPGA_UARTA_BASE;
-	pdata[1].iobase = FPGA_UARTB_BASE;
-	pdata[2].iobase = FPGA_UARTC_BASE;
-	pdata[3].iobase = FPGA_UARTD_BASE;
-
-	for (i = 0; i < 4; ++i) {
-		pdata[i].membase = (void __iomem *)pdata[i].iobase;
-		pdata[i].mapbase = pdata[i].iobase;
-		pdata[i].iotype = UPIO_MEM;
-		pdata[i].uartclk = 18432000;
-		pdata[i].flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
-	}
-
-	pdata[0].irq = IRQ_FPGA_UARTA;
-	pdata[1].irq = IRQ_FPGA_UARTB;
-	pdata[2].irq = IRQ_FPGA_UARTC;
-	pdata[3].irq = IRQ_FPGA_UARTD;
-
-	ret = platform_device_add(pdev);
-	if (ret) {
-err:
-		platform_device_put(pdev);
-
-		printk(KERN_WARNING "Could not add %s (errno=%d)\n",
-				DRIVER_NAME, ret);
-	}
-
-	return 0;
-}
-
-arch_initcall(ns9xxx_plat_serial8250_init);
diff --git a/arch/arm/mach-ns9xxx/processor-ns9360.c b/arch/arm/mach-ns9xxx/processor-ns9360.c
deleted file mode 100644
index aed1999..0000000
--- a/arch/arm/mach-ns9xxx/processor-ns9360.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/processor-ns9360.c
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/io.h>
-#include <linux/kernel.h>
-
-#include <asm/page.h>
-#include <asm/mach/map.h>
-#include <mach/processor-ns9360.h>
-#include <mach/regs-sys-ns9360.h>
-
-void ns9360_reset(char mode)
-{
-	u32 reg;
-
-	reg = __raw_readl(SYS_PLL) >> 16;
-	REGSET(reg, SYS_PLL, SWC, YES);
-	__raw_writel(reg, SYS_PLL);
-}
-
-#define CRYSTAL 29491200 /* Hz */
-unsigned long ns9360_systemclock(void)
-{
-	u32 pll = __raw_readl(SYS_PLL);
-	return CRYSTAL * (REGGETIM(pll, SYS_PLL, ND) + 1)
-		>> REGGETIM(pll, SYS_PLL, FS);
-}
-
-static struct map_desc ns9360_io_desc[] __initdata = {
-	{ /* BBus */
-		.virtual = io_p2v(0x90000000),
-		.pfn = __phys_to_pfn(0x90000000),
-		.length = 0x00700000,
-		.type = MT_DEVICE,
-	}, { /* AHB */
-		.virtual = io_p2v(0xa0100000),
-		.pfn = __phys_to_pfn(0xa0100000),
-		.length = 0x00900000,
-		.type = MT_DEVICE,
-	},
-};
-
-void __init ns9360_map_io(void)
-{
-	iotable_init(ns9360_io_desc, ARRAY_SIZE(ns9360_io_desc));
-}
diff --git a/arch/arm/mach-ns9xxx/time-ns9360.c b/arch/arm/mach-ns9xxx/time-ns9360.c
deleted file mode 100644
index 9ca32f5..0000000
--- a/arch/arm/mach-ns9xxx/time-ns9360.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/time-ns9360.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/jiffies.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/stringify.h>
-#include <linux/clocksource.h>
-#include <linux/clockchips.h>
-
-#include <mach/processor-ns9360.h>
-#include <mach/regs-sys-ns9360.h>
-#include <mach/irqs.h>
-#include <mach/system.h>
-#include "generic.h"
-
-#define TIMER_CLOCKSOURCE 0
-#define TIMER_CLOCKEVENT 1
-static u32 latch;
-
-static cycle_t ns9360_clocksource_read(struct clocksource *cs)
-{
-	return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE));
-}
-
-static struct clocksource ns9360_clocksource = {
-	.name	= "ns9360-timer" __stringify(TIMER_CLOCKSOURCE),
-	.rating	= 300,
-	.read	= ns9360_clocksource_read,
-	.mask	= CLOCKSOURCE_MASK(32),
-	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-static void ns9360_clockevent_setmode(enum clock_event_mode mode,
-		struct clock_event_device *clk)
-{
-	u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
-
-	switch (mode) {
-	case CLOCK_EVT_MODE_PERIODIC:
-		__raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT));
-		REGSET(tc, SYS_TCx, REN, EN);
-		REGSET(tc, SYS_TCx, INTS, EN);
-		REGSET(tc, SYS_TCx, TEN, EN);
-		break;
-
-	case CLOCK_EVT_MODE_ONESHOT:
-		REGSET(tc, SYS_TCx, REN, DIS);
-		REGSET(tc, SYS_TCx, INTS, EN);
-
-		/* fall through */
-
-	case CLOCK_EVT_MODE_UNUSED:
-	case CLOCK_EVT_MODE_SHUTDOWN:
-	case CLOCK_EVT_MODE_RESUME:
-	default:
-		REGSET(tc, SYS_TCx, TEN, DIS);
-		break;
-	}
-
-	__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
-}
-
-static int ns9360_clockevent_setnextevent(unsigned long evt,
-		struct clock_event_device *clk)
-{
-	u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
-
-	if (REGGET(tc, SYS_TCx, TEN)) {
-		REGSET(tc, SYS_TCx, TEN, DIS);
-		__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
-	}
-
-	REGSET(tc, SYS_TCx, TEN, EN);
-
-	__raw_writel(evt, SYS_TRC(TIMER_CLOCKEVENT));
-
-	__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
-
-	return 0;
-}
-
-static struct clock_event_device ns9360_clockevent_device = {
-	.name		= "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
-	.shift		= 20,
-	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-	.set_mode	= ns9360_clockevent_setmode,
-	.set_next_event	= ns9360_clockevent_setnextevent,
-};
-
-static irqreturn_t ns9360_clockevent_handler(int irq, void *dev_id)
-{
-	int timerno = irq - IRQ_NS9360_TIMER0;
-	u32 tc;
-
-	struct clock_event_device *evt = &ns9360_clockevent_device;
-
-	/* clear irq */
-	tc = __raw_readl(SYS_TC(timerno));
-	if (REGGET(tc, SYS_TCx, REN) == SYS_TCx_REN_DIS) {
-		REGSET(tc, SYS_TCx, TEN, DIS);
-		__raw_writel(tc, SYS_TC(timerno));
-	}
-	REGSET(tc, SYS_TCx, INTC, SET);
-	__raw_writel(tc, SYS_TC(timerno));
-	REGSET(tc, SYS_TCx, INTC, UNSET);
-	__raw_writel(tc, SYS_TC(timerno));
-
-	evt->event_handler(evt);
-
-	return IRQ_HANDLED;
-}
-
-static struct irqaction ns9360_clockevent_action = {
-	.name		= "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
-	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-	.handler	= ns9360_clockevent_handler,
-};
-
-static void __init ns9360_timer_init(void)
-{
-	int tc;
-
-	tc = __raw_readl(SYS_TC(TIMER_CLOCKSOURCE));
-	if (REGGET(tc, SYS_TCx, TEN)) {
-		REGSET(tc, SYS_TCx, TEN, DIS);
-		__raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
-	}
-
-	__raw_writel(0, SYS_TRC(TIMER_CLOCKSOURCE));
-
-	REGSET(tc, SYS_TCx, TEN, EN);
-	REGSET(tc, SYS_TCx, TDBG, STOP);
-	REGSET(tc, SYS_TCx, TLCS, CPU);
-	REGSET(tc, SYS_TCx, TM, IEE);
-	REGSET(tc, SYS_TCx, INTS, DIS);
-	REGSET(tc, SYS_TCx, UDS, UP);
-	REGSET(tc, SYS_TCx, TSZ, 32);
-	REGSET(tc, SYS_TCx, REN, EN);
-
-	__raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
-
-	clocksource_register_hz(&ns9360_clocksource, ns9360_cpuclock());
-
-	latch = SH_DIV(ns9360_cpuclock(), HZ, 0);
-
-	tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
-	REGSET(tc, SYS_TCx, TEN, DIS);
-	REGSET(tc, SYS_TCx, TDBG, STOP);
-	REGSET(tc, SYS_TCx, TLCS, CPU);
-	REGSET(tc, SYS_TCx, TM, IEE);
-	REGSET(tc, SYS_TCx, INTS, DIS);
-	REGSET(tc, SYS_TCx, UDS, DOWN);
-	REGSET(tc, SYS_TCx, TSZ, 32);
-	REGSET(tc, SYS_TCx, REN, EN);
-	__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
-
-	ns9360_clockevent_device.mult = div_sc(ns9360_cpuclock(),
-			NSEC_PER_SEC, ns9360_clockevent_device.shift);
-	ns9360_clockevent_device.max_delta_ns =
-		clockevent_delta2ns(-1, &ns9360_clockevent_device);
-	ns9360_clockevent_device.min_delta_ns =
-		clockevent_delta2ns(1, &ns9360_clockevent_device);
-
-	ns9360_clockevent_device.cpumask = cpumask_of(0);
-	clockevents_register_device(&ns9360_clockevent_device);
-
-	setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
-			&ns9360_clockevent_action);
-}
-
-struct sys_timer ns9360_timer = {
-	.init = ns9360_timer_init,
-};
-- 
1.7.2.3

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

Hi Russell,

On Tue, Apr 12, 2011 at 09:53:44PM +0100, Russell King - ARM Linux wrote:
> On Tue, Apr 12, 2011 at 10:37:30PM +0200, Uwe Kleine-K?nig wrote:
> > > #if !defined(CONFIG_ARM_PATCH_PHYS_VIRT)
> > > #if CONFIG_ARCH_MX1 + CONFIG_MACH_MX21 + ... > 1
> > > #error Invalid configuration - unable to handle different phys base addresses
> > > #endif
> > Same problem (and I guess it yields some cpp warnings about
> > CONFIG_ARCH_MX1 not being defined for an i.MX21-only build, but I didn't
> > test).
> 
> Well then,
> 
> #if (CONFIG_ARCH_MX1 | CONFIG_MACH_MX21) + (...) + ... > 1
> 
> where each group of | cover those which share the same phys base.
Well, the idea was to auto-catch a mismatch somehow. If I have to know
the exact groups I can better put the needed logic into mxc's Kconfig
file.
 
> No idea what those are because each MX SoC hides its phys base behind
> some SoC private definition.  This is definitely a case where more
Apart from defining PLAT_PHYS_OFFSET these symbols are used in the
machine files to define .boot_params. This is better than repeating the
bare numbers, isn't it?

> preprocessor junk reduces the code readability and makes it harder to
> understand.  Removal of preprocessor indirection sounds like a candidate
> for the consolidation effort to me.
I didn't intend to continue to try catching this error. The current
arch/arm/plat-mxc/include/mach/memory.h looks ok for me. I assume you
concur?

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Nicolas Pitre]

On Tue, 12 Apr 2011, Uwe Kleine-K?nig wrote:

> Apart from defining PLAT_PHYS_OFFSET these symbols are used in the
> machine files to define .boot_params. This is better than repeating the
> bare numbers, isn't it?

Sure.

> The current arch/arm/plat-mxc/include/mach/memory.h looks ok for me. I 
> assume you concur?

Maybe you should replace CONFIG_RUNTIME_PHYS_OFFSET with 
CONFIG_ARM_PATCH_PHYS_VIRT in that file.


Nicolas

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Nicolas Pitre]

On Tue, 12 Apr 2011, Uwe Kleine-K?nig wrote:

> Hello Jason,
> 
> On Tue, Apr 12, 2011 at 05:16:44PM +0800, Jason Liu wrote:
> > 2011/4/11 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> > > On Sun, Apr 10, 2011 at 10:02:03PM -0400, Nicolas Pitre wrote:
> > >> On Sun, 10 Apr 2011, Uwe Kleine-K?nig wrote:
> > >>
> > >> > The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
> > >> > compile a single (working) kernel for these.
> > >>
> > >> Really?
> > >>
> > >> Have a look at CONFIG_ARM_PATCH_PHYS_VIRT. ?It's in mainline and fully
> > >> functional.
> > > I'm aware of this config item. But still if it's off there must be a
> > > distinction that's provided by this patch. Currently you can build a
> > > kernel for i.MX51 + i.MX53 but IIRC it works on no machine.
> > > When considering ARM_PATCH_PHYS_VIRT there are more SoCs that could be
> > > built into a single image and so needs a more complicated logic.
> > > And I don't want to depend on ARM_PATCH_PHYS_VIRT (yet), e.g. because
> > > it's new and still depends on EXPERIMENTAL.
> > 
> > Uwe, did you enable CONFIG_AUTO_ZRELADDR=y? Besides this if use uboot to
> > load uImage and run, it also need fix uboot since uImage will hard
> > code the load address.
> > In other word, uImage will have mx53 PHY_OFFSET for both mx51 and
> > mx53, which will
> > make mx51 failed with bootm command.
> an uboot image (at least the ones created by the kernel build system's
> make uImage) is more system dependant than the kernel image itself.
> There is nothing that can be fixed considering that Russell doesn't want
> more sophisticated support for u-boot images for ARM.
> So you have to create the uImage yourself.

The U-Boot image format is broken for multi-SOC kernels.  It insists on 
having an absolute address for the placement of that image in RAM when 
loaded which prevents you from using a single kernel image on multiple 
SOCs with different RAM offsets.

The solution is to stop using uImage and simply load a standard kernel 
zImage at the appropriate place in memory according to the hardware you 
have.  And if your zImage is built with CONFIG_AUTO_ZRELADDR and 
CONFIG_ARM_PATCH_PHYS_VIRT then it'll be able to detect and use a 
different PHYS_OFFSET values with the same kernel binary.


Nicolas

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

Hi Nicolas,

On Tue, Apr 12, 2011 at 06:54:30PM -0400, Nicolas Pitre wrote:
> On Tue, 12 Apr 2011, Uwe Kleine-K?nig wrote:
> 
> > Apart from defining PLAT_PHYS_OFFSET these symbols are used in the
> > machine files to define .boot_params. This is better than repeating the
> > bare numbers, isn't it?
> 
> Sure.
> 
> > The current arch/arm/plat-mxc/include/mach/memory.h looks ok for me. I 
> > assume you concur?
> 
> Maybe you should replace CONFIG_RUNTIME_PHYS_OFFSET with 
> CONFIG_ARM_PATCH_PHYS_VIRT in that file.
This is already commited to my private repo.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Shawn Guo]

On Sun, Apr 10, 2011 at 09:49:01PM +0200, Uwe Kleine-K?nig wrote:
[...]
> diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
> index ce6ed5e..aa4234b 100644
> --- a/arch/arm/plat-mxc/Kconfig
> +++ b/arch/arm/plat-mxc/Kconfig
> @@ -4,6 +4,12 @@ source "arch/arm/plat-mxc/devices/Kconfig"
>  
>  menu "Freescale MXC Implementations"
>  
> +config ARCH_MX50_SUPPORTED
> +	bool
> +
> +config ARCH_MX53_SUPPORTED
> +	bool
> +
>  choice
>  	prompt "Set of supported SoCs:"
>  	default ARCH_MX3
> @@ -36,8 +42,17 @@ config ARCH_MX3
>  	  This enables support for machines using Freescale's i.MX31 and i.MX35
>  	  processors.
>  
> -config ARCH_MX5
> -	bool "MX5-based"
> +config ARCH_MX503
> +	bool "i.MX50 + i.MX53"
> +	select ARCH_MX50_SUPPORTED
> +	select ARCH_MX53_SUPPORTED
> +	help
> +	  This enables support for machines using Freescale's i.MX50 and i.MX51
s/MX51/MX53/

-- 
Regards,
Shawn

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

Hi Shawn,

On Wed, Apr 13, 2011 at 08:25:04PM +0800, Shawn Guo wrote:
> On Sun, Apr 10, 2011 at 09:49:01PM +0200, Uwe Kleine-K?nig wrote:
> [...]
> > +	  This enables support for machines using Freescale's i.MX50 and i.MX51
> s/MX51/MX53/
yeah, thanks, as you're not the first one to point this out I already
sent a fixup to Sascha.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Jason Liu]

2011/4/11 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to
> compile a single (working) kernel for these.
[...]
> -config ARCH_MX5
> - ? ? ? bool "MX5-based"
> +config ARCH_MX503
> + ? ? ? bool "i.MX50 + i.MX53"
> + ? ? ? select ARCH_MX50_SUPPORTED
> + ? ? ? select ARCH_MX53_SUPPORTED
> + ? ? ? help
> +

I don't think it's a good calling about such ARCH_MX503 here, it will
be confused.
As FSL have mx508 and mx505 something like that SOC naming.

[...]
> --
> 1.7.2.3
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

[PATCH] ARM: remove ns9xxx port

[Uwe Kleine-König]

On Tue, Apr 12, 2011 at 11:12:51PM +0200, Uwe Kleine-K?nig wrote:
> The port is actually unmaintained and only received global
> cleanups and a few build fixes since mid 2008.
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> ---
> Hello,
> 
> On Tue, Apr 12, 2011 at 09:53:44PM +0100, Russell King - ARM Linux wrote:
> > We must reduce the size of arch/arm by all means possible.
> 
> What about this? You considered to do this some time ago[1] already and I
> asked to wait because Digi planned to continue the mainline efforts
> around spring 2010.
I was in contact with someone at Digi and he told me there are no
mainline activies planned.

Patch system?

Best regards
Uwe

> [1] http://mid.gmane.org/20091121105009.GD7998 at n2100.arm.linux.org.uk

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH] ARM: remove ns9xxx port

[Russell King - ARM Linux]

On Tue, Apr 26, 2011 at 11:53:30PM +0200, Uwe Kleine-K?nig wrote:
> On Tue, Apr 12, 2011 at 11:12:51PM +0200, Uwe Kleine-K?nig wrote:
> > The port is actually unmaintained and only received global
> > cleanups and a few build fixes since mid 2008.
> > 
> > Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> > ---
> > Hello,
> > 
> > On Tue, Apr 12, 2011 at 09:53:44PM +0100, Russell King - ARM Linux wrote:
> > > We must reduce the size of arch/arm by all means possible.
> > 
> > What about this? You considered to do this some time ago[1] already and I
> > asked to wait because Digi planned to continue the mainline efforts
> > around spring 2010.
> I was in contact with someone at Digi and he told me there are no
> mainline activies planned.
> 
> Patch system?

Ok.

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Matt Sealey]

2011/4/13 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> Hi Shawn,
>
> On Wed, Apr 13, 2011 at 08:25:04PM +0800, Shawn Guo wrote:
>> On Sun, Apr 10, 2011 at 09:49:01PM +0200, Uwe Kleine-K?nig wrote:
>> [...]
>> > + ? ? This enables support for machines using Freescale's i.MX50 and i.MX51
>> s/MX51/MX53/
> yeah, thanks, as you're not the first one to point this out I already
> sent a fixup to Sascha.

Can someone confirm the following for me (Uwe probably as it's his
patch most recently)

CONFIG_RUNTIME_PHYS_OFFSET
CONFIG_ARM_PATCH_PHYS_VIRT

These two config options, with absolutely no bootloader changes, will
basically mask off some address (instruction pointer?) at the time of
the check and therefore derive a perfectly good PHYS_OFFSET at runtime
and make sure it is in use... within some limits (first 128MB, assumes
that start of memory is at some particular alignment)?

I am confused about Nicolas' CONFIG_AUTO_ZRELADDR comment and how this
applies. I am working out a way to have U-Boot ignore the hardcoded
image entry point in a uImage to enable the above.

I consider that the problem with the above is not so much with
supporting multiple SoCs in the same kernel of the same pedigree
(MX5x) but with completely different vendor SoCs and anything where
PHYS_OFFSET is somehow differently masked off of the abovementioned
address. I noticed in a patch somewhere last night that if MACH_MX5 is
enabled, it uses 'and' instead of 'andne' to perform the masking. This
will basically mean the derived address is still entirely CPU
specific... unless I am out of date on the patches I am reviewing..

Uwe you had a patch about a year ago that passed PHYS_OFFSET in r3,
that isn't true anymore? Is there potential for an override, such that
if if r3 is set and valid, it is used, if not a determination is made
at runtime which may possibly fail? Is compiling an unbootable kernel
for an old firmware an acceptable scenario for the edge case where
MX50, MX51, MX53 are in the kernel along with.. say.. OMAP? Wouldn't
we consider this a distro tool problem and not a kernel problem?

-- 
Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Matt Sealey]

> address. I noticed in a patch somewhere last night that if MACH_MX5 is
> enabled, it uses 'and' instead of 'andne' to perform the masking. This
> will basically mean the derived address is still entirely CPU
> specific... unless I am out of date on the patches I am reviewing..

http://opensource.freescale.com/git?p=imx/linux-2.6-imx.git;a=blob;f=arch/arm/boot/compressed/head.S;h=437943d6b55e4282d03145dea77e36841e30c151;hb=bc676214b92db468c7b72dc495312809dbfc37bf#l248

Just backing myself up with the patch I'm referencing.

Curious question, where is the canonical tree-to-look-at for the
patches we're talking about? I don't feel comfortable at all
referencing a BSP kernel on a mainline mailing list :D

-- -
Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Uwe Kleine-König]

On Wed, May 04, 2011 at 10:48:40AM -0500, Matt Sealey wrote:
> 2011/4/13 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> > Hi Shawn,
> >
> > On Wed, Apr 13, 2011 at 08:25:04PM +0800, Shawn Guo wrote:
> >> On Sun, Apr 10, 2011 at 09:49:01PM +0200, Uwe Kleine-K?nig wrote:
> >> [...]
> >> > + ? ? This enables support for machines using Freescale's i.MX50 and i.MX51
> >> s/MX51/MX53/
> > yeah, thanks, as you're not the first one to point this out I already
> > sent a fixup to Sascha.
> 
> Can someone confirm the following for me (Uwe probably as it's his
> patch most recently)
> 
> CONFIG_RUNTIME_PHYS_OFFSET
RUNTIME_PHYS_OFFSET didn't made it into mainline and is superseded by
ARM_PATCH_PHYS_VIRT.

> CONFIG_ARM_PATCH_PHYS_VIRT
> 
> These two config options, with absolutely no bootloader changes, will
> basically mask off some address (instruction pointer?) at the time of
> the check and therefore derive a perfectly good PHYS_OFFSET at runtime
> and make sure it is in use... within some limits (first 128MB, assumes
> that start of memory is at some particular alignment)?
> 
> I am confused about Nicolas' CONFIG_AUTO_ZRELADDR comment and how this
> applies. I am working out a way to have U-Boot ignore the hardcoded
> image entry point in a uImage to enable the above.
ARM_PATCH_PHYS_VIRT is a feature of the Image, AUTO_ZRELADDR is a
feature of the zImage. It solves more or less the same thing (and IIRC
RUNTIME_PHYS_OFFSET did both). So AUTO_ZRELADDR is only needed when
booting a zImage.

And IIRC U-Boot can boot zImages directly nowerdays. So this is probably
the better way to test that hacking it to ignore the image headers.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Russell King - ARM Linux]

On Wed, May 04, 2011 at 10:48:40AM -0500, Matt Sealey wrote:
> CONFIG_ARM_PATCH_PHYS_VIRT
> 
> These two config options, with absolutely no bootloader changes, will
> basically mask off some address (instruction pointer?) at the time of
> the check and therefore derive a perfectly good PHYS_OFFSET at runtime
> and make sure it is in use... within some limits (first 128MB, assumes
> that start of memory is at some particular alignment)?

The V:P fixup will only handle bits 31-24, or 31-16 if the
ARM_PATCH_PHYS_VIRT_16BIT option is selected (for MSM).  If the offset
doesn't wholy fit into these, then the fixup function will complain and
your kernel won't boot.  So, it'll go down to 64K alignment.

It does rely on the kernel being placed correctly in memory.  So if the
start of the kernel text is built to be 32K above PAGE_OFFSET, then the
kernel will assume that physical memory starts 32K below where the
'Image' ended up in physical memory.  If you place the kernel in physical
memory 16MB above the start, then it'll assume that physical memory starts
16MB above where it actually did.

There is one thing to watch out for though - if you did place it 16MB
above, but still tell the kernel via ATAGs that the physical memory
starts where it really does, then I'd expect things to explode as
the kernel direct mapped memory would likely extend below PAGE_OFFSET.

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Nicolas Pitre]

On Sun, 8 May 2011, Russell King - ARM Linux wrote:

> On Wed, May 04, 2011 at 10:48:40AM -0500, Matt Sealey wrote:
> > CONFIG_ARM_PATCH_PHYS_VIRT
> > 
> > These two config options, with absolutely no bootloader changes, will
> > basically mask off some address (instruction pointer?) at the time of
> > the check and therefore derive a perfectly good PHYS_OFFSET at runtime
> > and make sure it is in use... within some limits (first 128MB, assumes
> > that start of memory is at some particular alignment)?
> 
> The V:P fixup will only handle bits 31-24, or 31-16 if the
> ARM_PATCH_PHYS_VIRT_16BIT option is selected (for MSM).  If the offset
> doesn't wholy fit into these, then the fixup function will complain and
> your kernel won't boot.  So, it'll go down to 64K alignment.
> 
> It does rely on the kernel being placed correctly in memory.  So if the
> start of the kernel text is built to be 32K above PAGE_OFFSET, then the
> kernel will assume that physical memory starts 32K below where the
> 'Image' ended up in physical memory.  If you place the kernel in physical
> memory 16MB above the start, then it'll assume that physical memory starts
> 16MB above where it actually did.

If CONFIG_AUTO_ZRELADDR is set, then zImage will automatically place the 
kernel Image correctly in memory, assuming that zImage is itself loaded 
within the first 128MB of memory.

> There is one thing to watch out for though - if you did place it 16MB
> above, but still tell the kernel via ATAGs that the physical memory
> starts where it really does, then I'd expect things to explode as
> the kernel direct mapped memory would likely extend below PAGE_OFFSET.

Yeah... We should probably add a warning and truncate the beginning of 
the memory bank in that case.  This would also prevent memory from being 
wrongly declared below PHYS_OFFSET even without the P2V feature enabled.


Nicolas

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Russell King - ARM Linux]

On Sun, May 08, 2011 at 11:00:30AM -0400, Nicolas Pitre wrote:
> On Sun, 8 May 2011, Russell King - ARM Linux wrote:
> 
> > On Wed, May 04, 2011 at 10:48:40AM -0500, Matt Sealey wrote:
> > > CONFIG_ARM_PATCH_PHYS_VIRT
> > > 
> > > These two config options, with absolutely no bootloader changes, will
> > > basically mask off some address (instruction pointer?) at the time of
> > > the check and therefore derive a perfectly good PHYS_OFFSET at runtime
> > > and make sure it is in use... within some limits (first 128MB, assumes
> > > that start of memory is at some particular alignment)?
> > 
> > The V:P fixup will only handle bits 31-24, or 31-16 if the
> > ARM_PATCH_PHYS_VIRT_16BIT option is selected (for MSM).  If the offset
> > doesn't wholy fit into these, then the fixup function will complain and
> > your kernel won't boot.  So, it'll go down to 64K alignment.
> > 
> > It does rely on the kernel being placed correctly in memory.  So if the
> > start of the kernel text is built to be 32K above PAGE_OFFSET, then the
> > kernel will assume that physical memory starts 32K below where the
> > 'Image' ended up in physical memory.  If you place the kernel in physical
> > memory 16MB above the start, then it'll assume that physical memory starts
> > 16MB above where it actually did.
> 
> If CONFIG_AUTO_ZRELADDR is set, then zImage will automatically place the 
> kernel Image correctly in memory, assuming that zImage is itself loaded 
> within the first 128MB of memory.

I was only covering the requirements of the Image, rather than zImage which
you covered in a subsequent message.

> > There is one thing to watch out for though - if you did place it 16MB
> > above, but still tell the kernel via ATAGs that the physical memory
> > starts where it really does, then I'd expect things to explode as
> > the kernel direct mapped memory would likely extend below PAGE_OFFSET.
> 
> Yeah... We should probably add a warning and truncate the beginning of 
> the memory bank in that case.  This would also prevent memory from being 
> wrongly declared below PHYS_OFFSET even without the P2V feature enabled.

We don't encouter the situation today, so lets leave it until we actually
have a problem.  There's no point bloating the kernel with such checks if
they're never going to fire.

[PATCH 4/6] ARM: mxc: don't allow to compile together i.MX51 and i.MX53

[Nicolas Pitre]

On Sun, 8 May 2011, Russell King - ARM Linux wrote:

> On Sun, May 08, 2011 at 11:00:30AM -0400, Nicolas Pitre wrote:
> > If CONFIG_AUTO_ZRELADDR is set, then zImage will automatically place the 
> > kernel Image correctly in memory, assuming that zImage is itself loaded 
> > within the first 128MB of memory.
> 
> I was only covering the requirements of the Image, rather than zImage which
> you covered in a subsequent message.

Sorry if I already covered that.  I'm jet-lagged at the moment and my 
memory is fuzzy.

> > > There is one thing to watch out for though - if you did place it 16MB
> > > above, but still tell the kernel via ATAGs that the physical memory
> > > starts where it really does, then I'd expect things to explode as
> > > the kernel direct mapped memory would likely extend below PAGE_OFFSET.
> > 
> > Yeah... We should probably add a warning and truncate the beginning of 
> > the memory bank in that case.  This would also prevent memory from being 
> > wrongly declared below PHYS_OFFSET even without the P2V feature enabled.
> 
> We don't encouter the situation today, so lets leave it until we actually
> have a problem.  There's no point bloating the kernel with such checks if
> they're never going to fire.

OK.


Nicolas