From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] OMAP: iommu flush page table entries from L1 and L2 cache
Date: Fri, 15 Apr 2011 09:12:54 +0100 [thread overview]
Message-ID: <20110415081253.GA18952@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <BANLkTikfXbtsqaw5ZuP_BbDCtsxXOHZs_w@mail.gmail.com>
On Fri, Apr 15, 2011 at 11:24:16AM +0900, KyongHo Cho wrote:
> That means we need to translate logical to physical address and it is
> sometimes not trivial.
What do you mean "sometimes not trivial" ? The DMA does nothing more
than virt_to_phys(virt) to get the physical address. It's _that_ simple.
If virt_to_phys(virt) is likely to fail, there's protection in the DMA API
to BUG_ON() in that case.
> Finally, the kernel will contain many similar routines that do same thing.
So when we get coherent DMA, you won't care that the DMA API functions
start doing nothing with caches?
next prev parent reply other threads:[~2011-04-15 8:12 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-14 21:52 [PATCH] OMAP: iommu flush page table entries from L1 and L2 cache Fernando Guzman Lugo
2011-04-14 22:30 ` Russell King - ARM Linux
2011-04-15 2:24 ` KyongHo Cho
2011-04-15 8:12 ` Russell King - ARM Linux [this message]
2011-04-15 11:26 ` Gupta, Ramesh
2011-04-28 13:40 ` Russell King - ARM Linux
2011-04-28 16:48 ` Gupta, Ramesh
2011-08-11 19:28 ` Gupta, Ramesh
2011-08-11 22:29 ` Russell King - ARM Linux
2011-08-12 16:05 ` Gupta, Ramesh
2011-10-16 18:32 ` C.A, Subramaniam
2012-05-29 15:53 ` Gupta, Ramesh
2011-04-18 7:29 ` Arnd Bergmann
2011-04-18 11:05 ` Tony Lindgren
2011-04-18 11:42 ` Hiroshi DOYU
2011-04-18 13:25 ` Arnd Bergmann
2011-04-18 11:58 ` Arnd Bergmann
2011-04-18 12:55 ` Kyungmin Park
2011-04-18 14:13 ` Arnd Bergmann
2011-04-19 9:11 ` Kyungmin Park
2011-04-19 12:01 ` Arnd Bergmann
2011-04-19 12:35 ` Kyungmin Park
2011-04-19 13:02 ` Russell King - ARM Linux
2011-04-19 13:11 ` Arnd Bergmann
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