* [PATCH 01/14] at91rm9200: introduce at91rm9200_set_type to specficy cpu package
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 18:31 ` [PATCH 02/14] at91: introduce commom AT91_BASE_SYS Jean-Christophe PLAGNIOL-VILLARD
` (13 subsequent siblings)
14 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
as we can not detect it
by defaut the type will be bga
introduce cpu_is_at91rm9200_bga and cpu_is_at91rm9200_pqfp
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/at91rm9200.c | 13 +++++++++++--
arch/arm/mach-at91/board-1arm.c | 6 +++++-
arch/arm/mach-at91/board-carmeva.c | 2 +-
arch/arm/mach-at91/board-cpuat91.c | 6 +++++-
arch/arm/mach-at91/board-csb337.c | 2 +-
arch/arm/mach-at91/board-csb637.c | 2 +-
arch/arm/mach-at91/board-eb9200.c | 2 +-
arch/arm/mach-at91/board-ecbat91.c | 6 +++++-
arch/arm/mach-at91/board-eco920.c | 7 ++++++-
arch/arm/mach-at91/board-kafa.c | 6 +++++-
arch/arm/mach-at91/board-kb9202.c | 7 +++++--
arch/arm/mach-at91/board-picotux200.c | 2 +-
arch/arm/mach-at91/board-rm9200dk.c | 2 +-
arch/arm/mach-at91/board-rm9200ek.c | 2 +-
arch/arm/mach-at91/board-yl-9200.c | 6 +++++-
arch/arm/mach-at91/generic.h | 3 ++-
arch/arm/mach-at91/include/mach/cpu.h | 7 +++++++
17 files changed, 63 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 2e9ecad..7bdf566 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -18,6 +18,7 @@
#include <mach/at91rm9200.h>
#include <mach/at91_pmc.h>
#include <mach/at91_st.h>
+#include <mach/cpu.h>
#include "generic.h"
#include "clock.h"
@@ -266,11 +267,18 @@ static void at91rm9200_reset(void)
at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
}
+int rm9200_type;
+EXPORT_SYMBOL(rm9200_type);
+
+void __init at91rm9200_set_type(int type)
+{
+ rm9200_type = type;
+}
/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
-void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
+void __init at91rm9200_initialize(unsigned long main_clock)
{
/* Map peripherals */
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
@@ -288,7 +296,8 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks
at91rm9200_register_clocks();
/* Initialize GPIO subsystem */
- at91_gpio_init(at91rm9200_gpio, banks);
+ at91_gpio_init(at91rm9200_gpio,
+ cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
}
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index 8a3fc84..d294293 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -35,14 +35,18 @@
#include <mach/board.h>
#include <mach/gpio.h>
+#include <mach/cpu.h>
#include "generic.h"
static void __init onearm_map_io(void)
{
+ /* Set cpu type: PQFP */
+ at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
+
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+ at91rm9200_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 295e1e7..ac8f224 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -43,7 +43,7 @@
static void __init carmeva_map_io(void)
{
/* Initialize processor: 20.000 MHz crystal */
- at91rm9200_initialize(20000000, AT91RM9200_BGA);
+ at91rm9200_initialize(20000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 2f4dd8c..c25db34 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -38,6 +38,7 @@
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/cpu.h>
#include "generic.h"
@@ -52,8 +53,11 @@ static struct gpio_led cpuat91_leds[] = {
static void __init cpuat91_map_io(void)
{
+ /* Set cpu type: PQFP */
+ at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
+
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+ at91rm9200_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index 464839d..2a3f2f7 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -46,7 +46,7 @@
static void __init csb337_map_io(void)
{
/* Initialize processor: 3.6864 MHz crystal */
- at91rm9200_initialize(3686400, AT91RM9200_BGA);
+ at91rm9200_initialize(3686400);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 431688c..d42a7c3 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -43,7 +43,7 @@
static void __init csb637_map_io(void)
{
/* Initialize processor: 3.6864 MHz crystal */
- at91rm9200_initialize(3686400, AT91RM9200_BGA);
+ at91rm9200_initialize(3686400);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 6cf6566..e732350 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -43,7 +43,7 @@
static void __init eb9200_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_BGA);
+ at91rm9200_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index de2fd04..587ed99 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -38,14 +38,18 @@
#include <mach/board.h>
#include <mach/gpio.h>
+#include <mach/cpu.h>
#include "generic.h"
static void __init ecb_at91map_io(void)
{
+ /* Set cpu type: PQFP */
+ at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
+
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+ at91rm9200_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 87f6f83..5cc591f 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -26,11 +26,16 @@
#include <mach/board.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/cpu.h>
+
#include "generic.h"
static void __init eco920_map_io(void)
{
- at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+ /* Set cpu type: PQFP */
+ at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
+
+ at91rm9200_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index d2e1f4e..1def877 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -35,14 +35,18 @@
#include <mach/board.h>
#include <mach/gpio.h>
+#include <mach/cpu.h>
#include "generic.h"
static void __init kafa_map_io(void)
{
+ /* Set cpu type: PQFP */
+ at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
+
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+ at91rm9200_initialize(18432000);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index a13d206..ad0fe91 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -36,7 +36,7 @@
#include <mach/board.h>
#include <mach/gpio.h>
-
+#include <mach/cpu.h>
#include <mach/at91rm9200_mc.h>
#include "generic.h"
@@ -44,8 +44,11 @@
static void __init kb9202_map_io(void)
{
+ /* Set cpu type: PQFP */
+ at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
+
/* Initialize processor: 10 MHz crystal */
- at91rm9200_initialize(10000000, AT91RM9200_PQFP);
+ at91rm9200_initialize(10000000);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 55dad3a..c153863 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -46,7 +46,7 @@
static void __init picotux200_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_BGA);
+ at91rm9200_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 4c1047c..b8f3b3d 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -48,7 +48,7 @@
static void __init dk_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_BGA);
+ at91rm9200_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 9df1be8..b55edc6 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -48,7 +48,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_BGA);
+ at91rm9200_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index e0f0080..097328b 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -45,14 +45,18 @@
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/cpu.h>
#include "generic.h"
static void __init yl9200_map_io(void)
{
+ /* Set cpu type: PQFP */
+ at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
+
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+ at91rm9200_initialize(18432000);
/* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 0c66deb..87ec31d 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -9,7 +9,8 @@
*/
/* Processors */
-extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
+extern void __init at91rm9200_set_type(int type);
+extern void __init at91rm9200_initialize(unsigned long main_clock);
extern void __init at91sam9260_initialize(unsigned long main_clock);
extern void __init at91sam9261_initialize(unsigned long main_clock);
extern void __init at91sam9263_initialize(unsigned long main_clock);
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index 0700f21..ab00372 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -90,9 +90,16 @@ static inline unsigned long at91cap9_rev_identify(void)
#endif
#ifdef CONFIG_ARCH_AT91RM9200
+extern int rm9200_type;
+#define ARCH_REVISON_9200_BGA (0 << 0)
+#define ARCH_REVISON_9200_PQFP (1 << 0)
#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
+#define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp())
+#define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP)
#else
#define cpu_is_at91rm9200() (0)
+#define cpu_is_at91rm9200_bga() (0)
+#define cpu_is_at91rm9200_pqfp() (0)
#endif
#ifdef CONFIG_ARCH_AT91SAM9260
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 02/14] at91: introduce commom AT91_BASE_SYS
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 18:31 ` [PATCH 01/14] at91rm9200: introduce at91rm9200_set_type to specficy cpu package Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 21:48 ` Ryan Mallon
2011-04-25 18:31 ` [PATCH 03/14] at91: factorize at91 interrupts init to soc Jean-Christophe PLAGNIOL-VILLARD
` (12 subsequent siblings)
14 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
on all at91 except rm9200 and x40 have the System Controller start in reallity
at 0xffffc000 of 16KiB
on rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
at 0xfffff000
so we will use a common AT91_BASE_SYS at 0xffffc000 of 16KiB
and map the same memory space
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/at572d940hf.c | 12 +++---
arch/arm/mach-at91/at91cap9.c | 13 +++---
arch/arm/mach-at91/at91rm9200.c | 13 +++---
arch/arm/mach-at91/at91sam9260.c | 18 +++-----
arch/arm/mach-at91/at91sam9261.c | 18 +++-----
arch/arm/mach-at91/at91sam9263.c | 13 +++---
arch/arm/mach-at91/at91sam9g45.c | 13 +++---
arch/arm/mach-at91/at91sam9rl.c | 18 +++-----
arch/arm/mach-at91/board-1arm.c | 2 +-
arch/arm/mach-at91/board-afeb-9260v1.c | 2 +-
arch/arm/mach-at91/board-at572d940hf_ek.c | 2 +-
arch/arm/mach-at91/board-cam60.c | 2 +-
arch/arm/mach-at91/board-cap9adk.c | 2 +-
arch/arm/mach-at91/board-carmeva.c | 2 +-
arch/arm/mach-at91/board-cpu9krea.c | 2 +-
arch/arm/mach-at91/board-cpuat91.c | 2 +-
arch/arm/mach-at91/board-csb337.c | 2 +-
arch/arm/mach-at91/board-csb637.c | 2 +-
arch/arm/mach-at91/board-eb9200.c | 2 +-
arch/arm/mach-at91/board-ecbat91.c | 2 +-
arch/arm/mach-at91/board-eco920.c | 2 +-
arch/arm/mach-at91/board-flexibity.c | 2 +-
arch/arm/mach-at91/board-foxg20.c | 2 +-
arch/arm/mach-at91/board-kafa.c | 2 +-
arch/arm/mach-at91/board-kb9202.c | 2 +-
arch/arm/mach-at91/board-neocore926.c | 2 +-
arch/arm/mach-at91/board-picotux200.c | 2 +-
arch/arm/mach-at91/board-qil-a9260.c | 2 +-
arch/arm/mach-at91/board-rm9200dk.c | 2 +-
arch/arm/mach-at91/board-rm9200ek.c | 2 +-
arch/arm/mach-at91/board-sam9-l9260.c | 2 +-
arch/arm/mach-at91/board-sam9260ek.c | 2 +-
arch/arm/mach-at91/board-sam9261ek.c | 2 +-
arch/arm/mach-at91/board-sam9263ek.c | 2 +-
arch/arm/mach-at91/board-sam9g20ek.c | 2 +-
arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
arch/arm/mach-at91/board-sam9rlek.c | 2 +-
arch/arm/mach-at91/board-snapper9260.c | 2 +-
arch/arm/mach-at91/board-stamp9g20.c | 2 +-
arch/arm/mach-at91/board-usb-a9260.c | 2 +-
arch/arm/mach-at91/board-usb-a9263.c | 2 +-
arch/arm/mach-at91/board-yl-9200.c | 2 +-
arch/arm/mach-at91/generic.h | 9 +----
arch/arm/mach-at91/include/mach/at572d940hf.h | 1 -
arch/arm/mach-at91/include/mach/at91cap9.h | 1 -
arch/arm/mach-at91/include/mach/at91rm9200.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9260.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9261.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9263.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9g45.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9rl.h | 1 -
arch/arm/mach-at91/include/mach/hardware.h | 14 ++++++
arch/arm/mach-at91/soc.c | 57 +++++++++++++++++++++++++
arch/arm/mach-at91/soc.h | 22 ++++++++++
55 files changed, 184 insertions(+), 114 deletions(-)
create mode 100644 arch/arm/mach-at91/soc.c
create mode 100644 arch/arm/mach-at91/soc.h
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index a83835e..eeb5287 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
-obj-y := irq.o gpio.o
+obj-y := irq.o gpio.o soc.o
obj-m :=
obj-n :=
obj- :=
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
index a6b9c68..df0d691 100644
--- a/arch/arm/mach-at91/at572d940hf.c
+++ b/arch/arm/mach-at91/at572d940hf.c
@@ -31,16 +31,12 @@
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
static struct map_desc at572d940hf_io_desc[] __initdata = {
{
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
.virtual = AT91_IO_VIRT_BASE - AT572D940HF_SRAM_SIZE,
.pfn = __phys_to_pfn(AT572D940HF_SRAM_BASE),
.length = AT572D940HF_SRAM_SIZE,
@@ -302,7 +298,7 @@ static void at572d940hf_reset(void)
* AT572D940HF processor initialization
* -------------------------------------------------------------------- */
-void __init at572d940hf_initialize(unsigned long main_clock)
+static void __init at572d940hf_initialize(unsigned long main_clock)
{
/* Map peripherals */
iotable_init(at572d940hf_io_desc, ARRAY_SIZE(at572d940hf_io_desc));
@@ -375,3 +371,7 @@ void __init at572d940hf_init_interrupts(unsigned int priority[NR_AIC_IRQS])
at91_gpio_irq_setup();
}
+struct at91_soc __initdata at572d940hf_soc = {
+ .name = "at572d940hf",
+ .init = at572d940hf_initialize,
+};
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 7337617..4c06b19 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -25,16 +25,12 @@
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
static struct map_desc at91cap9_io_desc[] __initdata = {
{
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
.virtual = AT91_IO_VIRT_BASE - AT91CAP9_SRAM_SIZE,
.pfn = __phys_to_pfn(AT91CAP9_SRAM_BASE),
.length = AT91CAP9_SRAM_SIZE,
@@ -303,7 +299,7 @@ static void at91cap9_poweroff(void)
* AT91CAP9 processor initialization
* -------------------------------------------------------------------- */
-void __init at91cap9_initialize(unsigned long main_clock)
+static void __init at91cap9_initialize(unsigned long main_clock)
{
/* Map peripherals */
iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
@@ -381,3 +377,8 @@ void __init at91cap9_init_interrupts(unsigned int priority[NR_AIC_IRQS])
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
+
+struct at91_soc __initdata at91cap9_soc = {
+ .name = "at91cap9",
+ .init = at91cap9_initialize,
+};
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 7bdf566..46ae08f 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -20,16 +20,12 @@
#include <mach/at91_st.h>
#include <mach/cpu.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
static struct map_desc at91rm9200_io_desc[] __initdata = {
{
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_4K,
- .type = MT_DEVICE,
- }, {
.virtual = AT91_VA_BASE_EMAC,
.pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
.length = SZ_16K,
@@ -278,7 +274,7 @@ void __init at91rm9200_set_type(int type)
/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
-void __init at91rm9200_initialize(unsigned long main_clock)
+static void __init at91rm9200_initialize(unsigned long main_clock)
{
/* Map peripherals */
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
@@ -354,3 +350,8 @@ void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
+
+struct at91_soc __initdata at91rm9200_soc = {
+ .name = "at91rm9200",
+ .init = at91rm9200_initialize,
+};
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 32524ef..b1a9aa4 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -22,18 +22,10 @@
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
-static struct map_desc at91sam9260_io_desc[] __initdata = {
- {
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }
-};
-
static struct map_desc at91sam9260_sram_desc[] __initdata = {
{
.virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM_SIZE,
@@ -300,10 +292,9 @@ static void __init at91sam9xe_initialize(void)
iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
}
-void __init at91sam9260_initialize(unsigned long main_clock)
+static void __init at91sam9260_initialize(unsigned long main_clock)
{
/* Map peripherals */
- iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
if (cpu_is_at91sam9xe())
at91sam9xe_initialize();
@@ -380,3 +371,8 @@ void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
+
+struct at91_soc __initdata at91sam9260_soc = {
+ .name = "at91sam9260",
+ .init = at91sam9260_initialize,
+};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index fcad886..3851e77 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -22,18 +22,10 @@
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
-static struct map_desc at91sam9261_io_desc[] __initdata = {
- {
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
- },
-};
-
static struct map_desc at91sam9261_sram_desc[] __initdata = {
{
.virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
@@ -267,10 +259,9 @@ static void at91sam9261_poweroff(void)
* AT91SAM9261 processor initialization
* -------------------------------------------------------------------- */
-void __init at91sam9261_initialize(unsigned long main_clock)
+static void __init at91sam9261_initialize(unsigned long main_clock)
{
/* Map peripherals */
- iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
if (cpu_is_at91sam9g10())
iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc));
@@ -346,3 +337,8 @@ void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
+
+struct at91_soc __initdata at91sam9261_soc = {
+ .name = "at91sam9261",
+ .init = at91sam9261_initialize,
+};
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 249f900..481a890 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -21,16 +21,12 @@
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
static struct map_desc at91sam9263_io_desc[] __initdata = {
{
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
.virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE,
.pfn = __phys_to_pfn(AT91SAM9263_SRAM0_BASE),
.length = AT91SAM9263_SRAM0_SIZE,
@@ -279,7 +275,7 @@ static void at91sam9263_poweroff(void)
* AT91SAM9263 processor initialization
* -------------------------------------------------------------------- */
-void __init at91sam9263_initialize(unsigned long main_clock)
+static void __init at91sam9263_initialize(unsigned long main_clock)
{
/* Map peripherals */
iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
@@ -351,3 +347,8 @@ void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
+
+struct at91_soc __initdata at91sam9263_soc = {
+ .name = "at91sam9263",
+ .init = at91sam9263_initialize,
+};
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index c67b47f..9cb5090 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -22,16 +22,12 @@
#include <mach/at91_shdwc.h>
#include <mach/cpu.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
static struct map_desc at91sam9g45_io_desc[] __initdata = {
{
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
.virtual = AT91_IO_VIRT_BASE - AT91SAM9G45_SRAM_SIZE,
.pfn = __phys_to_pfn(AT91SAM9G45_SRAM_BASE),
.length = AT91SAM9G45_SRAM_SIZE,
@@ -306,7 +302,7 @@ static void at91sam9g45_poweroff(void)
* AT91SAM9G45 processor initialization
* -------------------------------------------------------------------- */
-void __init at91sam9g45_initialize(unsigned long main_clock)
+static void __init at91sam9g45_initialize(unsigned long main_clock)
{
/* Map peripherals */
iotable_init(at91sam9g45_io_desc, ARRAY_SIZE(at91sam9g45_io_desc));
@@ -378,3 +374,8 @@ void __init at91sam9g45_init_interrupts(unsigned int priority[NR_AIC_IRQS])
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
+
+struct at91_soc __initdata at91sam9g45_soc = {
+ .name = "at91sam9g45",
+ .init = at91sam9g45_initialize,
+};
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 6a9d24e..e6f23c3 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -21,18 +21,10 @@
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
-static struct map_desc at91sam9rl_io_desc[] __initdata = {
- {
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
- },
-};
-
static struct map_desc at91sam9rl_sram_desc[] __initdata = {
{
.pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
@@ -252,12 +244,11 @@ static void at91sam9rl_poweroff(void)
* AT91SAM9RL processor initialization
* -------------------------------------------------------------------- */
-void __init at91sam9rl_initialize(unsigned long main_clock)
+static void __init at91sam9rl_initialize(unsigned long main_clock)
{
unsigned long cidr, sram_size;
/* Map peripherals */
- iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
cidr = at91_sys_read(AT91_DBGU_CIDR);
@@ -343,3 +334,8 @@ void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
+
+struct at91_soc __initdata at91sam9rl_soc = {
+ .name = "at91sam9rl",
+ .init = at91sam9rl_initialize,
+};
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index d294293..b0d235e 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -46,7 +46,7 @@ static void __init onearm_map_io(void)
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index cba7f77..855c641 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -51,7 +51,7 @@
static void __init afeb9260_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-at572d940hf_ek.c b/arch/arm/mach-at91/board-at572d940hf_ek.c
index 8ad58bd..ca796c2 100644
--- a/arch/arm/mach-at91/board-at572d940hf_ek.c
+++ b/arch/arm/mach-at91/board-at572d940hf_ek.c
@@ -50,7 +50,7 @@
static void __init eb_map_io(void)
{
/* Initialize processor: 12.500 MHz crystal */
- at572d940hf_initialize(12000000);
+ at91_initialize(12000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index b54e3e6..f6b08f0 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -48,7 +48,7 @@
static void __init cam60_map_io(void)
{
/* Initialize processor: 10 MHz crystal */
- at91sam9260_initialize(10000000);
+ at91_initialize(10000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 69aa349..f9138dc 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -53,7 +53,7 @@
static void __init cap9adk_map_io(void)
{
/* Initialize processor: 12 MHz crystal */
- at91cap9_initialize(12000000);
+ at91_initialize(12000000);
/* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */
at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11);
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index ac8f224..f87fd72 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -43,7 +43,7 @@
static void __init carmeva_map_io(void)
{
/* Initialize processor: 20.000 MHz crystal */
- at91rm9200_initialize(20000000);
+ at91_initialize(20000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 3838594..c228d3a 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -50,7 +50,7 @@
static void __init cpu9krea_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index c25db34..7858e3c 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -57,7 +57,7 @@ static void __init cpuat91_map_io(void)
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index 2a3f2f7..a3dd759 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -46,7 +46,7 @@
static void __init csb337_map_io(void)
{
/* Initialize processor: 3.6864 MHz crystal */
- at91rm9200_initialize(3686400);
+ at91_initialize(3686400);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index d42a7c3..5849ed1 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -43,7 +43,7 @@
static void __init csb637_map_io(void)
{
/* Initialize processor: 3.6864 MHz crystal */
- at91rm9200_initialize(3686400);
+ at91_initialize(3686400);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index e732350..1dee160 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -43,7 +43,7 @@
static void __init eb9200_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index 587ed99..3bfc55a 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -49,7 +49,7 @@ static void __init ecb_at91map_io(void)
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 5cc591f..85d0742 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -35,7 +35,7 @@ static void __init eco920_map_io(void)
/* Set cpu type: PQFP */
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index c8a62dc..345ba51 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -40,7 +40,7 @@
static void __init flexibity_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index dfc7dfe..6948af9 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -60,7 +60,7 @@
static void __init foxg20_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 1def877..944ad13 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -46,7 +46,7 @@ static void __init kafa_map_io(void)
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index ad0fe91..e744e44 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -48,7 +48,7 @@ static void __init kb9202_map_io(void)
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
/* Initialize processor: 10 MHz crystal */
- at91rm9200_initialize(10000000);
+ at91_initialize(10000000);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index fe5f1d4..2bd4cda 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -54,7 +54,7 @@
static void __init neocore926_map_io(void)
{
/* Initialize processor: 20 MHz crystal */
- at91sam9263_initialize(20000000);
+ at91_initialize(20000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index c153863..d22b1a3 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -46,7 +46,7 @@
static void __init picotux200_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 69d15a8..d977e7e 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -51,7 +51,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 12.000 MHz crystal */
- at91sam9260_initialize(12000000);
+ at91_initialize(12000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index b8f3b3d..0175eef 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -48,7 +48,7 @@
static void __init dk_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index b55edc6..882d016 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -48,7 +48,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 25a26be..36f765a 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -47,7 +47,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index fb05ec0..cc864a9 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -53,7 +53,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index a0b182e..010636c 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -57,7 +57,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9261_initialize(18432000);
+ at91_initialize(18432000);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 3c9cbd8..0c3a54d 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -56,7 +56,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 16.367 MHz crystal */
- at91sam9263_initialize(16367660);
+ at91_initialize(16367660);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 2de10ca..74676c6 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -64,7 +64,7 @@ static int inline ek_have_2mmc(void)
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 200e155..15ccaad 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -50,7 +50,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 12.000 MHz crystal */
- at91sam9g45_initialize(12000000);
+ at91_initialize(12000000);
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 3bf3408..7b232b3 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -41,7 +41,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 12.000 MHz crystal */
- at91sam9rl_initialize(12000000);
+ at91_initialize(12000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 17f7d9b..db5e67a 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -42,7 +42,7 @@
static void __init snapper9260_map_io(void)
{
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* Debug on ttyS0 */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index f8902b1..bd0c8ce 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -35,7 +35,7 @@
void __init stamp9g20_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
- at91sam9260_initialize(18432000);
+ at91_initialize(18432000);
/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 07784ba..8b0955f 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -51,7 +51,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 12.000 MHz crystal */
- at91sam9260_initialize(12000000);
+ at91_initialize(12000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index b6145089..5b2a7bb 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -50,7 +50,7 @@
static void __init ek_map_io(void)
{
/* Initialize processor: 12.00 MHz crystal */
- at91sam9263_initialize(12000000);
+ at91_initialize(12000000);
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 097328b..b473252 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -56,7 +56,7 @@ static void __init yl9200_map_io(void)
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
/* Initialize processor: 18.432 MHz crystal */
- at91rm9200_initialize(18432000);
+ at91_initialize(18432000);
/* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 87ec31d..e1a5007 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -10,15 +10,8 @@
/* Processors */
extern void __init at91rm9200_set_type(int type);
-extern void __init at91rm9200_initialize(unsigned long main_clock);
-extern void __init at91sam9260_initialize(unsigned long main_clock);
-extern void __init at91sam9261_initialize(unsigned long main_clock);
-extern void __init at91sam9263_initialize(unsigned long main_clock);
-extern void __init at91sam9rl_initialize(unsigned long main_clock);
-extern void __init at91sam9g45_initialize(unsigned long main_clock);
+extern void __init at91_initialize(unsigned long main_clock);
extern void __init at91x40_initialize(unsigned long main_clock);
-extern void __init at91cap9_initialize(unsigned long main_clock);
-extern void __init at572d940hf_initialize(unsigned long main_clock);
/* Interrupts */
extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
diff --git a/arch/arm/mach-at91/include/mach/at572d940hf.h b/arch/arm/mach-at91/include/mach/at572d940hf.h
index be510cf..2dc22d3 100644
--- a/arch/arm/mach-at91/include/mach/at572d940hf.h
+++ b/arch/arm/mach-at91/include/mach/at572d940hf.h
@@ -83,7 +83,6 @@
#define AT572D940HF_BASE_EMAC 0xfffd8000
#define AT572D940HF_BASE_CAN0 0xfffdc000
#define AT572D940HF_BASE_CAN1 0xfffe0000
-#define AT91_BASE_SYS 0xffffea00
/*
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 9c6af97..adac25a 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -77,7 +77,6 @@
#define AT91CAP9_BASE_EMAC 0xfffbc000
#define AT91CAP9_BASE_ADC 0xfffc0000
#define AT91CAP9_BASE_ISI 0xfffc4000
-#define AT91_BASE_SYS 0xffffe200
/*
* System Peripherals (offset from AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 7898315..aedc28f 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -76,7 +76,6 @@
#define AT91RM9200_BASE_SSC1 0xfffd4000
#define AT91RM9200_BASE_SSC2 0xfffd8000
#define AT91RM9200_BASE_SPI 0xfffe0000
-#define AT91_BASE_SYS 0xfffff000
/*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 6c53b95..6da5ce6 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -78,7 +78,6 @@
#define AT91SAM9260_BASE_TC4 0xfffdc040
#define AT91SAM9260_BASE_TC5 0xfffdc080
#define AT91SAM9260_BASE_ADC 0xfffe0000
-#define AT91_BASE_SYS 0xffffe800
/*
* System Peripherals (offset from AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 2b56185..6c4ea40 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -62,7 +62,6 @@
#define AT91SAM9261_BASE_SSC2 0xfffc4000
#define AT91SAM9261_BASE_SPI0 0xfffc8000
#define AT91SAM9261_BASE_SPI1 0xfffcc000
-#define AT91_BASE_SYS 0xffffea00
/*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 2091f1e..1572453 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -72,7 +72,6 @@
#define AT91SAM9263_BASE_EMAC 0xfffbc000
#define AT91SAM9263_BASE_ISI 0xfffc4000
#define AT91SAM9263_BASE_2DGE 0xfffc8000
-#define AT91_BASE_SYS 0xffffe000
/*
* System Peripherals (offset from AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index a526869..b00cc18 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -84,7 +84,6 @@
#define AT91SAM9G45_BASE_TC3 0xfffd4000
#define AT91SAM9G45_BASE_TC4 0xfffd4040
#define AT91SAM9G45_BASE_TC5 0xfffd4080
-#define AT91_BASE_SYS 0xffffe200
/*
* System Peripherals (offset from AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 87ba851..b6c18c7 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -66,7 +66,6 @@
#define AT91SAM9RL_BASE_TSC 0xfffd0000
#define AT91SAM9RL_BASE_UDPHS 0xfffd4000
#define AT91SAM9RL_BASE_AC97C 0xfffd8000
-#define AT91_BASE_SYS 0xffffc000
/*
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 3d64a75..b7ff44a 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -16,6 +16,20 @@
#include <asm/sizes.h>
+#if !defined(CONFIG_ARCH_AT91X40)
+/*
+ * on all at91 except rm9200 and x40 have the System Controller start in reallity
+ * at 0xffffc000 of 16KiB
+ *
+ * on rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
+ * at 0xfffff000
+ *
+ * so we will use a common AT91_BASE_SYS at 0xffffc000 of 16KiB
+ * and map the same memory space
+ */
+#define AT91_BASE_SYS 0xffffc000
+#endif
+
#if defined(CONFIG_ARCH_AT91RM9200)
#include <mach/at91rm9200.h>
#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
new file mode 100644
index 0000000..81f5815
--- /dev/null
+++ b/arch/arm/mach-at91/soc.c
@@ -0,0 +1,57 @@
+/*
+ *
+ * Copyright (C) 2007 Atmel Corporation.
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <mach/cpu.h>
+
+#include "soc.h"
+#include "generic.h"
+
+static struct at91_soc __initdata current_soc;
+
+static struct map_desc at91_io_desc __initdata = {
+ .virtual = AT91_VA_BASE_SYS,
+ .pfn = __phys_to_pfn(AT91_BASE_SYS),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+};
+
+void __init at91_initialize(unsigned long main_clock)
+{
+ /* Map peripherals */
+ iotable_init(&at91_io_desc, 1);
+
+ if (cpu_is_at91rm9200())
+ current_soc = at91rm9200_soc;
+ else if (cpu_is_at91sam9260())
+ current_soc = at91sam9260_soc;
+ else if (cpu_is_at91sam9261())
+ current_soc = at91sam9261_soc;
+ else if (cpu_is_at91sam9263())
+ current_soc = at91sam9263_soc;
+ else if (cpu_is_at91sam9rl())
+ current_soc = at91sam9rl_soc;
+ else if (cpu_is_at91sam9g45())
+ current_soc = at91sam9g45_soc;
+ else if (cpu_is_at91cap9())
+ current_soc = at91cap9_soc;
+ else if (cpu_is_at572d940hf())
+ current_soc = at572d940hf_soc;
+ else
+ panic("Impossible to detect the CPU type");
+
+ pr_info("AT91: detected soc: %s\n", current_soc.name);
+
+ current_soc.init(main_clock);
+}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
new file mode 100644
index 0000000..6c30d74
--- /dev/null
+++ b/arch/arm/mach-at91/soc.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2007 Atmel Corporation.
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2
+ *
+ */
+
+struct at91_soc {
+ char *name;
+
+ void (*init)(unsigned long main_clock);
+};
+
+extern struct at91_soc at91rm9200_soc;
+extern struct at91_soc at91sam9260_soc;
+extern struct at91_soc at91sam9261_soc;
+extern struct at91_soc at91sam9263_soc;
+extern struct at91_soc at91sam9rl_soc;
+extern struct at91_soc at91sam9g45_soc;
+extern struct at91_soc at91cap9_soc;
+extern struct at91_soc at572d940hf_soc;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 02/14] at91: introduce commom AT91_BASE_SYS
2011-04-25 18:31 ` [PATCH 02/14] at91: introduce commom AT91_BASE_SYS Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 21:48 ` Ryan Mallon
2011-04-26 4:27 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-25 21:48 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 06:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> on all at91 except rm9200 and x40 have the System Controller start in reallity
> at 0xffffc000 of 16KiB
Hi Jean,
I think this should be reworded as something like:
"On all AT91 variants except the RM9200 and x40 the system controller
starts at address 0xffffc000 and has a size of 16KiB."
>
> on rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
> at 0xfffff000
This bit is okay.
> so we will use a common AT91_BASE_SYS at 0xffffc000 of 16KiB
> and map the same memory space
"This patch removes the individual definitions of AT91_BASE_SYS and
replaces them with a common version at base 0xfffffc000 and size 16KiB".
<snip>
> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> index 7bdf566..46ae08f 100644
> --- a/arch/arm/mach-at91/at91rm9200.c
> +++ b/arch/arm/mach-at91/at91rm9200.c
> @@ -20,16 +20,12 @@
> #include <mach/at91_st.h>
> #include <mach/cpu.h>
>
> +#include "soc.h"
> #include "generic.h"
> #include "clock.h"
>
> static struct map_desc at91rm9200_io_desc[] __initdata = {
> {
> - .virtual = AT91_VA_BASE_SYS,
> - .pfn = __phys_to_pfn(AT91_BASE_SYS),
> - .length = SZ_4K,
> - .type = MT_DEVICE,
> - }, {
If the RM9200 system controller is not at the same base address as the
other variants then how does the common AT91_BASE_SYS work correctly? I
can't see an offseting code. What am I missing?
<snip>
> diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
> index 3d64a75..b7ff44a 100644
> --- a/arch/arm/mach-at91/include/mach/hardware.h
> +++ b/arch/arm/mach-at91/include/mach/hardware.h
> @@ -16,6 +16,20 @@
>
> #include <asm/sizes.h>
>
> +#if !defined(CONFIG_ARCH_AT91X40)
> +/*
> + * on all at91 except rm9200 and x40 have the System Controller start in reallity
> + * at 0xffffc000 of 16KiB
> + *
> + * on rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
> + * at 0xfffff000
> + *
> + * so we will use a common AT91_BASE_SYS at 0xffffc000 of 16KiB
> + * and map the same memory space
Please reword this as suggested for the changelog.
<snip>
> diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
> new file mode 100644
> index 0000000..6c30d74
> --- /dev/null
> +++ b/arch/arm/mach-at91/soc.h
> @@ -0,0 +1,22 @@
> +/*
> + * Copyright (C) 2007 Atmel Corporation.
> + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> + *
> + * Under GPLv2
> + *
> + */
> +
> +struct at91_soc {
> + char *name;
Should be const. Do we really need the name of the AT91 variant? We
could just export the initialize function and get rid of this new struct
which would further reduce the line count?
> +
> + void (*init)(unsigned long main_clock);
> +};
> +
> +extern struct at91_soc at91rm9200_soc;
> +extern struct at91_soc at91sam9260_soc;
> +extern struct at91_soc at91sam9261_soc;
> +extern struct at91_soc at91sam9263_soc;
> +extern struct at91_soc at91sam9rl_soc;
> +extern struct at91_soc at91sam9g45_soc;
> +extern struct at91_soc at91cap9_soc;
> +extern struct at91_soc at572d940hf_soc;
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 02/14] at91: introduce commom AT91_BASE_SYS
2011-04-25 21:48 ` Ryan Mallon
@ 2011-04-26 4:27 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 4:27 UTC (permalink / raw)
To: linux-arm-kernel
> > diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> > index 7bdf566..46ae08f 100644
> > --- a/arch/arm/mach-at91/at91rm9200.c
> > +++ b/arch/arm/mach-at91/at91rm9200.c
> > @@ -20,16 +20,12 @@
> > #include <mach/at91_st.h>
> > #include <mach/cpu.h>
> >
> > +#include "soc.h"
> > #include "generic.h"
> > #include "clock.h"
> >
> > static struct map_desc at91rm9200_io_desc[] __initdata = {
> > {
> > - .virtual = AT91_VA_BASE_SYS,
> > - .pfn = __phys_to_pfn(AT91_BASE_SYS),
> > - .length = SZ_4K,
> > - .type = MT_DEVICE,
> > - }, {
>
> If the RM9200 system controller is not at the same base address as the
> other variants then how does the common AT91_BASE_SYS work correctly? I
> can't see an offseting code. What am I missing?
you have reserved memory and the then we map it in memory
cf hardware.h
>
> <snip>
>
> > diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
> > index 3d64a75..b7ff44a 100644
> > --- a/arch/arm/mach-at91/include/mach/hardware.h
> > +++ b/arch/arm/mach-at91/include/mach/hardware.h
> > @@ -16,6 +16,20 @@
> >
> > #include <asm/sizes.h>
> >
> > +#if !defined(CONFIG_ARCH_AT91X40)
> > +/*
> > + * on all at91 except rm9200 and x40 have the System Controller start in reallity
> > + * at 0xffffc000 of 16KiB
> > + *
> > + * on rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
> > + * at 0xfffff000
> > + *
> > + * so we will use a common AT91_BASE_SYS at 0xffffc000 of 16KiB
> > + * and map the same memory space
>
> Please reword this as suggested for the changelog.
>
> <snip>
>
> > diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
> > new file mode 100644
> > index 0000000..6c30d74
> > --- /dev/null
> > +++ b/arch/arm/mach-at91/soc.h
> > @@ -0,0 +1,22 @@
> > +/*
> > + * Copyright (C) 2007 Atmel Corporation.
> > + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > + *
> > + * Under GPLv2
> > + *
> > + */
> > +
> > +struct at91_soc {
> > + char *name;
>
> Should be const. Do we really need the name of the AT91 variant? We
> could just export the initialize function and get rid of this new struct
> which would further reduce the line count?
yeah some board can have different soc so print is usefull
I do not want to export 1000 of functions as done today
the struct is here for this
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 03/14] at91: factorize at91 interrupts init to soc
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 18:31 ` [PATCH 01/14] at91rm9200: introduce at91rm9200_set_type to specficy cpu package Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 18:31 ` [PATCH 02/14] at91: introduce commom AT91_BASE_SYS Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 21:52 ` Ryan Mallon
` (2 more replies)
2011-04-25 18:31 ` [PATCH 04/14 v2] at91: merge board usb-a9260 and usb-a9263 together Jean-Christophe PLAGNIOL-VILLARD
` (11 subsequent siblings)
14 siblings, 3 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
they are the same except the default priority
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/at572d940hf.c | 13 +------------
arch/arm/mach-at91/at91cap9.c | 13 +------------
arch/arm/mach-at91/at91rm9200.c | 13 +------------
arch/arm/mach-at91/at91sam9260.c | 13 +------------
arch/arm/mach-at91/at91sam9261.c | 13 +------------
arch/arm/mach-at91/at91sam9263.c | 13 +------------
arch/arm/mach-at91/at91sam9g45.c | 13 +------------
arch/arm/mach-at91/at91sam9rl.c | 13 +------------
arch/arm/mach-at91/board-1arm.c | 2 +-
arch/arm/mach-at91/board-afeb-9260v1.c | 2 +-
arch/arm/mach-at91/board-at572d940hf_ek.c | 2 +-
arch/arm/mach-at91/board-cam60.c | 2 +-
arch/arm/mach-at91/board-cap9adk.c | 2 +-
arch/arm/mach-at91/board-carmeva.c | 2 +-
arch/arm/mach-at91/board-cpu9krea.c | 2 +-
arch/arm/mach-at91/board-cpuat91.c | 2 +-
arch/arm/mach-at91/board-csb337.c | 2 +-
arch/arm/mach-at91/board-csb637.c | 2 +-
arch/arm/mach-at91/board-eb9200.c | 2 +-
arch/arm/mach-at91/board-ecbat91.c | 2 +-
arch/arm/mach-at91/board-eco920.c | 2 +-
arch/arm/mach-at91/board-flexibity.c | 2 +-
arch/arm/mach-at91/board-foxg20.c | 2 +-
arch/arm/mach-at91/board-gsia18s.c | 2 +-
arch/arm/mach-at91/board-kafa.c | 2 +-
arch/arm/mach-at91/board-kb9202.c | 2 +-
arch/arm/mach-at91/board-neocore926.c | 2 +-
arch/arm/mach-at91/board-pcontrol-g20.c | 2 +-
arch/arm/mach-at91/board-picotux200.c | 2 +-
arch/arm/mach-at91/board-qil-a9260.c | 2 +-
arch/arm/mach-at91/board-rm9200dk.c | 2 +-
arch/arm/mach-at91/board-rm9200ek.c | 2 +-
arch/arm/mach-at91/board-sam9-l9260.c | 2 +-
arch/arm/mach-at91/board-sam9260ek.c | 2 +-
arch/arm/mach-at91/board-sam9261ek.c | 2 +-
arch/arm/mach-at91/board-sam9263ek.c | 2 +-
arch/arm/mach-at91/board-sam9g20ek.c | 2 +-
arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
arch/arm/mach-at91/board-sam9rlek.c | 2 +-
arch/arm/mach-at91/board-snapper9260.c | 2 +-
arch/arm/mach-at91/board-stamp9g20.c | 2 +-
arch/arm/mach-at91/board-usb-a9260.c | 2 +-
arch/arm/mach-at91/board-usb-a9263.c | 2 +-
arch/arm/mach-at91/board-yl-9200.c | 2 +-
arch/arm/mach-at91/generic.h | 9 +--------
arch/arm/mach-at91/soc.c | 12 ++++++++++++
arch/arm/mach-at91/soc.h | 1 +
47 files changed, 58 insertions(+), 140 deletions(-)
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
index df0d691..15ecb64 100644
--- a/arch/arm/mach-at91/at572d940hf.c
+++ b/arch/arm/mach-at91/at572d940hf.c
@@ -359,19 +359,8 @@ static unsigned int at572d940hf_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller */
};
-void __init at572d940hf_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
- if (!priority)
- priority = at572d940hf_default_irq_priority;
-
- /* Initialize the AIC interrupt controller */
- at91_aic_init(priority);
-
- /* Enable GPIO interrupts */
- at91_gpio_irq_setup();
-}
-
struct at91_soc __initdata at572d940hf_soc = {
.name = "at572d940hf",
+ .default_irq_priority = at572d940hf_default_irq_priority,
.init = at572d940hf_initialize,
};
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 4c06b19..6bf8eba 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -366,19 +366,8 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller (IRQ1) */
};
-void __init at91cap9_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
- if (!priority)
- priority = at91cap9_default_irq_priority;
-
- /* Initialize the AIC interrupt controller */
- at91_aic_init(priority);
-
- /* Enable GPIO interrupts */
- at91_gpio_irq_setup();
-}
-
struct at91_soc __initdata at91cap9_soc = {
.name = "at91cap9",
+ .default_irq_priority = at91cap9_default_irq_priority,
.init = at91cap9_initialize,
};
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 46ae08f..abc4cc9 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -339,19 +339,8 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
0 /* Advanced Interrupt Controller (IRQ6) */
};
-void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
- if (!priority)
- priority = at91rm9200_default_irq_priority;
-
- /* Initialize the AIC interrupt controller */
- at91_aic_init(priority);
-
- /* Enable GPIO interrupts */
- at91_gpio_irq_setup();
-}
-
struct at91_soc __initdata at91rm9200_soc = {
.name = "at91rm9200",
+ .default_irq_priority = at91rm9200_default_irq_priority,
.init = at91rm9200_initialize,
};
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b1a9aa4..2838921 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -360,19 +360,8 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller */
};
-void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
- if (!priority)
- priority = at91sam9260_default_irq_priority;
-
- /* Initialize the AIC interrupt controller */
- at91_aic_init(priority);
-
- /* Enable GPIO interrupts */
- at91_gpio_irq_setup();
-}
-
struct at91_soc __initdata at91sam9260_soc = {
.name = "at91sam9260",
+ .default_irq_priority = at91sam9260_default_irq_priority,
.init = at91sam9260_initialize,
};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 3851e77..768f4b7 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -326,19 +326,8 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller */
};
-void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
- if (!priority)
- priority = at91sam9261_default_irq_priority;
-
- /* Initialize the AIC interrupt controller */
- at91_aic_init(priority);
-
- /* Enable GPIO interrupts */
- at91_gpio_irq_setup();
-}
-
struct at91_soc __initdata at91sam9261_soc = {
.name = "at91sam9261",
+ .default_irq_priority = at91sam9261_default_irq_priority,
.init = at91sam9261_initialize,
};
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 481a890..97aae4f 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -336,19 +336,8 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller (IRQ1) */
};
-void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
- if (!priority)
- priority = at91sam9263_default_irq_priority;
-
- /* Initialize the AIC interrupt controller */
- at91_aic_init(priority);
-
- /* Enable GPIO interrupts */
- at91_gpio_irq_setup();
-}
-
struct at91_soc __initdata at91sam9263_soc = {
.name = "at91sam9263",
+ .default_irq_priority = at91sam9263_default_irq_priority,
.init = at91sam9263_initialize,
};
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9cb5090..b497614 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -363,19 +363,8 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller (IRQ0) */
};
-void __init at91sam9g45_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
- if (!priority)
- priority = at91sam9g45_default_irq_priority;
-
- /* Initialize the AIC interrupt controller */
- at91_aic_init(priority);
-
- /* Enable GPIO interrupts */
- at91_gpio_irq_setup();
-}
-
struct at91_soc __initdata at91sam9g45_soc = {
.name = "at91sam9g45",
+ .default_irq_priority = at91sam9g45_default_irq_priority,
.init = at91sam9g45_initialize,
};
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index e6f23c3..53287d5 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -323,19 +323,8 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller */
};
-void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
- if (!priority)
- priority = at91sam9rl_default_irq_priority;
-
- /* Initialize the AIC interrupt controller */
- at91_aic_init(priority);
-
- /* Enable GPIO interrupts */
- at91_gpio_irq_setup();
-}
-
struct at91_soc __initdata at91sam9rl_soc = {
.name = "at91sam9rl",
+ .default_irq_priority = at91sam9rl_default_irq_priority,
.init = at91sam9rl_initialize,
};
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index b0d235e..ba08329 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -65,7 +65,7 @@ static void __init onearm_map_io(void)
static void __init onearm_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata onearm_eth_data = {
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 855c641..3103bb1 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -72,7 +72,7 @@ static void __init afeb9260_map_io(void)
static void __init afeb9260_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-at572d940hf_ek.c b/arch/arm/mach-at91/board-at572d940hf_ek.c
index ca796c2..1d24493 100644
--- a/arch/arm/mach-at91/board-at572d940hf_ek.c
+++ b/arch/arm/mach-at91/board-at572d940hf_ek.c
@@ -70,7 +70,7 @@ static void __init eb_map_io(void)
static void __init eb_init_irq(void)
{
- at572d940hf_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index f6b08f0..d3a65e2 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -59,7 +59,7 @@ static void __init cam60_map_io(void)
static void __init cam60_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index f9138dc..8f0a53e 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -67,7 +67,7 @@ static void __init cap9adk_map_io(void)
static void __init cap9adk_init_irq(void)
{
- at91cap9_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index f87fd72..cb888cf 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -59,7 +59,7 @@ static void __init carmeva_map_io(void)
static void __init carmeva_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata carmeva_eth_data = {
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index c228d3a..544995c 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -83,7 +83,7 @@ static void __init cpu9krea_map_io(void)
static void __init cpu9krea_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
/*
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 7858e3c..33ddbfa 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -84,7 +84,7 @@ static void __init cpuat91_map_io(void)
static void __init cpuat91_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata cpuat91_eth_data = {
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index a3dd759..354e85e 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -60,7 +60,7 @@ static void __init csb337_map_io(void)
static void __init csb337_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata csb337_eth_data = {
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 5849ed1..9bff91f 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -54,7 +54,7 @@ static void __init csb637_map_io(void)
static void __init csb637_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata csb637_eth_data = {
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 1dee160..8101ef0 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -62,7 +62,7 @@ static void __init eb9200_map_io(void)
static void __init eb9200_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata eb9200_eth_data = {
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index 3bfc55a..7fb26f9 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -66,7 +66,7 @@ static void __init ecb_at91map_io(void)
static void __init ecb_at91init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata ecb_at91eth_data = {
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 85d0742..9c979bb 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -49,7 +49,7 @@ static void __init eco920_map_io(void)
static void __init eco920_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata eco920_eth_data = {
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 345ba51..15cf7ab 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -51,7 +51,7 @@ static void __init flexibity_map_io(void)
static void __init flexibity_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
/* USB Host port */
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index 6948af9..53032d4 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -103,7 +103,7 @@ static void __init foxg20_map_io(void)
static void __init foxg20_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index bc28136..41f7164 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -77,7 +77,7 @@ static void __init gsia18s_map_io(void)
static void __init init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
/*
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 944ad13..cf7e7a0 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -63,7 +63,7 @@ static void __init kafa_map_io(void)
static void __init kafa_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata kafa_eth_data = {
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index e744e44..a56cdee 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -71,7 +71,7 @@ static void __init kb9202_map_io(void)
static void __init kb9202_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata kb9202_eth_data = {
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 2bd4cda..2d1dec2 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -68,7 +68,7 @@ static void __init neocore926_map_io(void)
static void __init neocore926_init_irq(void)
{
- at91sam9263_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index feb6578..aa0a660 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -56,7 +56,7 @@ static void __init pcontrol_g20_map_io(void)
static void __init init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index d22b1a3..3267b95 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -62,7 +62,7 @@ static void __init picotux200_map_io(void)
static void __init picotux200_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata picotux200_eth_data = {
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index d977e7e..e26fa6e 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -74,7 +74,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 0175eef..c14f2c2 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -67,7 +67,7 @@ static void __init dk_map_io(void)
static void __init dk_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata dk_eth_data = {
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 882d016..ffd69c0 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -67,7 +67,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_eth_data __initdata ek_eth_data = {
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 36f765a..e4e19aa 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -69,7 +69,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index cc864a9..2307a1c 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -72,7 +72,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 010636c..e1c4274 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -71,7 +71,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9261_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 0c3a54d..43c421d 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -70,7 +70,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9263_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 74676c6..5a5df34 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -83,7 +83,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 15ccaad..fef316a 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -65,7 +65,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9g45_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 7b232b3..535c975 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -55,7 +55,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9rl_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index db5e67a..a5d5d89 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -57,7 +57,7 @@ static void __init snapper9260_map_io(void)
static void __init snapper9260_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
static struct at91_usbh_data __initdata snapper9260_usbh_data = {
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index bd0c8ce..1b435c3 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -78,7 +78,7 @@ static void __init portuxg20_map_io(void)
static void __init init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 8b0955f..7cc63c8 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -62,7 +62,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9260_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index 5b2a7bb..1fac2fe 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -61,7 +61,7 @@ static void __init ek_map_io(void)
static void __init ek_init_irq(void)
{
- at91sam9263_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index b473252..e9ca130 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -81,7 +81,7 @@ static void __init yl9200_map_io(void)
static void __init yl9200_init_irq(void)
{
- at91rm9200_init_interrupts(NULL);
+ at91_init_interrupts(NULL);
}
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index e1a5007..3b5ff68 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -14,15 +14,8 @@ extern void __init at91_initialize(unsigned long main_clock);
extern void __init at91x40_initialize(unsigned long main_clock);
/* Interrupts */
-extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
-extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
-extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
-extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
-extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
-extern void __init at91sam9g45_init_interrupts(unsigned int priority[]);
+extern void __init at91_init_interrupts(unsigned int priority[]);
extern void __init at91x40_init_interrupts(unsigned int priority[]);
-extern void __init at91cap9_init_interrupts(unsigned int priority[]);
-extern void __init at572d940hf_init_interrupts(unsigned int priority[]);
extern void __init at91_aic_init(unsigned int priority[]);
/* Timer */
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
index 81f5815..f0a1661 100644
--- a/arch/arm/mach-at91/soc.c
+++ b/arch/arm/mach-at91/soc.c
@@ -20,6 +20,18 @@
static struct at91_soc __initdata current_soc;
+void __init at91_init_interrupts(unsigned int *priority)
+{
+ if (!priority)
+ priority = current_soc.default_irq_priority;
+
+ /* Initialize the AIC interrupt controller */
+ at91_aic_init(priority);
+
+ /* Enable GPIO interrupts */
+ at91_gpio_irq_setup();
+}
+
static struct map_desc at91_io_desc __initdata = {
.virtual = AT91_VA_BASE_SYS,
.pfn = __phys_to_pfn(AT91_BASE_SYS),
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 6c30d74..9aac491 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -8,6 +8,7 @@
struct at91_soc {
char *name;
+ unsigned int *default_irq_priority;
void (*init)(unsigned long main_clock);
};
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 03/14] at91: factorize at91 interrupts init to soc
2011-04-25 18:31 ` [PATCH 03/14] at91: factorize at91 interrupts init to soc Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 21:52 ` Ryan Mallon
2011-04-25 22:11 ` H Hartley Sweeten
2011-04-28 11:43 ` Russell King - ARM Linux
2 siblings, 0 replies; 85+ messages in thread
From: Ryan Mallon @ 2011-04-25 21:52 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 06:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> they are the same except the default priority
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Looks good.
Reviewed-by: Ryan Mallon <ryan@bluewatersys.com>
> ---
> arch/arm/mach-at91/at572d940hf.c | 13 +------------
> arch/arm/mach-at91/at91cap9.c | 13 +------------
> arch/arm/mach-at91/at91rm9200.c | 13 +------------
> arch/arm/mach-at91/at91sam9260.c | 13 +------------
> arch/arm/mach-at91/at91sam9261.c | 13 +------------
> arch/arm/mach-at91/at91sam9263.c | 13 +------------
> arch/arm/mach-at91/at91sam9g45.c | 13 +------------
> arch/arm/mach-at91/at91sam9rl.c | 13 +------------
> arch/arm/mach-at91/board-1arm.c | 2 +-
> arch/arm/mach-at91/board-afeb-9260v1.c | 2 +-
> arch/arm/mach-at91/board-at572d940hf_ek.c | 2 +-
> arch/arm/mach-at91/board-cam60.c | 2 +-
> arch/arm/mach-at91/board-cap9adk.c | 2 +-
> arch/arm/mach-at91/board-carmeva.c | 2 +-
> arch/arm/mach-at91/board-cpu9krea.c | 2 +-
> arch/arm/mach-at91/board-cpuat91.c | 2 +-
> arch/arm/mach-at91/board-csb337.c | 2 +-
> arch/arm/mach-at91/board-csb637.c | 2 +-
> arch/arm/mach-at91/board-eb9200.c | 2 +-
> arch/arm/mach-at91/board-ecbat91.c | 2 +-
> arch/arm/mach-at91/board-eco920.c | 2 +-
> arch/arm/mach-at91/board-flexibity.c | 2 +-
> arch/arm/mach-at91/board-foxg20.c | 2 +-
> arch/arm/mach-at91/board-gsia18s.c | 2 +-
> arch/arm/mach-at91/board-kafa.c | 2 +-
> arch/arm/mach-at91/board-kb9202.c | 2 +-
> arch/arm/mach-at91/board-neocore926.c | 2 +-
> arch/arm/mach-at91/board-pcontrol-g20.c | 2 +-
> arch/arm/mach-at91/board-picotux200.c | 2 +-
> arch/arm/mach-at91/board-qil-a9260.c | 2 +-
> arch/arm/mach-at91/board-rm9200dk.c | 2 +-
> arch/arm/mach-at91/board-rm9200ek.c | 2 +-
> arch/arm/mach-at91/board-sam9-l9260.c | 2 +-
> arch/arm/mach-at91/board-sam9260ek.c | 2 +-
> arch/arm/mach-at91/board-sam9261ek.c | 2 +-
> arch/arm/mach-at91/board-sam9263ek.c | 2 +-
> arch/arm/mach-at91/board-sam9g20ek.c | 2 +-
> arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
> arch/arm/mach-at91/board-sam9rlek.c | 2 +-
> arch/arm/mach-at91/board-snapper9260.c | 2 +-
> arch/arm/mach-at91/board-stamp9g20.c | 2 +-
> arch/arm/mach-at91/board-usb-a9260.c | 2 +-
> arch/arm/mach-at91/board-usb-a9263.c | 2 +-
> arch/arm/mach-at91/board-yl-9200.c | 2 +-
> arch/arm/mach-at91/generic.h | 9 +--------
> arch/arm/mach-at91/soc.c | 12 ++++++++++++
> arch/arm/mach-at91/soc.h | 1 +
> 47 files changed, 58 insertions(+), 140 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
> index df0d691..15ecb64 100644
> --- a/arch/arm/mach-at91/at572d940hf.c
> +++ b/arch/arm/mach-at91/at572d940hf.c
> @@ -359,19 +359,8 @@ static unsigned int at572d940hf_default_irq_priority[NR_AIC_IRQS] __initdata = {
> 0, /* Advanced Interrupt Controller */
> };
>
> -void __init at572d940hf_init_interrupts(unsigned int priority[NR_AIC_IRQS])
> -{
> - if (!priority)
> - priority = at572d940hf_default_irq_priority;
> -
> - /* Initialize the AIC interrupt controller */
> - at91_aic_init(priority);
> -
> - /* Enable GPIO interrupts */
> - at91_gpio_irq_setup();
> -}
> -
> struct at91_soc __initdata at572d940hf_soc = {
> .name = "at572d940hf",
> + .default_irq_priority = at572d940hf_default_irq_priority,
> .init = at572d940hf_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
> index 4c06b19..6bf8eba 100644
> --- a/arch/arm/mach-at91/at91cap9.c
> +++ b/arch/arm/mach-at91/at91cap9.c
> @@ -366,19 +366,8 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
> 0, /* Advanced Interrupt Controller (IRQ1) */
> };
>
> -void __init at91cap9_init_interrupts(unsigned int priority[NR_AIC_IRQS])
> -{
> - if (!priority)
> - priority = at91cap9_default_irq_priority;
> -
> - /* Initialize the AIC interrupt controller */
> - at91_aic_init(priority);
> -
> - /* Enable GPIO interrupts */
> - at91_gpio_irq_setup();
> -}
> -
> struct at91_soc __initdata at91cap9_soc = {
> .name = "at91cap9",
> + .default_irq_priority = at91cap9_default_irq_priority,
> .init = at91cap9_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> index 46ae08f..abc4cc9 100644
> --- a/arch/arm/mach-at91/at91rm9200.c
> +++ b/arch/arm/mach-at91/at91rm9200.c
> @@ -339,19 +339,8 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
> 0 /* Advanced Interrupt Controller (IRQ6) */
> };
>
> -void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
> -{
> - if (!priority)
> - priority = at91rm9200_default_irq_priority;
> -
> - /* Initialize the AIC interrupt controller */
> - at91_aic_init(priority);
> -
> - /* Enable GPIO interrupts */
> - at91_gpio_irq_setup();
> -}
> -
> struct at91_soc __initdata at91rm9200_soc = {
> .name = "at91rm9200",
> + .default_irq_priority = at91rm9200_default_irq_priority,
> .init = at91rm9200_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
> index b1a9aa4..2838921 100644
> --- a/arch/arm/mach-at91/at91sam9260.c
> +++ b/arch/arm/mach-at91/at91sam9260.c
> @@ -360,19 +360,8 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
> 0, /* Advanced Interrupt Controller */
> };
>
> -void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
> -{
> - if (!priority)
> - priority = at91sam9260_default_irq_priority;
> -
> - /* Initialize the AIC interrupt controller */
> - at91_aic_init(priority);
> -
> - /* Enable GPIO interrupts */
> - at91_gpio_irq_setup();
> -}
> -
> struct at91_soc __initdata at91sam9260_soc = {
> .name = "at91sam9260",
> + .default_irq_priority = at91sam9260_default_irq_priority,
> .init = at91sam9260_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
> index 3851e77..768f4b7 100644
> --- a/arch/arm/mach-at91/at91sam9261.c
> +++ b/arch/arm/mach-at91/at91sam9261.c
> @@ -326,19 +326,8 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
> 0, /* Advanced Interrupt Controller */
> };
>
> -void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
> -{
> - if (!priority)
> - priority = at91sam9261_default_irq_priority;
> -
> - /* Initialize the AIC interrupt controller */
> - at91_aic_init(priority);
> -
> - /* Enable GPIO interrupts */
> - at91_gpio_irq_setup();
> -}
> -
> struct at91_soc __initdata at91sam9261_soc = {
> .name = "at91sam9261",
> + .default_irq_priority = at91sam9261_default_irq_priority,
> .init = at91sam9261_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
> index 481a890..97aae4f 100644
> --- a/arch/arm/mach-at91/at91sam9263.c
> +++ b/arch/arm/mach-at91/at91sam9263.c
> @@ -336,19 +336,8 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
> 0, /* Advanced Interrupt Controller (IRQ1) */
> };
>
> -void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
> -{
> - if (!priority)
> - priority = at91sam9263_default_irq_priority;
> -
> - /* Initialize the AIC interrupt controller */
> - at91_aic_init(priority);
> -
> - /* Enable GPIO interrupts */
> - at91_gpio_irq_setup();
> -}
> -
> struct at91_soc __initdata at91sam9263_soc = {
> .name = "at91sam9263",
> + .default_irq_priority = at91sam9263_default_irq_priority,
> .init = at91sam9263_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
> index 9cb5090..b497614 100644
> --- a/arch/arm/mach-at91/at91sam9g45.c
> +++ b/arch/arm/mach-at91/at91sam9g45.c
> @@ -363,19 +363,8 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
> 0, /* Advanced Interrupt Controller (IRQ0) */
> };
>
> -void __init at91sam9g45_init_interrupts(unsigned int priority[NR_AIC_IRQS])
> -{
> - if (!priority)
> - priority = at91sam9g45_default_irq_priority;
> -
> - /* Initialize the AIC interrupt controller */
> - at91_aic_init(priority);
> -
> - /* Enable GPIO interrupts */
> - at91_gpio_irq_setup();
> -}
> -
> struct at91_soc __initdata at91sam9g45_soc = {
> .name = "at91sam9g45",
> + .default_irq_priority = at91sam9g45_default_irq_priority,
> .init = at91sam9g45_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
> index e6f23c3..53287d5 100644
> --- a/arch/arm/mach-at91/at91sam9rl.c
> +++ b/arch/arm/mach-at91/at91sam9rl.c
> @@ -323,19 +323,8 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
> 0, /* Advanced Interrupt Controller */
> };
>
> -void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
> -{
> - if (!priority)
> - priority = at91sam9rl_default_irq_priority;
> -
> - /* Initialize the AIC interrupt controller */
> - at91_aic_init(priority);
> -
> - /* Enable GPIO interrupts */
> - at91_gpio_irq_setup();
> -}
> -
> struct at91_soc __initdata at91sam9rl_soc = {
> .name = "at91sam9rl",
> + .default_irq_priority = at91sam9rl_default_irq_priority,
> .init = at91sam9rl_initialize,
> };
> diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
> index b0d235e..ba08329 100644
> --- a/arch/arm/mach-at91/board-1arm.c
> +++ b/arch/arm/mach-at91/board-1arm.c
> @@ -65,7 +65,7 @@ static void __init onearm_map_io(void)
>
> static void __init onearm_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata onearm_eth_data = {
> diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
> index 855c641..3103bb1 100644
> --- a/arch/arm/mach-at91/board-afeb-9260v1.c
> +++ b/arch/arm/mach-at91/board-afeb-9260v1.c
> @@ -72,7 +72,7 @@ static void __init afeb9260_map_io(void)
>
> static void __init afeb9260_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-at572d940hf_ek.c b/arch/arm/mach-at91/board-at572d940hf_ek.c
> index ca796c2..1d24493 100644
> --- a/arch/arm/mach-at91/board-at572d940hf_ek.c
> +++ b/arch/arm/mach-at91/board-at572d940hf_ek.c
> @@ -70,7 +70,7 @@ static void __init eb_map_io(void)
>
> static void __init eb_init_irq(void)
> {
> - at572d940hf_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
> index f6b08f0..d3a65e2 100644
> --- a/arch/arm/mach-at91/board-cam60.c
> +++ b/arch/arm/mach-at91/board-cam60.c
> @@ -59,7 +59,7 @@ static void __init cam60_map_io(void)
>
> static void __init cam60_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
> index f9138dc..8f0a53e 100644
> --- a/arch/arm/mach-at91/board-cap9adk.c
> +++ b/arch/arm/mach-at91/board-cap9adk.c
> @@ -67,7 +67,7 @@ static void __init cap9adk_map_io(void)
>
> static void __init cap9adk_init_irq(void)
> {
> - at91cap9_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
> index f87fd72..cb888cf 100644
> --- a/arch/arm/mach-at91/board-carmeva.c
> +++ b/arch/arm/mach-at91/board-carmeva.c
> @@ -59,7 +59,7 @@ static void __init carmeva_map_io(void)
>
> static void __init carmeva_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata carmeva_eth_data = {
> diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
> index c228d3a..544995c 100644
> --- a/arch/arm/mach-at91/board-cpu9krea.c
> +++ b/arch/arm/mach-at91/board-cpu9krea.c
> @@ -83,7 +83,7 @@ static void __init cpu9krea_map_io(void)
>
> static void __init cpu9krea_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> /*
> diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
> index 7858e3c..33ddbfa 100644
> --- a/arch/arm/mach-at91/board-cpuat91.c
> +++ b/arch/arm/mach-at91/board-cpuat91.c
> @@ -84,7 +84,7 @@ static void __init cpuat91_map_io(void)
>
> static void __init cpuat91_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata cpuat91_eth_data = {
> diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
> index a3dd759..354e85e 100644
> --- a/arch/arm/mach-at91/board-csb337.c
> +++ b/arch/arm/mach-at91/board-csb337.c
> @@ -60,7 +60,7 @@ static void __init csb337_map_io(void)
>
> static void __init csb337_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata csb337_eth_data = {
> diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
> index 5849ed1..9bff91f 100644
> --- a/arch/arm/mach-at91/board-csb637.c
> +++ b/arch/arm/mach-at91/board-csb637.c
> @@ -54,7 +54,7 @@ static void __init csb637_map_io(void)
>
> static void __init csb637_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata csb637_eth_data = {
> diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
> index 1dee160..8101ef0 100644
> --- a/arch/arm/mach-at91/board-eb9200.c
> +++ b/arch/arm/mach-at91/board-eb9200.c
> @@ -62,7 +62,7 @@ static void __init eb9200_map_io(void)
>
> static void __init eb9200_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata eb9200_eth_data = {
> diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
> index 3bfc55a..7fb26f9 100644
> --- a/arch/arm/mach-at91/board-ecbat91.c
> +++ b/arch/arm/mach-at91/board-ecbat91.c
> @@ -66,7 +66,7 @@ static void __init ecb_at91map_io(void)
>
> static void __init ecb_at91init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata ecb_at91eth_data = {
> diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
> index 85d0742..9c979bb 100644
> --- a/arch/arm/mach-at91/board-eco920.c
> +++ b/arch/arm/mach-at91/board-eco920.c
> @@ -49,7 +49,7 @@ static void __init eco920_map_io(void)
>
> static void __init eco920_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata eco920_eth_data = {
> diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
> index 345ba51..15cf7ab 100644
> --- a/arch/arm/mach-at91/board-flexibity.c
> +++ b/arch/arm/mach-at91/board-flexibity.c
> @@ -51,7 +51,7 @@ static void __init flexibity_map_io(void)
>
> static void __init flexibity_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> /* USB Host port */
> diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
> index 6948af9..53032d4 100644
> --- a/arch/arm/mach-at91/board-foxg20.c
> +++ b/arch/arm/mach-at91/board-foxg20.c
> @@ -103,7 +103,7 @@ static void __init foxg20_map_io(void)
>
> static void __init foxg20_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
> index bc28136..41f7164 100644
> --- a/arch/arm/mach-at91/board-gsia18s.c
> +++ b/arch/arm/mach-at91/board-gsia18s.c
> @@ -77,7 +77,7 @@ static void __init gsia18s_map_io(void)
>
> static void __init init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> /*
> diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
> index 944ad13..cf7e7a0 100644
> --- a/arch/arm/mach-at91/board-kafa.c
> +++ b/arch/arm/mach-at91/board-kafa.c
> @@ -63,7 +63,7 @@ static void __init kafa_map_io(void)
>
> static void __init kafa_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata kafa_eth_data = {
> diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
> index e744e44..a56cdee 100644
> --- a/arch/arm/mach-at91/board-kb9202.c
> +++ b/arch/arm/mach-at91/board-kb9202.c
> @@ -71,7 +71,7 @@ static void __init kb9202_map_io(void)
>
> static void __init kb9202_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata kb9202_eth_data = {
> diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
> index 2bd4cda..2d1dec2 100644
> --- a/arch/arm/mach-at91/board-neocore926.c
> +++ b/arch/arm/mach-at91/board-neocore926.c
> @@ -68,7 +68,7 @@ static void __init neocore926_map_io(void)
>
> static void __init neocore926_init_irq(void)
> {
> - at91sam9263_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
> index feb6578..aa0a660 100644
> --- a/arch/arm/mach-at91/board-pcontrol-g20.c
> +++ b/arch/arm/mach-at91/board-pcontrol-g20.c
> @@ -56,7 +56,7 @@ static void __init pcontrol_g20_map_io(void)
>
> static void __init init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
> index d22b1a3..3267b95 100644
> --- a/arch/arm/mach-at91/board-picotux200.c
> +++ b/arch/arm/mach-at91/board-picotux200.c
> @@ -62,7 +62,7 @@ static void __init picotux200_map_io(void)
>
> static void __init picotux200_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata picotux200_eth_data = {
> diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
> index d977e7e..e26fa6e 100644
> --- a/arch/arm/mach-at91/board-qil-a9260.c
> +++ b/arch/arm/mach-at91/board-qil-a9260.c
> @@ -74,7 +74,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
> index 0175eef..c14f2c2 100644
> --- a/arch/arm/mach-at91/board-rm9200dk.c
> +++ b/arch/arm/mach-at91/board-rm9200dk.c
> @@ -67,7 +67,7 @@ static void __init dk_map_io(void)
>
> static void __init dk_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata dk_eth_data = {
> diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
> index 882d016..ffd69c0 100644
> --- a/arch/arm/mach-at91/board-rm9200ek.c
> +++ b/arch/arm/mach-at91/board-rm9200ek.c
> @@ -67,7 +67,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_eth_data __initdata ek_eth_data = {
> diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
> index 36f765a..e4e19aa 100644
> --- a/arch/arm/mach-at91/board-sam9-l9260.c
> +++ b/arch/arm/mach-at91/board-sam9-l9260.c
> @@ -69,7 +69,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
> index cc864a9..2307a1c 100644
> --- a/arch/arm/mach-at91/board-sam9260ek.c
> +++ b/arch/arm/mach-at91/board-sam9260ek.c
> @@ -72,7 +72,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
> index 010636c..e1c4274 100644
> --- a/arch/arm/mach-at91/board-sam9261ek.c
> +++ b/arch/arm/mach-at91/board-sam9261ek.c
> @@ -71,7 +71,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9261_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
> index 0c3a54d..43c421d 100644
> --- a/arch/arm/mach-at91/board-sam9263ek.c
> +++ b/arch/arm/mach-at91/board-sam9263ek.c
> @@ -70,7 +70,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9263_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
> index 74676c6..5a5df34 100644
> --- a/arch/arm/mach-at91/board-sam9g20ek.c
> +++ b/arch/arm/mach-at91/board-sam9g20ek.c
> @@ -83,7 +83,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
> index 15ccaad..fef316a 100644
> --- a/arch/arm/mach-at91/board-sam9m10g45ek.c
> +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
> @@ -65,7 +65,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9g45_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
> index 7b232b3..535c975 100644
> --- a/arch/arm/mach-at91/board-sam9rlek.c
> +++ b/arch/arm/mach-at91/board-sam9rlek.c
> @@ -55,7 +55,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9rl_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
> index db5e67a..a5d5d89 100644
> --- a/arch/arm/mach-at91/board-snapper9260.c
> +++ b/arch/arm/mach-at91/board-snapper9260.c
> @@ -57,7 +57,7 @@ static void __init snapper9260_map_io(void)
>
> static void __init snapper9260_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
> static struct at91_usbh_data __initdata snapper9260_usbh_data = {
> diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
> index bd0c8ce..1b435c3 100644
> --- a/arch/arm/mach-at91/board-stamp9g20.c
> +++ b/arch/arm/mach-at91/board-stamp9g20.c
> @@ -78,7 +78,7 @@ static void __init portuxg20_map_io(void)
>
> static void __init init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
> index 8b0955f..7cc63c8 100644
> --- a/arch/arm/mach-at91/board-usb-a9260.c
> +++ b/arch/arm/mach-at91/board-usb-a9260.c
> @@ -62,7 +62,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9260_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
> index 5b2a7bb..1fac2fe 100644
> --- a/arch/arm/mach-at91/board-usb-a9263.c
> +++ b/arch/arm/mach-at91/board-usb-a9263.c
> @@ -61,7 +61,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9263_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
> index b473252..e9ca130 100644
> --- a/arch/arm/mach-at91/board-yl-9200.c
> +++ b/arch/arm/mach-at91/board-yl-9200.c
> @@ -81,7 +81,7 @@ static void __init yl9200_map_io(void)
>
> static void __init yl9200_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
>
>
> diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
> index e1a5007..3b5ff68 100644
> --- a/arch/arm/mach-at91/generic.h
> +++ b/arch/arm/mach-at91/generic.h
> @@ -14,15 +14,8 @@ extern void __init at91_initialize(unsigned long main_clock);
> extern void __init at91x40_initialize(unsigned long main_clock);
>
> /* Interrupts */
> -extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
> -extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
> -extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
> -extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
> -extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
> -extern void __init at91sam9g45_init_interrupts(unsigned int priority[]);
> +extern void __init at91_init_interrupts(unsigned int priority[]);
> extern void __init at91x40_init_interrupts(unsigned int priority[]);
> -extern void __init at91cap9_init_interrupts(unsigned int priority[]);
> -extern void __init at572d940hf_init_interrupts(unsigned int priority[]);
> extern void __init at91_aic_init(unsigned int priority[]);
>
> /* Timer */
> diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> index 81f5815..f0a1661 100644
> --- a/arch/arm/mach-at91/soc.c
> +++ b/arch/arm/mach-at91/soc.c
> @@ -20,6 +20,18 @@
>
> static struct at91_soc __initdata current_soc;
>
> +void __init at91_init_interrupts(unsigned int *priority)
> +{
> + if (!priority)
> + priority = current_soc.default_irq_priority;
> +
> + /* Initialize the AIC interrupt controller */
> + at91_aic_init(priority);
> +
> + /* Enable GPIO interrupts */
> + at91_gpio_irq_setup();
> +}
> +
> static struct map_desc at91_io_desc __initdata = {
> .virtual = AT91_VA_BASE_SYS,
> .pfn = __phys_to_pfn(AT91_BASE_SYS),
> diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
> index 6c30d74..9aac491 100644
> --- a/arch/arm/mach-at91/soc.h
> +++ b/arch/arm/mach-at91/soc.h
> @@ -8,6 +8,7 @@
>
> struct at91_soc {
> char *name;
> + unsigned int *default_irq_priority;
>
> void (*init)(unsigned long main_clock);
> };
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 03/14] at91: factorize at91 interrupts init to soc
2011-04-25 18:31 ` [PATCH 03/14] at91: factorize at91 interrupts init to soc Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 21:52 ` Ryan Mallon
@ 2011-04-25 22:11 ` H Hartley Sweeten
2011-04-26 17:29 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 11:43 ` Russell King - ARM Linux
2 siblings, 1 reply; 85+ messages in thread
From: H Hartley Sweeten @ 2011-04-25 22:11 UTC (permalink / raw)
To: linux-arm-kernel
On Monday, April 25, 2011 11:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>
> they are the same except the default priority
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
[snip]
> diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
> index b0d235e..ba08329 100644
> --- a/arch/arm/mach-at91/board-1arm.c
> +++ b/arch/arm/mach-at91/board-1arm.c
> @@ -65,7 +65,7 @@ static void __init onearm_map_io(void)
>
> static void __init onearm_init_irq(void)
> {
> - at91rm9200_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
[snip]
> diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> index 81f5815..f0a1661 100644
> --- a/arch/arm/mach-at91/soc.c
> +++ b/arch/arm/mach-at91/soc.c
> @@ -20,6 +20,18 @@
>
> static struct at91_soc __initdata current_soc;
>
> +void __init at91_init_interrupts(unsigned int *priority)
> +{
> + if (!priority)
> + priority = current_soc.default_irq_priority;
> +
> + /* Initialize the AIC interrupt controller */
> + at91_aic_init(priority);
> +
> + /* Enable GPIO interrupts */
> + at91_gpio_irq_setup();
> +}
> +
All the board files call at91_init_interrupts with a NULL priority. Why not just
remove the parameter entirely, make MACHINE_START.init_irq = at91_init_interrupts,
and then remove all the {board}_init_irq functions.
Regards,
Hartley
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 03/14] at91: factorize at91 interrupts init to soc
2011-04-25 22:11 ` H Hartley Sweeten
@ 2011-04-26 17:29 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-26 22:04 ` Andrew Victor
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 17:29 UTC (permalink / raw)
To: linux-arm-kernel
On 17:11 Mon 25 Apr , H Hartley Sweeten wrote:
> On Monday, April 25, 2011 11:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >
> > they are the same except the default priority
> >
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> > Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
>
> [snip]
>
> > diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
> > index b0d235e..ba08329 100644
> > --- a/arch/arm/mach-at91/board-1arm.c
> > +++ b/arch/arm/mach-at91/board-1arm.c
> > @@ -65,7 +65,7 @@ static void __init onearm_map_io(void)
> >
> > static void __init onearm_init_irq(void)
> > {
> > - at91rm9200_init_interrupts(NULL);
> > + at91_init_interrupts(NULL);
> > }
>
> [snip]
>
> > diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> > index 81f5815..f0a1661 100644
> > --- a/arch/arm/mach-at91/soc.c
> > +++ b/arch/arm/mach-at91/soc.c
> > @@ -20,6 +20,18 @@
> >
> > static struct at91_soc __initdata current_soc;
> >
> > +void __init at91_init_interrupts(unsigned int *priority)
> > +{
> > + if (!priority)
> > + priority = current_soc.default_irq_priority;
> > +
> > + /* Initialize the AIC interrupt controller */
> > + at91_aic_init(priority);
> > +
> > + /* Enable GPIO interrupts */
> > + at91_gpio_irq_setup();
> > +}
> > +
>
> All the board files call at91_init_interrupts with a NULL priority. Why not just
> remove the parameter entirely, make MACHINE_START.init_irq = at91_init_interrupts,
> and then remove all the {board}_init_irq functions.
keep it is important as the irq priority can be board specific as we have
nearly no fifo on at91
agreed to too have a a generic function
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 03/14] at91: factorize at91 interrupts init to soc
2011-04-26 17:29 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-26 22:04 ` Andrew Victor
2011-04-26 23:39 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Andrew Victor @ 2011-04-26 22:04 UTC (permalink / raw)
To: linux-arm-kernel
hi,
>> All the board files call at91_init_interrupts with a NULL priority. ?Why not just
>> remove the parameter entirely, make MACHINE_START.init_irq = at91_init_interrupts,
>> and then remove all the {board}_init_irq functions.
> keep it is important as the irq priority can be board specific as we have
> nearly no fifo on at91
> agreed to too have a a generic function
As of this patch:
http://git.kernel.org/?p=linux/kernel/git/stable/linux-2.6.35.y.git;a=commit;h=e58aa3d2d0cc01ad8d6f7f640a0670433f794922
interrupt priority / nesting were disabled in the core IRQ code.
So even though we configure the AT91's AIC controller for priority
levels, it won't as make much difference as before. Only if you have
multiple pending interrupts, will the one with the highest priority be
serviced first.
Also, you might want to look into changing the AIC's handler from
handle_level_irq() to the handle_fasteoi_irq().
Then the irq_finish() can be removed from the low-level ARM
asm_do_IRQ() handler.
Regards,
Andrew Victor
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 03/14] at91: factorize at91 interrupts init to soc
2011-04-26 22:04 ` Andrew Victor
@ 2011-04-26 23:39 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 23:39 UTC (permalink / raw)
To: linux-arm-kernel
On 00:04 Wed 27 Apr , Andrew Victor wrote:
> hi,
>
> >> All the board files call at91_init_interrupts with a NULL priority. ?Why not just
> >> remove the parameter entirely, make MACHINE_START.init_irq = at91_init_interrupts,
> >> and then remove all the {board}_init_irq functions.
>
> > keep it is important as the irq priority can be board specific as we have
> > nearly no fifo on at91
> > agreed to too have a a generic function
>
> As of this patch:
> http://git.kernel.org/?p=linux/kernel/git/stable/linux-2.6.35.y.git;a=commit;h=e58aa3d2d0cc01ad8d6f7f640a0670433f794922
> interrupt priority / nesting were disabled in the core IRQ code.
> So even though we configure the AT91's AIC controller for priority
> levels, it won't as make much difference as before. Only if you have
> multiple pending interrupts, will the one with the highest priority be
> serviced first.
I'm aware of it yes but the priority can be programed for each board
and f if we use the preempt to will be true again
>
> Also, you might want to look into changing the AIC's handler from
> handle_level_irq() to the handle_fasteoi_irq().
> Then the irq_finish() can be removed from the low-level ARM
> asm_do_IRQ() handler.
I plan to rework the interrupt drivers
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 03/14] at91: factorize at91 interrupts init to soc
2011-04-25 18:31 ` [PATCH 03/14] at91: factorize at91 interrupts init to soc Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 21:52 ` Ryan Mallon
2011-04-25 22:11 ` H Hartley Sweeten
@ 2011-04-28 11:43 ` Russell King - ARM Linux
2 siblings, 0 replies; 85+ messages in thread
From: Russell King - ARM Linux @ 2011-04-28 11:43 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Apr 25, 2011 at 08:31:13PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> they are the same except the default priority
No one uses anything but the default priority. So let's have a version
of this patch which simplifies this further:
> diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
> index 5b2a7bb..1fac2fe 100644
> --- a/arch/arm/mach-at91/board-usb-a9263.c
> +++ b/arch/arm/mach-at91/board-usb-a9263.c
> @@ -61,7 +61,7 @@ static void __init ek_map_io(void)
>
> static void __init ek_init_irq(void)
> {
> - at91sam9263_init_interrupts(NULL);
> + at91_init_interrupts(NULL);
> }
by replacing every instance of the above with a call in their machine
record to at91_init_irq_default(), and:
> +void __init at91_init_interrupts(unsigned int *priority)
> +{
> + if (!priority)
> + priority = current_soc.default_irq_priority;
> +
> + /* Initialize the AIC interrupt controller */
> + at91_aic_init(priority);
> +
> + /* Enable GPIO interrupts */
> + at91_gpio_irq_setup();
> +}
void __init at91_init_interrupts(unsigned int *priority)
{
/* Initialize the AIC interrupt controller */
at91_aic_init(priority);
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
void __init at91_init_irq_default(void)
{
at91_init_interrupts(current_soc.default_irq_priority);
}
If people wish to change from the default priority, they can provide
their own init_irq function, and call at91_init_interrupts with their
desired priority array.
> diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
> index 6c30d74..9aac491 100644
> --- a/arch/arm/mach-at91/soc.h
> +++ b/arch/arm/mach-at91/soc.h
> @@ -8,6 +8,7 @@
>
> struct at91_soc {
> char *name;
btw, this should be const (which should of course be a separate patch).
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 04/14 v2] at91: merge board usb-a9260 and usb-a9263 together
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (2 preceding siblings ...)
2011-04-25 18:31 ` [PATCH 03/14] at91: factorize at91 interrupts init to soc Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 18:31 ` [PATCH 05/14] at91: use structure to store the current soc Jean-Christophe PLAGNIOL-VILLARD
` (10 subsequent siblings)
14 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
From: Nico Erfurth <ne@erfurth.eu>
as the are nearly the same
Signed-off-by: Nico Erfurth <ne@erfurth.eu>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Gr?gory Hermant <gregory.hermant@calao-systems.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
---
v2:
update against new common init
we must use it as we can detect the cpu type only after mapping
the system controler
Best Regards,
J.
arch/arm/mach-at91/Makefile | 4 +-
arch/arm/mach-at91/board-usb-a9260.c | 236 --------------------
.../{board-usb-a9263.c => board-usb-a926x.c} | 56 ++++-
arch/arm/mach-at91/soc.c | 16 +-
arch/arm/mach-at91/soc.h | 7 +-
5 files changed, 65 insertions(+), 254 deletions(-)
delete mode 100644 arch/arm/mach-at91/board-usb-a9260.c
rename arch/arm/mach-at91/{board-usb-a9263.c => board-usb-a926x.c} (85%)
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index eeb5287..9cac68d 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -42,7 +42,7 @@ obj-$(CONFIG_MACH_ECO920) += board-eco920.o
obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
obj-$(CONFIG_MACH_CAM60) += board-cam60.o
obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
-obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o
+obj-$(CONFIG_MACH_USB_A9260) += board-usb-a926x.o
obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o
obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o
obj-$(CONFIG_MACH_CPU9260) += board-cpu9krea.o
@@ -54,7 +54,7 @@ obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o
# AT91SAM9263 board-specific support
obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
-obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o
+obj-$(CONFIG_MACH_USB_A9263) += board-usb-a926x.o
obj-$(CONFIG_MACH_NEOCORE926) += board-neocore926.o
# AT91SAM9RL board-specific support
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
deleted file mode 100644
index 7cc63c8..0000000
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/board-usb-a9260.c
- *
- * Copyright (C) 2005 SAN People
- * Copyright (C) 2006 Atmel
- * Copyright (C) 2007 Calao-systems
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/gpio_keys.h>
-#include <linux/input.h>
-#include <linux/clk.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/board.h>
-#include <mach/gpio.h>
-#include <mach/at91sam9_smc.h>
-#include <mach/at91_shdwc.h>
-
-#include "sam9_smc.h"
-#include "generic.h"
-
-
-static void __init ek_map_io(void)
-{
- /* Initialize processor: 12.000 MHz crystal */
- at91_initialize(12000000);
-
- /* DBGU on ttyS0. (Rx & Tx only) */
- at91_register_uart(0, 0, 0);
-
- /* set serial console to ttyS0 (ie, DBGU) */
- at91_set_serial_console(0);
-}
-
-static void __init ek_init_irq(void)
-{
- at91_init_interrupts(NULL);
-}
-
-
-/*
- * USB Host port
- */
-static struct at91_usbh_data __initdata ek_usbh_data = {
- .ports = 2,
-};
-
-/*
- * USB Device port
- */
-static struct at91_udc_data __initdata ek_udc_data = {
- .vbus_pin = AT91_PIN_PC5,
- .pullup_pin = 0, /* pull-up driven by UDC */
-};
-
-/*
- * MACB Ethernet device
- */
-static struct at91_eth_data __initdata ek_macb_data = {
- .phy_irq_pin = AT91_PIN_PA31,
- .is_rmii = 1,
-};
-
-/*
- * NAND flash
- */
-static struct mtd_partition __initdata ek_nand_partition[] = {
- {
- .name = "Uboot & Kernel",
- .offset = 0,
- .size = SZ_16M,
- },
- {
- .name = "Root FS",
- .offset = MTDPART_OFS_NXTBLK,
- .size = 120 * SZ_1M,
- },
- {
- .name = "FS",
- .offset = MTDPART_OFS_NXTBLK,
- .size = 120 * SZ_1M,
- }
-};
-
-static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
-{
- *num_partitions = ARRAY_SIZE(ek_nand_partition);
- return ek_nand_partition;
-}
-
-static struct atmel_nand_data __initdata ek_nand_data = {
- .ale = 21,
- .cle = 22,
-// .det_pin = ... not connected
- .rdy_pin = AT91_PIN_PC13,
- .enable_pin = AT91_PIN_PC14,
- .partition_info = nand_partitions,
-};
-
-static struct sam9_smc_config __initdata ek_nand_smc_config = {
- .ncs_read_setup = 0,
- .nrd_setup = 1,
- .ncs_write_setup = 0,
- .nwe_setup = 1,
-
- .ncs_read_pulse = 3,
- .nrd_pulse = 3,
- .ncs_write_pulse = 3,
- .nwe_pulse = 3,
-
- .read_cycle = 5,
- .write_cycle = 5,
-
- .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
- .tdf_cycles = 2,
-};
-
-static void __init ek_add_device_nand(void)
-{
- /* configure chip-select 3 (NAND) */
- sam9_smc_configure(3, &ek_nand_smc_config);
-
- at91_add_device_nand(&ek_nand_data);
-}
-
-/*
- * GPIO Buttons
- */
-
-#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
-static struct gpio_keys_button ek_buttons[] = {
- { /* USER PUSH BUTTON */
- .code = KEY_ENTER,
- .gpio = AT91_PIN_PB10,
- .active_low = 1,
- .desc = "user_pb",
- .wakeup = 1,
- }
-};
-
-static struct gpio_keys_platform_data ek_button_data = {
- .buttons = ek_buttons,
- .nbuttons = ARRAY_SIZE(ek_buttons),
-};
-
-static struct platform_device ek_button_device = {
- .name = "gpio-keys",
- .id = -1,
- .num_resources = 0,
- .dev = {
- .platform_data = &ek_button_data,
- }
-};
-
-static void __init ek_add_device_buttons(void)
-{
- at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
- at91_set_deglitch(AT91_PIN_PB10, 1);
-
- platform_device_register(&ek_button_device);
-}
-#else
-static void __init ek_add_device_buttons(void) {}
-#endif
-
-/*
- * LEDs
- */
-static struct gpio_led ek_leds[] = {
- { /* user_led (green) */
- .name = "user_led",
- .gpio = AT91_PIN_PB21,
- .active_low = 0,
- .default_trigger = "heartbeat",
- }
-};
-
-static void __init ek_board_init(void)
-{
- /* Serial */
- at91_add_device_serial();
- /* USB Host */
- at91_add_device_usbh(&ek_usbh_data);
- /* USB Device */
- at91_add_device_udc(&ek_udc_data);
- /* NAND */
- ek_add_device_nand();
- /* I2C */
- at91_add_device_i2c(NULL, 0);
- /* Ethernet */
- at91_add_device_eth(&ek_macb_data);
- /* Push Buttons */
- ek_add_device_buttons();
- /* LEDs */
- at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
- /* shutdown controller, wakeup button (5 msec low) */
- at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
- | AT91_SHDW_RTTWKEN);
-}
-
-MACHINE_START(USB_A9260, "CALAO USB_A9260")
- /* Maintainer: calao-systems */
- .boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
- .map_io = ek_map_io,
- .init_irq = ek_init_irq,
- .init_machine = ek_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a926x.c
similarity index 85%
rename from arch/arm/mach-at91/board-usb-a9263.c
rename to arch/arm/mach-at91/board-usb-a926x.c
index 1fac2fe..a1cb555 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-at91/board-usb-a9263.c
+ * linux/arch/arm/mach-at91/board-usb-a926x.c
*
* Copyright (C) 2005 SAN People
* Copyright (C) 2007 Atmel Corporation.
@@ -80,6 +80,14 @@ static struct at91_udc_data __initdata ek_udc_data = {
.pullup_pin = 0, /* pull-up driven by UDC */
};
+void ek_add_device_udc(void)
+{
+ if (machine_is_usb_a9260())
+ ek_udc_data.vbus_pin = AT91_PIN_PC5;
+
+ at91_add_device_udc(&ek_udc_data);
+}
+
/*
* SPI devices.
*/
@@ -94,6 +102,12 @@ static struct spi_board_info ek_spi_devices[] = {
#endif
};
+void ek_add_device_spi(void)
+{
+ if (machine_is_usb_a9263())
+ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
+}
+
/*
* MACB Ethernet device
*/
@@ -102,12 +116,20 @@ static struct at91_eth_data __initdata ek_macb_data = {
.is_rmii = 1,
};
+void ek_add_device_eth(void)
+{
+ if (machine_is_usb_a9260())
+ ek_macb_data.phy_irq_pin = AT91_PIN_PA31;
+
+ at91_add_device_eth(&ek_macb_data);
+}
+
/*
* NAND flash
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
- .name = "Linux Kernel",
+ .name = "Uboot & Kernel",
.offset = 0,
.size = SZ_16M,
},
@@ -158,6 +180,11 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
static void __init ek_add_device_nand(void)
{
+ if (machine_is_usb_a9260()) {
+ ek_nand_data.rdy_pin = AT91_PIN_PC13;
+ ek_nand_data.enable_pin = AT91_PIN_PC14;
+ }
+
/* configure chip-select 3 (NAND) */
sam9_smc_configure(3, &ek_nand_smc_config);
@@ -216,6 +243,14 @@ static struct gpio_led ek_leds[] = {
}
};
+void ek_add_device_leds(void)
+{
+ if (machine_is_usb_a9260())
+ ek_leds[0].active_low = 0;
+
+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
+}
+
static void __init ek_board_init(void)
{
@@ -224,11 +259,11 @@ static void __init ek_board_init(void)
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
- at91_add_device_udc(&ek_udc_data);
+ ek_add_device_udc();
/* SPI */
- at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
+ ek_add_device_spi();
/* Ethernet */
- at91_add_device_eth(&ek_macb_data);
+ ek_add_device_eth();
/* NAND */
ek_add_device_nand();
/* I2C */
@@ -236,7 +271,7 @@ static void __init ek_board_init(void)
/* Push Buttons */
ek_add_device_buttons();
/* LEDs */
- at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
+ ek_add_device_leds();
/* shutdown controller, wakeup button (5 msec low) */
at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
| AT91_SHDW_RTTWKEN);
@@ -250,3 +285,12 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263")
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
MACHINE_END
+
+MACHINE_START(USB_A9260, "CALAO USB_A9260")
+ /* Maintainer: calao-systems */
+ .boot_params = AT91_SDRAM_BASE + 0x100,
+ .timer = &at91sam926x_timer,
+ .map_io = ek_map_io,
+ .init_irq = ek_init_irq,
+ .init_machine = ek_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
index f0a1661..6cf7f99 100644
--- a/arch/arm/mach-at91/soc.c
+++ b/arch/arm/mach-at91/soc.c
@@ -44,7 +44,11 @@ void __init at91_initialize(unsigned long main_clock)
/* Map peripherals */
iotable_init(&at91_io_desc, 1);
- if (cpu_is_at91rm9200())
+ if (cpu_is_at572d940hf())
+ current_soc = at572d940hf_soc;
+ else if (cpu_is_at91cap9())
+ current_soc = at91cap9_soc;
+ else if (cpu_is_at91rm9200())
current_soc = at91rm9200_soc;
else if (cpu_is_at91sam9260())
current_soc = at91sam9260_soc;
@@ -52,14 +56,12 @@ void __init at91_initialize(unsigned long main_clock)
current_soc = at91sam9261_soc;
else if (cpu_is_at91sam9263())
current_soc = at91sam9263_soc;
- else if (cpu_is_at91sam9rl())
- current_soc = at91sam9rl_soc;
else if (cpu_is_at91sam9g45())
current_soc = at91sam9g45_soc;
- else if (cpu_is_at91cap9())
- current_soc = at91cap9_soc;
- else if (cpu_is_at572d940hf())
- current_soc = at572d940hf_soc;
+ else if (cpu_is_at91sam9rl())
+ current_soc = at91sam9rl_soc;
+ else if (cpu_is_at91sam9x5())
+ current_soc = at91sam9x5_soc;
else
panic("Impossible to detect the CPU type");
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 9aac491..a097032 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -13,11 +13,12 @@ struct at91_soc {
void (*init)(unsigned long main_clock);
};
+extern struct at91_soc at572d940hf_soc;
+extern struct at91_soc at91cap9_soc;
extern struct at91_soc at91rm9200_soc;
extern struct at91_soc at91sam9260_soc;
extern struct at91_soc at91sam9261_soc;
extern struct at91_soc at91sam9263_soc;
-extern struct at91_soc at91sam9rl_soc;
extern struct at91_soc at91sam9g45_soc;
-extern struct at91_soc at91cap9_soc;
-extern struct at91_soc at572d940hf_soc;
+extern struct at91_soc at91sam9rl_soc;
+extern struct at91_soc at91sam9x5_soc;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (3 preceding siblings ...)
2011-04-25 18:31 ` [PATCH 04/14 v2] at91: merge board usb-a9260 and usb-a9263 together Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 22:08 ` Ryan Mallon
2011-04-25 18:31 ` [PATCH 06/14 v3] at91: switch to CLKDEV_LOOKUP Jean-Christophe PLAGNIOL-VILLARD
` (9 subsequent siblings)
14 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
instead of reading the registers everytime
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/at91rm9200.c | 8 -
arch/arm/mach-at91/at91sam9260.c | 1 +
arch/arm/mach-at91/at91sam9rl.c | 1 +
arch/arm/mach-at91/cpu.h | 181 +++++++++++++++++
arch/arm/mach-at91/include/mach/cpu.h | 355 ++++++++++++++-------------------
arch/arm/mach-at91/soc.c | 66 +++++-
6 files changed, 391 insertions(+), 221 deletions(-)
create mode 100644 arch/arm/mach-at91/cpu.h
rewrite arch/arm/mach-at91/include/mach/cpu.h (71%)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index abc4cc9..afb29b9 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -263,14 +263,6 @@ static void at91rm9200_reset(void)
at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
}
-int rm9200_type;
-EXPORT_SYMBOL(rm9200_type);
-
-void __init at91rm9200_set_type(int type)
-{
- rm9200_type = type;
-}
-
/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 2838921..7bbdd2f 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -17,6 +17,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/cpu.h>
+#include <mach/at91_dbgu.h>
#include <mach/at91sam9260.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 53287d5..19e2e5a 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -16,6 +16,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/cpu.h>
+#include <mach/at91_dbgu.h>
#include <mach/at91sam9rl.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
diff --git a/arch/arm/mach-at91/cpu.h b/arch/arm/mach-at91/cpu.h
new file mode 100644
index 0000000..77ce520
--- /dev/null
+++ b/arch/arm/mach-at91/cpu.h
@@ -0,0 +1,181 @@
+/*
+ * arch/arm/mach-at91/cpu.h
+ *
+ * Copyright (C) 2006 SAN People
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_CPU_H
+#define __ASM_ARCH_CPU_H
+
+#include <mach/hardware.h>
+#include <mach/at91_dbgu.h>
+
+#define ARCH_ID_AT91RM9200 0x09290780
+#define ARCH_ID_AT91SAM9260 0x019803a0
+#define ARCH_ID_AT91SAM9261 0x019703a0
+#define ARCH_ID_AT91SAM9263 0x019607a0
+#define ARCH_ID_AT91SAM9G10 0x019903a0
+#define ARCH_ID_AT91SAM9G20 0x019905a0
+#define ARCH_ID_AT91SAM9RL64 0x019b03a0
+#define ARCH_ID_AT91SAM9G45 0x819b05a0
+#define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
+#define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
+#define ARCH_ID_AT91SAM9X5 0x819a05a0
+#define ARCH_ID_AT91CAP9 0x039A03A0
+
+#define ARCH_ID_AT91SAM9XE128 0x329973a0
+#define ARCH_ID_AT91SAM9XE256 0x329a93a0
+#define ARCH_ID_AT91SAM9XE512 0x329aa3a0
+
+#define ARCH_ID_AT572D940HF 0x0e0303e0
+
+#define ARCH_ID_AT91M40800 0x14080044
+#define ARCH_ID_AT91R40807 0x44080746
+#define ARCH_ID_AT91M40807 0x14080745
+#define ARCH_ID_AT91R40008 0x44000840
+
+static inline unsigned long at91_cpu_identify(void)
+{
+ return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
+}
+
+static inline unsigned long at91_cpu_fully_identify(void)
+{
+ return at91_sys_read(AT91_DBGU_CIDR);
+}
+
+#define ARCH_EXID_AT91SAM9M11 0x00000001
+#define ARCH_EXID_AT91SAM9M10 0x00000002
+#define ARCH_EXID_AT91SAM9G46 0x00000003
+#define ARCH_EXID_AT91SAM9G45 0x00000004
+
+#define ARCH_EXID_AT91SAM9G15 0x00000000
+#define ARCH_EXID_AT91SAM9G35 0x00000001
+#define ARCH_EXID_AT91SAM9X35 0x00000002
+#define ARCH_EXID_AT91SAM9G25 0x00000003
+#define ARCH_EXID_AT91SAM9X25 0x00000004
+
+static inline unsigned long at91_exid_identify(void)
+{
+ return at91_sys_read(AT91_DBGU_EXID);
+}
+
+
+#define ARCH_FAMILY_AT91X92 0x09200000
+#define ARCH_FAMILY_AT91SAM9 0x01900000
+#define ARCH_FAMILY_AT91SAM9XE 0x02900000
+
+static inline unsigned long at91_arch_identify(void)
+{
+ return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
+}
+
+#ifdef CONFIG_ARCH_AT91CAP9
+#include <mach/at91_pmc.h>
+
+#define ARCH_REVISION_CAP9_B 0x399
+#define ARCH_REVISION_CAP9_C 0x601
+
+static inline unsigned long at91cap9_rev_identify(void)
+{
+ return (at91_sys_read(AT91_PMC_VER));
+}
+#endif
+
+#ifdef CONFIG_ARCH_AT91RM9200
+#define __cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
+#else
+#define __cpu_is_at91rm9200() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9260
+#define __cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
+#define __cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || __cpu_is_at91sam9xe())
+#else
+#define __cpu_is_at91sam9xe() (0)
+#define __cpu_is_at91sam9260() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9G20
+#define __cpu_is_at91sam9g20() (at91_cpu_identify() == ARCH_ID_AT91SAM9G20)
+#else
+#define __cpu_is_at91sam9g20() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9261
+#define __cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261)
+#else
+#define __cpu_is_at91sam9261() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9G10
+#define __cpu_is_at91sam9g10() ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10)
+#else
+#define __cpu_is_at91sam9g10() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9263
+#define __cpu_is_at91sam9263() (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
+#else
+#define __cpu_is_at91sam9263() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9RL
+#define __cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
+#else
+#define __cpu_is_at91sam9rl() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9G45
+#define __cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
+#define __cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
+#define __cpu_is_at91sam9m10() (at91_exid_identify() == ARCH_EXID_AT91SAM9M10)
+#define __cpu_is_at91sam9g46() (at91_exid_identify() == ARCH_EXID_AT91SAM9G46)
+#define __cpu_is_at91sam9m11() (at91_exid_identify() == ARCH_EXID_AT91SAM9M11)
+#else
+#define __cpu_is_at91sam9g45() (0)
+#define __cpu_is_at91sam9g45es() (0)
+#define __cpu_is_at91sam9m10() (0)
+#define __cpu_is_at91sam9g46() (0)
+#define __cpu_is_at91sam9m11() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9X5
+#define __cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5)
+#define __cpu_is_at91sam9g15() (at91_exid_identify() == ARCH_EXID_AT91SAM9G15)
+#define __cpu_is_at91sam9g35() (at91_exid_identify() == ARCH_EXID_AT91SAM9G35)
+#define __cpu_is_at91sam9x35() (at91_exid_identify() == ARCH_EXID_AT91SAM9X35)
+#define __cpu_is_at91sam9g25() (at91_exid_identify() == ARCH_EXID_AT91SAM9G25)
+#define __cpu_is_at91sam9x25() (at91_exid_identify() == ARCH_EXID_AT91SAM9X25)
+#else
+#define __cpu_is_at91sam9x5() (0)
+#define __cpu_is_at91sam9g15() (0)
+#define __cpu_is_at91sam9g35() (0)
+#define __cpu_is_at91sam9x35() (0)
+#define __cpu_is_at91sam9g25() (0)
+#define __cpu_is_at91sam9x25() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91CAP9
+#define __cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
+#define __cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
+#define __cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
+#else
+#define __cpu_is_at91cap9() (0)
+#define __cpu_is_at91cap9_revB() (0)
+#define __cpu_is_at91cap9_revC() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT572D940HF
+#define __cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF)
+#else
+#define __cpu_is_at572d940hf() (0)
+#endif
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
dissimilarity index 71%
index ab00372..ad9d70f 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -1,203 +1,152 @@
-/*
- * arch/arm/mach-at91/include/mach/cpu.h
- *
- * Copyright (C) 2006 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#ifndef __ASM_ARCH_CPU_H
-#define __ASM_ARCH_CPU_H
-
-#include <mach/hardware.h>
-#include <mach/at91_dbgu.h>
-
-
-#define ARCH_ID_AT91RM9200 0x09290780
-#define ARCH_ID_AT91SAM9260 0x019803a0
-#define ARCH_ID_AT91SAM9261 0x019703a0
-#define ARCH_ID_AT91SAM9263 0x019607a0
-#define ARCH_ID_AT91SAM9G10 0x019903a0
-#define ARCH_ID_AT91SAM9G20 0x019905a0
-#define ARCH_ID_AT91SAM9RL64 0x019b03a0
-#define ARCH_ID_AT91SAM9G45 0x819b05a0
-#define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
-#define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
-#define ARCH_ID_AT91SAM9X5 0x819a05a0
-#define ARCH_ID_AT91CAP9 0x039A03A0
-
-#define ARCH_ID_AT91SAM9XE128 0x329973a0
-#define ARCH_ID_AT91SAM9XE256 0x329a93a0
-#define ARCH_ID_AT91SAM9XE512 0x329aa3a0
-
-#define ARCH_ID_AT572D940HF 0x0e0303e0
-
-#define ARCH_ID_AT91M40800 0x14080044
-#define ARCH_ID_AT91R40807 0x44080746
-#define ARCH_ID_AT91M40807 0x14080745
-#define ARCH_ID_AT91R40008 0x44000840
-
-static inline unsigned long at91_cpu_identify(void)
-{
- return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
-}
-
-static inline unsigned long at91_cpu_fully_identify(void)
-{
- return at91_sys_read(AT91_DBGU_CIDR);
-}
-
-#define ARCH_EXID_AT91SAM9M11 0x00000001
-#define ARCH_EXID_AT91SAM9M10 0x00000002
-#define ARCH_EXID_AT91SAM9G46 0x00000003
-#define ARCH_EXID_AT91SAM9G45 0x00000004
-
-#define ARCH_EXID_AT91SAM9G15 0x00000000
-#define ARCH_EXID_AT91SAM9G35 0x00000001
-#define ARCH_EXID_AT91SAM9X35 0x00000002
-#define ARCH_EXID_AT91SAM9G25 0x00000003
-#define ARCH_EXID_AT91SAM9X25 0x00000004
-
-static inline unsigned long at91_exid_identify(void)
-{
- return at91_sys_read(AT91_DBGU_EXID);
-}
-
-
-#define ARCH_FAMILY_AT91X92 0x09200000
-#define ARCH_FAMILY_AT91SAM9 0x01900000
-#define ARCH_FAMILY_AT91SAM9XE 0x02900000
-
-static inline unsigned long at91_arch_identify(void)
-{
- return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
-}
-
-#ifdef CONFIG_ARCH_AT91CAP9
-#include <mach/at91_pmc.h>
-
-#define ARCH_REVISION_CAP9_B 0x399
-#define ARCH_REVISION_CAP9_C 0x601
-
-static inline unsigned long at91cap9_rev_identify(void)
-{
- return (at91_sys_read(AT91_PMC_VER));
-}
-#endif
-
-#ifdef CONFIG_ARCH_AT91RM9200
-extern int rm9200_type;
-#define ARCH_REVISON_9200_BGA (0 << 0)
-#define ARCH_REVISON_9200_PQFP (1 << 0)
-#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
-#define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp())
-#define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP)
-#else
-#define cpu_is_at91rm9200() (0)
-#define cpu_is_at91rm9200_bga() (0)
-#define cpu_is_at91rm9200_pqfp() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9260
-#define cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
-#define cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
-#else
-#define cpu_is_at91sam9xe() (0)
-#define cpu_is_at91sam9260() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9G20
-#define cpu_is_at91sam9g20() (at91_cpu_identify() == ARCH_ID_AT91SAM9G20)
-#else
-#define cpu_is_at91sam9g20() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9261
-#define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261)
-#else
-#define cpu_is_at91sam9261() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9G10
-#define cpu_is_at91sam9g10() ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10)
-#else
-#define cpu_is_at91sam9g10() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9263
-#define cpu_is_at91sam9263() (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
-#else
-#define cpu_is_at91sam9263() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9RL
-#define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
-#else
-#define cpu_is_at91sam9rl() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9G45
-#define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
-#define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
-#define cpu_is_at91sam9m10() (cpu_is_at91sam9g45() && \
- (at91_exid_identify() == ARCH_EXID_AT91SAM9M10))
-#define cpu_is_at91sam9m46() (cpu_is_at91sam9g45() && \
- (at91_exid_identify() == ARCH_EXID_AT91SAM9G46))
-#define cpu_is_at91sam9m11() (cpu_is_at91sam9g45() && \
- (at91_exid_identify() == ARCH_EXID_AT91SAM9M11))
-#else
-#define cpu_is_at91sam9g45() (0)
-#define cpu_is_at91sam9g45es() (0)
-#define cpu_is_at91sam9m10() (0)
-#define cpu_is_at91sam9g46() (0)
-#define cpu_is_at91sam9m11() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9X5
-#define cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5)
-#define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \
- (at91_exid_identify() == ARCH_EXID_AT91SAM9G15))
-#define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \
- (at91_exid_identify() == ARCH_EXID_AT91SAM9G35))
-#define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \
- (at91_exid_identify() == ARCH_EXID_AT91SAM9X35))
-#define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \
- (at91_exid_identify() == ARCH_EXID_AT91SAM9G25))
-#define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \
- (at91_exid_identify() == ARCH_EXID_AT91SAM9X25))
-#else
-#define cpu_is_at91sam9x5() (0)
-#define cpu_is_at91sam9g15() (0)
-#define cpu_is_at91sam9g35() (0)
-#define cpu_is_at91sam9x35() (0)
-#define cpu_is_at91sam9g25() (0)
-#define cpu_is_at91sam9x25() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91CAP9
-#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
-#define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
-#define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
-#else
-#define cpu_is_at91cap9() (0)
-#define cpu_is_at91cap9_revB() (0)
-#define cpu_is_at91cap9_revC() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT572D940HF
-#define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF)
-#else
-#define cpu_is_at572d940hf() (0)
-#endif
-
-/*
- * Since this is ARM, we will never run on any AVR32 CPU. But these
- * definitions may reduce clutter in common drivers.
- */
-#define cpu_is_at32ap7000() (0)
-
-#endif
+/*
+ * arch/arm/mach-at91/include/mach/cpu.h
+ *
+ * Copyright (C) 2006 SAN People
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __MACH_CPU_H__
+#define __MACH_CPU_H__
+
+struct at91_cpu_id {
+ u8 is_at572d940hf;
+#define AT91_CAP9 (1 << 0)
+#define AT91_CAP9_REV_B (1 << 1)
+#define AT91_CAP9_REV_C (1 << 2)
+ u8 is_at91cap9;
+#define ARCH_REVISON_9200 (1 << 0)
+#define ARCH_REVISON_9200_BGA (0 << 1)
+#define ARCH_REVISON_9200_PQFP (1 << 1)
+ u8 is_at91rm9200;
+#define AT91_SAM9260 (1 << 0)
+#define AT91_SAM9XE (1 << 1)
+ u8 is_at91sam9260;
+ u8 is_at91sam9261;
+ u8 is_at91sam9263;
+ u8 is_at91sam9g10;
+ u8 is_at91sam9g20;
+#define AT91_SAM9G45 (1 << 0)
+#define AT91_SAM9G45ES (1 << 1)
+#define AT91_SAM9M10 (1 << 2)
+#define AT91_SAM9G46 (1 << 3)
+#define AT91_SAM9M11 (1 << 4)
+ u8 is_at91sam9g45;
+ u8 is_at91sam9rl;
+#define AT91_SAM9X5 (1 << 0)
+#define AT91_SAM9G15 (1 << 1)
+#define AT91_SAM9G35 (1 << 2)
+#define AT91_SAM9X35 (1 << 3)
+#define AT91_SAM9G25 (1 << 4)
+#define AT91_SAM9X25 (1 << 5)
+ u8 is_at91sam9x5;
+};
+
+extern struct at91_cpu_id cpu_id;
+
+#ifdef CONFIG_ARCH_AT91RM9200
+#define cpu_is_at91rm9200() (cpu_id.is_at91rm9200)
+#define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp())
+#define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && cpu_id.is_at91rm9200 & ARCH_REVISON_9200_PQFP)
+#else
+#define cpu_is_at91rm9200() (0)
+#define cpu_is_at91rm9200_bga() (0)
+#define cpu_is_at91rm9200_pqfp() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9260
+#define cpu_is_at91sam9xe() (cpu_id.is_at91sam9260 & AT91_SAM9XE)
+#define cpu_is_at91sam9260() (cpu_id.is_at91sam9260)
+#else
+#define cpu_is_at91sam9xe() (0)
+#define cpu_is_at91sam9260() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9G20
+#define cpu_is_at91sam9g20() (cpu_id.is_at91sam9g20)
+#else
+#define cpu_is_at91sam9g20() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9261
+#define cpu_is_at91sam9261() (cpu_id.is_at91sam9261)
+#else
+#define cpu_is_at91sam9261() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9G10
+#define cpu_is_at91sam9g10() (cpu_id.is_at91sam9g10)
+#else
+#define cpu_is_at91sam9g10() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9263
+#define cpu_is_at91sam9263() (cpu_id.is_at91sam9263)
+#else
+#define cpu_is_at91sam9263() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9RL
+#define cpu_is_at91sam9rl() (cpu_id.is_at91sam9rl)
+#else
+#define cpu_is_at91sam9rl() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9G45
+#define cpu_is_at91sam9g45() (cpu_id.is_at91sam9g45 & AT91_SAM9G45)
+#define cpu_is_at91sam9g45es() (cpu_id.is_at91sam9g45 & AT91_SAM9G45ES)
+#define cpu_is_at91sam9m10() (cpu_id.is_at91sam9g45 & AT91_SAM9M10)
+#define cpu_is_at91sam9g46() (cpu_id.is_at91sam9g45 & AT91_SAM9G46)
+#define cpu_is_at91sam9m11() (cpu_id.is_at91sam9g45 & AT91_SAM9M11)
+#else
+#define cpu_is_at91sam9g45() (0)
+#define cpu_is_at91sam9g45es() (0)
+#define cpu_is_at91sam9m10() (0)
+#define cpu_is_at91sam9g46() (0)
+#define cpu_is_at91sam9m11() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9X5
+#define cpu_is_at91sam9x5() (cpu_id.is_at91sam9x5 & AT91_SAM9X5)
+#define cpu_is_at91sam9g15() (cpu_id.is_at91sam9x5 & AT91_SAM9G15)
+#define cpu_is_at91sam9g35() (cpu_id.is_at91sam9x5 & AT91_SAM9G35)
+#define cpu_is_at91sam9x35() (cpu_id.is_at91sam9x5 & AT91_SAM9X35)
+#define cpu_is_at91sam9g25() (cpu_id.is_at91sam9x5 & AT91_SAM9G25)
+#define cpu_is_at91sam9x25() (cpu_id.is_at91sam9x5 & AT91_SAM9X25)
+#else
+#define cpu_is_at91sam9x5() (0)
+#define cpu_is_at91sam9g15() (0)
+#define cpu_is_at91sam9g35() (0)
+#define cpu_is_at91sam9x35() (0)
+#define cpu_is_at91sam9g25() (0)
+#define cpu_is_at91sam9x25() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91CAP9
+#define cpu_is_at91cap9() (cpu_id.is_at91cap9 & AT91_CAP9)
+#define cpu_is_at91cap9_revB() (cpu_id.is_at91cap9 & AT91_CAP9_REV_B)
+#define cpu_is_at91cap9_revC() (cpu_id.is_at91cap9 & AT91_CAP9_REV_C)
+#else
+#define cpu_is_at91cap9() (0)
+#define cpu_is_at91cap9_revB() (0)
+#define cpu_is_at91cap9_revC() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT572D940HF
+#define cpu_is_at572d940hf() (cpu_id.is_at572d940hf)
+#else
+#define cpu_is_at572d940hf() (0)
+#endif
+
+/*
+ * Since this is ARM, we will never run on any AVR32 CPU. But these
+ * definitions may reduce clutter in common drivers.
+ */
+#define cpu_is_at32ap7000() (0)
+
+#endif /* __MACH_CPU_H__ */
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
index 6cf7f99..6fe205f2 100644
--- a/arch/arm/mach-at91/soc.c
+++ b/arch/arm/mach-at91/soc.c
@@ -15,11 +15,23 @@
#include <mach/hardware.h>
#include <mach/cpu.h>
+#include "cpu.h"
#include "soc.h"
#include "generic.h"
static struct at91_soc __initdata current_soc;
+struct at91_cpu_id cpu_id;
+EXPORT_SYMBOL(cpu_id);
+
+void __init at91rm9200_set_type(int type)
+{
+ if (type == ARCH_REVISON_9200_PQFP)
+ cpu_id.is_at91rm9200 |= ARCH_REVISON_9200_PQFP;
+ else
+ cpu_id.is_at91rm9200 &= ~ARCH_REVISON_9200_PQFP;
+}
+
void __init at91_init_interrupts(unsigned int *priority)
{
if (!priority)
@@ -44,26 +56,60 @@ void __init at91_initialize(unsigned long main_clock)
/* Map peripherals */
iotable_init(&at91_io_desc, 1);
- if (cpu_is_at572d940hf())
+ if (__cpu_is_at572d940hf()) {
+ cpu_id.is_at572d940hf = 1;
current_soc = at572d940hf_soc;
- else if (cpu_is_at91cap9())
+ } else if (__cpu_is_at91cap9()) {
+ cpu_id.is_at91cap9 = AT91_CAP9;
+ if (__cpu_is_at91cap9_revB())
+ cpu_id.is_at91cap9 |= AT91_CAP9_REV_B;
+ else if (__cpu_is_at91cap9_revC())
+ cpu_id.is_at91cap9 |= AT91_CAP9_REV_C;
current_soc = at91cap9_soc;
- else if (cpu_is_at91rm9200())
+ } else if (__cpu_is_at91rm9200()) {
+ cpu_id.is_at91rm9200 = 1;
current_soc = at91rm9200_soc;
- else if (cpu_is_at91sam9260())
+ } else if (__cpu_is_at91sam9260()) {
+ cpu_id.is_at91sam9260 = AT91_SAM9260;
+ if (__cpu_is_at91sam9xe())
+ cpu_id.is_at91sam9260 |= AT91_SAM9XE;
current_soc = at91sam9260_soc;
- else if (cpu_is_at91sam9261())
+ } else if (__cpu_is_at91sam9261()) {
+ cpu_id.is_at91sam9261 = 1;
current_soc = at91sam9261_soc;
- else if (cpu_is_at91sam9263())
+ } else if (__cpu_is_at91sam9263()) {
+ cpu_id.is_at91sam9263 = 1;
current_soc = at91sam9263_soc;
- else if (cpu_is_at91sam9g45())
+ } else if (__cpu_is_at91sam9g45()) {
+ cpu_id.is_at91sam9g45 = AT91_SAM9G45;
+ if (__cpu_is_at91sam9g45es())
+ cpu_id.is_at91sam9g45 |= AT91_SAM9G45ES;
+ else if (__cpu_is_at91sam9m10())
+ cpu_id.is_at91sam9g45 |= AT91_SAM9M10;
+ else if (__cpu_is_at91sam9g46())
+ cpu_id.is_at91sam9g45 |= AT91_SAM9G46;
+ else if (__cpu_is_at91sam9m11())
+ cpu_id.is_at91sam9g45 |= AT91_SAM9M11;
current_soc = at91sam9g45_soc;
- else if (cpu_is_at91sam9rl())
+ } else if (__cpu_is_at91sam9rl()) {
+ cpu_id.is_at91sam9rl = 1;
current_soc = at91sam9rl_soc;
- else if (cpu_is_at91sam9x5())
+ } else if (__cpu_is_at91sam9x5()) {
+ cpu_id.is_at91sam9x5 = AT91_SAM9X5;
+ if (__cpu_is_at91sam9g15())
+ cpu_id.is_at91sam9x5 |= AT91_SAM9G15;
+ else if (__cpu_is_at91sam9g35())
+ cpu_id.is_at91sam9x5 |= AT91_SAM9G35;
+ else if (__cpu_is_at91sam9x35())
+ cpu_id.is_at91sam9x5 |= AT91_SAM9X35;
+ else if (__cpu_is_at91sam9g25())
+ cpu_id.is_at91sam9x5 |= AT91_SAM9G25;
+ else if (__cpu_is_at91sam9x25())
+ cpu_id.is_at91sam9x5 |= AT91_SAM9X25;
current_soc = at91sam9x5_soc;
- else
+ } else {
panic("Impossible to detect the CPU type");
+ }
pr_info("AT91: detected soc: %s\n", current_soc.name);
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-25 18:31 ` [PATCH 05/14] at91: use structure to store the current soc Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 22:08 ` Ryan Mallon
2011-04-26 4:21 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-25 22:08 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 06:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> instead of reading the registers everytime
Hi Jean, a couple of comments below.
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
> ---
> arch/arm/mach-at91/at91rm9200.c | 8 -
> arch/arm/mach-at91/at91sam9260.c | 1 +
> arch/arm/mach-at91/at91sam9rl.c | 1 +
> arch/arm/mach-at91/cpu.h | 181 +++++++++++++++++
> arch/arm/mach-at91/include/mach/cpu.h | 355 ++++++++++++++-------------------
> arch/arm/mach-at91/soc.c | 66 +++++-
> 6 files changed, 391 insertions(+), 221 deletions(-)
> create mode 100644 arch/arm/mach-at91/cpu.h
> rewrite arch/arm/mach-at91/include/mach/cpu.h (71%)
>
> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> index abc4cc9..afb29b9 100644
> --- a/arch/arm/mach-at91/at91rm9200.c
> +++ b/arch/arm/mach-at91/at91rm9200.c
> @@ -263,14 +263,6 @@ static void at91rm9200_reset(void)
> at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
> }
>
> -int rm9200_type;
> -EXPORT_SYMBOL(rm9200_type);
> -
> -void __init at91rm9200_set_type(int type)
> -{
> - rm9200_type = type;
> -}
> -
This only got introduce a couple of patches ago. I'm aware its a
stop-gap solution, but is it possible to rework/reorder the patches so
that this doesn't need to be temporarily introduced?
<snip>
> +
> +#ifdef CONFIG_ARCH_AT91RM9200
> +#define __cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
> +#else
> +#define __cpu_is_at91rm9200() (0)
> +#endif
I haven't looked at the subsequent patches yet to see if this patch
simplifies things later but it seems that this just adds more lines of
code by having two copies of the each of the cpu_is_xxx macros (the
__cpu_is_xxx version which reads the register, and the cpu_is_xxx
version which reads the shadow value)?
What is the reasoning behind shadowing the cpu type rather than reading
the registers? The cpu detection macros are mostly used at
initialisation and device probe time, so they don't necessarily need to
be fast.
If this eventually reduces code size then I think it is useful, but
otherwise I'm not sure I see the point?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-25 22:08 ` Ryan Mallon
@ 2011-04-26 4:21 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-26 4:44 ` Ryan Mallon
2011-04-28 14:04 ` Andrew Victor
0 siblings, 2 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 4:21 UTC (permalink / raw)
To: linux-arm-kernel
On 10:08 Tue 26 Apr , Ryan Mallon wrote:
> On 04/26/2011 06:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > instead of reading the registers everytime
>
> Hi Jean, a couple of comments below.
>
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> > Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
> > ---
> > arch/arm/mach-at91/at91rm9200.c | 8 -
> > arch/arm/mach-at91/at91sam9260.c | 1 +
> > arch/arm/mach-at91/at91sam9rl.c | 1 +
> > arch/arm/mach-at91/cpu.h | 181 +++++++++++++++++
> > arch/arm/mach-at91/include/mach/cpu.h | 355 ++++++++++++++-------------------
> > arch/arm/mach-at91/soc.c | 66 +++++-
> > 6 files changed, 391 insertions(+), 221 deletions(-)
> > create mode 100644 arch/arm/mach-at91/cpu.h
> > rewrite arch/arm/mach-at91/include/mach/cpu.h (71%)
> >
> > diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> > index abc4cc9..afb29b9 100644
> > --- a/arch/arm/mach-at91/at91rm9200.c
> > +++ b/arch/arm/mach-at91/at91rm9200.c
> > @@ -263,14 +263,6 @@ static void at91rm9200_reset(void)
> > at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
> > }
> >
> > -int rm9200_type;
> > -EXPORT_SYMBOL(rm9200_type);
> > -
> > -void __init at91rm9200_set_type(int type)
> > -{
> > - rm9200_type = type;
> > -}
> > -
>
> This only got introduce a couple of patches ago. I'm aware its a
> stop-gap solution, but is it possible to rework/reorder the patches so
> that this doesn't need to be temporarily introduced?
the is to do not touch the other soc init api so I keep the changes local
and prepare the soc to have the same init API so we can factorize them
I prefer to do small changes to be able to bisect them if needed
>
> <snip>
>
> > +
> > +#ifdef CONFIG_ARCH_AT91RM9200
> > +#define __cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
> > +#else
> > +#define __cpu_is_at91rm9200() (0)
> > +#endif
>
> I haven't looked at the subsequent patches yet to see if this patch
> simplifies things later but it seems that this just adds more lines of
> code by having two copies of the each of the cpu_is_xxx macros (the
> __cpu_is_xxx version which reads the register, and the cpu_is_xxx
> version which reads the shadow value)?
>
> What is the reasoning behind shadowing the cpu type rather than reading
> the registers? The cpu detection macros are mostly used at
> initialisation and device probe time, so they don't necessarily need to
> be fast.
>
> If this eventually reduces code size then I think it is useful, but
> otherwise I'm not sure I see the point?
It's on purpose as the dbgu physical address is not at the same place
so read the other register really does not impact the chip but if we do it
later duting the boot or the life to the kernel it's an other story
so the split between __cpu_is and cpu_is is necessarly
all of this work is in preparation to allow multiple soc in the same kernel
that's also why I map the system controller the same way on all at91 arm9
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-26 4:21 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-26 4:44 ` Ryan Mallon
2011-04-26 6:42 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 14:04 ` Andrew Victor
1 sibling, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-26 4:44 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 04:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 10:08 Tue 26 Apr , Ryan Mallon wrote:
>> On 04/26/2011 06:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> instead of reading the registers everytime
>>
>> Hi Jean, a couple of comments below.
>>
>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
>>> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
>>> ---
>>> arch/arm/mach-at91/at91rm9200.c | 8 -
>>> arch/arm/mach-at91/at91sam9260.c | 1 +
>>> arch/arm/mach-at91/at91sam9rl.c | 1 +
>>> arch/arm/mach-at91/cpu.h | 181 +++++++++++++++++
>>> arch/arm/mach-at91/include/mach/cpu.h | 355 ++++++++++++++-------------------
>>> arch/arm/mach-at91/soc.c | 66 +++++-
>>> 6 files changed, 391 insertions(+), 221 deletions(-)
>>> create mode 100644 arch/arm/mach-at91/cpu.h
>>> rewrite arch/arm/mach-at91/include/mach/cpu.h (71%)
>>>
>>> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
>>> index abc4cc9..afb29b9 100644
>>> --- a/arch/arm/mach-at91/at91rm9200.c
>>> +++ b/arch/arm/mach-at91/at91rm9200.c
>>> @@ -263,14 +263,6 @@ static void at91rm9200_reset(void)
>>> at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
>>> }
>>>
>>> -int rm9200_type;
>>> -EXPORT_SYMBOL(rm9200_type);
>>> -
>>> -void __init at91rm9200_set_type(int type)
>>> -{
>>> - rm9200_type = type;
>>> -}
>>> -
>>
>> This only got introduce a couple of patches ago. I'm aware its a
>> stop-gap solution, but is it possible to rework/reorder the patches so
>> that this doesn't need to be temporarily introduced?
> the is to do not touch the other soc init api so I keep the changes local
> and prepare the soc to have the same init API so we can factorize them
>
> I prefer to do small changes to be able to bisect them if needed
>>
>> <snip>
>>
>>> +
>>> +#ifdef CONFIG_ARCH_AT91RM9200
>>> +#define __cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
>>> +#else
>>> +#define __cpu_is_at91rm9200() (0)
>>> +#endif
>>
>> I haven't looked at the subsequent patches yet to see if this patch
>> simplifies things later but it seems that this just adds more lines of
>> code by having two copies of the each of the cpu_is_xxx macros (the
>> __cpu_is_xxx version which reads the register, and the cpu_is_xxx
>> version which reads the shadow value)?
>>
>> What is the reasoning behind shadowing the cpu type rather than reading
>> the registers? The cpu detection macros are mostly used at
>> initialisation and device probe time, so they don't necessarily need to
>> be fast.
>>
>> If this eventually reduces code size then I think it is useful, but
>> otherwise I'm not sure I see the point?
> It's on purpose as the dbgu physical address is not at the same place
> so read the other register really does not impact the chip but if we do it
> later duting the boot or the life to the kernel it's an other story
>
> so the split between __cpu_is and cpu_is is necessarly
I don't understand. The at91_initialize function sets cpu_id using the
__cpu_is macros, and the cpu_is macros check cpu_id to determine the cpu
type. So the __cpu_is and cpu_is macros are functionally equivalent
except that the former uses register reads and the latter reads a shadow
value. i.e. the cpu_is macros are just indirectly using the __cpu_is macros.
If the register offsets are different between the various platforms then
this won't work anyway since the __cpu_is macros cannot be generic.
> all of this work is in preparation to allow multiple soc in the same kernel
> that's also why I map the system controller the same way on all at91 arm9
If the __cpu_is macros, which read the registers directly, remain then I
don't see how this can be generic between the various SoCs?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-26 4:44 ` Ryan Mallon
@ 2011-04-26 6:42 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-26 20:22 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 6:42 UTC (permalink / raw)
To: linux-arm-kernel
> >> I haven't looked at the subsequent patches yet to see if this patch
> >> simplifies things later but it seems that this just adds more lines of
> >> code by having two copies of the each of the cpu_is_xxx macros (the
> >> __cpu_is_xxx version which reads the register, and the cpu_is_xxx
> >> version which reads the shadow value)?
> >>
> >> What is the reasoning behind shadowing the cpu type rather than reading
> >> the registers? The cpu detection macros are mostly used at
> >> initialisation and device probe time, so they don't necessarily need to
> >> be fast.
> >>
> >> If this eventually reduces code size then I think it is useful, but
> >> otherwise I'm not sure I see the point?
> > It's on purpose as the dbgu physical address is not at the same place
> > so read the other register really does not impact the chip but if we do it
> > later duting the boot or the life to the kernel it's an other story
> >
> > so the split between __cpu_is and cpu_is is necessarly
>
> I don't understand. The at91_initialize function sets cpu_id using the
> __cpu_is macros, and the cpu_is macros check cpu_id to determine the cpu
> type. So the __cpu_is and cpu_is macros are functionally equivalent
> except that the former uses register reads and the latter reads a shadow
> value. i.e. the cpu_is macros are just indirectly using the __cpu_is macros.
>
> If the register offsets are different between the various platforms then
> this won't work anyway since the __cpu_is macros cannot be generic.
yes it's for now we can use one soc at a time I'm working to remove those
issue and make then soc specific
before doint this I need to fix pm, interrupt, earlyprintk, ll_debug, etc...
for gpio and timers it's already fix so one by one and it will be clean
in those 2 we can now specify on the soc the resource so we do not need to
have the same AT91_PIOx, AT91_ST and AT91_PIT for all soc
they can have their own.
When this cleanup will be finished we will have
AT91SAM9263_PIOx AT91SAM9263_PIT etc...
and only common define when they are really common
>
> > all of this work is in preparation to allow multiple soc in the same kernel
> > that's also why I map the system controller the same way on all at91 arm9
>
> If the __cpu_is macros, which read the registers directly, remain then I
> don't see how this can be generic between the various SoCs?
because they will be use only at the begenning before any drivers or other ip
enable so we can use them later it will not be the case anymore
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-26 6:42 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-26 20:22 ` Ryan Mallon
2011-04-26 23:45 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-26 20:22 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 06:42 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>> I haven't looked at the subsequent patches yet to see if this patch
>>>> simplifies things later but it seems that this just adds more lines of
>>>> code by having two copies of the each of the cpu_is_xxx macros (the
>>>> __cpu_is_xxx version which reads the register, and the cpu_is_xxx
>>>> version which reads the shadow value)?
>>>>
>>>> What is the reasoning behind shadowing the cpu type rather than reading
>>>> the registers? The cpu detection macros are mostly used at
>>>> initialisation and device probe time, so they don't necessarily need to
>>>> be fast.
>>>>
>>>> If this eventually reduces code size then I think it is useful, but
>>>> otherwise I'm not sure I see the point?
>>> It's on purpose as the dbgu physical address is not at the same place
>>> so read the other register really does not impact the chip but if we do it
>>> later duting the boot or the life to the kernel it's an other story
>>>
>>> so the split between __cpu_is and cpu_is is necessarly
>> I don't understand. The at91_initialize function sets cpu_id using the
>> __cpu_is macros, and the cpu_is macros check cpu_id to determine the cpu
>> type. So the __cpu_is and cpu_is macros are functionally equivalent
>> except that the former uses register reads and the latter reads a shadow
>> value. i.e. the cpu_is macros are just indirectly using the __cpu_is macros.
>>
>> If the register offsets are different between the various platforms then
>> this won't work anyway since the __cpu_is macros cannot be generic.
> yes it's for now we can use one soc at a time I'm working to remove those
> issue and make then soc specific
> before doint this I need to fix pm, interrupt, earlyprintk, ll_debug, etc...
>
> for gpio and timers it's already fix so one by one and it will be clean
> in those 2 we can now specify on the soc the resource so we do not need to
> have the same AT91_PIOx, AT91_ST and AT91_PIT for all soc
> they can have their own.
>
> When this cleanup will be finished we will have
> AT91SAM9263_PIOx AT91SAM9263_PIT etc...
> and only common define when they are really common
>>> all of this work is in preparation to allow multiple soc in the same kernel
>>> that's also why I map the system controller the same way on all at91 arm9
>> If the __cpu_is macros, which read the registers directly, remain then I
>> don't see how this can be generic between the various SoCs?
> because they will be use only at the begenning before any drivers or other ip
> enable so we can use them later it will not be the case anymore
>
> Best Regards,
> J.
I think that a better approach is to have only the cpu_is_ macros which
read the shadow value and then have at91_initialize (or some other
function which is init called before anything needs the cpu_is_ macros)
which just directly reads the cpu id registers and fills in the
structure. You won't need a structure that way either, just an id.
Something like:
/* include/mach/cpu.h */
/* Base SoC types */
#define AT91_SOC_AT91RM9200 0x1
#define AT91_SOC_AT91SAM9260 0x2
/* Extended SoC types */
#define AT91_SOC_AT91SAM9XE (0x1 << 16)
/* Accessor macros */
#define AT91_SOC_TYPE(x) ((x) & 0xffff)
#define AT91_SOC_EXT_TYPE(x) (((x) >> 16) & 0xffff)
extern unsigned long at91_soc_id;
#define cpu_is_at91rm9200() (AT91_SOC_TYPE(at91_soc_id) == AT91_SOC_AT91RM9200)
#define cpu_is_at91sam9260() (AT91_SOC_TYPE(at91_soc_id) == AT91_SOC_AT91SAM9260)
#define cpu_is_at91sam9xe() (AT91_SOC_EXT_TYPE(at91_soc_id) == AT91_SOC_AT91SAM9XE)
/* soc.c */
unsigned long at91_soc_id = 0;
static void at91_detect_cpu(void)
{
unsigned long cpu_id, full_id, arch_id, exid;
full_id = at91_sys_read(AT91_DBGU_CIDR);
cpu_id = full_id & !AT91_CIDR_VERSION);
arch_id = full_id & AT91_CIDR_ARCH;
exid = at91_sys_read(AT91_DBGU_EXID);
switch (cpu_id) {
case ARCH_ID_AT91RM9200:
at91_soc_id = AT91_SOC_AT91RM9200;
current_soc = at91rm9200_soc;
break;
case ARCH_ID_AT91SAM9260:
at91_soc_id = AT91_SOC_AT91SAM9260;
if (arch_id == ARCH_FAMILY_AT91SAM9XE)
at91_soc_id |= AT91_SOC_AT91SAM9XE;
current_soc = at91sam9260_soc;
break;
...
default:
panic("Unknown AT91 SoC type\n");
}
}
This way the cpu detection code is much clearer and easier to read and
only one set of __cpu_is macros are needed. The values for
ARCH_ID_AT91RM9200, etc can be moved into soc.c since they are not
needed elsewhere.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-26 20:22 ` Ryan Mallon
@ 2011-04-26 23:45 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-27 0:13 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 23:45 UTC (permalink / raw)
To: linux-arm-kernel
> > yes it's for now we can use one soc at a time I'm working to remove those
> > issue and make then soc specific
> > before doint this I need to fix pm, interrupt, earlyprintk, ll_debug, etc...
> >
> > for gpio and timers it's already fix so one by one and it will be clean
> > in those 2 we can now specify on the soc the resource so we do not need to
> > have the same AT91_PIOx, AT91_ST and AT91_PIT for all soc
> > they can have their own.
> >
> > When this cleanup will be finished we will have
> > AT91SAM9263_PIOx AT91SAM9263_PIT etc...
> > and only common define when they are really common
> >>> all of this work is in preparation to allow multiple soc in the same kernel
> >>> that's also why I map the system controller the same way on all at91 arm9
> >> If the __cpu_is macros, which read the registers directly, remain then I
> >> don't see how this can be generic between the various SoCs?
> > because they will be use only at the begenning before any drivers or other ip
> > enable so we can use them later it will not be the case anymore
> >
> > Best Regards,
> > J.
> I think that a better approach is to have only the cpu_is_ macros which
> read the shadow value and then have at91_initialize (or some other
> function which is init called before anything needs the cpu_is_ macros)
> which just directly reads the cpu id registers and fills in the
> structure. You won't need a structure that way either, just an id.
> Something like:
>
> /* include/mach/cpu.h */
>
> /* Base SoC types */
>
> #define AT91_SOC_AT91RM9200 0x1
> #define AT91_SOC_AT91SAM9260 0x2
>
> /* Extended SoC types */
> #define AT91_SOC_AT91SAM9XE (0x1 << 16)
>
> /* Accessor macros */
> #define AT91_SOC_TYPE(x) ((x) & 0xffff)
> #define AT91_SOC_EXT_TYPE(x) (((x) >> 16) & 0xffff)
>
> extern unsigned long at91_soc_id;
>
> #define cpu_is_at91rm9200() (AT91_SOC_TYPE(at91_soc_id) == AT91_SOC_AT91RM9200)
> #define cpu_is_at91sam9260() (AT91_SOC_TYPE(at91_soc_id) == AT91_SOC_AT91SAM9260)
> #define cpu_is_at91sam9xe() (AT91_SOC_EXT_TYPE(at91_soc_id) == AT91_SOC_AT91SAM9XE)
>
> /* soc.c */
> unsigned long at91_soc_id = 0;
>
> static void at91_detect_cpu(void)
> {
> unsigned long cpu_id, full_id, arch_id, exid;
>
>
> full_id = at91_sys_read(AT91_DBGU_CIDR);
> cpu_id = full_id & !AT91_CIDR_VERSION);
> arch_id = full_id & AT91_CIDR_ARCH;
> exid = at91_sys_read(AT91_DBGU_EXID);
>
> switch (cpu_id) {
> case ARCH_ID_AT91RM9200:
> at91_soc_id = AT91_SOC_AT91RM9200;
> current_soc = at91rm9200_soc;
> break;
>
> case ARCH_ID_AT91SAM9260:
> at91_soc_id = AT91_SOC_AT91SAM9260;
> if (arch_id == ARCH_FAMILY_AT91SAM9XE)
> at91_soc_id |= AT91_SOC_AT91SAM9XE;
> current_soc = at91sam9260_soc;
> break;
> ...
>
> default:
> panic("Unknown AT91 SoC type\n");
> }
> }
>
>
> This way the cpu detection code is much clearer and easier to read and
> only one set of __cpu_is macros are needed. The values for
> ARCH_ID_AT91RM9200, etc can be moved into soc.c since they are not
> needed elsewhere.
This will never work you do not listen
the DBUG is at DIFFERENT base address on the AT91
you need to check them one by one
I keep the structure to keep more imformation inside and do not want to be
limited by a 32bit and complex encoding to maintain
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-26 23:45 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-27 0:13 ` Ryan Mallon
2011-04-27 1:27 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-27 0:13 UTC (permalink / raw)
To: linux-arm-kernel
On 04/27/2011 11:45 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> yes it's for now we can use one soc at a time I'm working to remove those
>>> issue and make then soc specific
>>> before doint this I need to fix pm, interrupt, earlyprintk, ll_debug, etc...
>>>
>>> for gpio and timers it's already fix so one by one and it will be clean
>>> in those 2 we can now specify on the soc the resource so we do not need to
>>> have the same AT91_PIOx, AT91_ST and AT91_PIT for all soc
>>> they can have their own.
>>>
>>> When this cleanup will be finished we will have
>>> AT91SAM9263_PIOx AT91SAM9263_PIT etc...
>>> and only common define when they are really common
>>>>> all of this work is in preparation to allow multiple soc in the same kernel
>>>>> that's also why I map the system controller the same way on all at91 arm9
>>>> If the __cpu_is macros, which read the registers directly, remain then I
>>>> don't see how this can be generic between the various SoCs?
>>> because they will be use only at the begenning before any drivers or other ip
>>> enable so we can use them later it will not be the case anymore
>>>
>>> Best Regards,
>>> J.
>> I think that a better approach is to have only the cpu_is_ macros which
>> read the shadow value and then have at91_initialize (or some other
>> function which is init called before anything needs the cpu_is_ macros)
>> which just directly reads the cpu id registers and fills in the
>> structure. You won't need a structure that way either, just an id.
>> Something like:
>>
>> /* include/mach/cpu.h */
>>
>> /* Base SoC types */
>>
>> #define AT91_SOC_AT91RM9200 0x1
>> #define AT91_SOC_AT91SAM9260 0x2
>>
>> /* Extended SoC types */
>> #define AT91_SOC_AT91SAM9XE (0x1 << 16)
>>
>> /* Accessor macros */
>> #define AT91_SOC_TYPE(x) ((x) & 0xffff)
>> #define AT91_SOC_EXT_TYPE(x) (((x) >> 16) & 0xffff)
>>
>> extern unsigned long at91_soc_id;
>>
>> #define cpu_is_at91rm9200() (AT91_SOC_TYPE(at91_soc_id) == AT91_SOC_AT91RM9200)
>> #define cpu_is_at91sam9260() (AT91_SOC_TYPE(at91_soc_id) == AT91_SOC_AT91SAM9260)
>> #define cpu_is_at91sam9xe() (AT91_SOC_EXT_TYPE(at91_soc_id) == AT91_SOC_AT91SAM9XE)
>>
>> /* soc.c */
>> unsigned long at91_soc_id = 0;
>>
>> static void at91_detect_cpu(void)
>> {
>> unsigned long cpu_id, full_id, arch_id, exid;
>>
>>
>> full_id = at91_sys_read(AT91_DBGU_CIDR);
>> cpu_id = full_id & !AT91_CIDR_VERSION);
>> arch_id = full_id & AT91_CIDR_ARCH;
>> exid = at91_sys_read(AT91_DBGU_EXID);
>>
>> switch (cpu_id) {
>> case ARCH_ID_AT91RM9200:
>> at91_soc_id = AT91_SOC_AT91RM9200;
>> current_soc = at91rm9200_soc;
>> break;
>>
>> case ARCH_ID_AT91SAM9260:
>> at91_soc_id = AT91_SOC_AT91SAM9260;
>> if (arch_id == ARCH_FAMILY_AT91SAM9XE)
>> at91_soc_id |= AT91_SOC_AT91SAM9XE;
>> current_soc = at91sam9260_soc;
>> break;
>> ...
>>
>> default:
>> panic("Unknown AT91 SoC type\n");
>> }
>> }
>>
>>
>> This way the cpu detection code is much clearer and easier to read and
>> only one set of __cpu_is macros are needed. The values for
>> ARCH_ID_AT91RM9200, etc can be moved into soc.c since they are not
>> needed elsewhere.
> This will never work you do not listen
>
> the DBUG is at DIFFERENT base address on the AT91
> you need to check them one by one
>
> I keep the structure to keep more imformation inside and do not want to be
> limited by a 32bit and complex encoding to maintain
>
> Best Regards,
> J.
You can only be running one machine at a time. Are you implying that
this change breaks at91_sys_read in such a way that it reads the wrong
registers? If so, then its definitely a NAK.
Your patch does this:
static inline unsigned long at91_cpu_identify(void)
{
return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
}
...
#ifdef CONFIG_ARCH_AT91RM9200
#define __cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
#else
#define __cpu_is_at91rm9200() (0)
#endif
...
void __init at91_initialize(unsigned long main_clock)
{
...
if (__cpu_is_at91rm9200()) {
cpu_id.is_at91rm9200_soc;
current_soc = at91rm9200_soc;
}
...
}
So at91_initialize calls the __cpu_is macros, which in turn read the
AT91_DBGU registers via at91_sys_read. What I am proposing above is to
replace the massive collection of if statements with a simpler switch
statement and replacing the __cpu_is macros with direct register reads
via at91_sys_read, which results in far less code and more readable
code. If your version works, then how can mine not?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-27 0:13 ` Ryan Mallon
@ 2011-04-27 1:27 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-27 1:47 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-27 1:27 UTC (permalink / raw)
To: linux-arm-kernel
> >>
> >> This way the cpu detection code is much clearer and easier to read and
> >> only one set of __cpu_is macros are needed. The values for
> >> ARCH_ID_AT91RM9200, etc can be moved into soc.c since they are not
> >> needed elsewhere.
> > This will never work you do not listen
> >
> > the DBUG is at DIFFERENT base address on the AT91
> > you need to check them one by one
> >
> > I keep the structure to keep more imformation inside and do not want to be
> > limited by a 32bit and complex encoding to maintain
> >
> > Best Regards,
> > J.
> You can only be running one machine at a time. Are you implying that
> this change breaks at91_sys_read in such a way that it reads the wrong
> registers? If so, then its definitely a NAK.
Certernly not ALL of the current work is too allow in a UNIQUE kernel to have
all the atmel inside and other vendors and boards in the same kernel
and for at91_sys_read it's not a big deal as I'm going to drop it at the end
the timers does not use it anymore and the other drivers will update also one
by one
>
> Your patch does this:
>
> static inline unsigned long at91_cpu_identify(void)
> {
> return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
> }
>
Yeah as I said already I need to fix a lots of place and I do it step by step
so for now on I do not update the at91_cpu_identify & co but I will in time
> ...
>
> #ifdef CONFIG_ARCH_AT91RM9200
> #define __cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
> #else
> #define __cpu_is_at91rm9200() (0)
> #endif
>
> ...
>
> void __init at91_initialize(unsigned long main_clock)
> {
> ...
> if (__cpu_is_at91rm9200()) {
> cpu_id.is_at91rm9200_soc;
> current_soc = at91rm9200_soc;
> }
> ...
> }
>
>
> So at91_initialize calls the __cpu_is macros, which in turn read the
> AT91_DBGU registers via at91_sys_read. What I am proposing above is to
> replace the massive collection of if statements with a simpler switch
> statement and replacing the __cpu_is macros with direct register reads
> via at91_sys_read, which results in far less code and more readable
> code. If your version works, then how can mine not?
Because It will never allow you to have a __cpu_is_ soc specific
which is the goal here
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-27 1:27 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-27 1:47 ` Ryan Mallon
2011-04-27 3:18 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-27 1:47 UTC (permalink / raw)
To: linux-arm-kernel
On 04/27/2011 01:27 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>>
>>>> This way the cpu detection code is much clearer and easier to read and
>>>> only one set of __cpu_is macros are needed. The values for
>>>> ARCH_ID_AT91RM9200, etc can be moved into soc.c since they are not
>>>> needed elsewhere.
>>> This will never work you do not listen
>>>
>>> the DBUG is at DIFFERENT base address on the AT91
>>> you need to check them one by one
>>>
>>> I keep the structure to keep more imformation inside and do not want to be
>>> limited by a 32bit and complex encoding to maintain
>>>
>>> Best Regards,
>>> J.
>> You can only be running one machine at a time. Are you implying that
>> this change breaks at91_sys_read in such a way that it reads the wrong
>> registers? If so, then its definitely a NAK.
> Certernly not ALL of the current work is too allow in a UNIQUE kernel to have
> all the atmel inside and other vendors and boards in the same kernel
Agreed. At the moment we still have a situation where we can only
compile one at91 SoC variant into the kernel. So, at the moment, we do
not need to deal with the fact that the DBGU exists at different
locations, we can just read it for the board that we are booting on.
What I am objecting to is adding two entire sets of cpu_is macros which
is just needless extra code with no benefit. We should determine the
cpu/SoC type _once_ inside a single function (at91_initialize) and the
the cpu_is macros should just read the shadow value. There is no reason
to have two sets of macros.
> and for at91_sys_read it's not a big deal as I'm going to drop it at the end
> the timers does not use it anymore and the other drivers will update also one
> by one
Okay. But it shouldn't get broken now.
>> Your patch does this:
>>
>> static inline unsigned long at91_cpu_identify(void)
>> {
>> return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
>> }
>>
> Yeah as I said already I need to fix a lots of place and I do it step by step
> so for now on I do not update the at91_cpu_identify & co but I will in time
Right. But the point is, if __cpu_is_at91rm9200 calls at91_cpu_identify,
then why can't we drop the __cpu_is_at91rm9200 call entirely and just
work out the cpu/SoC type in a big switch statement?
In short, what is the benefit of the __cpu_is macros if they are never
used outside of at91_initialize?
>> ...
>>
>> #ifdef CONFIG_ARCH_AT91RM9200
>> #define __cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
>> #else
>> #define __cpu_is_at91rm9200() (0)
>> #endif
>>
>> ...
>>
>> void __init at91_initialize(unsigned long main_clock)
>> {
>> ...
>> if (__cpu_is_at91rm9200()) {
>> cpu_id.is_at91rm9200_soc;
>> current_soc = at91rm9200_soc;
>> }
>> ...
>> }
>>
>>
>> So at91_initialize calls the __cpu_is macros, which in turn read the
>> AT91_DBGU registers via at91_sys_read. What I am proposing above is to
>> replace the massive collection of if statements with a simpler switch
>> statement and replacing the __cpu_is macros with direct register reads
>> via at91_sys_read, which results in far less code and more readable
>> code. If your version works, then how can mine not?
> Because It will never allow you to have a __cpu_is_ soc specific
> which is the goal here
You already have the existing cpu_is versions (which would now use the
shadowed value rather than register reads). After at91_initialize has
determined the cpu/SoC type the __cpu_is macros are no longer used right?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 05/14] at91: use structure to store the current soc
2011-04-27 1:47 ` Ryan Mallon
@ 2011-04-27 3:18 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-27 3:41 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-27 3:18 UTC (permalink / raw)
To: linux-arm-kernel
On 13:47 Wed 27 Apr , Ryan Mallon wrote:
> On 04/27/2011 01:27 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>>>
> >>>> This way the cpu detection code is much clearer and easier to read and
> >>>> only one set of __cpu_is macros are needed. The values for
> >>>> ARCH_ID_AT91RM9200, etc can be moved into soc.c since they are not
> >>>> needed elsewhere.
> >>> This will never work you do not listen
> >>>
> >>> the DBUG is at DIFFERENT base address on the AT91
> >>> you need to check them one by one
> >>>
> >>> I keep the structure to keep more imformation inside and do not want to be
> >>> limited by a 32bit and complex encoding to maintain
> >>>
> >>> Best Regards,
> >>> J.
> >> You can only be running one machine at a time. Are you implying that
> >> this change breaks at91_sys_read in such a way that it reads the wrong
> >> registers? If so, then its definitely a NAK.
> > Certernly not ALL of the current work is too allow in a UNIQUE kernel to have
> > all the atmel inside and other vendors and boards in the same kernel
>
> Agreed. At the moment we still have a situation where we can only
> compile one at91 SoC variant into the kernel. So, at the moment, we do
> not need to deal with the fact that the DBGU exists at different
> locations, we can just read it for the board that we are booting on.
This patch series goal is to allow to have a UNIQUE kernel so all the drivers
and new code are write with this requirement
so no the double implementation is needed
no new code will accepted if it's does have this in considaration
>
> What I am objecting to is adding two entire sets of cpu_is macros which
> is just needless extra code with no benefit. We should determine the
> cpu/SoC type _once_ inside a single function (at91_initialize) and the
> the cpu_is macros should just read the shadow value. There is no reason
> to have two sets of macros.
Those two macro set does not have the same constrains
cpu_is is to be soc agnostic
__cpu_is is to be soc specific
so yes they are needed
and I'll update the __cpu_is soon so they will not use at91_sys_read anymore
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-27 3:18 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-27 3:41 ` Ryan Mallon
0 siblings, 0 replies; 85+ messages in thread
From: Ryan Mallon @ 2011-04-27 3:41 UTC (permalink / raw)
To: linux-arm-kernel
On 04/27/2011 03:18 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 13:47 Wed 27 Apr , Ryan Mallon wrote:
>> On 04/27/2011 01:27 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>>>>
>>>>>> This way the cpu detection code is much clearer and easier to read and
>>>>>> only one set of __cpu_is macros are needed. The values for
>>>>>> ARCH_ID_AT91RM9200, etc can be moved into soc.c since they are not
>>>>>> needed elsewhere.
>>>>> This will never work you do not listen
>>>>>
>>>>> the DBUG is at DIFFERENT base address on the AT91
>>>>> you need to check them one by one
>>>>>
>>>>> I keep the structure to keep more imformation inside and do not want to be
>>>>> limited by a 32bit and complex encoding to maintain
>>>>>
>>>>> Best Regards,
>>>>> J.
>>>> You can only be running one machine at a time. Are you implying that
>>>> this change breaks at91_sys_read in such a way that it reads the wrong
>>>> registers? If so, then its definitely a NAK.
>>> Certernly not ALL of the current work is too allow in a UNIQUE kernel to have
>>> all the atmel inside and other vendors and boards in the same kernel
>>
>> Agreed. At the moment we still have a situation where we can only
>> compile one at91 SoC variant into the kernel. So, at the moment, we do
>> not need to deal with the fact that the DBGU exists at different
>> locations, we can just read it for the board that we are booting on.
> This patch series goal is to allow to have a UNIQUE kernel so all the drivers
> and new code are write with this requirement
>
> so no the double implementation is needed
>
> no new code will accepted if it's does have this in considaration
I understand that the goal is to get a single kernel supporting all of
the at91 soc variants. This is one of the goals for the devices patch
series I posted also.
I am objecting to the implementation, not the goal. I believe there is a
better, cleaner way to handle this.
>> What I am objecting to is adding two entire sets of cpu_is macros which
>> is just needless extra code with no benefit. We should determine the
>> cpu/SoC type _once_ inside a single function (at91_initialize) and the
>> the cpu_is macros should just read the shadow value. There is no reason
>> to have two sets of macros.
> Those two macro set does not have the same constrains
>
> cpu_is is to be soc agnostic
> __cpu_is is to be soc specific
Yes. But if the __cpu_is versions are not needed outside of the
at91_initialize function (in order to first determine the cpu/soc type)
then why not move all of the code into at91_initialize (i.e. the switch
statement I proposed) and do away with the __cpu_is macros. This would
be functionally the same but doesn't add a second copy of the cpu_is macros.
> so yes they are needed
The code _inside_ them is needed, but does not need to be in the form of
the __cpu_is macros, it can be moved directly into at91_initialize which
is cleaner and simpler.
> and I'll update the __cpu_is soon so they will not use at91_sys_read anymore
When will users ever need to use the __cpu_is macros and how will they
know when to use cpu_is and when to use __cpu_is?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-26 4:21 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-26 4:44 ` Ryan Mallon
@ 2011-04-28 14:04 ` Andrew Victor
2011-04-28 14:10 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-02 15:38 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 2 replies; 85+ messages in thread
From: Andrew Victor @ 2011-04-28 14:04 UTC (permalink / raw)
To: linux-arm-kernel
hi,
>> If this eventually reduces code size then I think it is useful, but
>> otherwise I'm not sure I see the point?
> It's on purpose as the dbgu physical address is not at the same place
> so read the other register really does not impact the chip but if we do it
> later duting the boot or the life to the kernel it's an other story
>
> so the split between __cpu_is and cpu_is is necessarly
>
> all of this work is in preparation to allow multiple soc in the same kernel
> that's also why I map the system controller the same way on all at91 arm9
The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
registers.
But the address of the DBGU differs between CPUs regardless if you map
the system controller the same:
at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
So I don't see how you can "detect" the CPU without first knowing
which CPU and therefore where the DBGU register is anyway.
And probing different addresses for a value is not an acceptable solution.
While having a single kernel image that supports AT91 processors is a
good goal, the soc.h is a totally unnecessary complication.
I can't think of any situation where an AT91 board.c file doesn't know
what processor it has.
So instead of :
boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
at91XX_initialize()
just do:
boardXYZ-init -> at91XX_initialize()
And soc.c's not really removing much code duplication... most of the
code in there is the newly-added early_platform_devices.
Regards,
Andrew Victor
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-28 14:04 ` Andrew Victor
@ 2011-04-28 14:10 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 20:20 ` Ryan Mallon
2011-05-02 15:38 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-28 14:10 UTC (permalink / raw)
To: linux-arm-kernel
On 16:04 Thu 28 Apr , Andrew Victor wrote:
> hi,
>
> >> If this eventually reduces code size then I think it is useful, but
> >> otherwise I'm not sure I see the point?
> > It's on purpose as the dbgu physical address is not at the same place
> > so read the other register really does not impact the chip but if we do it
> > later duting the boot or the life to the kernel it's an other story
> >
> > so the split between __cpu_is and cpu_is is necessarly
> >
> > all of this work is in preparation to allow multiple soc in the same kernel
> > that's also why I map the system controller the same way on all at91 arm9
>
> The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
> registers.
>
> But the address of the DBGU differs between CPUs regardless if you map
> the system controller the same:
> at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>
> So I don't see how you can "detect" the CPU without first knowing
> which CPU and therefore where the DBGU register is anyway.
> And probing different addresses for a value is not an acceptable solution.
>
>
> While having a single kernel image that supports AT91 processors is a
> good goal, the soc.h is a totally unnecessary complication.
> I can't think of any situation where an AT91 board.c file doesn't know
> what processor it has.
>
> So instead of :
> boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
> at91XX_initialize()
> just do:
> boardXYZ-init -> at91XX_initialize()
except there is no need to known it and board seach as the usb-926x are the
same nearly and do not need to known on which soc they are
ditto for other boards you do not need to known the soc we are on.
And when you work on CPU module the board is the same but not the cpu on the
module so detect the SOC allow to have one kernel for all and not multiple
machine ID for each module and board combination
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-28 14:10 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-28 20:20 ` Ryan Mallon
2011-04-28 23:06 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-28 20:20 UTC (permalink / raw)
To: linux-arm-kernel
On 04/29/2011 02:10 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 16:04 Thu 28 Apr , Andrew Victor wrote:
>> hi,
>>
>>>> If this eventually reduces code size then I think it is useful, but
>>>> otherwise I'm not sure I see the point?
>>> It's on purpose as the dbgu physical address is not at the same place
>>> so read the other register really does not impact the chip but if we do it
>>> later duting the boot or the life to the kernel it's an other story
>>>
>>> so the split between __cpu_is and cpu_is is necessarly
>>>
>>> all of this work is in preparation to allow multiple soc in the same kernel
>>> that's also why I map the system controller the same way on all at91 arm9
>>
>> The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
>> registers.
>>
>> But the address of the DBGU differs between CPUs regardless if you map
>> the system controller the same:
>> at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>> at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>> at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>> at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>> at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>> at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>> at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>> at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>
>> So I don't see how you can "detect" the CPU without first knowing
>> which CPU and therefore where the DBGU register is anyway.
>> And probing different addresses for a value is not an acceptable solution.
>>
>>
>> While having a single kernel image that supports AT91 processors is a
>> good goal, the soc.h is a totally unnecessary complication.
>> I can't think of any situation where an AT91 board.c file doesn't know
>> what processor it has.
>>
>> So instead of :
>> boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
>> at91XX_initialize()
>> just do:
>> boardXYZ-init -> at91XX_initialize()
> except there is no need to known it and board seach as the usb-926x are the
> same nearly and do not need to known on which soc they are
>
> ditto for other boards you do not need to known the soc we are on.
> And when you work on CPU module the board is the same but not the cpu on the
> module so detect the SOC allow to have one kernel for all and not multiple
> machine ID for each module and board combination
I Agree with Andrew. When can determine everything we need from the
mach-type. For boards such as the usb-926x we have two separate
mach-types for the 9263 and the 9260 variants. The init_machine callback
can be separated in this case so that both of the boards initialise the
correct cpu type.
For cases such as the Snapper 9260/9G20, where a single mach-type is
used for two boards, we can then read the DBGU registers because the
location is the same for the 9260 and 9G20 (same sub-family). I don't
think there are any boards in the kernel which share a mach-type, but
have different sub-families and therefore different locations for DBGU.
If we took the approach that the boards must explicitly specify (as
closely as possible) their cpu/soc type then we could remove much of the
cpu detection code. We will still need the sub-family detection (e.g.
9260/9G20, CAP9 revision, etc) to distinguish some boards.
As Andrew says, cpu detection will not reliably work if we have a kernel
where all boards are compiled in. We have a chicken and egg problem in
that we need to know the cpu type in order to know where the DBGU
registers are, and we need to read the DBGU registers in order to
determine the cpu type. Catch 22.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-28 20:20 ` Ryan Mallon
@ 2011-04-28 23:06 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 23:24 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-28 23:06 UTC (permalink / raw)
To: linux-arm-kernel
On 08:20 Fri 29 Apr , Ryan Mallon wrote:
> On 04/29/2011 02:10 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 16:04 Thu 28 Apr , Andrew Victor wrote:
> >> hi,
> >>
> >>>> If this eventually reduces code size then I think it is useful, but
> >>>> otherwise I'm not sure I see the point?
> >>> It's on purpose as the dbgu physical address is not at the same place
> >>> so read the other register really does not impact the chip but if we do it
> >>> later duting the boot or the life to the kernel it's an other story
> >>>
> >>> so the split between __cpu_is and cpu_is is necessarly
> >>>
> >>> all of this work is in preparation to allow multiple soc in the same kernel
> >>> that's also why I map the system controller the same way on all at91 arm9
> >>
> >> The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
> >> registers.
> >>
> >> But the address of the DBGU differs between CPUs regardless if you map
> >> the system controller the same:
> >> at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >> at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> >> at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >> at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >> at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >> at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> >> at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> >> at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >>
> >> So I don't see how you can "detect" the CPU without first knowing
> >> which CPU and therefore where the DBGU register is anyway.
> >> And probing different addresses for a value is not an acceptable solution.
> >>
> >>
> >> While having a single kernel image that supports AT91 processors is a
> >> good goal, the soc.h is a totally unnecessary complication.
> >> I can't think of any situation where an AT91 board.c file doesn't know
> >> what processor it has.
> >>
> >> So instead of :
> >> boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
> >> at91XX_initialize()
> >> just do:
> >> boardXYZ-init -> at91XX_initialize()
> > except there is no need to known it and board seach as the usb-926x are the
> > same nearly and do not need to known on which soc they are
> >
> > ditto for other boards you do not need to known the soc we are on.
> > And when you work on CPU module the board is the same but not the cpu on the
> > module so detect the SOC allow to have one kernel for all and not multiple
> > machine ID for each module and board combination
>
> I Agree with Andrew. When can determine everything we need from the
> mach-type. For boards such as the usb-926x we have two separate
> mach-types for the 9263 and the 9260 variants. The init_machine callback
> can be separated in this case so that both of the boards initialise the
> correct cpu type.
I do work on board where is the case and I do not want to keep the limitation
and yes I'll put them mainline
And Russell will not accept I'll create 10 or 20 machine ID for board / cpu
module combinaison just because of different I do not detect the SOC type
so I'll continue to detect the soc
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-28 23:06 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-28 23:24 ` Ryan Mallon
2011-04-29 2:10 ` Ryan Mallon
2011-04-29 8:35 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 2 replies; 85+ messages in thread
From: Ryan Mallon @ 2011-04-28 23:24 UTC (permalink / raw)
To: linux-arm-kernel
On 04/29/2011 11:06 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 08:20 Fri 29 Apr , Ryan Mallon wrote:
>> On 04/29/2011 02:10 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> On 16:04 Thu 28 Apr , Andrew Victor wrote:
>>>> hi,
>>>>
>>>>>> If this eventually reduces code size then I think it is useful, but
>>>>>> otherwise I'm not sure I see the point?
>>>>> It's on purpose as the dbgu physical address is not at the same place
>>>>> so read the other register really does not impact the chip but if we do it
>>>>> later duting the boot or the life to the kernel it's an other story
>>>>>
>>>>> so the split between __cpu_is and cpu_is is necessarly
>>>>>
>>>>> all of this work is in preparation to allow multiple soc in the same kernel
>>>>> that's also why I map the system controller the same way on all at91 arm9
>>>>
>>>> The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
>>>> registers.
>>>>
>>>> But the address of the DBGU differs between CPUs regardless if you map
>>>> the system controller the same:
>>>> at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>> at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>>>> at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>> at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>> at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>> at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>>>> at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>>>> at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>>
>>>> So I don't see how you can "detect" the CPU without first knowing
>>>> which CPU and therefore where the DBGU register is anyway.
>>>> And probing different addresses for a value is not an acceptable solution.
>>>>
>>>>
>>>> While having a single kernel image that supports AT91 processors is a
>>>> good goal, the soc.h is a totally unnecessary complication.
>>>> I can't think of any situation where an AT91 board.c file doesn't know
>>>> what processor it has.
>>>>
>>>> So instead of :
>>>> boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
>>>> at91XX_initialize()
>>>> just do:
>>>> boardXYZ-init -> at91XX_initialize()
>>> except there is no need to known it and board seach as the usb-926x are the
>>> same nearly and do not need to known on which soc they are
>>>
>>> ditto for other boards you do not need to known the soc we are on.
>>> And when you work on CPU module the board is the same but not the cpu on the
>>> module so detect the SOC allow to have one kernel for all and not multiple
>>> machine ID for each module and board combination
>>
>> I Agree with Andrew. When can determine everything we need from the
>> mach-type. For boards such as the usb-926x we have two separate
>> mach-types for the 9263 and the 9260 variants. The init_machine callback
>> can be separated in this case so that both of the boards initialise the
>> correct cpu type.
> I do work on board where is the case and I do not want to keep the limitation
> and yes I'll put them mainline
>
> And Russell will not accept I'll create 10 or 20 machine ID for board / cpu
> module combinaison just because of different I do not detect the SOC type
>
> so I'll continue to detect the soc
How? It has been pointed out that there is no way that this can be
reliably done if you have all of the at91 socs built into a single
kernel. You cannot know where the DBGU registers are to read determine
the cpu/soc type.
The most reliable way to do this, which also requires the least code, is
to have the boards explicitly specify which cpu/soc type they are. In
this case most of the cpu detection code can be removed. Only the minor
variant (i.e. 9260/9G20) detection code would need to remain.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-28 23:24 ` Ryan Mallon
@ 2011-04-29 2:10 ` Ryan Mallon
2011-04-29 8:32 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-29 8:35 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-29 2:10 UTC (permalink / raw)
To: linux-arm-kernel
On 04/29/2011 11:24 AM, Ryan Mallon wrote:
> On 04/29/2011 11:06 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 08:20 Fri 29 Apr , Ryan Mallon wrote:
>>> On 04/29/2011 02:10 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>> On 16:04 Thu 28 Apr , Andrew Victor wrote:
>>>>> hi,
>>>>>
>>>>>>> If this eventually reduces code size then I think it is useful, but
>>>>>>> otherwise I'm not sure I see the point?
>>>>>> It's on purpose as the dbgu physical address is not at the same place
>>>>>> so read the other register really does not impact the chip but if we do it
>>>>>> later duting the boot or the life to the kernel it's an other story
>>>>>>
>>>>>> so the split between __cpu_is and cpu_is is necessarly
>>>>>>
>>>>>> all of this work is in preparation to allow multiple soc in the same kernel
>>>>>> that's also why I map the system controller the same way on all at91 arm9
>>>>>
>>>>> The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
>>>>> registers.
>>>>>
>>>>> But the address of the DBGU differs between CPUs regardless if you map
>>>>> the system controller the same:
>>>>> at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>>> at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>>>>> at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>>> at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>>> at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>>> at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>>>>> at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>>>>> at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>>>>
>>>>> So I don't see how you can "detect" the CPU without first knowing
>>>>> which CPU and therefore where the DBGU register is anyway.
>>>>> And probing different addresses for a value is not an acceptable solution.
>>>>>
>>>>>
>>>>> While having a single kernel image that supports AT91 processors is a
>>>>> good goal, the soc.h is a totally unnecessary complication.
>>>>> I can't think of any situation where an AT91 board.c file doesn't know
>>>>> what processor it has.
>>>>>
>>>>> So instead of :
>>>>> boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
>>>>> at91XX_initialize()
>>>>> just do:
>>>>> boardXYZ-init -> at91XX_initialize()
>>>> except there is no need to known it and board seach as the usb-926x are the
>>>> same nearly and do not need to known on which soc they are
>>>>
>>>> ditto for other boards you do not need to known the soc we are on.
>>>> And when you work on CPU module the board is the same but not the cpu on the
>>>> module so detect the SOC allow to have one kernel for all and not multiple
>>>> machine ID for each module and board combination
>>>
>>> I Agree with Andrew. When can determine everything we need from the
>>> mach-type. For boards such as the usb-926x we have two separate
>>> mach-types for the 9263 and the 9260 variants. The init_machine callback
>>> can be separated in this case so that both of the boards initialise the
>>> correct cpu type.
>> I do work on board where is the case and I do not want to keep the limitation
>> and yes I'll put them mainline
>>
>> And Russell will not accept I'll create 10 or 20 machine ID for board / cpu
>> module combinaison just because of different I do not detect the SOC type
>>
>> so I'll continue to detect the soc
>
> How? It has been pointed out that there is no way that this can be
> reliably done if you have all of the at91 socs built into a single
> kernel. You cannot know where the DBGU registers are to read determine
> the cpu/soc type.
>
> The most reliable way to do this, which also requires the least code, is
> to have the boards explicitly specify which cpu/soc type they are. In
> this case most of the cpu detection code can be removed. Only the minor
> variant (i.e. 9260/9G20) detection code would need to remain.
Having another look at this, the cpu detection is already fine. For
example, board-snapper9260.c calls at91sam9260_initialize, which in turn
determines whether the soc is a 9xe, 9260, or 9g20 and does the
appropriate intialisation. This all works fine because the three socs
have the same DBGU location.
There are other obstacles to having a single kernel for all of AT91, in
particular the big ifdef switch in include/mach/hardware.h and the whole
AT91_BASE_SYS thing, but the cpu/soc detection should not actually need
to be modified.
Lets fix the other problems first.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-29 2:10 ` Ryan Mallon
@ 2011-04-29 8:32 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-29 8:32 UTC (permalink / raw)
To: linux-arm-kernel
On 14:10 Fri 29 Apr , Ryan Mallon wrote:
> On 04/29/2011 11:24 AM, Ryan Mallon wrote:
> > On 04/29/2011 11:06 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >> On 08:20 Fri 29 Apr , Ryan Mallon wrote:
> >>> On 04/29/2011 02:10 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>>> On 16:04 Thu 28 Apr , Andrew Victor wrote:
> >>>>> hi,
> >>>>>
> >>>>>>> If this eventually reduces code size then I think it is useful, but
> >>>>>>> otherwise I'm not sure I see the point?
> >>>>>> It's on purpose as the dbgu physical address is not at the same place
> >>>>>> so read the other register really does not impact the chip but if we do it
> >>>>>> later duting the boot or the life to the kernel it's an other story
> >>>>>>
> >>>>>> so the split between __cpu_is and cpu_is is necessarly
> >>>>>>
> >>>>>> all of this work is in preparation to allow multiple soc in the same kernel
> >>>>>> that's also why I map the system controller the same way on all at91 arm9
> >>>>>
> >>>>> The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
> >>>>> registers.
> >>>>>
> >>>>> But the address of the DBGU differs between CPUs regardless if you map
> >>>>> the system controller the same:
> >>>>> at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >>>>> at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> >>>>> at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >>>>> at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >>>>> at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >>>>> at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> >>>>> at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> >>>>> at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> >>>>>
> >>>>> So I don't see how you can "detect" the CPU without first knowing
> >>>>> which CPU and therefore where the DBGU register is anyway.
> >>>>> And probing different addresses for a value is not an acceptable solution.
> >>>>>
> >>>>>
> >>>>> While having a single kernel image that supports AT91 processors is a
> >>>>> good goal, the soc.h is a totally unnecessary complication.
> >>>>> I can't think of any situation where an AT91 board.c file doesn't know
> >>>>> what processor it has.
> >>>>>
> >>>>> So instead of :
> >>>>> boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
> >>>>> at91XX_initialize()
> >>>>> just do:
> >>>>> boardXYZ-init -> at91XX_initialize()
> >>>> except there is no need to known it and board seach as the usb-926x are the
> >>>> same nearly and do not need to known on which soc they are
> >>>>
> >>>> ditto for other boards you do not need to known the soc we are on.
> >>>> And when you work on CPU module the board is the same but not the cpu on the
> >>>> module so detect the SOC allow to have one kernel for all and not multiple
> >>>> machine ID for each module and board combination
> >>>
> >>> I Agree with Andrew. When can determine everything we need from the
> >>> mach-type. For boards such as the usb-926x we have two separate
> >>> mach-types for the 9263 and the 9260 variants. The init_machine callback
> >>> can be separated in this case so that both of the boards initialise the
> >>> correct cpu type.
> >> I do work on board where is the case and I do not want to keep the limitation
> >> and yes I'll put them mainline
> >>
> >> And Russell will not accept I'll create 10 or 20 machine ID for board / cpu
> >> module combinaison just because of different I do not detect the SOC type
> >>
> >> so I'll continue to detect the soc
> >
> > How? It has been pointed out that there is no way that this can be
> > reliably done if you have all of the at91 socs built into a single
> > kernel. You cannot know where the DBGU registers are to read determine
> > the cpu/soc type.
> >
> > The most reliable way to do this, which also requires the least code, is
> > to have the boards explicitly specify which cpu/soc type they are. In
> > this case most of the cpu detection code can be removed. Only the minor
> > variant (i.e. 9260/9G20) detection code would need to remain.
>
> Having another look at this, the cpu detection is already fine. For
> example, board-snapper9260.c calls at91sam9260_initialize, which in turn
> determines whether the soc is a 9xe, 9260, or 9g20 and does the
> appropriate intialisation. This all works fine because the three socs
> have the same DBGU location.
>
> There are other obstacles to having a single kernel for all of AT91, in
> particular the big ifdef switch in include/mach/hardware.h and the whole
> AT91_BASE_SYS thing, but the cpu/soc detection should not actually need
> to be modified.
>
> Lets fix the other problems first.
I known one by one please it's plan to get rid of this
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-28 23:24 ` Ryan Mallon
2011-04-29 2:10 ` Ryan Mallon
@ 2011-04-29 8:35 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-29 8:50 ` Ryan Mallon
1 sibling, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-29 8:35 UTC (permalink / raw)
To: linux-arm-kernel
> >>>> So I don't see how you can "detect" the CPU without first knowing
> >>>> which CPU and therefore where the DBGU register is anyway.
> >>>> And probing different addresses for a value is not an acceptable solution.
> >>>>
> >>>>
> >>>> While having a single kernel image that supports AT91 processors is a
> >>>> good goal, the soc.h is a totally unnecessary complication.
> >>>> I can't think of any situation where an AT91 board.c file doesn't know
> >>>> what processor it has.
> >>>>
> >>>> So instead of :
> >>>> boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
> >>>> at91XX_initialize()
> >>>> just do:
> >>>> boardXYZ-init -> at91XX_initialize()
> >>> except there is no need to known it and board seach as the usb-926x are the
> >>> same nearly and do not need to known on which soc they are
> >>>
> >>> ditto for other boards you do not need to known the soc we are on.
> >>> And when you work on CPU module the board is the same but not the cpu on the
> >>> module so detect the SOC allow to have one kernel for all and not multiple
> >>> machine ID for each module and board combination
> >>
> >> I Agree with Andrew. When can determine everything we need from the
> >> mach-type. For boards such as the usb-926x we have two separate
> >> mach-types for the 9263 and the 9260 variants. The init_machine callback
> >> can be separated in this case so that both of the boards initialise the
> >> correct cpu type.
> > I do work on board where is the case and I do not want to keep the limitation
> > and yes I'll put them mainline
> >
> > And Russell will not accept I'll create 10 or 20 machine ID for board / cpu
> > module combinaison just because of different I do not detect the SOC type
> >
> > so I'll continue to detect the soc
>
> How? It has been pointed out that there is no way that this can be
> reliably done if you have all of the at91 socs built into a single
> kernel. You cannot know where the DBGU registers are to read determine
> the cpu/soc type.
>
> The most reliable way to do this, which also requires the least code, is
> to have the boards explicitly specify which cpu/soc type they are. In
> this case most of the cpu detection code can be removed. Only the minor
> variant (i.e. 9260/9G20) detection code would need to remain.
Except the idea here to do not do so
as I point some board will have different soc for the cpu module
a big real case on AT91
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-29 8:35 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-29 8:50 ` Ryan Mallon
0 siblings, 0 replies; 85+ messages in thread
From: Ryan Mallon @ 2011-04-29 8:50 UTC (permalink / raw)
To: linux-arm-kernel
On 29/04/11 20:35, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>>>> So I don't see how you can "detect" the CPU without first knowing
>>>>>> which CPU and therefore where the DBGU register is anyway.
>>>>>> And probing different addresses for a value is not an acceptable solution.
>>>>>>
>>>>>>
>>>>>> While having a single kernel image that supports AT91 processors is a
>>>>>> good goal, the soc.h is a totally unnecessary complication.
>>>>>> I can't think of any situation where an AT91 board.c file doesn't know
>>>>>> what processor it has.
>>>>>>
>>>>>> So instead of :
>>>>>> boardXYZ-init -> at91_initialize() --> magic-cpu-detection -->
>>>>>> at91XX_initialize()
>>>>>> just do:
>>>>>> boardXYZ-init -> at91XX_initialize()
>>>>> except there is no need to known it and board seach as the usb-926x are the
>>>>> same nearly and do not need to known on which soc they are
>>>>>
>>>>> ditto for other boards you do not need to known the soc we are on.
>>>>> And when you work on CPU module the board is the same but not the cpu on the
>>>>> module so detect the SOC allow to have one kernel for all and not multiple
>>>>> machine ID for each module and board combination
>>>>
>>>> I Agree with Andrew. When can determine everything we need from the
>>>> mach-type. For boards such as the usb-926x we have two separate
>>>> mach-types for the 9263 and the 9260 variants. The init_machine callback
>>>> can be separated in this case so that both of the boards initialise the
>>>> correct cpu type.
>>> I do work on board where is the case and I do not want to keep the limitation
>>> and yes I'll put them mainline
>>>
>>> And Russell will not accept I'll create 10 or 20 machine ID for board / cpu
>>> module combinaison just because of different I do not detect the SOC type
>>>
>>> so I'll continue to detect the soc
>>
>> How? It has been pointed out that there is no way that this can be
>> reliably done if you have all of the at91 socs built into a single
>> kernel. You cannot know where the DBGU registers are to read determine
>> the cpu/soc type.
>>
>> The most reliable way to do this, which also requires the least code, is
>> to have the boards explicitly specify which cpu/soc type they are. In
>> this case most of the cpu detection code can be removed. Only the minor
>> variant (i.e. 9260/9G20) detection code would need to remain.
>
> Except the idea here to do not do so
> as I point some board will have different soc for the cpu module
> a big real case on AT91
Can you give an example of a situation where we have the same mach-type
for two boards, where the DBGU is at a different location and therefore
not possible to differentiate between the boards?
You still haven't answered how your proposed cpu detection code would
work if all of the at91 socs were compiled into a single kernel, where
the DBGU registers are at different locations.
The current approach of boards explicitly specifying their cpu/soc type
will actually work correctly if all at91 socs are compiled into a single
kernel. Your patch set will actively break this.
~Ryan
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-04-28 14:04 ` Andrew Victor
2011-04-28 14:10 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-05-02 15:38 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-02 20:25 ` Ryan Mallon
1 sibling, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-05-02 15:38 UTC (permalink / raw)
To: linux-arm-kernel
On 16:04 Thu 28 Apr , Andrew Victor wrote:
> hi,
>
> >> If this eventually reduces code size then I think it is useful, but
> >> otherwise I'm not sure I see the point?
> > It's on purpose as the dbgu physical address is not at the same place
> > so read the other register really does not impact the chip but if we do it
> > later duting the boot or the life to the kernel it's an other story
> >
> > so the split between __cpu_is and cpu_is is necessarly
> >
> > all of this work is in preparation to allow multiple soc in the same kernel
> > that's also why I map the system controller the same way on all at91 arm9
>
> The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
> registers.
>
> But the address of the DBGU differs between CPUs regardless if you map
> the system controller the same:
> at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
> at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
> at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>
> So I don't see how you can "detect" the CPU without first knowing
> which CPU and therefore where the DBGU register is anyway.
> And probing different addresses for a value is not an acceptable solution.
we have 2 different register 0xfffff200 and 0xffffee00
which are the DBGU or the PIOA
and on the PIOA at the offset 0x40 if you try to read the cpu will always
return 0x0, and have no effect on the soc
so I do not think there is a big issue to read 2 register to detect the soc
automatically
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 15:38 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-05-02 20:25 ` Ryan Mallon
2011-05-02 20:24 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-05-02 20:25 UTC (permalink / raw)
To: linux-arm-kernel
On 05/03/2011 03:38 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 16:04 Thu 28 Apr , Andrew Victor wrote:
>> hi,
>>
>>>> If this eventually reduces code size then I think it is useful, but
>>>> otherwise I'm not sure I see the point?
>>> It's on purpose as the dbgu physical address is not at the same place
>>> so read the other register really does not impact the chip but if we do it
>>> later duting the boot or the life to the kernel it's an other story
>>>
>>> so the split between __cpu_is and cpu_is is necessarly
>>>
>>> all of this work is in preparation to allow multiple soc in the same kernel
>>> that's also why I map the system controller the same way on all at91 arm9
>>
>> The cpu_is() or__cpu_is() perform a at91_sys_read() of one of the DBGU
>> registers.
>>
>> But the address of the DBGU differs between CPUs regardless if you map
>> the system controller the same:
>> at572d940hf.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>> at91cap9.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>> at91rm9200.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>> at91sam9260.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>> at91sam9261.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>> at91sam9263.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>> at91sam9g45.h:#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
>> at91sam9rl.h:#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
>>
>> So I don't see how you can "detect" the CPU without first knowing
>> which CPU and therefore where the DBGU register is anyway.
>> And probing different addresses for a value is not an acceptable solution.
> we have 2 different register 0xfffff200 and 0xffffee00
> which are the DBGU or the PIOA
>
> and on the PIOA at the offset 0x40 if you try to read the cpu will always
> return 0x0, and have no effect on the soc
>
> so I do not think there is a big issue to read 2 register to detect the soc
> automatically
This does rely on Atmel not making another soc which has the DBGU at an
address which does cause a conflict (low possibility, but would be very
annoying). It's also really ugly to read random registers until we get
the one we want.
However, I still do not see what is wrong with the current approach of
the boards explicitly specifying the soc type. The correct soc/cpu type
can already be determined without changing the code. So why are we
changing the code?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 20:25 ` Ryan Mallon
@ 2011-05-02 20:24 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-02 20:38 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-05-02 20:24 UTC (permalink / raw)
To: linux-arm-kernel
> >> So I don't see how you can "detect" the CPU without first knowing
> >> which CPU and therefore where the DBGU register is anyway.
> >> And probing different addresses for a value is not an acceptable solution.
> > we have 2 different register 0xfffff200 and 0xffffee00
> > which are the DBGU or the PIOA
> >
> > and on the PIOA at the offset 0x40 if you try to read the cpu will always
> > return 0x0, and have no effect on the soc
> >
> > so I do not think there is a big issue to read 2 register to detect the soc
> > automatically
>
> This does rely on Atmel not making another soc which has the DBGU at an
> address which does cause a conflict (low possibility, but would be very
> annoying). It's also really ugly to read random registers until we get
> the one we want.
>
> However, I still do not see what is wrong with the current approach of
> the boards explicitly specifying the soc type. The correct soc/cpu type
> can already be determined without changing the code. So why are we
> changing the code?
Because some hardware design architecture such as CPU module do allow to have
the SAME board with different SOC. So have one machine ID per combinaison because
we just change the soc is a non-sense.
And it's not random address it's specific 2 address with specific value per soc
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 20:24 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-05-02 20:38 ` Ryan Mallon
2011-05-02 20:51 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-05-02 20:38 UTC (permalink / raw)
To: linux-arm-kernel
On 05/03/2011 08:24 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>> So I don't see how you can "detect" the CPU without first knowing
>>>> which CPU and therefore where the DBGU register is anyway.
>>>> And probing different addresses for a value is not an acceptable solution.
>>> we have 2 different register 0xfffff200 and 0xffffee00
>>> which are the DBGU or the PIOA
>>>
>>> and on the PIOA at the offset 0x40 if you try to read the cpu will always
>>> return 0x0, and have no effect on the soc
>>>
>>> so I do not think there is a big issue to read 2 register to detect the soc
>>> automatically
>>
>> This does rely on Atmel not making another soc which has the DBGU at an
>> address which does cause a conflict (low possibility, but would be very
>> annoying). It's also really ugly to read random registers until we get
>> the one we want.
>>
>> However, I still do not see what is wrong with the current approach of
>> the boards explicitly specifying the soc type. The correct soc/cpu type
>> can already be determined without changing the code. So why are we
>> changing the code?
> Because some hardware design architecture such as CPU module do allow to have
> the SAME board with different SOC. So have one machine ID per combinaison because
> we just change the soc is a non-sense.
You haven't named such a piece of hardware yet. We have boards like our
own Snapper 9260/9G20 where the same mach-type is used for two boards,
one with a SAM9260 and the other with a SAM9G20. Because these are
variants of the same soc we know that the DBGU is at the same address on
both and so we can read the cpuid registers to determine which board it is.
Can you give me an example of a mach-type which is used for two or more
boards that cannot be differentiated this way?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 20:38 ` Ryan Mallon
@ 2011-05-02 20:51 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-02 21:27 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-05-02 20:51 UTC (permalink / raw)
To: linux-arm-kernel
On 08:38 Tue 03 May , Ryan Mallon wrote:
> On 05/03/2011 08:24 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>>> So I don't see how you can "detect" the CPU without first knowing
> >>>> which CPU and therefore where the DBGU register is anyway.
> >>>> And probing different addresses for a value is not an acceptable solution.
> >>> we have 2 different register 0xfffff200 and 0xffffee00
> >>> which are the DBGU or the PIOA
> >>>
> >>> and on the PIOA at the offset 0x40 if you try to read the cpu will always
> >>> return 0x0, and have no effect on the soc
> >>>
> >>> so I do not think there is a big issue to read 2 register to detect the soc
> >>> automatically
> >>
> >> This does rely on Atmel not making another soc which has the DBGU at an
> >> address which does cause a conflict (low possibility, but would be very
> >> annoying). It's also really ugly to read random registers until we get
> >> the one we want.
> >>
> >> However, I still do not see what is wrong with the current approach of
> >> the boards explicitly specifying the soc type. The correct soc/cpu type
> >> can already be determined without changing the code. So why are we
> >> changing the code?
> > Because some hardware design architecture such as CPU module do allow to have
> > the SAME board with different SOC. So have one machine ID per combinaison because
> > we just change the soc is a non-sense.
>
> You haven't named such a piece of hardware yet. We have boards like our
> own Snapper 9260/9G20 where the same mach-type is used for two boards,
> one with a SAM9260 and the other with a SAM9G20. Because these are
> variants of the same soc we know that the DBGU is at the same address on
> both and so we can read the cpuid registers to determine which board it is.
take a look on the Ronetix
http://www.ronetix.at/
and this is just one the example
>
> Can you give me an example of a mach-type which is used for two or more
> boards that cannot be differentiated this way?
today we can not do so, so people multiplicate the machine ID which is wrong
and please do not only see the Snapper there is much more hardware provider
This is more and more common as when you design the cpu module you will use a
4 or 6 layers pcb and for the main board just 2 layers
This allow you the reduce the cost and be more flexible
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 20:51 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-05-02 21:27 ` Ryan Mallon
2011-05-02 21:29 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-02 23:16 ` Russell King - ARM Linux
0 siblings, 2 replies; 85+ messages in thread
From: Ryan Mallon @ 2011-05-02 21:27 UTC (permalink / raw)
To: linux-arm-kernel
On 05/03/2011 08:51 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 08:38 Tue 03 May , Ryan Mallon wrote:
>> On 05/03/2011 08:24 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>>>> So I don't see how you can "detect" the CPU without first knowing
>>>>>> which CPU and therefore where the DBGU register is anyway.
>>>>>> And probing different addresses for a value is not an acceptable solution.
>>>>> we have 2 different register 0xfffff200 and 0xffffee00
>>>>> which are the DBGU or the PIOA
>>>>>
>>>>> and on the PIOA at the offset 0x40 if you try to read the cpu will always
>>>>> return 0x0, and have no effect on the soc
>>>>>
>>>>> so I do not think there is a big issue to read 2 register to detect the soc
>>>>> automatically
>>>>
>>>> This does rely on Atmel not making another soc which has the DBGU at an
>>>> address which does cause a conflict (low possibility, but would be very
>>>> annoying). It's also really ugly to read random registers until we get
>>>> the one we want.
>>>>
>>>> However, I still do not see what is wrong with the current approach of
>>>> the boards explicitly specifying the soc type. The correct soc/cpu type
>>>> can already be determined without changing the code. So why are we
>>>> changing the code?
>>> Because some hardware design architecture such as CPU module do allow to have
>>> the SAME board with different SOC. So have one machine ID per combinaison because
>>> we just change the soc is a non-sense.
>>
>> You haven't named such a piece of hardware yet. We have boards like our
>> own Snapper 9260/9G20 where the same mach-type is used for two boards,
>> one with a SAM9260 and the other with a SAM9G20. Because these are
>> variants of the same soc we know that the DBGU is at the same address on
>> both and so we can read the cpuid registers to determine which board it is.
> take a look on the Ronetix
> http://www.ronetix.at/
>
> and this is just one the example
Why would each of those three modules not have their own mach-type? They
could be implemented as a single board file, with three MACHINE_START
sections at the bottom of the file. All three could be compiled into a
single kernel and the cpu_is macros can be used for the soc specific stuff.
>> Can you give me an example of a mach-type which is used for two or more
>> boards that cannot be differentiated this way?
> today we can not do so, so people multiplicate the machine ID which is wrong
> and please do not only see the Snapper there is much more hardware provider
I think that these boards are different enough (they have cpus with
different memory layouts) that they should be specified by their own
mach-type.
Russell, what is your opinion on this? Should we use individual
mach-types for the above boards and have them explicitly specify their
cpu/soc type, or should we be aiming to have a single mach-type for all
of them and determine the cpu/soc type in code?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 21:27 ` Ryan Mallon
@ 2011-05-02 21:29 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-02 22:05 ` Ryan Mallon
2011-05-02 23:16 ` Russell King - ARM Linux
1 sibling, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-05-02 21:29 UTC (permalink / raw)
To: linux-arm-kernel
On 09:27 Tue 03 May , Ryan Mallon wrote:
> On 05/03/2011 08:51 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 08:38 Tue 03 May , Ryan Mallon wrote:
> >> On 05/03/2011 08:24 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>>>>> So I don't see how you can "detect" the CPU without first knowing
> >>>>>> which CPU and therefore where the DBGU register is anyway.
> >>>>>> And probing different addresses for a value is not an acceptable solution.
> >>>>> we have 2 different register 0xfffff200 and 0xffffee00
> >>>>> which are the DBGU or the PIOA
> >>>>>
> >>>>> and on the PIOA at the offset 0x40 if you try to read the cpu will always
> >>>>> return 0x0, and have no effect on the soc
> >>>>>
> >>>>> so I do not think there is a big issue to read 2 register to detect the soc
> >>>>> automatically
> >>>>
> >>>> This does rely on Atmel not making another soc which has the DBGU at an
> >>>> address which does cause a conflict (low possibility, but would be very
> >>>> annoying). It's also really ugly to read random registers until we get
> >>>> the one we want.
> >>>>
> >>>> However, I still do not see what is wrong with the current approach of
> >>>> the boards explicitly specifying the soc type. The correct soc/cpu type
> >>>> can already be determined without changing the code. So why are we
> >>>> changing the code?
> >>> Because some hardware design architecture such as CPU module do allow to have
> >>> the SAME board with different SOC. So have one machine ID per combinaison because
> >>> we just change the soc is a non-sense.
> >>
> >> You haven't named such a piece of hardware yet. We have boards like our
> >> own Snapper 9260/9G20 where the same mach-type is used for two boards,
> >> one with a SAM9260 and the other with a SAM9G20. Because these are
> >> variants of the same soc we know that the DBGU is at the same address on
> >> both and so we can read the cpuid registers to determine which board it is.
> > take a look on the Ronetix
> > http://www.ronetix.at/
> >
> > and this is just one the example
>
> Why would each of those three modules not have their own mach-type? They
> could be implemented as a single board file, with three MACHINE_START
> sections at the bottom of the file. All three could be compiled into a
> single kernel and the cpu_is macros can be used for the soc specific stuff.
>
> >> Can you give me an example of a mach-type which is used for two or more
> >> boards that cannot be differentiated this way?
> > today we can not do so, so people multiplicate the machine ID which is wrong
> > and please do not only see the Snapper there is much more hardware provider
>
> I think that these boards are different enough (they have cpus with
> different memory layouts) that they should be specified by their own
> mach-type.
>
> Russell, what is your opinion on this? Should we use individual
> mach-types for the above boards and have them explicitly specify their
> cpu/soc type, or should we be aiming to have a single mach-type for all
> of them and determine the cpu/soc type in code?
so which means when we will have multiple board that use the SAME cpu module
we will add X * Y boards machine ID
really not good just to avoid to read 2 registers common it's non-sense
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 21:29 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-05-02 22:05 ` Ryan Mallon
2011-05-02 22:06 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-05-02 22:05 UTC (permalink / raw)
To: linux-arm-kernel
On 05/03/2011 09:29 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 09:27 Tue 03 May , Ryan Mallon wrote:
>> On 05/03/2011 08:51 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> On 08:38 Tue 03 May , Ryan Mallon wrote:
>>>> On 05/03/2011 08:24 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>>>>>> So I don't see how you can "detect" the CPU without first knowing
>>>>>>>> which CPU and therefore where the DBGU register is anyway.
>>>>>>>> And probing different addresses for a value is not an acceptable solution.
>>>>>>> we have 2 different register 0xfffff200 and 0xffffee00
>>>>>>> which are the DBGU or the PIOA
>>>>>>>
>>>>>>> and on the PIOA at the offset 0x40 if you try to read the cpu will always
>>>>>>> return 0x0, and have no effect on the soc
>>>>>>>
>>>>>>> so I do not think there is a big issue to read 2 register to detect the soc
>>>>>>> automatically
>>>>>>
>>>>>> This does rely on Atmel not making another soc which has the DBGU at an
>>>>>> address which does cause a conflict (low possibility, but would be very
>>>>>> annoying). It's also really ugly to read random registers until we get
>>>>>> the one we want.
>>>>>>
>>>>>> However, I still do not see what is wrong with the current approach of
>>>>>> the boards explicitly specifying the soc type. The correct soc/cpu type
>>>>>> can already be determined without changing the code. So why are we
>>>>>> changing the code?
>>>>> Because some hardware design architecture such as CPU module do allow to have
>>>>> the SAME board with different SOC. So have one machine ID per combinaison because
>>>>> we just change the soc is a non-sense.
>>>>
>>>> You haven't named such a piece of hardware yet. We have boards like our
>>>> own Snapper 9260/9G20 where the same mach-type is used for two boards,
>>>> one with a SAM9260 and the other with a SAM9G20. Because these are
>>>> variants of the same soc we know that the DBGU is at the same address on
>>>> both and so we can read the cpuid registers to determine which board it is.
>>> take a look on the Ronetix
>>> http://www.ronetix.at/
>>>
>>> and this is just one the example
>>
>> Why would each of those three modules not have their own mach-type? They
>> could be implemented as a single board file, with three MACHINE_START
>> sections at the bottom of the file. All three could be compiled into a
>> single kernel and the cpu_is macros can be used for the soc specific stuff.
>>
>>>> Can you give me an example of a mach-type which is used for two or more
>>>> boards that cannot be differentiated this way?
>>> today we can not do so, so people multiplicate the machine ID which is wrong
>>> and please do not only see the Snapper there is much more hardware provider
>>
>> I think that these boards are different enough (they have cpus with
>> different memory layouts) that they should be specified by their own
>> mach-type.
>>
>> Russell, what is your opinion on this? Should we use individual
>> mach-types for the above boards and have them explicitly specify their
>> cpu/soc type, or should we be aiming to have a single mach-type for all
>> of them and determine the cpu/soc type in code?
> so which means when we will have multiple board that use the SAME cpu module
> we will add X * Y boards machine ID
>
> really not good just to avoid to read 2 registers common it's non-sense
The boards are different. They have a common base pinout, but their
peripheral pinouts are different. Multiple mach-types cost nothing and
are a well understood part of ARM Linux. Your proposed cpu detection
code adds complexity and code, and has zero benefit for any of the
boards currently in mainline.
Carrier boards are a separate issue, and there has not really been a
consensus on what the best way to solve the issue of combining system on
modules (SoMs) with carrier boards. Should the mach-type belong to the
SoM or to the system as a whole (SoM + carrier board)? There is
currently a push to get ARM to consolidate on things rather than each
sub-architecture doing things its own way. So if you want a way to
differentiate carrier boards, then I think that needs to be discussed
with other sub-architecture maintainers so that a common approach can be
devised. I don't think that cpu detection is a robust solution. Device
tree is probably the long-term solution to this.
In short, your soc detection patches add additional complexity, but have
zero effect on the possibility of supporting all of the current mainline
at91 platforms in a single kernel. We need to fix the other barriers to
this support first (such as the work Andrew Victor is doing).
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 22:05 ` Ryan Mallon
@ 2011-05-02 22:06 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-02 22:32 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-05-02 22:06 UTC (permalink / raw)
To: linux-arm-kernel
> The boards are different. They have a common base pinout, but their
> peripheral pinouts are different. Multiple mach-types cost nothing and
> are a well understood part of ARM Linux. Your proposed cpu detection
> code adds complexity and code, and has zero benefit for any of the
> boards currently in mainline.
So we will do an other re-architecture in the few months
Linus is going to said no
We do need to stop to do changset again and again just because we don't solve
the issue at the beginning
>
> Carrier boards are a separate issue, and there has not really been a
> consensus on what the best way to solve the issue of combining system on
> modules (SoMs) with carrier boards. Should the mach-type belong to the
> SoM or to the system as a whole (SoM + carrier board)? There is
> currently a push to get ARM to consolidate on things rather than each
> sub-architecture doing things its own way.
Sorry but cpu detection is soc specific
hardcode it via machine ID is not good
> So if you want a way to
> differentiate carrier boards, then I think that needs to be discussed
> with other sub-architecture maintainers so that a common approach can be
> devised. I don't think that cpu detection is a robust solution. Device
> tree is probably the long-term solution to this.
>
> In short, your soc detection patches add additional complexity, but have
> zero effect on the possibility of supporting all of the current mainline
> at91 platforms in a single kernel. We need to fix the other barriers to
> this support first (such as the work Andrew Victor is doing).
Which can be also simply be knowning the CPU you are on
If you take a look on other arch they do cpu detection and there is nothing
wrong about it. And device tree is not the solution to everything
If you have work on it on PowerPC or other arch, you will known that it's also
have its own issue
such as bootloader/kernel incompatibilty
so detect cpu type at runtine in the kernel is good to do not realy blindly on
DT
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 22:06 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-05-02 22:32 ` Ryan Mallon
2011-05-02 22:41 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-05-02 22:32 UTC (permalink / raw)
To: linux-arm-kernel
On 05/03/2011 10:06 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> The boards are different. They have a common base pinout, but their
>> peripheral pinouts are different. Multiple mach-types cost nothing and
>> are a well understood part of ARM Linux. Your proposed cpu detection
>> code adds complexity and code, and has zero benefit for any of the
>> boards currently in mainline.
> So we will do an other re-architecture in the few months
> Linus is going to said no
> We do need to stop to do changset again and again just because we don't solve
> the issue at the beginning
Agreed. That is why I am saying that we should focusing on reducing the
size and complexity of AT91 and getting a single kernel working for all
of the at91 boards which are currently in mainline.
>> Carrier boards are a separate issue, and there has not really been a
>> consensus on what the best way to solve the issue of combining system on
>> modules (SoMs) with carrier boards. Should the mach-type belong to the
>> SoM or to the system as a whole (SoM + carrier board)? There is
>> currently a push to get ARM to consolidate on things rather than each
>> sub-architecture doing things its own way.
> Sorry but cpu detection is soc specific
The method for specifying the setup of a system including SoM and
carrier board(s) is not cpu/soc specific and does not necessarily need
to be done via cpu detection. In fact, I think cpu detection is a bad
way to do it.
> hardcode it via machine ID is not good
>> So if you want a way to
>> differentiate carrier boards, then I think that needs to be discussed
>> with other sub-architecture maintainers so that a common approach can be
>> devised. I don't think that cpu detection is a robust solution. Device
>> tree is probably the long-term solution to this.
>>
>> In short, your soc detection patches add additional complexity, but have
>> zero effect on the possibility of supporting all of the current mainline
>> at91 platforms in a single kernel. We need to fix the other barriers to
>> this support first (such as the work Andrew Victor is doing).
> Which can be also simply be knowning the CPU you are on
>
> If you take a look on other arch they do cpu detection and there is nothing
> wrong about it.
There is nothing wrong with the current solution for at91, yet you are
trying to add code which is confusing (two sets of cpu_is macros) and
adds more lines for something which _already works_.
This argument is getting frustrating. My current objections to this
patch are:
- The current solution (explicitly specifying the soc type) works for
all of the at91 boards currently in mainline.
- It adds two sets of cpu_is macros (second set with __ prefix), which
is confusing and pointless.
- You have implied that the __cpu_is macros will be removed at a later
date. Since they are basically useless now, this is just more code churn
when we are trying to reduce it on ARM.
- The patch as it stands won't work in a unified at91 kernel because the
address of the DBGU registers is different on some at91 platforms.
- By itself this patch adds complexity without fixing anything and
without introducing any functional change.
- There are other barriers to having a unified at91 kernel which need to
be solved first. This patch is trying to jump ahead and solve problems
that don't exist yet.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 22:32 ` Ryan Mallon
@ 2011-05-02 22:41 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-05-02 22:41 UTC (permalink / raw)
To: linux-arm-kernel
On 10:32 Tue 03 May , Ryan Mallon wrote:
> On 05/03/2011 10:06 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >> The boards are different. They have a common base pinout, but their
> >> peripheral pinouts are different. Multiple mach-types cost nothing and
> >> are a well understood part of ARM Linux. Your proposed cpu detection
> >> code adds complexity and code, and has zero benefit for any of the
> >> boards currently in mainline.
> > So we will do an other re-architecture in the few months
> > Linus is going to said no
> > We do need to stop to do changset again and again just because we don't solve
> > the issue at the beginning
>
> Agreed. That is why I am saying that we should focusing on reducing the
> size and complexity of AT91 and getting a single kernel working for all
> of the at91 boards which are currently in mainline.
>
> >> Carrier boards are a separate issue, and there has not really been a
> >> consensus on what the best way to solve the issue of combining system on
> >> modules (SoMs) with carrier boards. Should the mach-type belong to the
> >> SoM or to the system as a whole (SoM + carrier board)? There is
> >> currently a push to get ARM to consolidate on things rather than each
> >> sub-architecture doing things its own way.
> > Sorry but cpu detection is soc specific
>
> The method for specifying the setup of a system including SoM and
> carrier board(s) is not cpu/soc specific and does not necessarily need
> to be done via cpu detection. In fact, I think cpu detection is a bad
> way to do it.
>
> > hardcode it via machine ID is not good
> >> So if you want a way to
> >> differentiate carrier boards, then I think that needs to be discussed
> >> with other sub-architecture maintainers so that a common approach can be
> >> devised. I don't think that cpu detection is a robust solution. Device
> >> tree is probably the long-term solution to this.
> >>
> >> In short, your soc detection patches add additional complexity, but have
> >> zero effect on the possibility of supporting all of the current mainline
> >> at91 platforms in a single kernel. We need to fix the other barriers to
> >> this support first (such as the work Andrew Victor is doing).
> > Which can be also simply be knowning the CPU you are on
> >
> > If you take a look on other arch they do cpu detection and there is nothing
> > wrong about it.
>
> There is nothing wrong with the current solution for at91, yet you are
> trying to add code which is confusing (two sets of cpu_is macros) and
> adds more lines for something which _already works_.
>
> This argument is getting frustrating. My current objections to this
> patch are:
>
> - The current solution (explicitly specifying the soc type) works for
> all of the at91 boards currently in mainline.
why do you we redisign the 5series are based on som so when we will add the
cpu from Atmel we will have to solve this again wow great
> - It adds two sets of cpu_is macros (second set with __ prefix), which
> is confusing and pointless.
> - You have implied that the __cpu_is macros will be removed at a later
> date. Since they are basically useless now, this is just more code churn
> when we are trying to reduce it on ARM.
so we will re-add it later no-way
> - The patch as it stands won't work in a unified at91 kernel because the
> address of the DBGU registers is different on some at91 platforms.
we just have 2 diffents register common stop it
it's not the case we have one for each soc
> - By itself this patch adds complexity without fixing anything and
> without introducing any functional change.
except you propose to add 100s of new function for each soc when the soc init
is exactly the same same add copy paste for nothing
> - There are other barriers to having a unified at91 kernel which need to
> be solved first. This patch is trying to jump ahead and solve problems
> that don't exist yet.
except the swtich to the common AT91_BASE_SYS, switch of the timers, gpio to
platfrom_device, clkdev do fix it
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 21:27 ` Ryan Mallon
2011-05-02 21:29 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-05-02 23:16 ` Russell King - ARM Linux
2011-05-02 23:16 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 1 reply; 85+ messages in thread
From: Russell King - ARM Linux @ 2011-05-02 23:16 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, May 03, 2011 at 09:27:12AM +1200, Ryan Mallon wrote:
> Russell, what is your opinion on this? Should we use individual
> mach-types for the above boards and have them explicitly specify their
> cpu/soc type, or should we be aiming to have a single mach-type for all
> of them and determine the cpu/soc type in code?
I don't like answering these questions because it requires understanding
the differences between the various individual SoCs to determine what's
possible.
You are correct that CPU type is determined at run-time by the kernel,
and whether its an 920T or 926T CPU is neither here or there to the
kernel. It's really the SoC type that's the problem, and we don't have
a very good way of specifying that (partly as there is no standard way
to tell what sort of SoC we have.)
So, really, it's a platform specific question. If there is some way
that the SoC type can be detected from the hardware, that may be an
appropriate way to deal with that issue. If not, then the mach-type
approach (which I assume is what AT91 currently does) is probably as
good as any other until we have something like DT.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 05/14] at91: use structure to store the current soc
2011-05-02 23:16 ` Russell King - ARM Linux
@ 2011-05-02 23:16 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-05-02 23:16 UTC (permalink / raw)
To: linux-arm-kernel
On 00:16 Tue 03 May , Russell King - ARM Linux wrote:
> On Tue, May 03, 2011 at 09:27:12AM +1200, Ryan Mallon wrote:
> > Russell, what is your opinion on this? Should we use individual
> > mach-types for the above boards and have them explicitly specify their
> > cpu/soc type, or should we be aiming to have a single mach-type for all
> > of them and determine the cpu/soc type in code?
>
> I don't like answering these questions because it requires understanding
> the differences between the various individual SoCs to determine what's
> possible.
>
> You are correct that CPU type is determined at run-time by the kernel,
> and whether its an 920T or 926T CPU is neither here or there to the
> kernel. It's really the SoC type that's the problem, and we don't have
> a very good way of specifying that (partly as there is no standard way
> to tell what sort of SoC we have.)
>
> So, really, it's a platform specific question. If there is some way
> that the SoC type can be detected from the hardware, that may be an
> appropriate way to deal with that issue. If not, then the mach-type
> approach (which I assume is what AT91 currently does) is probably as
> good as any other until we have something like DT.
Except we have Russell it's we need to read 2 registers differents
which is 0x0 if does not containt a cpu id
or or the cpu id of the current chip
So I do not see the big deal
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 06/14 v3] at91: switch to CLKDEV_LOOKUP
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (4 preceding siblings ...)
2011-04-25 18:31 ` [PATCH 05/14] at91: use structure to store the current soc Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 18:31 ` [PATCH 07/14] at91: switch gpio to early platfrom device Jean-Christophe PLAGNIOL-VILLARD
` (8 subsequent siblings)
14 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
we do not change the clock naming convention so does not need to switch
the AVR32 yet
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
v3:
udpate at91x40
Best Regards,
J.
arch/arm/Kconfig | 1 +
arch/arm/mach-at91/at572d940hf.c | 64 +++++++++++++++++++++++
arch/arm/mach-at91/at572d940hf_devices.c | 22 ++++----
arch/arm/mach-at91/at91cap9.c | 58 ++++++++++++++++++++
arch/arm/mach-at91/at91cap9_devices.c | 28 ++++------
arch/arm/mach-at91/at91rm9200.c | 50 ++++++++++++++++++
arch/arm/mach-at91/at91rm9200_devices.c | 28 ++++------
arch/arm/mach-at91/at91sam9260.c | 51 ++++++++++++++++++
arch/arm/mach-at91/at91sam9260_devices.c | 31 ++++-------
arch/arm/mach-at91/at91sam9261.c | 55 +++++++++++++++++++
arch/arm/mach-at91/at91sam9261_devices.c | 26 ++++-----
arch/arm/mach-at91/at91sam9263.c | 54 +++++++++++++++++++
arch/arm/mach-at91/at91sam9263_devices.c | 24 ++++----
arch/arm/mach-at91/at91sam9g45.c | 84 +++++++++++++++++++++++-------
arch/arm/mach-at91/at91sam9g45_devices.c | 31 ++++-------
arch/arm/mach-at91/at91sam9rl.c | 51 ++++++++++++++++++
arch/arm/mach-at91/at91sam9rl_devices.c | 27 ++++-----
arch/arm/mach-at91/at91x40.c | 5 --
arch/arm/mach-at91/clock.c | 54 +++++--------------
arch/arm/mach-at91/clock.h | 19 ++++++-
arch/arm/mach-at91/generic.h | 12 ++++-
arch/arm/mach-at91/include/mach/clkdev.h | 7 +++
22 files changed, 595 insertions(+), 187 deletions(-)
create mode 100644 arch/arm/mach-at91/include/mach/clkdev.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 377a7a5..920273d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -288,6 +288,7 @@ config ARCH_AT91
bool "Atmel AT91"
select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK
+ select CLKDEV_LOOKUP
help
This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 and AT91CAP9 processors.
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
index 15ecb64..b9c48d5 100644
--- a/arch/arm/mach-at91/at572d940hf.c
+++ b/arch/arm/mach-at91/at572d940hf.c
@@ -201,6 +201,37 @@ static struct clk *periph_clocks[] __initdata = {
/* irq0 .. irq2 */
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+ CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+ CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_CON_ID("macb_clk", &macb_clk),
+ CLKDEV_CON_ID("mci_clk", &mmc_clk),
+ CLKDEV_CON_ID("udc_clk", &udc_clk),
+ CLKDEV_CON_ID("twi0_clk", &twi0_clk),
+ CLKDEV_CON_ID("ssc0_clk", &ssc0_clk),
+ CLKDEV_CON_ID("ssc1_clk", &ssc1_clk),
+ CLKDEV_CON_ID("ssc2_clk", &ssc2_clk),
+ CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+ CLKDEV_CON_ID("ssc3_clk", &ssc3_clk),
+ CLKDEV_CON_ID("twi1_clk", &twi1_clk),
+ CLKDEV_CON_ID("can0_clk", &can0_clk),
+ CLKDEV_CON_ID("can1_clk", &can1_clk),
+ CLKDEV_CON_ID("mAgicV_clk", &mAgicV_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
+
/*
* The five programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@@ -230,6 +261,13 @@ static struct clk pck3 = {
.id = 3,
};
+static struct clk_lookup program_clocks_lookups[] = {
+ CLKDEV_CON_ID("pck0", &pck0),
+ CLKDEV_CON_ID("pck1", &pck1),
+ CLKDEV_CON_ID("pck2", &pck2),
+ CLKDEV_CON_ID("pck3", &pck3),
+};
+
static struct clk mAgicV_mem_clk = {
.name = "mAgicV_mem_clk",
.pmc_mask = AT91_PMC_PCK4,
@@ -237,6 +275,9 @@ static struct clk mAgicV_mem_clk = {
.id = 4,
};
+static struct clk_lookup mAgicV_mem_clk_lookup =
+ CLKDEV_CON_ID("mAgicV_mem_clk", &mAgicV_mem_clk);
+
/* HClocks */
static struct clk hck0 = {
.name = "hck0",
@@ -251,6 +292,11 @@ static struct clk hck1 = {
.id = 1,
};
+static struct clk_lookup hc_clocks_lookups[] = {
+ CLKDEV_CON_ID("hck0", &hck0),
+ CLKDEV_CON_ID("hck1", &hck1),
+};
+
static void __init at572d940hf_register_clocks(void)
{
int i;
@@ -258,14 +304,32 @@ static void __init at572d940hf_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
+
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);
clk_register(&pck3);
+
+ clkdev_add_table(program_clocks_lookups,
+ ARRAY_SIZE(program_clocks_lookups));
+
clk_register(&mAgicV_mem_clk);
+ clkdev_add(&mAgicV_mem_clk_lookup);
clk_register(&hck0);
clk_register(&hck1);
+
+ clkdev_add_table(hc_clocks_lookups,
+ ARRAY_SIZE(hc_clocks_lookups));
+}
+
+struct clk* __init at572d940hf_get_uart_clock(int id)
+{
+ if (id >= ARRAY_SIZE(usart_clocks_lookups))
+ return NULL;
+ return usart_clocks_lookups[id].clk;
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at572d940hf_devices.c b/arch/arm/mach-at91/at572d940hf_devices.c
index e52c8e0..84e0b07 100644
--- a/arch/arm/mach-at91/at572d940hf_devices.c
+++ b/arch/arm/mach-at91/at572d940hf_devices.c
@@ -532,7 +532,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
- at91_clock_associate("spi0_clk", &at572d940hf_spi0_device.dev, "spi_clk");
platform_device_register(&at572d940hf_spi0_device);
}
if (enable_spi1) {
@@ -540,7 +539,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PC1, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PC2, 0); /* SPI1_SPCK */
- at91_clock_associate("spi1_clk", &at572d940hf_spi1_device.dev, "spi_clk");
platform_device_register(&at572d940hf_spi1_device);
}
}
@@ -588,9 +586,6 @@ static struct platform_device at572d940hf_tcb_device = {
static void __init at91_add_device_tc(void)
{
/* this chip has a separate clock and irq for each TC channel */
- at91_clock_associate("tc0_clk", &at572d940hf_tcb_device.dev, "t0_clk");
- at91_clock_associate("tc1_clk", &at572d940hf_tcb_device.dev, "t1_clk");
- at91_clock_associate("tc2_clk", &at572d940hf_tcb_device.dev, "t2_clk");
platform_device_register(&at572d940hf_tcb_device);
}
#else
@@ -828,22 +823,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
case 0: /* DBGU */
pdev = &at572d940hf_dbgu_device;
configure_dbgu_pins();
- at91_clock_associate("mck", &pdev->dev, "usart");
break;
case AT572D940HF_ID_US0:
pdev = &at572d940hf_uart0_device;
configure_usart0_pins(pins);
- at91_clock_associate("usart0_clk", &pdev->dev, "usart");
break;
case AT572D940HF_ID_US1:
pdev = &at572d940hf_uart1_device;
configure_usart1_pins(pins);
- at91_clock_associate("usart1_clk", &pdev->dev, "usart");
break;
case AT572D940HF_ID_US2:
pdev = &at572d940hf_uart2_device;
configure_usart2_pins(pins);
- at91_clock_associate("usart2_clk", &pdev->dev, "usart");
break;
default:
return;
@@ -855,10 +846,21 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
+static struct clk_lookup console_lookups = {
+ .con_id = "usart",
+};
+
void __init at91_set_serial_console(unsigned portnr)
{
- if (portnr < ATMEL_MAX_UART)
+ struct atmel_uart_data *pdata;
+
+ if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
+
+ pdata = atmel_default_console_device->dev.platform_data;
+ console_lookups.clk = at572d940hf_get_uart_clock(pdata->num);
+ clkdev_add(&console_lookups);
+ }
}
void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 6bf8eba..1ba614a1 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -218,6 +218,44 @@ static struct clk *periph_clocks[] __initdata = {
// irq0 .. irq1
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_CON_ID("pioABCD_clk", &pioABCD_clk),
+ CLKDEV_CON_ID("mpb0_clk", &mpb0_clk),
+ CLKDEV_CON_ID("mpb1_clk", &mpb1_clk),
+ CLKDEV_CON_ID("mpb2_clk", &mpb2_clk),
+ CLKDEV_CON_ID("mpb3_clk", &mpb3_clk),
+ CLKDEV_CON_ID("mpb4_clk", &mpb4_clk),
+ CLKDEV_CON_ID("can_clk", &can_clk),
+ CLKDEV_CON_ID("twi_clk", &twi_clk),
+ CLKDEV_CON_ID("ac97_clk", &ac97_clk),
+ CLKDEV_CON_ID("tcb_clk", &tcb_clk),
+ CLKDEV_CON_ID("pwm_clk", &pwm_clk),
+ CLKDEV_CON_ID("macb_clk", &macb_clk),
+ CLKDEV_CON_ID("aestdes_clk", &aestdes_clk),
+ CLKDEV_CON_ID("adc_clk", &adc_clk),
+ CLKDEV_CON_ID("isi_clk", &isi_clk),
+ CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+ CLKDEV_CON_ID("dma_clk", &dma_clk),
+ CLKDEV_CON_ID("udphs_clk", &udphs_clk),
+ CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+ CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+ CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
+ CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk),
+ CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
+
/*
* The four programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@@ -247,6 +285,13 @@ static struct clk pck3 = {
.id = 3,
};
+static struct clk_lookup program_clocks_lookups[] = {
+ CLKDEV_CON_ID("pck0", &pck0),
+ CLKDEV_CON_ID("pck1", &pck1),
+ CLKDEV_CON_ID("pck2", &pck2),
+ CLKDEV_CON_ID("pck3", &pck3),
+};
+
static void __init at91cap9_register_clocks(void)
{
int i;
@@ -254,10 +299,23 @@ static void __init at91cap9_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
+
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);
clk_register(&pck3);
+
+ clkdev_add_table(program_clocks_lookups,
+ ARRAY_SIZE(program_clocks_lookups));
+}
+
+struct clk* __init at91cap9_get_uart_clock(int id)
+{
+ if (id >= ARRAY_SIZE(usart_clocks_lookups))
+ return NULL;
+ return usart_clocks_lookups[id].clk;
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index eae412c..0537e15 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -181,10 +181,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
/* Pullup pin is handled internally by USB device peripheral */
- /* Clocks */
- at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
- at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
-
platform_device_register(&at91_usba_udc_device);
}
#else
@@ -355,7 +351,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
}
mmc0_data = *data;
- at91_clock_associate("mci0_clk", &at91cap9_mmc0_device.dev, "mci_clk");
platform_device_register(&at91cap9_mmc0_device);
} else { /* MCI1 */
/* CLK */
@@ -373,7 +368,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
}
mmc1_data = *data;
- at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk");
platform_device_register(&at91cap9_mmc1_device);
}
}
@@ -614,7 +608,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
- at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk");
platform_device_register(&at91cap9_spi0_device);
}
if (enable_spi1) {
@@ -622,7 +615,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
- at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk");
platform_device_register(&at91cap9_spi1_device);
}
}
@@ -660,7 +652,6 @@ static struct platform_device at91cap9_tcb_device = {
static void __init at91_add_device_tc(void)
{
/* this chip has one clock and irq for all three TC channels */
- at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
platform_device_register(&at91cap9_tcb_device);
}
#else
@@ -1001,12 +992,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
case AT91CAP9_ID_SSC0:
pdev = &at91cap9_ssc0_device;
configure_ssc0_pins(pins);
- at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
break;
case AT91CAP9_ID_SSC1:
pdev = &at91cap9_ssc1_device;
configure_ssc1_pins(pins);
- at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
break;
default:
return;
@@ -1205,22 +1194,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
case 0: /* DBGU */
pdev = &at91cap9_dbgu_device;
configure_dbgu_pins();
- at91_clock_associate("mck", &pdev->dev, "usart");
break;
case AT91CAP9_ID_US0:
pdev = &at91cap9_uart0_device;
configure_usart0_pins(pins);
- at91_clock_associate("usart0_clk", &pdev->dev, "usart");
break;
case AT91CAP9_ID_US1:
pdev = &at91cap9_uart1_device;
configure_usart1_pins(pins);
- at91_clock_associate("usart1_clk", &pdev->dev, "usart");
break;
case AT91CAP9_ID_US2:
pdev = &at91cap9_uart2_device;
configure_usart2_pins(pins);
- at91_clock_associate("usart2_clk", &pdev->dev, "usart");
break;
default:
return;
@@ -1232,10 +1217,21 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
+static struct clk_lookup console_lookups = {
+ .con_id = "usart",
+};
+
void __init at91_set_serial_console(unsigned portnr)
{
- if (portnr < ATMEL_MAX_UART)
+ struct atmel_uart_data *pdata;
+
+ if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
+
+ pdata = atmel_default_console_device->dev.platform_data;
+ console_lookups.clk = at91cap9_get_uart_clock(pdata->num);
+ clkdev_add(&console_lookups);
+ }
}
void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index afb29b9..29a2a8a 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -188,6 +188,36 @@ static struct clk *periph_clocks[] __initdata = {
// irq0 .. irq6
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_CON_ID("udc_clk", &udc_clk),
+ CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+ CLKDEV_CON_ID("ether_clk", ðer_clk),
+ CLKDEV_CON_ID("mci_clk", &mmc_clk),
+ CLKDEV_CON_ID("twi_clk", &twi_clk),
+ CLKDEV_CON_ID("spi_clk", &spi_clk),
+ CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+ CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+ CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_CON_ID("pioD_clk", &pioD_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
+ CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk),
+ CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk),
+ CLKDEV_CON_DEV_ID("ssc", "ssc.2", &ssc2_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+};
+
/*
* The four programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@@ -217,6 +247,13 @@ static struct clk pck3 = {
.id = 3,
};
+static struct clk_lookup program_clocks_lookups[] = {
+ CLKDEV_CON_ID("pck0", &pck0),
+ CLKDEV_CON_ID("pck1", &pck1),
+ CLKDEV_CON_ID("pck2", &pck2),
+ CLKDEV_CON_ID("pck3", &pck3),
+};
+
static void __init at91rm9200_register_clocks(void)
{
int i;
@@ -224,10 +261,23 @@ static void __init at91rm9200_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
+
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);
clk_register(&pck3);
+
+ clkdev_add_table(program_clocks_lookups,
+ ARRAY_SIZE(program_clocks_lookups));
+}
+
+struct clk* __init at91rm9200_get_uart_clock(int id)
+{
+ if (id >= ARRAY_SIZE(usart_clocks_lookups))
+ return NULL;
+ return usart_clocks_lookups[id].clk;
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 761559e..81ba341 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -645,14 +645,7 @@ static struct platform_device at91rm9200_tcb1_device = {
static void __init at91_add_device_tc(void)
{
/* this chip has a separate clock and irq for each TC channel */
- at91_clock_associate("tc0_clk", &at91rm9200_tcb0_device.dev, "t0_clk");
- at91_clock_associate("tc1_clk", &at91rm9200_tcb0_device.dev, "t1_clk");
- at91_clock_associate("tc2_clk", &at91rm9200_tcb0_device.dev, "t2_clk");
platform_device_register(&at91rm9200_tcb0_device);
-
- at91_clock_associate("tc3_clk", &at91rm9200_tcb1_device.dev, "t0_clk");
- at91_clock_associate("tc4_clk", &at91rm9200_tcb1_device.dev, "t1_clk");
- at91_clock_associate("tc5_clk", &at91rm9200_tcb1_device.dev, "t2_clk");
platform_device_register(&at91rm9200_tcb1_device);
}
#else
@@ -849,17 +842,14 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
case AT91RM9200_ID_SSC0:
pdev = &at91rm9200_ssc0_device;
configure_ssc0_pins(pins);
- at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
break;
case AT91RM9200_ID_SSC1:
pdev = &at91rm9200_ssc1_device;
configure_ssc1_pins(pins);
- at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
break;
case AT91RM9200_ID_SSC2:
pdev = &at91rm9200_ssc2_device;
configure_ssc2_pins(pins);
- at91_clock_associate("ssc2_clk", &pdev->dev, "ssc");
break;
default:
return;
@@ -1115,27 +1105,22 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
case 0: /* DBGU */
pdev = &at91rm9200_dbgu_device;
configure_dbgu_pins();
- at91_clock_associate("mck", &pdev->dev, "usart");
break;
case AT91RM9200_ID_US0:
pdev = &at91rm9200_uart0_device;
configure_usart0_pins(pins);
- at91_clock_associate("usart0_clk", &pdev->dev, "usart");
break;
case AT91RM9200_ID_US1:
pdev = &at91rm9200_uart1_device;
configure_usart1_pins(pins);
- at91_clock_associate("usart1_clk", &pdev->dev, "usart");
break;
case AT91RM9200_ID_US2:
pdev = &at91rm9200_uart2_device;
configure_usart2_pins(pins);
- at91_clock_associate("usart2_clk", &pdev->dev, "usart");
break;
case AT91RM9200_ID_US3:
pdev = &at91rm9200_uart3_device;
configure_usart3_pins(pins);
- at91_clock_associate("usart3_clk", &pdev->dev, "usart");
break;
default:
return;
@@ -1147,10 +1132,21 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
+static struct clk_lookup console_lookups = {
+ .con_id = "usart",
+};
+
void __init at91_set_serial_console(unsigned portnr)
{
- if (portnr < ATMEL_MAX_UART)
+ struct atmel_uart_data *pdata;
+
+ if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
+
+ pdata = atmel_default_console_device->dev.platform_data;
+ console_lookups.clk = at91rm9200_get_uart_clock(pdata->num);
+ clkdev_add(&console_lookups);
+ }
}
void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 7bbdd2f..685a379 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -214,6 +214,39 @@ static struct clk *periph_clocks[] __initdata = {
// irq0 .. irq2
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+ CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+ CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_CON_ID("adc_clk", &adc_clk),
+ CLKDEV_CON_ID("mci_clk", &mmc_clk),
+ CLKDEV_CON_ID("udc_clk", &udc_clk),
+ CLKDEV_CON_ID("twi_clk", &twi_clk),
+ CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+ CLKDEV_CON_ID("macb_clk", &macb_clk),
+ CLKDEV_CON_ID("isi_clk", &isi_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+ /* this chip has a separate clock and irq for each TC channel */
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+ CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk),
+ CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
+ CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.5", &usart4_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.6", &usart5_clk),
+};
+
/*
* The two programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@@ -231,6 +264,11 @@ static struct clk pck1 = {
.id = 1,
};
+static struct clk_lookup program_clocks_lookups[] = {
+ CLKDEV_CON_ID("pck0", &pck0),
+ CLKDEV_CON_ID("pck1", &pck1),
+};
+
static void __init at91sam9260_register_clocks(void)
{
int i;
@@ -238,8 +276,21 @@ static void __init at91sam9260_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
+
clk_register(&pck0);
clk_register(&pck1);
+
+ clkdev_add_table(program_clocks_lookups,
+ ARRAY_SIZE(program_clocks_lookups));
+}
+
+struct clk* __init at91sam9260_get_uart_clock(int id)
+{
+ if (id >= ARRAY_SIZE(usart_clocks_lookups))
+ return NULL;
+ return usart_clocks_lookups[id].clk;
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 6f8ec8d..e323c17 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -609,7 +609,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
- at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
platform_device_register(&at91sam9260_spi0_device);
}
if (enable_spi1) {
@@ -617,7 +616,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
- at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
platform_device_register(&at91sam9260_spi1_device);
}
}
@@ -694,15 +692,7 @@ static struct platform_device at91sam9260_tcb1_device = {
static void __init at91_add_device_tc(void)
{
- /* this chip has a separate clock and irq for each TC channel */
- at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
- at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
- at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
platform_device_register(&at91sam9260_tcb0_device);
-
- at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
- at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
- at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
platform_device_register(&at91sam9260_tcb1_device);
}
#else
@@ -820,7 +810,6 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
case AT91SAM9260_ID_SSC:
pdev = &at91sam9260_ssc_device;
configure_ssc_pins(pins);
- at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
break;
default:
return;
@@ -1145,37 +1134,30 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
case 0: /* DBGU */
pdev = &at91sam9260_dbgu_device;
configure_dbgu_pins();
- at91_clock_associate("mck", &pdev->dev, "usart");
break;
case AT91SAM9260_ID_US0:
pdev = &at91sam9260_uart0_device;
configure_usart0_pins(pins);
- at91_clock_associate("usart0_clk", &pdev->dev, "usart");
break;
case AT91SAM9260_ID_US1:
pdev = &at91sam9260_uart1_device;
configure_usart1_pins(pins);
- at91_clock_associate("usart1_clk", &pdev->dev, "usart");
break;
case AT91SAM9260_ID_US2:
pdev = &at91sam9260_uart2_device;
configure_usart2_pins(pins);
- at91_clock_associate("usart2_clk", &pdev->dev, "usart");
break;
case AT91SAM9260_ID_US3:
pdev = &at91sam9260_uart3_device;
configure_usart3_pins(pins);
- at91_clock_associate("usart3_clk", &pdev->dev, "usart");
break;
case AT91SAM9260_ID_US4:
pdev = &at91sam9260_uart4_device;
configure_usart4_pins();
- at91_clock_associate("usart4_clk", &pdev->dev, "usart");
break;
case AT91SAM9260_ID_US5:
pdev = &at91sam9260_uart5_device;
configure_usart5_pins();
- at91_clock_associate("usart5_clk", &pdev->dev, "usart");
break;
default:
return;
@@ -1187,10 +1169,21 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
+static struct clk_lookup console_lookups = {
+ .con_id = "usart",
+};
+
void __init at91_set_serial_console(unsigned portnr)
{
- if (portnr < ATMEL_MAX_UART)
+ struct atmel_uart_data *pdata;
+
+ if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
+
+ pdata = atmel_default_console_device->dev.platform_data;
+ console_lookups.clk = at91sam9260_get_uart_clock(pdata->num);
+ clkdev_add(&console_lookups);
+ }
}
void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 768f4b7..bf28740 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -170,6 +170,33 @@ static struct clk *periph_clocks[] __initdata = {
// irq0 .. irq2
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+ CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+ CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_CON_ID("mci_clk", &mmc_clk),
+ CLKDEV_CON_ID("udc_clk", &udc_clk),
+ CLKDEV_CON_ID("twi_clk", &twi_clk),
+ CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+ CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+ /* this chip has a separate clock and irq for each TC channel */
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
+
/*
* The four programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@@ -199,6 +226,13 @@ static struct clk pck3 = {
.id = 3,
};
+static struct clk_lookup program_clocks_lookups[] = {
+ CLKDEV_CON_ID("pck0", &pck0),
+ CLKDEV_CON_ID("pck1", &pck1),
+ CLKDEV_CON_ID("pck2", &pck2),
+ CLKDEV_CON_ID("pck3", &pck3),
+};
+
/* HClocks */
static struct clk hck0 = {
.name = "hck0",
@@ -213,6 +247,11 @@ static struct clk hck1 = {
.id = 1,
};
+static struct clk_lookup hc_clocks_lookups[] = {
+ CLKDEV_CON_ID("hck0", &hck0),
+ CLKDEV_CON_ID("hck1", &hck1),
+};
+
static void __init at91sam9261_register_clocks(void)
{
int i;
@@ -220,13 +259,29 @@ static void __init at91sam9261_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
+
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);
clk_register(&pck3);
+ clkdev_add_table(program_clocks_lookups,
+ ARRAY_SIZE(program_clocks_lookups));
+
clk_register(&hck0);
clk_register(&hck1);
+
+ clkdev_add_table(hc_clocks_lookups,
+ ARRAY_SIZE(hc_clocks_lookups));
+}
+
+struct clk* __init at91sam9261_get_uart_clock(int id)
+{
+ if (id >= ARRAY_SIZE(usart_clocks_lookups))
+ return NULL;
+ return usart_clocks_lookups[id].clk;
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 8792f9b..d078b16 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -426,7 +426,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
- at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
platform_device_register(&at91sam9261_spi0_device);
}
if (enable_spi1) {
@@ -434,7 +433,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
- at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
platform_device_register(&at91sam9261_spi1_device);
}
}
@@ -581,10 +579,6 @@ static struct platform_device at91sam9261_tcb_device = {
static void __init at91_add_device_tc(void)
{
- /* this chip has a separate clock and irq for each TC channel */
- at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk");
- at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk");
- at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk");
platform_device_register(&at91sam9261_tcb_device);
}
#else
@@ -786,17 +780,14 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
case AT91SAM9261_ID_SSC0:
pdev = &at91sam9261_ssc0_device;
configure_ssc0_pins(pins);
- at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
break;
case AT91SAM9261_ID_SSC1:
pdev = &at91sam9261_ssc1_device;
configure_ssc1_pins(pins);
- at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
break;
case AT91SAM9261_ID_SSC2:
pdev = &at91sam9261_ssc2_device;
configure_ssc2_pins(pins);
- at91_clock_associate("ssc2_clk", &pdev->dev, "pclk");
break;
default:
return;
@@ -995,22 +986,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
case 0: /* DBGU */
pdev = &at91sam9261_dbgu_device;
configure_dbgu_pins();
- at91_clock_associate("mck", &pdev->dev, "usart");
break;
case AT91SAM9261_ID_US0:
pdev = &at91sam9261_uart0_device;
configure_usart0_pins(pins);
- at91_clock_associate("usart0_clk", &pdev->dev, "usart");
break;
case AT91SAM9261_ID_US1:
pdev = &at91sam9261_uart1_device;
configure_usart1_pins(pins);
- at91_clock_associate("usart1_clk", &pdev->dev, "usart");
break;
case AT91SAM9261_ID_US2:
pdev = &at91sam9261_uart2_device;
configure_usart2_pins(pins);
- at91_clock_associate("usart2_clk", &pdev->dev, "usart");
break;
default:
return;
@@ -1022,10 +1009,21 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
+static struct clk_lookup console_lookups = {
+ .con_id = "usart",
+};
+
void __init at91_set_serial_console(unsigned portnr)
{
- if (portnr < ATMEL_MAX_UART)
+ struct atmel_uart_data *pdata;
+
+ if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
+
+ pdata = atmel_default_console_device->dev.platform_data;
+ console_lookups.clk = at91sam9261_get_uart_clock(pdata->num);
+ clkdev_add(&console_lookups);
+ }
}
void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 97aae4f..763170b 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -195,6 +195,37 @@ static struct clk *periph_clocks[] __initdata = {
// irq0 .. irq1
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+ CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+ CLKDEV_CON_ID("pioCDE_clk", &pioCDE_clk),
+ CLKDEV_CON_ID("can_clk", &can_clk),
+ CLKDEV_CON_ID("twi_clk", &twi_clk),
+ CLKDEV_CON_ID("ac97_clk", &ac97_clk),
+ CLKDEV_CON_ID("pwm_clk", &pwm_clk),
+ CLKDEV_CON_ID("macb_clk", &macb_clk),
+ CLKDEV_CON_ID("dma_clk", &dma_clk),
+ CLKDEV_CON_ID("2dge_clk", &twodge_clk),
+ CLKDEV_CON_ID("udc_clkk", &udc_clk),
+ CLKDEV_CON_ID("isi_clk", &isi_clk),
+ CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+ CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
+
/*
* The four programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@@ -224,6 +255,13 @@ static struct clk pck3 = {
.id = 3,
};
+static struct clk_lookup program_clocks_lookups[] = {
+ CLKDEV_CON_ID("pck0", &pck0),
+ CLKDEV_CON_ID("pck1", &pck1),
+ CLKDEV_CON_ID("pck2", &pck2),
+ CLKDEV_CON_ID("pck3", &pck3),
+};
+
static void __init at91sam9263_register_clocks(void)
{
int i;
@@ -231,10 +269,26 @@ static void __init at91sam9263_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
+
+ clkdev_add_table(usart_clocks_lookups,
+ ARRAY_SIZE(usart_clocks_lookups));
+
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);
clk_register(&pck3);
+
+ clkdev_add_table(program_clocks_lookups,
+ ARRAY_SIZE(program_clocks_lookups));
+}
+
+struct clk* __init at91sam9263_get_uart_clock(int id)
+{
+ if (id >= ARRAY_SIZE(usart_clocks_lookups))
+ return NULL;
+ return usart_clocks_lookups[id].clk;
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 47a9f96..b84f178 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -308,7 +308,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
}
mmc0_data = *data;
- at91_clock_associate("mci0_clk", &at91sam9263_mmc0_device.dev, "mci_clk");
platform_device_register(&at91sam9263_mmc0_device);
} else { /* MCI1 */
/* CLK */
@@ -339,7 +338,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
}
mmc1_data = *data;
- at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
platform_device_register(&at91sam9263_mmc1_device);
}
}
@@ -686,7 +684,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
- at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
platform_device_register(&at91sam9263_spi0_device);
}
if (enable_spi1) {
@@ -694,7 +691,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
- at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
platform_device_register(&at91sam9263_spi1_device);
}
}
@@ -942,7 +938,6 @@ static struct platform_device at91sam9263_tcb_device = {
static void __init at91_add_device_tc(void)
{
/* this chip has one clock and irq for all three TC channels */
- at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
platform_device_register(&at91sam9263_tcb_device);
}
#else
@@ -1171,12 +1166,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
case AT91SAM9263_ID_SSC0:
pdev = &at91sam9263_ssc0_device;
configure_ssc0_pins(pins);
- at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
break;
case AT91SAM9263_ID_SSC1:
pdev = &at91sam9263_ssc1_device;
configure_ssc1_pins(pins);
- at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
break;
default:
return;
@@ -1376,22 +1369,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
case 0: /* DBGU */
pdev = &at91sam9263_dbgu_device;
configure_dbgu_pins();
- at91_clock_associate("mck", &pdev->dev, "usart");
break;
case AT91SAM9263_ID_US0:
pdev = &at91sam9263_uart0_device;
configure_usart0_pins(pins);
- at91_clock_associate("usart0_clk", &pdev->dev, "usart");
break;
case AT91SAM9263_ID_US1:
pdev = &at91sam9263_uart1_device;
configure_usart1_pins(pins);
- at91_clock_associate("usart1_clk", &pdev->dev, "usart");
break;
case AT91SAM9263_ID_US2:
pdev = &at91sam9263_uart2_device;
configure_usart2_pins(pins);
- at91_clock_associate("usart2_clk", &pdev->dev, "usart");
break;
default:
return;
@@ -1403,10 +1392,21 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
+static struct clk_lookup console_lookups = {
+ .con_id = "usart",
+};
+
void __init at91_set_serial_console(unsigned portnr)
{
- if (portnr < ATMEL_MAX_UART)
+ struct atmel_uart_data *pdata;
+
+ if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
+
+ pdata = atmel_default_console_device->dev.platform_data;
+ console_lookups.clk = at91sam9263_get_uart_clock(pdata->num);
+ clkdev_add(&console_lookups);
+ }
}
void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index b497614..a1561d4 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -180,22 +180,6 @@ static struct clk vdec_clk = {
.type = CLK_TYPE_PERIPHERAL,
};
-/* One additional fake clock for ohci */
-static struct clk ohci_clk = {
- .name = "ohci_clk",
- .pmc_mask = 0,
- .type = CLK_TYPE_PERIPHERAL,
- .parent = &uhphs_clk,
-};
-
-/* One additional fake clock for second TC block */
-static struct clk tcb1_clk = {
- .name = "tcb1_clk",
- .pmc_mask = 0,
- .type = CLK_TYPE_PERIPHERAL,
- .parent = &tcb0_clk,
-};
-
static struct clk *periph_clocks[] __initdata = {
&pioA_clk,
&pioB_clk,
@@ -224,10 +208,52 @@ static struct clk *periph_clocks[] __initdata = {
&udphs_clk,
&mmc1_clk,
// irq0
- &ohci_clk,
- &tcb1_clk,
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+ CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+ CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_CON_ID("pioDE_clk", &pioDE_clk),
+ CLKDEV_CON_ID("twi0_clk", &twi0_clk),
+ CLKDEV_CON_ID("twi1_clk", &twi1_clk),
+ CLKDEV_CON_ID("pwm_clk", &pwm_clk),
+ CLKDEV_CON_ID("tsc_clk", &tsc_clk),
+ CLKDEV_CON_ID("dma_clk", &dma_clk),
+ CLKDEV_CON_ID("uhphs_clk", &uhphs_clk),
+ CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+ CLKDEV_CON_ID("ac97_clk", &ac97_clk),
+ CLKDEV_CON_ID("macb_clk", &macb_clk),
+ CLKDEV_CON_ID("isi_clk", &isi_clk),
+ CLKDEV_CON_ID("udphs_clk", &udphs_clk),
+ /* One additional fake clock for ohci */
+ CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
+ CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci.0", &uhphs_clk),
+ CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+ CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+};
+
+
+/* Video decoder clock - Only for sam9m10/sam9m11 */
+static struct clk_lookup vdec_clk_lookup =
+ CLKDEV_CON_ID("vdec_clk", &vdec_clk);
+
/*
* The two programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@@ -245,6 +271,11 @@ static struct clk pck1 = {
.id = 1,
};
+static struct clk_lookup program_clocks_lookups[] = {
+ CLKDEV_CON_ID("pck0", &pck0),
+ CLKDEV_CON_ID("pck1", &pck1),
+};
+
static void __init at91sam9g45_register_clocks(void)
{
int i;
@@ -252,11 +283,26 @@ static void __init at91sam9g45_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
- if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
+
+ if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11()) {
clk_register(&vdec_clk);
+ clkdev_add(&vdec_clk_lookup);
+ }
clk_register(&pck0);
clk_register(&pck1);
+
+ clkdev_add_table(program_clocks_lookups,
+ ARRAY_SIZE(program_clocks_lookups));
+}
+
+struct clk* __init at91sam9g45_get_uart_clock(int id)
+{
+ if (id >= ARRAY_SIZE(usart_clocks_lookups))
+ return NULL;
+ return usart_clocks_lookups[id].clk;
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 6c1a2fe..f9ac1da 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -180,7 +180,6 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
}
usbh_ehci_data = *data;
- at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk");
platform_device_register(&at91_usbh_ehci_device);
}
#else
@@ -266,10 +265,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
/* Pullup pin is handled internally by USB device peripheral */
- /* Clocks */
- at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
- at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
-
platform_device_register(&at91_usba_udc_device);
}
#else
@@ -478,7 +473,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
}
mmc0_data = *data;
- at91_clock_associate("mci0_clk", &at91sam9g45_mmc0_device.dev, "mci_clk");
platform_device_register(&at91sam9g45_mmc0_device);
} else { /* MCI1 */
@@ -504,7 +498,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
}
mmc1_data = *data;
- at91_clock_associate("mci1_clk", &at91sam9g45_mmc1_device.dev, "mci_clk");
platform_device_register(&at91sam9g45_mmc1_device);
}
@@ -801,7 +794,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI0_MOSI */
at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI0_SPCK */
- at91_clock_associate("spi0_clk", &at91sam9g45_spi0_device.dev, "spi_clk");
platform_device_register(&at91sam9g45_spi0_device);
}
if (enable_spi1) {
@@ -809,7 +801,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
at91_set_A_periph(AT91_PIN_PB15, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB16, 0); /* SPI1_SPCK */
- at91_clock_associate("spi1_clk", &at91sam9g45_spi1_device.dev, "spi_clk");
platform_device_register(&at91sam9g45_spi1_device);
}
}
@@ -1000,9 +991,7 @@ static struct platform_device at91sam9g45_tcb1_device = {
static void __init at91_add_device_tc(void)
{
/* this chip has one clock and irq for all six TC channels */
- at91_clock_associate("tcb0_clk", &at91sam9g45_tcb0_device.dev, "t0_clk");
platform_device_register(&at91sam9g45_tcb0_device);
- at91_clock_associate("tcb1_clk", &at91sam9g45_tcb1_device.dev, "t0_clk");
platform_device_register(&at91sam9g45_tcb1_device);
}
#else
@@ -1286,12 +1275,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
case AT91SAM9G45_ID_SSC0:
pdev = &at91sam9g45_ssc0_device;
configure_ssc0_pins(pins);
- at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
break;
case AT91SAM9G45_ID_SSC1:
pdev = &at91sam9g45_ssc1_device;
configure_ssc1_pins(pins);
- at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
break;
default:
return;
@@ -1533,27 +1520,22 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
case 0: /* DBGU */
pdev = &at91sam9g45_dbgu_device;
configure_dbgu_pins();
- at91_clock_associate("mck", &pdev->dev, "usart");
break;
case AT91SAM9G45_ID_US0:
pdev = &at91sam9g45_uart0_device;
configure_usart0_pins(pins);
- at91_clock_associate("usart0_clk", &pdev->dev, "usart");
break;
case AT91SAM9G45_ID_US1:
pdev = &at91sam9g45_uart1_device;
configure_usart1_pins(pins);
- at91_clock_associate("usart1_clk", &pdev->dev, "usart");
break;
case AT91SAM9G45_ID_US2:
pdev = &at91sam9g45_uart2_device;
configure_usart2_pins(pins);
- at91_clock_associate("usart2_clk", &pdev->dev, "usart");
break;
case AT91SAM9G45_ID_US3:
pdev = &at91sam9g45_uart3_device;
configure_usart3_pins(pins);
- at91_clock_associate("usart3_clk", &pdev->dev, "usart");
break;
default:
return;
@@ -1565,10 +1547,21 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
+static struct clk_lookup console_lookups = {
+ .con_id = "usart",
+};
+
void __init at91_set_serial_console(unsigned portnr)
{
- if (portnr < ATMEL_MAX_UART)
+ struct atmel_uart_data *pdata;
+
+ if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
+
+ pdata = atmel_default_console_device->dev.platform_data;
+ console_lookups.clk = at91sam9g45_get_uart_clock(pdata->num);
+ clkdev_add(&console_lookups);
+ }
}
void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 19e2e5a..80acd8f 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -183,6 +183,39 @@ static struct clk *periph_clocks[] __initdata = {
// irq0
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+ CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+ CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_CON_ID("pioD_clk", &pioD_clk),
+ CLKDEV_CON_ID("mci_clk", &mmc_clk),
+ CLKDEV_CON_ID("twi0_clk", &twi0_clk),
+ CLKDEV_CON_ID("twi1_clk", &twi1_clk),
+ CLKDEV_CON_ID("spi_clk", &spi_clk),
+ CLKDEV_CON_ID("pwm_clk", &pwm_clk),
+ CLKDEV_CON_ID("tsc_clk", &tsc_clk),
+ CLKDEV_CON_ID("dma_clk", &dma_clk),
+ CLKDEV_CON_ID("udphs_clk", &udphs_clk),
+ CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+ CLKDEV_CON_ID("ac97_clk", &ac97_clk),
+ CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+ CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+ CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+};
+
+
/*
* The two programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@@ -200,6 +233,11 @@ static struct clk pck1 = {
.id = 1,
};
+static struct clk_lookup program_clocks_lookups[] = {
+ CLKDEV_CON_ID("pck0", &pck0),
+ CLKDEV_CON_ID("pck1", &pck1),
+};
+
static void __init at91sam9rl_register_clocks(void)
{
int i;
@@ -207,8 +245,21 @@ static void __init at91sam9rl_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
+
clk_register(&pck0);
clk_register(&pck1);
+
+ clkdev_add_table(program_clocks_lookups,
+ ARRAY_SIZE(program_clocks_lookups));
+}
+
+struct clk* __init at91sam9rl_get_uart_clock(int id)
+{
+ if (id >= ARRAY_SIZE(usart_clocks_lookups))
+ return NULL;
+ return usart_clocks_lookups[id].clk;
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 2d8d519..e4dc0e9 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -155,10 +155,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
/* Pullup pin is handled internally by USB device peripheral */
- /* Clocks */
- at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
- at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
-
platform_device_register(&at91_usba_udc_device);
}
#else
@@ -606,9 +602,6 @@ static struct platform_device at91sam9rl_tcb_device = {
static void __init at91_add_device_tc(void)
{
/* this chip has a separate clock and irq for each TC channel */
- at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk");
- at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk");
- at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk");
platform_device_register(&at91sam9rl_tcb_device);
}
#else
@@ -892,12 +885,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
case AT91SAM9RL_ID_SSC0:
pdev = &at91sam9rl_ssc0_device;
configure_ssc0_pins(pins);
- at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
break;
case AT91SAM9RL_ID_SSC1:
pdev = &at91sam9rl_ssc1_device;
configure_ssc1_pins(pins);
- at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
break;
default:
return;
@@ -1147,27 +1138,22 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
case 0: /* DBGU */
pdev = &at91sam9rl_dbgu_device;
configure_dbgu_pins();
- at91_clock_associate("mck", &pdev->dev, "usart");
break;
case AT91SAM9RL_ID_US0:
pdev = &at91sam9rl_uart0_device;
configure_usart0_pins(pins);
- at91_clock_associate("usart0_clk", &pdev->dev, "usart");
break;
case AT91SAM9RL_ID_US1:
pdev = &at91sam9rl_uart1_device;
configure_usart1_pins(pins);
- at91_clock_associate("usart1_clk", &pdev->dev, "usart");
break;
case AT91SAM9RL_ID_US2:
pdev = &at91sam9rl_uart2_device;
configure_usart2_pins(pins);
- at91_clock_associate("usart2_clk", &pdev->dev, "usart");
break;
case AT91SAM9RL_ID_US3:
pdev = &at91sam9rl_uart3_device;
configure_usart3_pins(pins);
- at91_clock_associate("usart3_clk", &pdev->dev, "usart");
break;
default:
return;
@@ -1179,10 +1165,21 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
at91_uarts[portnr] = pdev;
}
+static struct clk_lookup console_lookups = {
+ .con_id = "usart",
+};
+
void __init at91_set_serial_console(unsigned portnr)
{
- if (portnr < ATMEL_MAX_UART)
+ struct atmel_uart_data *pdata;
+
+ if (portnr < ATMEL_MAX_UART) {
atmel_default_console_device = at91_uarts[portnr];
+
+ pdata = atmel_default_console_device->dev.platform_data;
+ console_lookups.clk = at91sam9rl_get_uart_clock(pdata->num);
+ clkdev_add(&console_lookups);
+ }
}
void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index ad3ec85..56ba3bd 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -37,11 +37,6 @@ unsigned long clk_get_rate(struct clk *clk)
return AT91X40_MASTER_CLOCK;
}
-struct clk *clk_get(struct device *dev, const char *id)
-{
- return NULL;
-}
-
void __init at91x40_initialize(unsigned long main_clock)
{
at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 9113da6..2f2f8a6 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -163,7 +163,7 @@ static struct clk udpck = {
.parent = &pllb,
.mode = pmc_sys_mode,
};
-static struct clk utmi_clk = {
+struct clk utmi_clk = {
.name = "utmi_clk",
.parent = &main_clk,
.pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */
@@ -182,7 +182,7 @@ static struct clk uhpck = {
* memory, interfaces to on-chip peripherals, the AIC, and sometimes more
* (e.g baud rate generation). It's sourced from one of the primary clocks.
*/
-static struct clk mck = {
+struct clk mck = {
.name = "mck",
.pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */
};
@@ -215,43 +215,6 @@ static struct clk __init *at91_css_to_clk(unsigned long css)
return NULL;
}
-/*
- * Associate a particular clock with a function (eg, "uart") and device.
- * The drivers can then request the same 'function' with several different
- * devices and not care about which clock name to use.
- */
-void __init at91_clock_associate(const char *id, struct device *dev, const char *func)
-{
- struct clk *clk = clk_get(NULL, id);
-
- if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
- return;
-
- clk->function = func;
- clk->dev = dev;
-}
-
-/* clocks cannot be de-registered no refcounting necessary */
-struct clk *clk_get(struct device *dev, const char *id)
-{
- struct clk *clk;
-
- list_for_each_entry(clk, &clocks, node) {
- if (strcmp(id, clk->name) == 0)
- return clk;
- if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
- return clk;
- }
-
- return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
static void __clk_enable(struct clk *clk)
{
if (clk->parent)
@@ -662,6 +625,17 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
}
+static struct clk_lookup lookups[] = {
+ CLKDEV_CON_ID("clk32k", &clk32k),
+ CLKDEV_CON_ID("main", &main_clk),
+ CLKDEV_CON_ID("plla", &plla),
+ CLKDEV_CON_ID("mck", &mck),
+ CLKDEV_CON_ID("pllb", &pllb),
+ CLKDEV_CON_ID("udpck", &udpck),
+ CLKDEV_CON_ID("utmi_clk", &utmi_clk),
+ CLKDEV_CON_ID("uhpck", &uhpck),
+};
+
int __init at91_clock_init(unsigned long main_clock)
{
unsigned tmp, freq, mckr;
@@ -771,6 +745,8 @@ int __init at91_clock_init(unsigned long main_clock)
/* MCK and CPU clock are "always on" */
clk_enable(&mck);
+ clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
printk("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n",
freq / 1000000, (unsigned) mck.rate_hz / 1000000,
(unsigned) main_clock / 1000000,
diff --git a/arch/arm/mach-at91/clock.h b/arch/arm/mach-at91/clock.h
index 6cf4b78..f0d8776 100644
--- a/arch/arm/mach-at91/clock.h
+++ b/arch/arm/mach-at91/clock.h
@@ -6,6 +6,8 @@
* published by the Free Software Foundation.
*/
+#include <linux/clkdev.h>
+
#define CLK_TYPE_PRIMARY 0x1
#define CLK_TYPE_PLL 0x2
#define CLK_TYPE_PROGRAMMABLE 0x4
@@ -16,8 +18,6 @@
struct clk {
struct list_head node;
const char *name; /* unique clock name */
- const char *function; /* function of the clock */
- struct device *dev; /* device associated with function */
unsigned long rate_hz;
struct clk *parent;
u32 pmc_mask;
@@ -29,3 +29,18 @@ struct clk {
extern int __init clk_register(struct clk *clk);
+extern struct clk mck;
+extern struct clk utmi_clk;
+
+#define CLKDEV_CON_ID(_id, _clk) \
+ { \
+ .con_id = _id, \
+ .clk = _clk, \
+ }
+
+#define CLKDEV_CON_DEV_ID(_con_id, _dev_id, _clk) \
+ { \
+ .con_id = _con_id, \
+ .dev_id = _dev_id, \
+ .clk = _clk, \
+ }
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 3b5ff68..a039726 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -8,6 +8,8 @@
* published by the Free Software Foundation.
*/
+#include <linux/clkdev.h>
+
/* Processors */
extern void __init at91rm9200_set_type(int type);
extern void __init at91_initialize(unsigned long main_clock);
@@ -26,8 +28,16 @@ extern struct sys_timer at91x40_timer;
/* Clocks */
extern int __init at91_clock_init(unsigned long main_clock);
+extern struct clk* __init at91rm9200_get_uart_clock(int id);
+extern struct clk* __init at91sam9260_get_uart_clock(int id);
+extern struct clk* __init at91sam9261_get_uart_clock(int id);
+extern struct clk* __init at91sam9263_get_uart_clock(int id);
+extern struct clk* __init at91sam9rl_get_uart_clock(int id);
+extern struct clk* __init at91sam9g45_get_uart_clock(int id);
+extern struct clk* __init at91x40_get_uart_clock(int id);
+extern struct clk* __init at91cap9_get_uart_clock(int id);
+extern struct clk* __init at572d940hf_get_uart_clock(int id);
struct device;
-extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
/* Power Management */
extern void at91_irq_suspend(void);
diff --git a/arch/arm/mach-at91/include/mach/clkdev.h b/arch/arm/mach-at91/include/mach/clkdev.h
new file mode 100644
index 0000000..04b37a8
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 07/14] at91: switch gpio to early platfrom device
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (5 preceding siblings ...)
2011-04-25 18:31 ` [PATCH 06/14 v3] at91: switch to CLKDEV_LOOKUP Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 22:51 ` Ryan Mallon
2011-04-25 18:31 ` [PATCH 08/14] at91: move gpio to drivers/gpio Jean-Christophe PLAGNIOL-VILLARD
` (7 subsequent siblings)
14 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
need patch
clkdev: add support to lookup for early platform device
Best Regards,
J.
arch/arm/mach-at91/at572d940hf.c | 30 ++++++------
arch/arm/mach-at91/at91cap9.c | 34 +++++++-------
arch/arm/mach-at91/at91rm9200.c | 43 +++++++++--------
arch/arm/mach-at91/at91sam9260.c | 30 ++++++------
arch/arm/mach-at91/at91sam9261.c | 30 ++++++------
arch/arm/mach-at91/at91sam9263.c | 42 ++++++++---------
arch/arm/mach-at91/at91sam9g45.c | 43 ++++++++---------
arch/arm/mach-at91/at91sam9rl.c | 37 +++++++--------
arch/arm/mach-at91/clock.h | 6 ++
arch/arm/mach-at91/devices.c | 15 ++++++
arch/arm/mach-at91/devices.h | 55 +++++++++++++++++++++
arch/arm/mach-at91/generic.h | 6 --
arch/arm/mach-at91/gpio.c | 78 +++++++++++++++++++-----------
arch/arm/mach-at91/soc.c | 97 ++++++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/soc.h | 4 ++
15 files changed, 365 insertions(+), 185 deletions(-)
create mode 100644 arch/arm/mach-at91/devices.c
create mode 100644 arch/arm/mach-at91/devices.h
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
index b9c48d5..b788861 100644
--- a/arch/arm/mach-at91/at572d940hf.c
+++ b/arch/arm/mach-at91/at572d940hf.c
@@ -202,9 +202,9 @@ static struct clk *periph_clocks[] __initdata = {
};
static struct clk_lookup periph_clocks_lookups[] = {
- CLKDEV_CON_ID("pioA_clk", &pioA_clk),
- CLKDEV_CON_ID("pioB_clk", &pioB_clk),
- CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_DEV_ID("at91_gpio.0", &pioA_clk),
+ CLKDEV_DEV_ID("at91_gpio.1", &pioB_clk),
+ CLKDEV_DEV_ID("at91_gpio.2", &pioC_clk),
CLKDEV_CON_ID("macb_clk", &macb_clk),
CLKDEV_CON_ID("mci_clk", &mmc_clk),
CLKDEV_CON_ID("udc_clk", &udc_clk),
@@ -336,19 +336,16 @@ struct clk* __init at572d940hf_get_uart_clock(int id)
* GPIO
* -------------------------------------------------------------------- */
-static struct at91_gpio_bank at572d940hf_gpio[] = {
+static struct at91_dev_resource at572d940hf_pios[] __initdata = {
{
- .id = AT572D940HF_ID_PIOA,
- .offset = AT91_PIOA,
- .clock = &pioA_clk,
+ .mmio_base = AT91_PIOA,
+ .irq = AT572D940HF_ID_PIOA,
}, {
- .id = AT572D940HF_ID_PIOB,
- .offset = AT91_PIOB,
- .clock = &pioB_clk,
+ .mmio_base = AT91_PIOB,
+ .irq = AT572D940HF_ID_PIOB,
}, {
- .id = AT572D940HF_ID_PIOC,
- .offset = AT91_PIOC,
- .clock = &pioC_clk,
+ .mmio_base = AT91_PIOC,
+ .irq = AT572D940HF_ID_PIOC,
}
};
@@ -376,9 +373,6 @@ static void __init at572d940hf_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at572d940hf_register_clocks();
-
- /* Register GPIO subsystem */
- at91_gpio_init(at572d940hf_gpio, 3);
}
/* --------------------------------------------------------------------
@@ -427,4 +421,8 @@ struct at91_soc __initdata at572d940hf_soc = {
.name = "at572d940hf",
.default_irq_priority = at572d940hf_default_irq_priority,
.init = at572d940hf_initialize,
+ .gpio = {
+ .resource = at572d940hf_pios,
+ .num_resources = ARRAY_SIZE(at572d940hf_pios),
+ },
};
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 1ba614a1..f60ec74 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -219,7 +219,10 @@ static struct clk *periph_clocks[] __initdata = {
};
static struct clk_lookup periph_clocks_lookups[] = {
- CLKDEV_CON_ID("pioABCD_clk", &pioABCD_clk),
+ CLKDEV_DEV_ID("at91_gpio.0", &pioABCD_clk),
+ CLKDEV_DEV_ID("at91_gpio.1", &pioABCD_clk),
+ CLKDEV_DEV_ID("at91_gpio.2", &pioABCD_clk),
+ CLKDEV_DEV_ID("at91_gpio.3", &pioABCD_clk),
CLKDEV_CON_ID("mpb0_clk", &mpb0_clk),
CLKDEV_CON_ID("mpb1_clk", &mpb1_clk),
CLKDEV_CON_ID("mpb2_clk", &mpb2_clk),
@@ -322,23 +325,19 @@ struct clk* __init at91cap9_get_uart_clock(int id)
* GPIO
* -------------------------------------------------------------------- */
-static struct at91_gpio_bank at91cap9_gpio[] = {
+static struct at91_dev_resource at91cap9_pios[] __initdata = {
{
- .id = AT91CAP9_ID_PIOABCD,
- .offset = AT91_PIOA,
- .clock = &pioABCD_clk,
+ .mmio_base = AT91_PIOA,
+ .irq = AT91CAP9_ID_PIOABCD,
}, {
- .id = AT91CAP9_ID_PIOABCD,
- .offset = AT91_PIOB,
- .clock = &pioABCD_clk,
+ .mmio_base = AT91_PIOB,
+ .irq = AT91CAP9_ID_PIOABCD,
}, {
- .id = AT91CAP9_ID_PIOABCD,
- .offset = AT91_PIOC,
- .clock = &pioABCD_clk,
+ .mmio_base = AT91_PIOC,
+ .irq = AT91CAP9_ID_PIOABCD,
}, {
- .id = AT91CAP9_ID_PIOABCD,
- .offset = AT91_PIOD,
- .clock = &pioABCD_clk,
+ .mmio_base = AT91_PIOD,
+ .irq = AT91CAP9_ID_PIOABCD,
}
};
@@ -372,9 +371,6 @@ static void __init at91cap9_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at91cap9_register_clocks();
- /* Register GPIO subsystem */
- at91_gpio_init(at91cap9_gpio, 4);
-
/* Remember the silicon revision */
if (cpu_is_at91cap9_revB())
system_rev = 0xB;
@@ -428,4 +424,8 @@ struct at91_soc __initdata at91cap9_soc = {
.name = "at91cap9",
.default_irq_priority = at91cap9_default_irq_priority,
.init = at91cap9_initialize,
+ .gpio = {
+ .resource = at91cap9_pios,
+ .num_resources = ARRAY_SIZE(at91cap9_pios),
+ },
};
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 29a2a8a..e80d544 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -189,16 +189,16 @@ static struct clk *periph_clocks[] __initdata = {
};
static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_DEV_ID("at91_gpio.0", &pioA_clk),
+ CLKDEV_DEV_ID("at91_gpio.1", &pioB_clk),
+ CLKDEV_DEV_ID("at91_gpio.2", &pioC_clk),
+ CLKDEV_DEV_ID("at91_gpio.3", &pioD_clk),
CLKDEV_CON_ID("udc_clk", &udc_clk),
CLKDEV_CON_ID("ohci_clk", &ohci_clk),
CLKDEV_CON_ID("ether_clk", ðer_clk),
CLKDEV_CON_ID("mci_clk", &mmc_clk),
CLKDEV_CON_ID("twi_clk", &twi_clk),
CLKDEV_CON_ID("spi_clk", &spi_clk),
- CLKDEV_CON_ID("pioA_clk", &pioA_clk),
- CLKDEV_CON_ID("pioB_clk", &pioB_clk),
- CLKDEV_CON_ID("pioC_clk", &pioC_clk),
- CLKDEV_CON_ID("pioD_clk", &pioD_clk),
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
@@ -284,23 +284,19 @@ struct clk* __init at91rm9200_get_uart_clock(int id)
* GPIO
* -------------------------------------------------------------------- */
-static struct at91_gpio_bank at91rm9200_gpio[] = {
+static struct at91_dev_resource at91rm9200_pios[] __initdata = {
{
- .id = AT91RM9200_ID_PIOA,
- .offset = AT91_PIOA,
- .clock = &pioA_clk,
+ .mmio_base = AT91_PIOA,
+ .irq = AT91RM9200_ID_PIOA,
}, {
- .id = AT91RM9200_ID_PIOB,
- .offset = AT91_PIOB,
- .clock = &pioB_clk,
+ .mmio_base = AT91_PIOB,
+ .irq = AT91RM9200_ID_PIOB,
}, {
- .id = AT91RM9200_ID_PIOC,
- .offset = AT91_PIOC,
- .clock = &pioC_clk,
+ .mmio_base = AT91_PIOC,
+ .irq = AT91RM9200_ID_PIOC,
}, {
- .id = AT91RM9200_ID_PIOD,
- .offset = AT91_PIOD,
- .clock = &pioD_clk,
+ .mmio_base = AT91_PIOD,
+ .irq = AT91RM9200_ID_PIOD,
}
};
@@ -318,6 +314,11 @@ static void at91rm9200_reset(void)
* -------------------------------------------------------------------- */
static void __init at91rm9200_initialize(unsigned long main_clock)
{
+ if (cpu_is_at91rm9200_bga())
+ at91rm9200_soc.gpio.num_resources = AT91RM9200_BGA;
+ else
+ at91rm9200_soc.gpio.num_resources = AT91RM9200_PQFP;
+
/* Map peripherals */
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
@@ -332,10 +333,6 @@ static void __init at91rm9200_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at91rm9200_register_clocks();
-
- /* Initialize GPIO subsystem */
- at91_gpio_init(at91rm9200_gpio,
- cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
}
@@ -385,4 +382,8 @@ struct at91_soc __initdata at91rm9200_soc = {
.name = "at91rm9200",
.default_irq_priority = at91rm9200_default_irq_priority,
.init = at91rm9200_initialize,
+ .gpio = {
+ .resource = at91rm9200_pios,
+ .num_resources = ARRAY_SIZE(at91rm9200_pios),
+ },
};
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 8c7de1e..4859231 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -215,9 +215,9 @@ static struct clk *periph_clocks[] __initdata = {
};
static struct clk_lookup periph_clocks_lookups[] = {
- CLKDEV_CON_ID("pioA_clk", &pioA_clk),
- CLKDEV_CON_ID("pioB_clk", &pioB_clk),
- CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_DEV_ID("at91_gpio.0", &pioA_clk),
+ CLKDEV_DEV_ID("at91_gpio.1", &pioB_clk),
+ CLKDEV_DEV_ID("at91_gpio.2", &pioC_clk),
CLKDEV_CON_ID("adc_clk", &adc_clk),
CLKDEV_CON_ID("mci_clk", &mmc_clk),
CLKDEV_CON_ID("udc_clk", &udc_clk),
@@ -300,19 +300,16 @@ struct clk* __init at91sam9260_get_uart_clock(int id)
* GPIO
* -------------------------------------------------------------------- */
-static struct at91_gpio_bank at91sam9260_gpio[] = {
+static struct at91_dev_resource at91sam9260_pios[] __initdata = {
{
- .id = AT91SAM9260_ID_PIOA,
- .offset = AT91_PIOA,
- .clock = &pioA_clk,
+ .mmio_base = AT91_PIOA,
+ .irq = AT91SAM9260_ID_PIOA,
}, {
- .id = AT91SAM9260_ID_PIOB,
- .offset = AT91_PIOB,
- .clock = &pioB_clk,
+ .mmio_base = AT91_PIOB,
+ .irq = AT91SAM9260_ID_PIOB,
}, {
- .id = AT91SAM9260_ID_PIOC,
- .offset = AT91_PIOC,
- .clock = &pioC_clk,
+ .mmio_base = AT91_PIOC,
+ .irq = AT91SAM9260_ID_PIOC,
}
};
@@ -368,9 +365,6 @@ static void __init at91sam9260_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at91sam9260_register_clocks();
-
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9260_gpio, 3);
}
/* --------------------------------------------------------------------
@@ -419,4 +413,8 @@ struct at91_soc __initdata at91sam9260_soc = {
.name = "at91sam9260",
.default_irq_priority = at91sam9260_default_irq_priority,
.init = at91sam9260_initialize,
+ .gpio = {
+ .resource = at91sam9260_pios,
+ .num_resources = ARRAY_SIZE(at91sam9260_pios),
+ },
};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index bf28740..5a3f68b 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -171,9 +171,9 @@ static struct clk *periph_clocks[] __initdata = {
};
static struct clk_lookup periph_clocks_lookups[] = {
- CLKDEV_CON_ID("pioA_clk", &pioA_clk),
- CLKDEV_CON_ID("pioB_clk", &pioB_clk),
- CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+ CLKDEV_DEV_ID("at91_gpio.0", &pioA_clk),
+ CLKDEV_DEV_ID("at91_gpio.1", &pioB_clk),
+ CLKDEV_DEV_ID("at91_gpio.2", &pioC_clk),
CLKDEV_CON_ID("mci_clk", &mmc_clk),
CLKDEV_CON_ID("udc_clk", &udc_clk),
CLKDEV_CON_ID("twi_clk", &twi_clk),
@@ -288,19 +288,16 @@ struct clk* __init at91sam9261_get_uart_clock(int id)
* GPIO
* -------------------------------------------------------------------- */
-static struct at91_gpio_bank at91sam9261_gpio[] = {
+static struct at91_dev_resource at91sam9261_pios[] __initdata = {
{
- .id = AT91SAM9261_ID_PIOA,
- .offset = AT91_PIOA,
- .clock = &pioA_clk,
+ .mmio_base = AT91_PIOA,
+ .irq = AT91SAM9261_ID_PIOA,
}, {
- .id = AT91SAM9261_ID_PIOB,
- .offset = AT91_PIOB,
- .clock = &pioB_clk,
+ .mmio_base = AT91_PIOB,
+ .irq = AT91SAM9261_ID_PIOB,
}, {
- .id = AT91SAM9261_ID_PIOC,
- .offset = AT91_PIOC,
- .clock = &pioC_clk,
+ .mmio_base = AT91_PIOC,
+ .irq = AT91SAM9261_ID_PIOC,
}
};
@@ -334,9 +331,6 @@ static void __init at91sam9261_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at91sam9261_register_clocks();
-
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9261_gpio, 3);
}
/* --------------------------------------------------------------------
@@ -385,4 +379,8 @@ struct at91_soc __initdata at91sam9261_soc = {
.name = "at91sam9261",
.default_irq_priority = at91sam9261_default_irq_priority,
.init = at91sam9261_initialize,
+ .gpio = {
+ .resource = at91sam9261_pios,
+ .num_resources = ARRAY_SIZE(at91sam9261_pios),
+ },
};
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 763170b..9a0b3b4 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -196,9 +196,11 @@ static struct clk *periph_clocks[] __initdata = {
};
static struct clk_lookup periph_clocks_lookups[] = {
- CLKDEV_CON_ID("pioA_clk", &pioA_clk),
- CLKDEV_CON_ID("pioB_clk", &pioB_clk),
- CLKDEV_CON_ID("pioCDE_clk", &pioCDE_clk),
+ CLKDEV_DEV_ID("at91_gpio.0", &pioA_clk),
+ CLKDEV_DEV_ID("at91_gpio.1", &pioB_clk),
+ CLKDEV_DEV_ID("at91_gpio.2", &pioCDE_clk),
+ CLKDEV_DEV_ID("at91_gpio.3", &pioCDE_clk),
+ CLKDEV_DEV_ID("at91_gpio.4", &pioCDE_clk),
CLKDEV_CON_ID("can_clk", &can_clk),
CLKDEV_CON_ID("twi_clk", &twi_clk),
CLKDEV_CON_ID("ac97_clk", &ac97_clk),
@@ -295,27 +297,22 @@ struct clk* __init at91sam9263_get_uart_clock(int id)
* GPIO
* -------------------------------------------------------------------- */
-static struct at91_gpio_bank at91sam9263_gpio[] = {
+static struct at91_dev_resource at91sam9263_pios[] __initdata = {
{
- .id = AT91SAM9263_ID_PIOA,
- .offset = AT91_PIOA,
- .clock = &pioA_clk,
+ .mmio_base = AT91_PIOA,
+ .irq = AT91SAM9263_ID_PIOA,
}, {
- .id = AT91SAM9263_ID_PIOB,
- .offset = AT91_PIOB,
- .clock = &pioB_clk,
+ .mmio_base = AT91_PIOB,
+ .irq = AT91SAM9263_ID_PIOB,
}, {
- .id = AT91SAM9263_ID_PIOCDE,
- .offset = AT91_PIOC,
- .clock = &pioCDE_clk,
+ .mmio_base = AT91_PIOC,
+ .irq = AT91SAM9263_ID_PIOCDE,
}, {
- .id = AT91SAM9263_ID_PIOCDE,
- .offset = AT91_PIOD,
- .clock = &pioCDE_clk,
+ .mmio_base = AT91_PIOD,
+ .irq = AT91SAM9263_ID_PIOCDE,
}, {
- .id = AT91SAM9263_ID_PIOCDE,
- .offset = AT91_PIOE,
- .clock = &pioCDE_clk,
+ .mmio_base = AT91_PIOE,
+ .irq = AT91SAM9263_ID_PIOCDE,
}
};
@@ -343,9 +340,6 @@ static void __init at91sam9263_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at91sam9263_register_clocks();
-
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9263_gpio, 5);
}
/* --------------------------------------------------------------------
@@ -394,4 +388,8 @@ struct at91_soc __initdata at91sam9263_soc = {
.name = "at91sam9263",
.default_irq_priority = at91sam9263_default_irq_priority,
.init = at91sam9263_initialize,
+ .gpio = {
+ .resource = at91sam9263_pios,
+ .num_resources = ARRAY_SIZE(at91sam9263_pios),
+ },
};
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index a1561d4..0fee23f 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -211,10 +211,11 @@ static struct clk *periph_clocks[] __initdata = {
};
static struct clk_lookup periph_clocks_lookups[] = {
- CLKDEV_CON_ID("pioA_clk", &pioA_clk),
- CLKDEV_CON_ID("pioB_clk", &pioB_clk),
- CLKDEV_CON_ID("pioC_clk", &pioC_clk),
- CLKDEV_CON_ID("pioDE_clk", &pioDE_clk),
+ CLKDEV_DEV_ID("at91_gpio.0", &pioA_clk),
+ CLKDEV_DEV_ID("at91_gpio.1", &pioB_clk),
+ CLKDEV_DEV_ID("at91_gpio.2", &pioC_clk),
+ CLKDEV_DEV_ID("at91_gpio.3", &pioDE_clk),
+ CLKDEV_DEV_ID("at91_gpio.4", &pioDE_clk),
CLKDEV_CON_ID("twi0_clk", &twi0_clk),
CLKDEV_CON_ID("twi1_clk", &twi1_clk),
CLKDEV_CON_ID("pwm_clk", &pwm_clk),
@@ -309,27 +310,22 @@ struct clk* __init at91sam9g45_get_uart_clock(int id)
* GPIO
* -------------------------------------------------------------------- */
-static struct at91_gpio_bank at91sam9g45_gpio[] = {
+static struct at91_dev_resource at91sam9g45_pios[] __initdata = {
{
- .id = AT91SAM9G45_ID_PIOA,
- .offset = AT91_PIOA,
- .clock = &pioA_clk,
+ .mmio_base = AT91_PIOA,
+ .irq = AT91SAM9G45_ID_PIOA,
}, {
- .id = AT91SAM9G45_ID_PIOB,
- .offset = AT91_PIOB,
- .clock = &pioB_clk,
+ .mmio_base = AT91_PIOB,
+ .irq = AT91SAM9G45_ID_PIOB,
}, {
- .id = AT91SAM9G45_ID_PIOC,
- .offset = AT91_PIOC,
- .clock = &pioC_clk,
+ .mmio_base = AT91_PIOC,
+ .irq = AT91SAM9G45_ID_PIOC,
}, {
- .id = AT91SAM9G45_ID_PIODE,
- .offset = AT91_PIOD,
- .clock = &pioDE_clk,
+ .mmio_base = AT91_PIOD,
+ .irq = AT91SAM9G45_ID_PIODE,
}, {
- .id = AT91SAM9G45_ID_PIODE,
- .offset = AT91_PIOE,
- .clock = &pioDE_clk,
+ .mmio_base = AT91_PIOE,
+ .irq = AT91SAM9G45_ID_PIODE,
}
};
@@ -362,9 +358,6 @@ static void __init at91sam9g45_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at91sam9g45_register_clocks();
-
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9g45_gpio, 5);
}
/* --------------------------------------------------------------------
@@ -413,4 +406,8 @@ struct at91_soc __initdata at91sam9g45_soc = {
.name = "at91sam9g45",
.default_irq_priority = at91sam9g45_default_irq_priority,
.init = at91sam9g45_initialize,
+ .gpio = {
+ .resource = at91sam9g45_pios,
+ .num_resources = ARRAY_SIZE(at91sam9g45_pios),
+ },
};
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 80acd8f..ec62ca01 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -184,10 +184,10 @@ static struct clk *periph_clocks[] __initdata = {
};
static struct clk_lookup periph_clocks_lookups[] = {
- CLKDEV_CON_ID("pioA_clk", &pioA_clk),
- CLKDEV_CON_ID("pioB_clk", &pioB_clk),
- CLKDEV_CON_ID("pioC_clk", &pioC_clk),
- CLKDEV_CON_ID("pioD_clk", &pioD_clk),
+ CLKDEV_DEV_ID("at91_gpio.0", &pioA_clk),
+ CLKDEV_DEV_ID("at91_gpio.1", &pioB_clk),
+ CLKDEV_DEV_ID("at91_gpio.2", &pioC_clk),
+ CLKDEV_DEV_ID("at91_gpio.3", &pioD_clk),
CLKDEV_CON_ID("mci_clk", &mmc_clk),
CLKDEV_CON_ID("twi0_clk", &twi0_clk),
CLKDEV_CON_ID("twi1_clk", &twi1_clk),
@@ -266,23 +266,19 @@ struct clk* __init at91sam9rl_get_uart_clock(int id)
* GPIO
* -------------------------------------------------------------------- */
-static struct at91_gpio_bank at91sam9rl_gpio[] = {
+static struct at91_dev_resource at91sam9rl_pios[] __initdata = {
{
- .id = AT91SAM9RL_ID_PIOA,
- .offset = AT91_PIOA,
- .clock = &pioA_clk,
+ .mmio_base = AT91_PIOA,
+ .irq = AT91SAM9RL_ID_PIOA,
}, {
- .id = AT91SAM9RL_ID_PIOB,
- .offset = AT91_PIOB,
- .clock = &pioB_clk,
+ .mmio_base = AT91_PIOB,
+ .irq = AT91SAM9RL_ID_PIOB,
}, {
- .id = AT91SAM9RL_ID_PIOC,
- .offset = AT91_PIOC,
- .clock = &pioC_clk,
+ .mmio_base = AT91_PIOC,
+ .irq = AT91SAM9RL_ID_PIOC,
}, {
- .id = AT91SAM9RL_ID_PIOD,
- .offset = AT91_PIOD,
- .clock = &pioD_clk,
+ .mmio_base = AT91_PIOD,
+ .irq = AT91SAM9RL_ID_PIOD,
}
};
@@ -328,9 +324,6 @@ static void __init at91sam9rl_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at91sam9rl_register_clocks();
-
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9rl_gpio, 4);
}
/* --------------------------------------------------------------------
@@ -379,4 +372,8 @@ struct at91_soc __initdata at91sam9rl_soc = {
.name = "at91sam9rl",
.default_irq_priority = at91sam9rl_default_irq_priority,
.init = at91sam9rl_initialize,
+ .gpio = {
+ .resource = at91sam9rl_pios,
+ .num_resources = ARRAY_SIZE(at91sam9rl_pios),
+ },
};
diff --git a/arch/arm/mach-at91/clock.h b/arch/arm/mach-at91/clock.h
index f0d8776..3e40da2 100644
--- a/arch/arm/mach-at91/clock.h
+++ b/arch/arm/mach-at91/clock.h
@@ -32,6 +32,12 @@ extern int __init clk_register(struct clk *clk);
extern struct clk mck;
extern struct clk utmi_clk;
+#define CLKDEV_DEV_ID(_id, _clk) \
+ { \
+ .dev_id = _id, \
+ .clk = _clk, \
+ }
+
#define CLKDEV_CON_ID(_id, _clk) \
{ \
.con_id = _id, \
diff --git a/arch/arm/mach-at91/devices.c b/arch/arm/mach-at91/devices.c
new file mode 100644
index 0000000..03ded48
--- /dev/null
+++ b/arch/arm/mach-at91/devices.c
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
+ * Copyright (C) 2007-2011 Atmel Corporation.
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2
+ *
+ */
+
+#include <linux/platform_device.h>
+
+#include "devices.h"
+
+
diff --git a/arch/arm/mach-at91/devices.h b/arch/arm/mach-at91/devices.h
new file mode 100644
index 0000000..4d39f9b
--- /dev/null
+++ b/arch/arm/mach-at91/devices.h
@@ -0,0 +1,55 @@
+/*
+ * arch/arm/mach-at91/devices.h
+ *
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2
+ *
+ */
+
+#ifndef _AT91_DEVICES_H
+#define _AT91_DEVICES_H
+
+#include <linux/types.h>
+#include <linux/platform_device.h>
+
+#define RES_MEM(size) \
+ { \
+ .end = size - 1, \
+ .flags = IORESOURCE_MEM, \
+ }
+
+#define RES_IRQ() \
+ { \
+ .flags = IORESOURCE_IRQ, \
+ }
+
+
+static inline void set_resource_mem(struct resource *res, resource_size_t mmio_base)
+{
+ BUG_ON(res->flags != IORESOURCE_MEM);
+ res->start = mmio_base;
+ res->end += mmio_base;
+}
+
+static inline void set_resource_irq(struct resource *res, int irq)
+{
+ if (!irq)
+ return;
+
+ BUG_ON(res->flags != IORESOURCE_IRQ);
+ res->start = irq;
+ res->end = irq;
+}
+
+struct at91_dev_resource {
+ resource_size_t mmio_base;
+ int irq;
+};
+
+struct at91_dev_resource_array {
+ struct at91_dev_resource *resource;
+ int num_resources;
+};
+
+#endif /* _AT91_DEVICES_H */
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index a039726..b2c7c3a 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -50,12 +50,6 @@ extern void at91sam9_alt_reset(void);
#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
-struct at91_gpio_bank {
- unsigned short id; /* peripheral ID */
- unsigned long offset; /* offset from system peripheral base */
- struct clk *clock; /* associated clock */
-};
-extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
extern void __init at91_gpio_irq_setup(void);
extern void (*at91_arch_reset)(void);
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 4615528..dd05512 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -12,6 +12,7 @@
#include <linux/clk.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
+#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
@@ -26,12 +27,11 @@
#include <asm/gpio.h>
-#include "generic.h"
-
struct at91_gpio_chip {
struct gpio_chip chip;
+ unsigned short id; /* peripheral ID */
+ struct clk *clock; /* associated clock */
struct at91_gpio_chip *next; /* Bank sharing same clock */
- struct at91_gpio_bank *bank; /* Bank definition */
void __iomem *regbase; /* Base of register bank */
};
@@ -287,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
else
wakeups[bank] &= ~mask;
- irq_set_irq_wake(gpio_chip[bank].bank->id, state);
+ irq_set_irq_wake(gpio_chip[bank].id, state);
return 0;
}
@@ -304,7 +304,7 @@ void at91_gpio_suspend(void)
__raw_writel(wakeups[i], pio + PIO_IER);
if (!wakeups[i])
- clk_disable(gpio_chip[i].bank->clock);
+ clk_disable(gpio_chip[i].clock);
else {
#ifdef CONFIG_PM_DEBUG
printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
@@ -321,7 +321,7 @@ void at91_gpio_resume(void)
void __iomem *pio = gpio_chip[i].regbase;
if (!wakeups[i])
- clk_enable(gpio_chip[i].bank->clock);
+ clk_enable(gpio_chip[i].clock);
__raw_writel(wakeups[i], pio + PIO_IDR);
__raw_writel(backups[i], pio + PIO_IER);
@@ -499,7 +499,7 @@ void __init at91_gpio_irq_setup(void)
for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL;
pioc++ < gpio_banks;
prev = this, this++) {
- unsigned id = this->bank->id;
+ unsigned id = this->id;
unsigned i;
__raw_writel(~0, this->regbase + PIO_IDR);
@@ -599,34 +599,56 @@ static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
}
}
-/*
- * Called from the processor-specific init to enable GPIO pin support.
- */
-void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
+static int __devinit at91_gpio_probe(struct platform_device *pdev)
{
- unsigned i;
- struct at91_gpio_chip *at91_gpio, *last = NULL;
+ int id = pdev->id;
+ struct at91_gpio_chip *at91_gpio;
- BUG_ON(nr_banks > MAX_GPIO_BANKS);
+ if (!is_early_platform_device(pdev)) {
+ pr_info("at91_gpio.%d: call via non early plaform\n", id);
+ return 0;
+ }
- gpio_banks = nr_banks;
+ BUG_ON(id > MAX_GPIO_BANKS);
- for (i = 0; i < nr_banks; i++) {
- at91_gpio = &gpio_chip[i];
+ gpio_banks = max(gpio_banks, id + 1);
- at91_gpio->bank = &data[i];
- at91_gpio->chip.base = PIN_BASE + i * 32;
- at91_gpio->regbase = at91_gpio->bank->offset +
+ at91_gpio = &gpio_chip[id];
+ at91_gpio->id = platform_get_irq(pdev, 0);
+ at91_gpio->chip.base = PIN_BASE + id * 32;
+ at91_gpio->regbase = pdev->resource[0].start +
(void __iomem *)AT91_VA_BASE_SYS;
- /* enable PIO controller's clock */
- clk_enable(at91_gpio->bank->clock);
+ at91_gpio->clock = clk_get_pdev(pdev, NULL);
- /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
- if (last && last->bank->id == at91_gpio->bank->id)
- last->next = at91_gpio;
- last = at91_gpio;
+ /* enable PIO controller's clock */
+ clk_enable(at91_gpio->clock);
- gpiochip_add(&at91_gpio->chip);
- }
+ /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
+ if (id > 0 && gpio_chip[id - 1].id == at91_gpio->id)
+ gpio_chip[id - 1].next = at91_gpio;
+
+ gpiochip_add(&at91_gpio->chip);
+
+ pr_debug("at91_gpio.%d: offset = 0x%x, clk = 0x%p, irq = %d\n",
+ id, pdev->resource[0].start, at91_gpio->clock,
+ at91_gpio->id);
+
+ return 0;
+}
+
+static int __devexit at91_gpio_remove(struct platform_device *pdev)
+{
+ return -EBUSY; /* cannot unregister clockevent and clocksource */
}
+
+static struct platform_driver at91_gpio_driver = {
+ .probe = at91_gpio_probe,
+ .remove = __devexit_p(at91_gpio_remove),
+ .driver = {
+ .name = "at91_gpio",
+ .owner = THIS_MODULE,
+ },
+};
+
+early_platform_init("early_at91_gpio", &at91_gpio_driver);
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
index 6fe205f2..0e8604c 100644
--- a/arch/arm/mach-at91/soc.c
+++ b/arch/arm/mach-at91/soc.c
@@ -20,6 +20,7 @@
#include "generic.h"
static struct at91_soc __initdata current_soc;
+static void __init at91_add_gpio(void);
struct at91_cpu_id cpu_id;
EXPORT_SYMBOL(cpu_id);
@@ -114,4 +115,100 @@ void __init at91_initialize(unsigned long main_clock)
pr_info("AT91: detected soc: %s\n", current_soc.name);
current_soc.init(main_clock);
+
+ /* Register GPIO subsystem */
+ at91_add_gpio();
+}
+
+/* --------------------------------------------------------------------
+ * GPIO
+ * -------------------------------------------------------------------- */
+
+static struct resource pioa_resources[] = {
+ [0] = RES_MEM(SZ_512),
+ [1] = RES_IRQ(),
+};
+
+static struct platform_device at91_pioa_device = {
+ .name = "at91_gpio",
+ .id = 0,
+ .resource = pioa_resources,
+ .num_resources = ARRAY_SIZE(pioa_resources),
+};
+
+static struct resource piob_resources[] = {
+ [0] = RES_MEM(SZ_512),
+ [1] = RES_IRQ(),
+};
+
+static struct platform_device at91_piob_device = {
+ .name = "at91_gpio",
+ .id = 1,
+ .resource = piob_resources,
+ .num_resources = ARRAY_SIZE(piob_resources),
+};
+
+static struct resource pioc_resources[] = {
+ [0] = RES_MEM(SZ_512),
+ [1] = RES_IRQ(),
+};
+
+static struct platform_device at91_pioc_device = {
+ .name = "at91_gpio",
+ .id = 2,
+ .resource = pioc_resources,
+ .num_resources = ARRAY_SIZE(pioc_resources),
+};
+
+static struct resource piod_resources[] = {
+ [0] = RES_MEM(SZ_512),
+ [1] = RES_IRQ(),
+};
+
+static struct platform_device at91_piod_device = {
+ .name = "at91_gpio",
+ .id = 3,
+ .resource = piod_resources,
+ .num_resources = ARRAY_SIZE(piod_resources),
+};
+
+static struct resource pioe_resources[] = {
+ [0] = RES_MEM(SZ_512),
+ [1] = RES_IRQ(),
+};
+
+static struct platform_device at91_pioe_device = {
+ .name = "at91_gpio",
+ .id = 4,
+ .resource = pioe_resources,
+ .num_resources = ARRAY_SIZE(pioe_resources),
+};
+
+static struct platform_device *at91_pio_devices[] __initdata = {
+ &at91_pioa_device,
+ &at91_piob_device,
+ &at91_pioc_device,
+ &at91_piod_device,
+ &at91_pioe_device,
+};
+
+static void __init at91_add_gpio(void)
+{
+ struct at91_dev_resource *gpios = current_soc.gpio.resource;
+ int nb = current_soc.gpio.num_resources;
+
+ int i;
+ struct resource *r;
+
+ BUG_ON(!gpios || nb < 0 || nb > ARRAY_SIZE(at91_pio_devices));
+
+ for (i = 0; i < nb; i++) {
+ r = at91_pio_devices[i]->resource;
+ set_resource_mem(&r[0], gpios[i].mmio_base);
+ set_resource_irq(&r[1], gpios[i].irq);
+ }
+
+ early_platform_add_devices(at91_pio_devices, nb);
+ early_platform_driver_register_all("early_at91_gpio");
+ early_platform_driver_probe("early_at91_gpio", nb , 0);
}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index a097032..bf90d48 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -6,10 +6,14 @@
*
*/
+#include "devices.h"
+
struct at91_soc {
char *name;
unsigned int *default_irq_priority;
+ struct at91_dev_resource_array gpio;
+
void (*init)(unsigned long main_clock);
};
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 07/14] at91: switch gpio to early platfrom device
2011-04-25 18:31 ` [PATCH 07/14] at91: switch gpio to early platfrom device Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 22:51 ` Ryan Mallon
2011-04-26 4:11 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-25 22:51 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 06:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
> ---
> need patch
> clkdev: add support to lookup for early platform device
<snip>
> diff --git a/arch/arm/mach-at91/devices.h b/arch/arm/mach-at91/devices.h
> new file mode 100644
> index 0000000..4d39f9b
> --- /dev/null
> +++ b/arch/arm/mach-at91/devices.h
> @@ -0,0 +1,55 @@
> +/*
> + * arch/arm/mach-at91/devices.h
> + *
> + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> + *
> + * Under GPLv2
> + *
> + */
> +
> +#ifndef _AT91_DEVICES_H
> +#define _AT91_DEVICES_H
> +
> +#include <linux/types.h>
> +#include <linux/platform_device.h>
> +
> +#define RES_MEM(size) \
> + { \
> + .end = size - 1, \
> + .flags = IORESOURCE_MEM, \
> + }
> +
> +#define RES_IRQ() \
> + { \
> + .flags = IORESOURCE_IRQ, \
> + }
> +
> +
> +static inline void set_resource_mem(struct resource *res, resource_size_t mmio_base)
> +{
> + BUG_ON(res->flags != IORESOURCE_MEM);
> + res->start = mmio_base;
> + res->end += mmio_base;
> +}
> +
> +static inline void set_resource_irq(struct resource *res, int irq)
> +{
> + if (!irq)
> + return;
> +
> + BUG_ON(res->flags != IORESOURCE_IRQ);
> + res->start = irq;
> + res->end = irq;
> +}
> +
> +struct at91_dev_resource {
> + resource_size_t mmio_base;
> + int irq;
> +};
> +
> +struct at91_dev_resource_array {
> + struct at91_dev_resource *resource;
> + int num_resources;
> +};
We will have to consolidate here since this conflicts with my patch set.
Our approaches are pretty similar though, so hopefully it's not too big
a deal. How do you want to manage the merging of our patches? Do you
want to take my stuff via your tree and handle the merge there or do you
want be to try rebasing my patches on top of a branch of your git tree?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 07/14] at91: switch gpio to early platfrom device
2011-04-25 22:51 ` Ryan Mallon
@ 2011-04-26 4:11 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 4:11 UTC (permalink / raw)
To: linux-arm-kernel
On 10:51 Tue 26 Apr , Ryan Mallon wrote:
> On 04/26/2011 06:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> > Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
> > ---
> > need patch
> > clkdev: add support to lookup for early platform device
>
> <snip>
>
> > diff --git a/arch/arm/mach-at91/devices.h b/arch/arm/mach-at91/devices.h
> > new file mode 100644
> > index 0000000..4d39f9b
> > --- /dev/null
> > +++ b/arch/arm/mach-at91/devices.h
> > @@ -0,0 +1,55 @@
> > +/*
> > + * arch/arm/mach-at91/devices.h
> > + *
> > + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > + *
> > + * Under GPLv2
> > + *
> > + */
> > +
> > +#ifndef _AT91_DEVICES_H
> > +#define _AT91_DEVICES_H
> > +
> > +#include <linux/types.h>
> > +#include <linux/platform_device.h>
> > +
> > +#define RES_MEM(size) \
> > + { \
> > + .end = size - 1, \
> > + .flags = IORESOURCE_MEM, \
> > + }
> > +
> > +#define RES_IRQ() \
> > + { \
> > + .flags = IORESOURCE_IRQ, \
> > + }
> > +
> > +
> > +static inline void set_resource_mem(struct resource *res, resource_size_t mmio_base)
> > +{
> > + BUG_ON(res->flags != IORESOURCE_MEM);
> > + res->start = mmio_base;
> > + res->end += mmio_base;
> > +}
> > +
> > +static inline void set_resource_irq(struct resource *res, int irq)
> > +{
> > + if (!irq)
> > + return;
> > +
> > + BUG_ON(res->flags != IORESOURCE_IRQ);
> > + res->start = irq;
> > + res->end = irq;
> > +}
> > +
> > +struct at91_dev_resource {
> > + resource_size_t mmio_base;
> > + int irq;
> > +};
> > +
> > +struct at91_dev_resource_array {
> > + struct at91_dev_resource *resource;
> > + int num_resources;
> > +};
>
> We will have to consolidate here since this conflicts with my patch set.
> Our approaches are pretty similar though, so hopefully it's not too big
> a deal. How do you want to manage the merging of our patches? Do you
> want to take my stuff via your tree and handle the merge there or do you
> want be to try rebasing my patches on top of a branch of your git tree?
I've start to rebase your patchset as this one will allw to simpliify it
as we known on which we are on
until the udc
Let me 1 or 2 days to push it
It did test it on some atmel ref board and fix it
Best Regards,
J.
>
> ~Ryan
>
> --
> Bluewater Systems Ltd - ARM Technology Solution Centre
>
> Ryan Mallon 5 Amuri Park, 404 Barbadoes St
> ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
> http://www.bluewatersys.com New Zealand
> Phone: +64 3 3779127 Freecall: Australia 1800 148 751
> Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 08/14] at91: move gpio to drivers/gpio
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (6 preceding siblings ...)
2011-04-25 18:31 ` [PATCH 07/14] at91: switch gpio to early platfrom device Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 18:31 ` [PATCH 09/14] at91: switch pit timer to early platform devices Jean-Christophe PLAGNIOL-VILLARD
` (6 subsequent siblings)
14 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
MAINTAINERS | 1 +
arch/arm/mach-at91/Makefile | 2 +-
drivers/gpio/Makefile | 1 +
.../mach-at91/gpio.c => drivers/gpio/at91_gpio.c | 0
4 files changed, 3 insertions(+), 1 deletions(-)
rename arch/arm/mach-at91/gpio.c => drivers/gpio/at91_gpio.c (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1380312..30ba179 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -654,6 +654,7 @@ W: http://maxim.org.za/at91_26.html
W: http://www.linux4sam.org
S: Supported
F: arch/arm/mach-at91/
+F: drivers/gpio/at91_gpio.c
ARM/BCMRING ARM ARCHITECTURE
M: Jiandong Zheng <jdzheng@broadcom.com>
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 9cac68d..6aa38f9 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
-obj-y := irq.o gpio.o soc.o
+obj-y := irq.o soc.o
obj-m :=
obj-n :=
obj- :=
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index becef59..3c3a3a6 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib.o
obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o
obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o
+obj-$(CONFIG_ARCH_AT91) += at91_gpio.o
obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o
obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o
obj-$(CONFIG_GPIO_MAX730X) += max730x.o
diff --git a/arch/arm/mach-at91/gpio.c b/drivers/gpio/at91_gpio.c
similarity index 100%
rename from arch/arm/mach-at91/gpio.c
rename to drivers/gpio/at91_gpio.c
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (7 preceding siblings ...)
2011-04-25 18:31 ` [PATCH 08/14] at91: move gpio to drivers/gpio Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 5:07 ` Ryan Mallon
2011-04-28 11:23 ` Andrew Victor
2011-04-25 18:31 ` [PATCH 10/14] at91: switch st " Jean-Christophe PLAGNIOL-VILLARD
` (5 subsequent siblings)
14 siblings, 2 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
this will allow to specify the resources per soc
as the 5series use a different start address for the pit
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/at572d940hf.c | 6 +
arch/arm/mach-at91/at91cap9.c | 6 +
arch/arm/mach-at91/at91sam9260.c | 6 +
arch/arm/mach-at91/at91sam9261.c | 6 +
arch/arm/mach-at91/at91sam9263.c | 6 +
arch/arm/mach-at91/at91sam926x_time.c | 277 +++++++++++++++++++++-------
arch/arm/mach-at91/at91sam9g45.c | 6 +
arch/arm/mach-at91/at91sam9rl.c | 6 +
arch/arm/mach-at91/board-afeb-9260v1.c | 2 +-
arch/arm/mach-at91/board-at572d940hf_ek.c | 2 +-
arch/arm/mach-at91/board-cam60.c | 2 +-
arch/arm/mach-at91/board-cap9adk.c | 2 +-
arch/arm/mach-at91/board-cpu9krea.c | 2 +-
arch/arm/mach-at91/board-flexibity.c | 2 +-
arch/arm/mach-at91/board-foxg20.c | 2 +-
arch/arm/mach-at91/board-gsia18s.c | 2 +-
arch/arm/mach-at91/board-neocore926.c | 2 +-
arch/arm/mach-at91/board-pcontrol-g20.c | 2 +-
arch/arm/mach-at91/board-qil-a9260.c | 2 +-
arch/arm/mach-at91/board-sam9-l9260.c | 2 +-
arch/arm/mach-at91/board-sam9260ek.c | 2 +-
arch/arm/mach-at91/board-sam9261ek.c | 2 +-
arch/arm/mach-at91/board-sam9263ek.c | 2 +-
arch/arm/mach-at91/board-sam9g20ek.c | 4 +-
arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
arch/arm/mach-at91/board-sam9rlek.c | 2 +-
arch/arm/mach-at91/board-snapper9260.c | 2 +-
arch/arm/mach-at91/board-stamp9g20.c | 4 +-
arch/arm/mach-at91/board-usb-a926x.c | 4 +-
arch/arm/mach-at91/devices.c | 4 +-
arch/arm/mach-at91/generic.h | 2 +-
arch/arm/mach-at91/include/mach/at91_pit.h | 8 +-
arch/arm/mach-at91/soc.c | 42 +++++
arch/arm/mach-at91/soc.h | 1 +
34 files changed, 327 insertions(+), 97 deletions(-)
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
index b788861..66405af 100644
--- a/arch/arm/mach-at91/at572d940hf.c
+++ b/arch/arm/mach-at91/at572d940hf.c
@@ -417,6 +417,11 @@ static unsigned int at572d940hf_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller */
};
+struct at91_dev_resource at572d940hf_pit __initdata = {
+ .mmio_base = AT91_PIT,
+ .irq = AT91_ID_SYS,
+};
+
struct at91_soc __initdata at572d940hf_soc = {
.name = "at572d940hf",
.default_irq_priority = at572d940hf_default_irq_priority,
@@ -425,4 +430,5 @@ struct at91_soc __initdata at572d940hf_soc = {
.resource = at572d940hf_pios,
.num_resources = ARRAY_SIZE(at572d940hf_pios),
},
+ .pit = &at572d940hf_pit,
};
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index f60ec74..dd5e858 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -420,6 +420,11 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller (IRQ1) */
};
+struct at91_dev_resource at91cap9_pit __initdata = {
+ .mmio_base = AT91_PIT,
+ .irq = AT91_ID_SYS,
+};
+
struct at91_soc __initdata at91cap9_soc = {
.name = "at91cap9",
.default_irq_priority = at91cap9_default_irq_priority,
@@ -428,4 +433,5 @@ struct at91_soc __initdata at91cap9_soc = {
.resource = at91cap9_pios,
.num_resources = ARRAY_SIZE(at91cap9_pios),
},
+ .pit = &at91cap9_pit,
};
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 4859231..0567556b 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -409,6 +409,11 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller */
};
+struct at91_dev_resource at91sam9260_pit __initdata = {
+ .mmio_base = AT91_PIT,
+ .irq = AT91_ID_SYS,
+};
+
struct at91_soc __initdata at91sam9260_soc = {
.name = "at91sam9260",
.default_irq_priority = at91sam9260_default_irq_priority,
@@ -417,4 +422,5 @@ struct at91_soc __initdata at91sam9260_soc = {
.resource = at91sam9260_pios,
.num_resources = ARRAY_SIZE(at91sam9260_pios),
},
+ .pit = &at91sam9260_pit,
};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 5a3f68b..603c6fe 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -375,6 +375,11 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller */
};
+struct at91_dev_resource at91sam9261_pit __initdata = {
+ .mmio_base = AT91_PIT,
+ .irq = AT91_ID_SYS,
+};
+
struct at91_soc __initdata at91sam9261_soc = {
.name = "at91sam9261",
.default_irq_priority = at91sam9261_default_irq_priority,
@@ -383,4 +388,5 @@ struct at91_soc __initdata at91sam9261_soc = {
.resource = at91sam9261_pios,
.num_resources = ARRAY_SIZE(at91sam9261_pios),
},
+ .pit = &at91sam9261_pit,
};
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 9a0b3b4..e7ff884 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -384,6 +384,11 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller (IRQ1) */
};
+struct at91_dev_resource at91sam9263_pit __initdata = {
+ .mmio_base = AT91_PIT,
+ .irq = AT91_ID_SYS,
+};
+
struct at91_soc __initdata at91sam9263_soc = {
.name = "at91sam9263",
.default_irq_priority = at91sam9263_default_irq_priority,
@@ -392,4 +397,5 @@ struct at91_soc __initdata at91sam9263_soc = {
.resource = at91sam9263_pios,
.num_resources = ARRAY_SIZE(at91sam9263_pios),
},
+ .pit = &at91sam9263_pit,
};
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 4ba8549..82ddaa7 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -4,69 +4,96 @@
* Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
* Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
* Converted to ClockSource/ClockEvents by David Brownell.
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <linux/init.h>
+#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/clockchips.h>
-
-#include <asm/mach/time.h>
+#include <linux/slab.h>
#include <mach/at91_pit.h>
+struct at91_pit_data {
+ void __iomem *mapbase;
+ u32 pit_cycle; /* write-once */
+ u32 pit_cnt; /* access only w/system irq blocked */
+ struct clock_event_device ced;
+ struct clocksource cs;
+ struct irqaction irqaction;
+ struct platform_device *pdev;
+};
#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
-static u32 pit_cycle; /* write-once */
-static u32 pit_cnt; /* access only w/system irq blocked */
+static inline unsigned int at91_pit_read(struct at91_pit_data *data,
+ unsigned int reg_offset)
+{
+ return __raw_readl(data->mapbase + reg_offset);
+}
+
+static inline void at91_pit_write(struct at91_pit_data *data,
+ unsigned int reg_offset, unsigned long value)
+{
+ __raw_writel(value, data->mapbase + reg_offset);
+}
+static struct at91_pit_data *cs_to_at91_pit(struct clocksource *cs)
+{
+ return container_of(cs, struct at91_pit_data, cs);
+}
+
+static struct at91_pit_data *ced_to_at91_pit(struct clock_event_device *ced)
+{
+ return container_of(ced, struct at91_pit_data, ced);
+}
/*
* Clocksource: just a monotonic counter of MCK/16 cycles.
* We don't care whether or not PIT irqs are enabled.
*/
-static cycle_t read_pit_clk(struct clocksource *cs)
+static cycle_t at91_pit_clocksource_read(struct clocksource *cs)
{
+ struct at91_pit_data *data = cs_to_at91_pit(cs);
unsigned long flags;
u32 elapsed;
u32 t;
raw_local_irq_save(flags);
- elapsed = pit_cnt;
- t = at91_sys_read(AT91_PIT_PIIR);
+ elapsed = data->pit_cnt;
+ t = at91_pit_read(data, AT91_PIT_PIIR);
raw_local_irq_restore(flags);
- elapsed += PIT_PICNT(t) * pit_cycle;
+ elapsed += PIT_PICNT(t) * data->pit_cycle;
elapsed += PIT_CPIV(t);
return elapsed;
}
-static struct clocksource pit_clk = {
- .name = "pit",
- .rating = 175,
- .read = read_pit_clk,
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
/*
* Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16)
*/
-static void
-pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
+static void at91_pit_clock_event_mode(enum clock_event_mode mode,
+ struct clock_event_device *dev)
{
+ struct at91_pit_data *data = ced_to_at91_pit(dev);
+ u32 tmp;
+
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
/* update clocksource counter */
- pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
- at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
- | AT91_PIT_PITIEN);
+ tmp = PIT_PICNT(at91_pit_read(data, AT91_PIT_PIVR));
+ data->pit_cnt += data->pit_cycle * tmp;
+ at91_pit_write(data, AT91_PIT_MR, (data->pit_cycle - 1)
+ | AT91_PIT_PITEN | AT91_PIT_PITIEN);
break;
case CLOCK_EVT_MODE_ONESHOT:
BUG();
@@ -74,27 +101,22 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_UNUSED:
/* disable irq, leaving the clocksource active */
- at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+ at91_pit_write(data, AT91_PIT_MR,
+ (data->pit_cycle - 1) | AT91_PIT_PITEN);
break;
case CLOCK_EVT_MODE_RESUME:
break;
}
}
-static struct clock_event_device pit_clkevt = {
- .name = "pit",
- .features = CLOCK_EVT_FEAT_PERIODIC,
- .shift = 32,
- .rating = 100,
- .set_mode = pit_clkevt_mode,
-};
-
/*
* IRQ handler for the timer.
*/
-static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
+static irqreturn_t at91_pit_interrupt(int irq, void *dev_id)
{
+ struct at91_pit_data *data = (struct at91_pit_data*)dev_id;
+
/*
* irqs should be disabled here, but as the irq is shared they are only
* guaranteed to be off if the timer irq is registered first.
@@ -102,15 +124,15 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
WARN_ON_ONCE(!irqs_disabled());
/* The PIT interrupt may be disabled, and is shared */
- if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
- && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
+ if ((data->ced.mode == CLOCK_EVT_MODE_PERIODIC)
+ && (at91_pit_read(data, AT91_PIT_SR) & AT91_PIT_PITS)) {
unsigned nr_ticks;
/* Get number of ticks performed before irq, and ack it */
- nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
+ nr_ticks = PIT_PICNT(at91_pit_read(data, AT91_PIT_PIVR));
do {
- pit_cnt += pit_cycle;
- pit_clkevt.event_handler(&pit_clkevt);
+ data->pit_cnt += data->pit_cycle;
+ data->ced.event_handler(&data->ced);
nr_ticks--;
} while (nr_ticks);
@@ -120,69 +142,192 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
return IRQ_NONE;
}
-static struct irqaction at91sam926x_pit_irq = {
- .name = "at91_tick",
- .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = at91sam926x_pit_interrupt
-};
+static void at91_pit_stop(struct at91_pit_data *data)
+{
+ /* Disable timer and irqs */
+ at91_pit_write(data, AT91_PIT_MR, 0);
+}
-static void at91sam926x_pit_reset(void)
+static void at91_pit_reset(struct at91_pit_data *data)
{
/* Disable timer and irqs */
- at91_sys_write(AT91_PIT_MR, 0);
+ at91_pit_stop(data);
/* Clear any pending interrupts, wait for PIT to stop counting */
- while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
+ while (PIT_CPIV(at91_pit_read(data, AT91_PIT_PIVR)) != 0)
cpu_relax();
/* Start PIT but don't enable IRQ */
- at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+ at91_pit_write(data, AT91_PIT_MR, (data->pit_cycle - 1) | AT91_PIT_PITEN);
}
-/*
- * Set up both clocksource and clockevent support.
- */
-static void __init at91sam926x_pit_init(void)
+static int at91_pit_clocksource_enable(struct clocksource *cs)
+{
+ struct at91_pit_data *data = cs_to_at91_pit(cs);
+
+ at91_pit_reset(data);
+
+ return 0;
+}
+
+static void at91_pit_clocksource_resume(struct clocksource *cs)
+{
+ struct at91_pit_data *data = cs_to_at91_pit(cs);
+
+ at91_pit_reset(data);
+}
+
+static void at91_pit_clocksource_disable(struct clocksource *cs)
+{
+ struct at91_pit_data *data = cs_to_at91_pit(cs);
+
+ at91_pit_stop(data);
+}
+
+static void at91_pit_register_clockevent(struct at91_pit_data *data,
+ unsigned long pit_rate)
+{
+ struct clock_event_device *ced = &data->ced;
+
+ memset(ced, 0, sizeof(*ced));
+
+ ced->name = "pit";
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+ ced->shift = 32;
+ ced->rating = 100;
+ ced->set_mode = at91_pit_clock_event_mode;
+ ced->cpumask = cpumask_of(0);
+ ced->mult = div_sc(pit_rate, NSEC_PER_SEC, ced->shift);
+
+ dev_info(&data->pdev->dev, "used for clock events\n");
+
+ clockevents_register_device(ced);
+}
+
+static int at91_pit_register_clocksource(struct at91_pit_data *data,
+ unsigned long pit_rate)
+{
+ struct clocksource *cs = &data->cs;
+ unsigned bits;
+
+ cs->name = "pit";
+ cs->rating = 175;
+ cs->shift = 20;
+ cs->read = at91_pit_clocksource_read;
+ cs->enable = at91_pit_clocksource_enable;
+ cs->disable = at91_pit_clocksource_disable;
+ cs->suspend = at91_pit_clocksource_disable;
+ cs->resume = at91_pit_clocksource_resume;
+ cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+ cs->mult = clocksource_hz2mult(pit_rate, cs->shift);
+ bits = 12 /* PICNT */ + ilog2(data->pit_cycle) /* PIV */;
+ cs->mask = CLOCKSOURCE_MASK(bits);
+
+ dev_info(&data->pdev->dev, "used as clock source\n");
+
+ clocksource_register_hz(cs, pit_rate);
+
+ return 0;
+}
+
+static int at91_pit_setup(struct at91_pit_data *data,
+ struct platform_device *pdev)
{
unsigned long pit_rate;
- unsigned bits;
+ struct resource *res;
+ int irq;
+ int ret = -ENXIO;
+
+ memset(data, 0, sizeof(struct at91_pit_data));
+ data->pdev = pdev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "failed to get I/O memory\n");
+ goto err0;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+
+ /* map memory, let mapbase point to our channel */
+ data->mapbase = (void * __iomem)(res->start + AT91_VA_BASE_SYS);
+
+ /* request irq using setup_irq() (too early for request_irq()) */
+ data->irqaction.name = "at91_tick";
+ data->irqaction.handler = at91_pit_interrupt;
+ data->irqaction.dev_id = data;
+ data->irqaction.flags = IRQF_SHARED | IRQF_DISABLED |
+ IRQF_TIMER | IRQF_IRQPOLL;
/*
* Use our actual MCK to figure out how many MCK/16 ticks per
* 1/HZ period (instead of a compile-time constant LATCH).
*/
pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16;
- pit_cycle = (pit_rate + HZ/2) / HZ;
- WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
+ data->pit_cycle = (pit_rate + HZ/2) / HZ;
+ WARN_ON(((data->pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
/* Initialize and enable the timer */
- at91sam926x_pit_reset();
+ at91_pit_reset(data);
/*
* Register clocksource. The high order bits of PIV are unused,
* so this isn't a 32-bit counter unless we get clockevent irqs.
*/
- bits = 12 /* PICNT */ + ilog2(pit_cycle) /* PIV */;
- pit_clk.mask = CLOCKSOURCE_MASK(bits);
- clocksource_register_hz(&pit_clk, pit_rate);
+ at91_pit_register_clocksource(data, pit_rate);
/* Set up irq handler */
- setup_irq(AT91_ID_SYS, &at91sam926x_pit_irq);
+ setup_irq(irq, &data->irqaction);
/* Set up and register clockevents */
- pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
- pit_clkevt.cpumask = cpumask_of(0);
- clockevents_register_device(&pit_clkevt);
+ at91_pit_register_clockevent(data, pit_rate);
+
+ return 0;
+
+err0:
+ return ret;
+}
+
+static int __devinit at91_pit_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct at91_pit_data *data;
+
+ if (!is_early_platform_device(pdev)) {
+ pr_info("at91_pit.%d: call via non early plaform\n", pdev->id);
+ return 0;
+ }
+
+ data = kmalloc(sizeof(struct at91_pit_data), GFP_KERNEL);
+ if (data == NULL) {
+ dev_err(&pdev->dev, "failed to allocate driver data\n");
+ return -ENOMEM;
+ }
+
+ ret = at91_pit_setup(data, pdev);
+
+ if (ret)
+ kfree(data);
+
+ return ret;
}
-static void at91sam926x_pit_suspend(void)
+static int __devexit at91_pit_remove(struct platform_device *pdev)
{
- /* Disable timer */
- at91_sys_write(AT91_PIT_MR, 0);
+ return -EBUSY; /* cannot unregister clockevent and clocksource */
}
-struct sys_timer at91sam926x_timer = {
- .init = at91sam926x_pit_init,
- .suspend = at91sam926x_pit_suspend,
- .resume = at91sam926x_pit_reset,
+static struct platform_driver at91_pit_device_driver = {
+ .probe = at91_pit_probe,
+ .remove = __devexit_p(at91_pit_remove),
+ .driver = {
+ .name = "at91_pit",
+ }
};
+
+early_platform_init("earlytimer", &at91_pit_device_driver);
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 0fee23f..077eecf 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -402,6 +402,11 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller (IRQ0) */
};
+struct at91_dev_resource at91sam9g45_pit __initdata = {
+ .mmio_base = AT91_PIT,
+ .irq = AT91_ID_SYS,
+};
+
struct at91_soc __initdata at91sam9g45_soc = {
.name = "at91sam9g45",
.default_irq_priority = at91sam9g45_default_irq_priority,
@@ -410,4 +415,5 @@ struct at91_soc __initdata at91sam9g45_soc = {
.resource = at91sam9g45_pios,
.num_resources = ARRAY_SIZE(at91sam9g45_pios),
},
+ .pit = &at91sam9g45_pit,
};
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index ec62ca01..7623617 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -368,6 +368,11 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
0, /* Advanced Interrupt Controller */
};
+struct at91_dev_resource at91sam9rl_pit __initdata = {
+ .mmio_base = AT91_PIT,
+ .irq = AT91_ID_SYS,
+};
+
struct at91_soc __initdata at91sam9rl_soc = {
.name = "at91sam9rl",
.default_irq_priority = at91sam9rl_default_irq_priority,
@@ -376,4 +381,5 @@ struct at91_soc __initdata at91sam9rl_soc = {
.resource = at91sam9rl_pios,
.num_resources = ARRAY_SIZE(at91sam9rl_pios),
},
+ .pit = &at91sam9rl_pit,
};
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 3103bb1..71304fe 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -219,7 +219,7 @@ static void __init afeb9260_board_init(void)
MACHINE_START(AFEB9260, "Custom afeb9260 board")
/* Maintainer: Sergey Lapin <slapin@ossfans.org> */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = afeb9260_map_io,
.init_irq = afeb9260_init_irq,
.init_machine = afeb9260_board_init,
diff --git a/arch/arm/mach-at91/board-at572d940hf_ek.c b/arch/arm/mach-at91/board-at572d940hf_ek.c
index 1d24493..61d11af 100644
--- a/arch/arm/mach-at91/board-at572d940hf_ek.c
+++ b/arch/arm/mach-at91/board-at572d940hf_ek.c
@@ -316,7 +316,7 @@ static void __init eb_board_init(void)
MACHINE_START(AT572D940HFEB, "Atmel AT91D940HF-EB")
/* Maintainer: Atmel <costa.antonior@gmail.com> */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = eb_map_io,
.init_irq = eb_init_irq,
.init_machine = eb_board_init,
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index d3a65e2..5d65fe5 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -199,7 +199,7 @@ static void __init cam60_board_init(void)
MACHINE_START(CAM60, "KwikByte CAM60")
/* Maintainer: KwikByte */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = cam60_map_io,
.init_irq = cam60_init_irq,
.init_machine = cam60_board_init,
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 8f0a53e..939a2a6 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -397,7 +397,7 @@ static void __init cap9adk_board_init(void)
MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
/* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = cap9adk_map_io,
.init_irq = cap9adk_init_irq,
.init_machine = cap9adk_board_init,
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 544995c..625f485 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -376,7 +376,7 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
#endif
/* Maintainer: Eric Benard - EUKREA Electromatique */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = cpu9krea_map_io,
.init_irq = cpu9krea_init_irq,
.init_machine = cpu9krea_board_init,
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 15cf7ab..478ae2f 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -155,7 +155,7 @@ static void __init flexibity_board_init(void)
MACHINE_START(FLEXIBITY, "Flexibity Connect")
/* Maintainer: Maxim Osipov */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = flexibity_map_io,
.init_irq = flexibity_init_irq,
.init_machine = flexibity_board_init,
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index 53032d4..51de65f 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -267,7 +267,7 @@ static void __init foxg20_board_init(void)
MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")
/* Maintainer: Sergio Tanzilli */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = foxg20_map_io,
.init_irq = foxg20_init_irq,
.init_machine = foxg20_board_init,
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 41f7164..8d40325 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -577,7 +577,7 @@ static void __init gsia18s_board_init(void)
MACHINE_START(GSIA18S, "GS_IA18_S")
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = gsia18s_map_io,
.init_irq = init_irq,
.init_machine = gsia18s_board_init,
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 2d1dec2..b313b7e 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -388,7 +388,7 @@ static void __init neocore926_board_init(void)
MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
/* Maintainer: ADENEO */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = neocore926_map_io,
.init_irq = neocore926_init_irq,
.init_machine = neocore926_board_init,
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index aa0a660..b577569 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -223,7 +223,7 @@ static void __init pcontrol_g20_board_init(void)
MACHINE_START(PCONTROL_G20, "PControl G20")
/* Maintainer: pgsellmann at portner-elektronik.at */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = pcontrol_g20_map_io,
.init_irq = init_irq,
.init_machine = pcontrol_g20_board_init,
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index e26fa6e..b131aab 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -269,7 +269,7 @@ static void __init ek_board_init(void)
MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
/* Maintainer: calao-systems */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index e4e19aa..2b569e6 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -213,7 +213,7 @@ static void __init ek_board_init(void)
MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
/* Maintainer: Olimex */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 2307a1c..e27951f 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -354,7 +354,7 @@ static void __init ek_board_init(void)
MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
/* Maintainer: Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index e1c4274..9160999 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -621,7 +621,7 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
#endif
/* Maintainer: Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 43c421d..1dfb4ad 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -452,7 +452,7 @@ static void __init ek_board_init(void)
MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
/* Maintainer: Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 5a5df34..aff0782 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -404,7 +404,7 @@ static void __init ek_board_init(void)
MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
/* Maintainer: Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
@@ -413,7 +413,7 @@ MACHINE_END
MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
/* Maintainer: Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index fef316a..9aa68d7 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -422,7 +422,7 @@ static void __init ek_board_init(void)
MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
/* Maintainer: Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 535c975..4020808 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -330,7 +330,7 @@ static void __init ek_board_init(void)
MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
/* Maintainer: Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index a5d5d89..b5a8bd8 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -179,7 +179,7 @@ static void __init snapper9260_board_init(void)
MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = snapper9260_map_io,
.init_irq = snapper9260_init_irq,
.init_machine = snapper9260_board_init,
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 1b435c3..1c92df0 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -299,7 +299,7 @@ static void __init stamp9g20evb_board_init(void)
MACHINE_START(PORTUXG20, "taskit PortuxG20")
/* Maintainer: taskit GmbH */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = portuxg20_map_io,
.init_irq = init_irq,
.init_machine = portuxg20_board_init,
@@ -308,7 +308,7 @@ MACHINE_END
MACHINE_START(STAMP9G20, "taskit Stamp9G20")
/* Maintainer: taskit GmbH */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = stamp9g20evb_map_io,
.init_irq = init_irq,
.init_machine = stamp9g20evb_board_init,
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
index a1cb555..349e31a 100644
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -280,7 +280,7 @@ static void __init ek_board_init(void)
MACHINE_START(USB_A9263, "CALAO USB_A9263")
/* Maintainer: calao-systems */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
@@ -289,7 +289,7 @@ MACHINE_END
MACHINE_START(USB_A9260, "CALAO USB_A9260")
/* Maintainer: calao-systems */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91sam926x_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/devices.c b/arch/arm/mach-at91/devices.c
index 03ded48..b11154d 100644
--- a/arch/arm/mach-at91/devices.c
+++ b/arch/arm/mach-at91/devices.c
@@ -8,8 +8,8 @@
*
*/
-#include <linux/platform_device.h>
-#include "devices.h"
+
+#include "soc.h"
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index b2c7c3a..1cfe696 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -23,7 +23,7 @@ extern void __init at91_aic_init(unsigned int priority[]);
/* Timer */
struct sys_timer;
extern struct sys_timer at91rm9200_timer;
-extern struct sys_timer at91sam926x_timer;
+extern struct sys_timer at91_timer;
extern struct sys_timer at91x40_timer;
/* Clocks */
diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h
index 974d0bd..380ef93 100644
--- a/arch/arm/mach-at91/include/mach/at91_pit.h
+++ b/arch/arm/mach-at91/include/mach/at91_pit.h
@@ -16,16 +16,16 @@
#ifndef AT91_PIT_H
#define AT91_PIT_H
-#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */
+#define AT91_PIT_MR (0x00) /* Mode Register */
#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
-#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */
+#define AT91_PIT_SR (0x04) /* Status Register */
#define AT91_PIT_PITS (1 << 0) /* Timer Status */
-#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */
-#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */
+#define AT91_PIT_PIVR (0x08) /* Periodic Interval Value Register */
+#define AT91_PIT_PIIR (0x0c) /* Periodic Interval Image Register */
#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
index 0e8604c..7b44be2 100644
--- a/arch/arm/mach-at91/soc.c
+++ b/arch/arm/mach-at91/soc.c
@@ -11,6 +11,7 @@
#include <linux/io.h>
#include <asm/mach/map.h>
+#include <asm/mach/time.h>
#include <mach/hardware.h>
#include <mach/cpu.h>
@@ -212,3 +213,44 @@ static void __init at91_add_gpio(void)
early_platform_driver_register_all("early_at91_gpio");
early_platform_driver_probe("early_at91_gpio", nb , 0);
}
+
+/*
+ * Set up both clocksource and clockevent support.
+ */
+static struct resource pit_resources[] = {
+ [0] = RES_MEM(SZ_16),
+ [1] = RES_IRQ(),
+};
+
+static struct platform_device at91_pit_device = {
+ .name = "at91_pit",
+ .id = 0,
+ .resource = pit_resources,
+ .num_resources = ARRAY_SIZE(pit_resources),
+};
+
+static void __init at91_timer_init(void)
+{
+ struct at91_dev_resource *res;
+ struct platform_device *pdev;
+ struct resource *r;
+
+ BUG_ON(!current_soc.pit);
+
+ if (current_soc.pit) {
+ r = pit_resources;
+ res = current_soc.pit;
+ pdev = &at91_pit_device;
+ }
+
+ set_resource_mem(&r[0], res->mmio_base);
+ set_resource_irq(&r[1], res->irq);
+
+ early_platform_add_devices(&pdev, 1);
+ early_platform_driver_register_all("earlytimer");
+ early_platform_driver_probe("earlytimer", 1 , 0);
+}
+
+struct sys_timer at91_timer = {
+ .init = at91_timer_init,
+};
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index bf90d48..8df07a2 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -13,6 +13,7 @@ struct at91_soc {
unsigned int *default_irq_priority;
struct at91_dev_resource_array gpio;
+ struct at91_dev_resource *pit;
void (*init)(unsigned long main_clock);
};
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-25 18:31 ` [PATCH 09/14] at91: switch pit timer to early platform devices Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-28 5:07 ` Ryan Mallon
2011-04-28 11:23 ` Andrew Victor
1 sibling, 0 replies; 85+ messages in thread
From: Ryan Mallon @ 2011-04-28 5:07 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 06:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> this will allow to specify the resources per soc
>
> as the 5series use a different start address for the pit
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
This patch breaks my Snapper 9G20 board (bisected). With this patch in
place the kernel hangs with the following boot log:
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Linux version 2.6.39-rc4+ (ryan at okiwi) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #868 Thu Apr 28 16:37:56 NZST 2011
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: Bluewater Systems Snapper 9260/9G20 module
Memory policy: ECC disabled, Data cache writeback
AT91: detected soc: at91sam9260
Clocks: CPU 396 MHz, master 132 MHz, main 18.432 MHz
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256
Kernel command line: console=ttyS0,115200 nfsroot=/home/ryan/work/internal/package_builder/rootfs ip=any root=/dev/nfs atmel_nand.use_dma=0
PID hash table entries: 256 (order: -2, 1024 bytes)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 64MB = 64MB total
Memory: 61456k/61456k available, 4080k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
DMA : 0xffc00000 - 0xffe00000 ( 2 MB)
vmalloc : 0xc4800000 - 0xfee00000 ( 934 MB)
lowmem : 0xc0000000 - 0xc4000000 ( 64 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.init : 0xc0008000 - 0xc0024000 ( 112 kB)
.text : 0xc0024000 - 0xc03274ac (3086 kB)
.data : 0xc0328000 - 0xc034a280 ( 137 kB)
NR_IRQS:192
AT91: 96 gpio irqs in 3 banks
at91_pit.0: used as clock source
at91_pit.0: used for clock events
Console: colour dummy device 80x30
console [ttyS0] enabled
Calibrating delay loop... 197.01 BogoMIPS (lpj=985088)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
NET: Registered protocol family 16
AT91: Power Management
AT91: Starting after general reset
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Advanced Linux Sound Architecture Driver Version 1.0.24.
Switching to clocksource pit
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
IPv4 FIB: Using LC-trie version 0.409
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
NetWinder Floating Point Emulator V0.97 (double precision)
JFFS2 version 2.2. (NAND) (SUMMARY) ? 2001-2006 Red Hat, Inc.
msgmni has been set to 120
io scheduler noop registered (default)
atmel_usart.0: ttyS0 at MMIO 0xfefff200 (irq = 1) is a ATMEL_SERIAL
atmel_usart.1: ttyS1 at MMIO 0xfffb0000 (irq = 6) is a ATMEL_SERIAL
atmel_usart.2: ttyS2 at MMIO 0xfffb4000 (irq = 7) is a ATMEL_SERIAL
atmel_usart.3: ttyS3 at MMIO 0xfffb8000 (irq = 8) is a ATMEL_SERIAL
brd: module loaded
loop: module loaded
atmel_nand atmel_nand: No DMA support for NAND access.
nand_get_flash_type: second ID read did not match 52,2c against 09,2c
No NAND device found.
MACB_mii_bus: probed
eth0: Atmel MACB at 0xfffc4000 irq 21 (00:00:00:00:00:01)
eth0: attached PHY driver [Generic PHY] (mii_bus:phy_addr=ffffffff:1f, irq=-1)
usbmon: debugfs is not available
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
at91_ohci at91_ohci: AT91 OHCI
at91_ohci at91_ohci: new USB bus registered, assigned bus number 1
at91_ohci at91_ohci: irq 20, io mem 0x00500000
It just stops dead here. Unfortunately I can't get my ICE unit to
connect to it for some reason so I can't give you any more information
at the moment.
I've had a quick look through the patch and I can't see anything
obviously wrong, but I don't have much experience with the clockevents
subsystem either. Any ideas? I can send through my .config if that helps.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-25 18:31 ` [PATCH 09/14] at91: switch pit timer to early platform devices Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 5:07 ` Ryan Mallon
@ 2011-04-28 11:23 ` Andrew Victor
2011-04-28 11:34 ` Russell King - ARM Linux
1 sibling, 1 reply; 85+ messages in thread
From: Andrew Victor @ 2011-04-28 11:23 UTC (permalink / raw)
To: linux-arm-kernel
hi,
> this will allow to specify the resources per soc
>
> as the 5series use a different start address for the pit
I really don't see the fascination with early platform_devices for timer.
A sys_timer is initialized way earlier, and there are surely cleaner
ways to just pass a "base address" through to the driver.
The interrupt is always AT91_ID_SYS on all chips, so there is no point
making it configurable.
Regards,
Andrew Victor
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 11:23 ` Andrew Victor
@ 2011-04-28 11:34 ` Russell King - ARM Linux
2011-04-28 13:15 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-29 6:08 ` Tony Lindgren
0 siblings, 2 replies; 85+ messages in thread
From: Russell King - ARM Linux @ 2011-04-28 11:34 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Apr 28, 2011 at 01:23:03PM +0200, Andrew Victor wrote:
> hi,
>
> > this will allow to specify the resources per soc
> >
> > as the 5series use a different start address for the pit
>
> I really don't see the fascination with early platform_devices for timer.
> A sys_timer is initialized way earlier, and there are surely cleaner
> ways to just pass a "base address" through to the driver.
> The interrupt is always AT91_ID_SYS on all chips, so there is no point
> making it configurable.
Me too - it looks like this early device stuff is heading in the
wrong direction.
There is a point when the kernel expects to have knowledge of the
passing of time initialized, and that's when the system_timer->init
callback is made. At this point, everything is in place for the
ticks to start, and some of the subsequent parts of the kernel may
expect jiffies to be updating after this call has returned.
Shoving stuff in other random places in the initialization order is
asking for things to break - maybe not immediately, but down the
line as things change in the generic parts of the code.
Stick to using the callbacks provided for their defined purpose and
life will be easier. It'll also be a lot easier to consolidate some
of the crap we've accumulated across each platform if everyone's
doing stuff in the same way.
And that's another reason to say no to this. Please stop inventing new
ways to do things unless you're prepared to provide it as a replacement
for all the (ARM) platforms we have in the kernel.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 11:34 ` Russell King - ARM Linux
@ 2011-04-28 13:15 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 16:56 ` Andrew Victor
2011-04-29 6:08 ` Tony Lindgren
1 sibling, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-28 13:15 UTC (permalink / raw)
To: linux-arm-kernel
On 12:34 Thu 28 Apr , Russell King - ARM Linux wrote:
> On Thu, Apr 28, 2011 at 01:23:03PM +0200, Andrew Victor wrote:
> > hi,
> >
> > > this will allow to specify the resources per soc
> > >
> > > as the 5series use a different start address for the pit
> >
> > I really don't see the fascination with early platform_devices for timer.
> > A sys_timer is initialized way earlier, and there are surely cleaner
> > ways to just pass a "base address" through to the driver.
> > The interrupt is always AT91_ID_SYS on all chips, so there is no point
> > making it configurable.
>
> Me too - it looks like this early device stuff is heading in the
> wrong direction.
>
> There is a point when the kernel expects to have knowledge of the
> passing of time initialized, and that's when the system_timer->init
> callback is made. At this point, everything is in place for the
> ticks to start, and some of the subsequent parts of the kernel may
> expect jiffies to be updating after this call has returned.
>
> Shoving stuff in other random places in the initialization order is
> asking for things to break - maybe not immediately, but down the
> line as things change in the generic parts of the code.
>
> Stick to using the callbacks provided for their defined purpose and
> life will be easier. It'll also be a lot easier to consolidate some
> of the crap we've accumulated across each platform if everyone's
> doing stuff in the same way.
>
> And that's another reason to say no to this. Please stop inventing new
> ways to do things unless you're prepared to provide it as a replacement
> for all the (ARM) platforms we have in the kernel.
Personally I do not change the current arm way
I init the timer during system_timer->init
I just the the early device their to pass the resources
but if switch all arm timer this way is fine to you I'm ready to do the whole
update
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 13:15 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-28 16:56 ` Andrew Victor
2011-04-28 17:33 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 18:15 ` Russell King - ARM Linux
0 siblings, 2 replies; 85+ messages in thread
From: Andrew Victor @ 2011-04-28 16:56 UTC (permalink / raw)
To: linux-arm-kernel
hi,
> > And that's another reason to say no to this. Please stop inventing new
> > ways to do things unless you're prepared to provide it as a replacement
> > for all the (ARM) platforms we have in the kernel.
> Personally I do not change the current arm way
>
> I init the timer during system_timer->init
>
> I just the the early device their to pass the resources
> but if switch all arm timer this way is fine to you I'm ready to do the whole
> update
Well, attached is a simpler way of passing the base-address to the timer
drivers. It will solve the timer issues with a single kernel supporting
multiple AT91 processors.
I think it would be cleaner still if the "struct sys_timer" could
include a register-base-address field. Russell?
Regards,
Andrew Victor
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at572d940hf.c linux-2.6/arch/arm/mach-at91/at572d940hf.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at572d940hf.c 2011-04-28 18:31:36.006648045 +0200
+++ linux-2.6/arch/arm/mach-at91/at572d940hf.c 2011-04-28 18:00:06.017315300 +0200
@@ -307,6 +307,8 @@
/* Map peripherals */
iotable_init(at572d940hf_io_desc, ARRAY_SIZE(at572d940hf_io_desc));
+ at91_timer_base = (void __iomem *)AT91_VA_BASE_SYS + AT91_PIT;
+
at91_arch_reset = at572d940hf_reset;
at91_extern_irq = (1 << AT572D940HF_ID_IRQ0) | (1 << AT572D940HF_ID_IRQ1)
| (1 << AT572D940HF_ID_IRQ2);
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91cap9.c linux-2.6/arch/arm/mach-at91/at91cap9.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91cap9.c 2011-04-28 18:31:36.006648045 +0200
+++ linux-2.6/arch/arm/mach-at91/at91cap9.c 2011-04-28 17:59:55.389976086 +0200
@@ -308,6 +308,8 @@
/* Map peripherals */
iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
+ at91_timer_base = (void __iomem *)AT91_VA_BASE_SYS + AT91_PIT;
+
at91_arch_reset = at91cap9_reset;
pm_power_off = at91cap9_poweroff;
at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91rm9200.c linux-2.6/arch/arm/mach-at91/at91rm9200.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91rm9200.c 2011-04-28 18:31:36.006648045 +0200
+++ linux-2.6/arch/arm/mach-at91/at91rm9200.c 2011-04-28 17:41:09.092190177 +0200
@@ -262,8 +262,8 @@
/*
* Perform a hardware reset with the use of the Watchdog timer.
*/
- at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
- at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+ at91_sys_write(AT91_ST + AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
+ at91_sys_write(AT91_ST + AT91_ST_CR, AT91_ST_WDRST);
}
@@ -275,6 +275,8 @@
/* Map peripherals */
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
+ at91_timer_base = (void __iomem *)AT91_VA_BASE_SYS + AT91_ST;
+
at91_arch_reset = at91rm9200_reset;
at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91rm9200_time.c linux-2.6/arch/arm/mach-at91/at91rm9200_time.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91rm9200_time.c 2011-04-27 12:28:25.985090424 +0200
+++ linux-2.6/arch/arm/mach-at91/at91rm9200_time.c 2011-04-28 17:41:30.238868208 +0200
@@ -28,9 +28,12 @@
#include <mach/at91_st.h>
+#include "generic.h"
+
static unsigned long last_crtr;
static u32 irqmask;
static struct clock_event_device clkevt;
+void __iomem *at91_timer_base; /* base address */
/*
* The ST_CRTR is updated asynchronously to the master clock ... but
@@ -41,9 +44,9 @@
{
unsigned long x1, x2;
- x1 = at91_sys_read(AT91_ST_CRTR);
+ x1 = __raw_readl(at91_timer_base + AT91_ST_CRTR);
do {
- x2 = at91_sys_read(AT91_ST_CRTR);
+ x2 = __raw_readl(at91_timer_base + AT91_ST_CRTR);
if (x1 == x2)
break;
x1 = x2;
@@ -56,7 +59,7 @@
*/
static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
{
- u32 sr = at91_sys_read(AT91_ST_SR) & irqmask;
+ u32 sr = __raw_readl(at91_timer_base + AT91_ST_SR) & irqmask;
/*
* irqs should be disabled here, but as the irq is shared they are only
@@ -108,22 +111,22 @@
clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
{
/* Disable and flush pending timer interrupts */
- at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
- (void) at91_sys_read(AT91_ST_SR);
+ __raw_writel(AT91_ST_PITS | AT91_ST_ALMS, at91_timer_base + AT91_ST_IDR);
+ (void) __raw_readl(at91_timer_base + AT91_ST_SR);
last_crtr = read_CRTR();
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
/* PIT for periodic irqs; fixed rate of 1/HZ */
irqmask = AT91_ST_PITS;
- at91_sys_write(AT91_ST_PIMR, LATCH);
+ __raw_writel(LATCH, at91_timer_base + AT91_ST_PIMR);
break;
case CLOCK_EVT_MODE_ONESHOT:
/* ALM for oneshot irqs, set by next_event()
* before 32 seconds have passed
*/
irqmask = AT91_ST_ALMS;
- at91_sys_write(AT91_ST_RTAR, last_crtr);
+ __raw_writel(last_crtr, at91_timer_base + AT91_ST_RTAR);
break;
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_UNUSED:
@@ -131,7 +134,7 @@
irqmask = 0;
break;
}
- at91_sys_write(AT91_ST_IER, irqmask);
+ __raw_writel(irqmask, at91_timer_base + AT91_ST_IER);
}
static int
@@ -154,12 +157,12 @@
alm = read_CRTR();
/* Cancel any pending alarm; flush any pending IRQ */
- at91_sys_write(AT91_ST_RTAR, alm);
- (void) at91_sys_read(AT91_ST_SR);
+ __raw_writel(alm, at91_timer_base + AT91_ST_RTAR);
+ (void) __raw_readl(at91_timer_base + AT91_ST_SR);
/* Schedule alarm by writing RTAR. */
alm += delta;
- at91_sys_write(AT91_ST_RTAR, alm);
+ __raw_writel(alm, at91_timer_base + AT91_ST_RTAR);
return status;
}
@@ -179,9 +182,9 @@
void __init at91rm9200_timer_init(void)
{
/* Disable all timer interrupts, and clear any pending ones */
- at91_sys_write(AT91_ST_IDR,
- AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
- (void) at91_sys_read(AT91_ST_SR);
+ __raw_writel(AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS,
+ at91_timer_base + AT91_ST_IDR);
+ (void) __raw_readl(at91_timer_base + AT91_ST_SR);
/* Make IRQs happen for the system timer */
setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
@@ -190,7 +193,7 @@
* directly for the clocksource and all clockevents, after adjusting
* its prescaler from the 1 Hz default.
*/
- at91_sys_write(AT91_ST_RTMR, 1);
+ __raw_writel(1, at91_timer_base + AT91_ST_RTMR);
/* Setup timer clockevent, with minimum of two ticks (important!!) */
clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91sam9260.c linux-2.6/arch/arm/mach-at91/at91sam9260.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91sam9260.c 2011-04-28 18:31:36.010647848 +0200
+++ linux-2.6/arch/arm/mach-at91/at91sam9260.c 2011-04-28 18:00:38.823275695 +0200
@@ -307,6 +307,7 @@
at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
at91sam9xe_sram_desc->length = sram_size;
+ /* Map peripherals */
iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
}
@@ -322,6 +323,8 @@
else
iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
+ at91_timer_base = (void __iomem *)AT91_VA_BASE_SYS + AT91_PIT;
+
at91_arch_reset = at91sam9_alt_reset;
pm_power_off = at91sam9260_poweroff;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91sam9261.c linux-2.6/arch/arm/mach-at91/at91sam9261.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91sam9261.c 2011-04-28 18:31:36.010647848 +0200
+++ linux-2.6/arch/arm/mach-at91/at91sam9261.c 2011-04-28 17:59:00.081415501 +0200
@@ -277,6 +277,7 @@
else
iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc));
+ at91_timer_base = (void __iomem *)AT91_VA_BASE_SYS + AT91_PIT;
at91_arch_reset = at91sam9_alt_reset;
pm_power_off = at91sam9261_poweroff;
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91sam9263.c linux-2.6/arch/arm/mach-at91/at91sam9263.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91sam9263.c 2011-04-28 18:31:36.010647848 +0200
+++ linux-2.6/arch/arm/mach-at91/at91sam9263.c 2011-04-28 17:59:04.173161020 +0200
@@ -284,6 +284,8 @@
/* Map peripherals */
iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
+ at91_timer_base = (void __iomem *)AT91_VA_BASE_SYS + AT91_PIT;
+
at91_arch_reset = at91sam9_alt_reset;
pm_power_off = at91sam9263_poweroff;
at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91sam926x_time.c linux-2.6/arch/arm/mach-at91/at91sam926x_time.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91sam926x_time.c 2011-04-27 12:28:26.033087705 +0200
+++ linux-2.6/arch/arm/mach-at91/at91sam926x_time.c 2011-04-28 17:48:50.659369273 +0200
@@ -23,6 +23,7 @@
#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
+void __iomem *at91_timer_base; /* base address */
static u32 pit_cycle; /* write-once */
static u32 pit_cnt; /* access only w/system irq blocked */
@@ -39,7 +40,7 @@
raw_local_irq_save(flags);
elapsed = pit_cnt;
- t = at91_sys_read(AT91_PIT_PIIR);
+ t = __raw_readl(at91_timer_base + AT91_PIT_PIIR);
raw_local_irq_restore(flags);
elapsed += PIT_PICNT(t) * pit_cycle;
@@ -64,9 +65,9 @@
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
/* update clocksource counter */
- pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
- at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
- | AT91_PIT_PITIEN);
+ pit_cnt += pit_cycle * PIT_PICNT(__raw_readl(at91_timer_base + AT91_PIT_PIVR));
+ __raw_writel((pit_cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN,
+ at91_timer_base + AT91_PIT_MR);
break;
case CLOCK_EVT_MODE_ONESHOT:
BUG();
@@ -74,7 +75,7 @@
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_UNUSED:
/* disable irq, leaving the clocksource active */
- at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+ __raw_writel((pit_cycle - 1) | AT91_PIT_PITEN, at91_timer_base + AT91_PIT_MR);
break;
case CLOCK_EVT_MODE_RESUME:
break;
@@ -103,11 +104,11 @@
/* The PIT interrupt may be disabled, and is shared */
if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
- && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
+ && (__raw_readl(at91_timer_base + AT91_PIT_SR) & AT91_PIT_PITS)) {
unsigned nr_ticks;
/* Get number of ticks performed before irq, and ack it */
- nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
+ nr_ticks = PIT_PICNT(__raw_readl(at91_timer_base + AT91_PIT_PIVR));
do {
pit_cnt += pit_cycle;
pit_clkevt.event_handler(&pit_clkevt);
@@ -129,14 +130,14 @@
static void at91sam926x_pit_reset(void)
{
/* Disable timer and irqs */
- at91_sys_write(AT91_PIT_MR, 0);
+ __raw_writel(0, at91_timer_base + AT91_PIT_MR);
/* Clear any pending interrupts, wait for PIT to stop counting */
- while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
+ while (PIT_CPIV(__raw_readl(at91_timer_base + AT91_PIT_PIVR)) != 0)
cpu_relax();
/* Start PIT but don't enable IRQ */
- at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+ __raw_writel((pit_cycle - 1) | AT91_PIT_PITEN, at91_timer_base + AT91_PIT_MR);
}
/*
@@ -178,7 +179,7 @@
static void at91sam926x_pit_suspend(void)
{
/* Disable timer */
- at91_sys_write(AT91_PIT_MR, 0);
+ __raw_writel(0, at91_timer_base + AT91_PIT_MR);
}
struct sys_timer at91sam926x_timer = {
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91sam9g45.c linux-2.6/arch/arm/mach-at91/at91sam9g45.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91sam9g45.c 2011-04-28 18:31:36.010647848 +0200
+++ linux-2.6/arch/arm/mach-at91/at91sam9g45.c 2011-04-28 17:59:07.880930428 +0200
@@ -311,6 +311,8 @@
/* Map peripherals */
iotable_init(at91sam9g45_io_desc, ARRAY_SIZE(at91sam9g45_io_desc));
+ at91_timer_base = (void __iomem *)AT91_VA_BASE_SYS + AT91_PIT;
+
at91_arch_reset = at91sam9g45_reset;
pm_power_off = at91sam9g45_poweroff;
at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/at91sam9rl.c linux-2.6/arch/arm/mach-at91/at91sam9rl.c
--- linux-2.6.38.at91/arch/arm/mach-at91/at91sam9rl.c 2011-04-28 18:31:36.014647647 +0200
+++ linux-2.6/arch/arm/mach-at91/at91sam9rl.c 2011-04-28 17:59:45.146613009 +0200
@@ -276,6 +276,8 @@
/* Map SRAM */
iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
+ at91_timer_base = (void __iomem *)AT91_VA_BASE_SYS + AT91_PIT;
+
at91_arch_reset = at91sam9_alt_reset;
pm_power_off = at91sam9rl_poweroff;
at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/generic.h linux-2.6/arch/arm/mach-at91/generic.h
--- linux-2.6.38.at91/arch/arm/mach-at91/generic.h 2011-04-28 18:31:36.014647647 +0200
+++ linux-2.6/arch/arm/mach-at91/generic.h 2011-04-28 17:40:01.404422677 +0200
@@ -64,3 +64,5 @@
extern void (*at91_arch_reset)(void);
extern int at91_extern_irq;
+
+extern void __iomem *at91_timer_base; /* base address of system timer */
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/include/mach/at91_pit.h linux-2.6/arch/arm/mach-at91/include/mach/at91_pit.h
--- linux-2.6.38.at91/arch/arm/mach-at91/include/mach/at91_pit.h 2009-06-10 05:05:27.000000000 +0200
+++ linux-2.6/arch/arm/mach-at91/include/mach/at91_pit.h 2011-04-28 17:43:52.102003644 +0200
@@ -16,16 +16,16 @@
#ifndef AT91_PIT_H
#define AT91_PIT_H
-#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */
+#define AT91_PIT_MR 0x00 /* Mode Register */
#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
-#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */
+#define AT91_PIT_SR 0x04 /* Status Register */
#define AT91_PIT_PITS (1 << 0) /* Timer Status */
-#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */
-#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */
+#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */
+#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */
#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
diff -urN -x CVS linux-2.6.38.at91/arch/arm/mach-at91/include/mach/at91_st.h linux-2.6/arch/arm/mach-at91/include/mach/at91_st.h
--- linux-2.6.38.at91/arch/arm/mach-at91/include/mach/at91_st.h 2009-06-10 05:05:27.000000000 +0200
+++ linux-2.6/arch/arm/mach-at91/include/mach/at91_st.h 2011-04-28 17:13:35.329073653 +0200
@@ -16,34 +16,34 @@
#ifndef AT91_ST_H
#define AT91_ST_H
-#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */
+#define AT91_ST_CR 0x00 /* Control Register */
#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */
-#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */
+#define AT91_ST_PIMR 0x04 /* Period Interval Mode Register */
#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */
-#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */
+#define AT91_ST_WDMR 0x08 /* Watchdog Mode Register */
#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */
#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */
#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */
-#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */
+#define AT91_ST_RTMR 0x0c /* Real-time Mode Register */
#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */
-#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */
+#define AT91_ST_SR 0x10 /* Status Register */
#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */
#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */
#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */
#define AT91_ST_ALMS (1 << 3) /* Alarm Status */
-#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */
-#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */
-#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */
+#define AT91_ST_IER 0x14 /* Interrupt Enable Register */
+#define AT91_ST_IDR 0x18 /* Interrupt Disable Register */
+#define AT91_ST_IMR 0x1c /* Interrupt Mask Register */
-#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */
+#define AT91_ST_RTAR 0x20 /* Real-time Alarm Register */
#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */
-#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */
+#define AT91_ST_CRTR 0x24 /* Current Real-time Register */
#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */
#endif
diff -urN -x CVS linux-2.6.38.at91/drivers/watchdog/at91rm9200_wdt.c linux-2.6/drivers/watchdog/at91rm9200_wdt.c
--- linux-2.6.38.at91/drivers/watchdog/at91rm9200_wdt.c 2010-12-24 16:53:22.211689101 +0200
+++ linux-2.6/drivers/watchdog/at91rm9200_wdt.c 2011-04-28 17:15:04.291102469 +0200
@@ -51,7 +51,7 @@
*/
static inline void at91_wdt_stop(void)
{
- at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN);
+ at91_sys_write(AT91_ST + AT91_ST_WDMR, AT91_ST_EXTEN);
}
/*
@@ -59,9 +59,9 @@
*/
static inline void at91_wdt_start(void)
{
- at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN |
+ at91_sys_write(AT91_ST + AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN |
(((65536 * wdt_time) >> 8) & AT91_ST_WDV));
- at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+ at91_sys_write(AT91_ST + AT91_ST_CR, AT91_ST_WDRST);
}
/*
@@ -69,7 +69,7 @@
*/
static inline void at91_wdt_reload(void)
{
- at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+ at91_sys_write(AT91_ST + AT91_ST_CR, AT91_ST_WDRST);
}
/* ......................................................................... */
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 16:56 ` Andrew Victor
@ 2011-04-28 17:33 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 18:15 ` Russell King - ARM Linux
1 sibling, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-28 17:33 UTC (permalink / raw)
To: linux-arm-kernel
On 18:56 Thu 28 Apr , Andrew Victor wrote:
> hi,
>
> > > And that's another reason to say no to this. Please stop inventing new
> > > ways to do things unless you're prepared to provide it as a replacement
> > > for all the (ARM) platforms we have in the kernel.
> > Personally I do not change the current arm way
> >
> > I init the timer during system_timer->init
> >
> > I just the the early device their to pass the resources
> > but if switch all arm timer this way is fine to you I'm ready to do the whole
> > update
>
> Well, attached is a simpler way of passing the base-address to the timer
> drivers. It will solve the timer issues with a single kernel supporting
> multiple AT91 processors.
I really don't like the idea of having global var for driver
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 16:56 ` Andrew Victor
2011-04-28 17:33 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-28 18:15 ` Russell King - ARM Linux
2011-04-28 20:47 ` Andrew Victor
1 sibling, 1 reply; 85+ messages in thread
From: Russell King - ARM Linux @ 2011-04-28 18:15 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Apr 28, 2011 at 06:56:32PM +0200, Andrew Victor wrote:
> hi,
>
> > > And that's another reason to say no to this. Please stop inventing new
> > > ways to do things unless you're prepared to provide it as a replacement
> > > for all the (ARM) platforms we have in the kernel.
> > Personally I do not change the current arm way
> >
> > I init the timer during system_timer->init
> >
> > I just the the early device their to pass the resources
> > but if switch all arm timer this way is fine to you I'm ready to do the whole
> > update
>
> Well, attached is a simpler way of passing the base-address to the timer
> drivers. It will solve the timer issues with a single kernel supporting
> multiple AT91 processors.
>
> I think it would be cleaner still if the "struct sys_timer" could
> include a register-base-address field. Russell?
That's not really what all platforms want, and with the advent of
clocksources and clock events, I think the sys_timer thing is mostly
dead.
I've been thinking about killing it off for a while for those platforms
using the GENERIC_CLOCKEVENTS stuff. From what I can see, the only
real users of it are: acorn (riscpc), at91x40, clps711x, ebsa110,
ep93xx, h720x, ixp2000, ixp23xx, ks8695, nuc93x, pnx4008, and samsung.
It would be nice to get the modern stuff out of that converted to the
clockevents/clocksource stuff - any chance of that happening for
AT91x40?
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 18:15 ` Russell King - ARM Linux
@ 2011-04-28 20:47 ` Andrew Victor
2011-04-28 21:46 ` Russell King - ARM Linux
2011-04-29 7:55 ` Greg Ungerer
0 siblings, 2 replies; 85+ messages in thread
From: Andrew Victor @ 2011-04-28 20:47 UTC (permalink / raw)
To: linux-arm-kernel
hi Russell,
>> I think it would be cleaner still if the "struct sys_timer" could
>> include a register-base-address field. ?Russell?
>
> That's not really what all platforms want, and with the advent of
> clocksources and clock events, I think the sys_timer thing is mostly
> dead.
How would those systems initialize the system-timer?
An "init_timer" method in the machine-description?
> I've been thinking about killing it off for a while for those platforms
> using the GENERIC_CLOCKEVENTS stuff. ?From what I can see, the only
> real users of it are: acorn (riscpc), at91x40, clps711x, ebsa110,
> ep93xx, h720x, ixp2000, ixp23xx, ks8695, nuc93x, pnx4008, and samsung.
>
> It would be nice to get the modern stuff out of that converted to the
> clockevents/clocksource stuff - any chance of that happening for
> AT91x40?
The AT91x40 (ARM7) is maintained by Greg Ungerer.
Greg?
Regards,
Andrew Victor
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 20:47 ` Andrew Victor
@ 2011-04-28 21:46 ` Russell King - ARM Linux
2011-04-28 23:38 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-29 7:55 ` Greg Ungerer
1 sibling, 1 reply; 85+ messages in thread
From: Russell King - ARM Linux @ 2011-04-28 21:46 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Apr 28, 2011 at 10:47:37PM +0200, Andrew Victor wrote:
> hi Russell,
>
> >> I think it would be cleaner still if the "struct sys_timer" could
> >> include a register-base-address field. ?Russell?
> >
> > That's not really what all platforms want, and with the advent of
> > clocksources and clock events, I think the sys_timer thing is mostly
> > dead.
>
> How would those systems initialize the system-timer?
> An "init_timer" method in the machine-description?
I was thinking of an init_timekeeping() callback in the machine record
rather than having platforms provide a useless sys_timer structure, and
maybe having an ARM generic init_legacy_timekeeping() function for those
platforms which still use sys_timer() to put into the init_timekeeping()
hook.
I've not really firmed up the idea yet though.
Alternatively, if someone wants to come up with a better way to initialize
the clocksource and clock event stuff across all platforms...
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 21:46 ` Russell King - ARM Linux
@ 2011-04-28 23:38 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-29 9:28 ` Russell King - ARM Linux
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-28 23:38 UTC (permalink / raw)
To: linux-arm-kernel
On 22:46 Thu 28 Apr , Russell King - ARM Linux wrote:
> On Thu, Apr 28, 2011 at 10:47:37PM +0200, Andrew Victor wrote:
> > hi Russell,
> >
> > >> I think it would be cleaner still if the "struct sys_timer" could
> > >> include a register-base-address field. ?Russell?
> > >
> > > That's not really what all platforms want, and with the advent of
> > > clocksources and clock events, I think the sys_timer thing is mostly
> > > dead.
> >
> > How would those systems initialize the system-timer?
> > An "init_timer" method in the machine-description?
>
> I was thinking of an init_timekeeping() callback in the machine record
> rather than having platforms provide a useless sys_timer structure, and
> maybe having an ARM generic init_legacy_timekeeping() function for those
> platforms which still use sys_timer() to put into the init_timekeeping()
> hook.
>
> I've not really firmed up the idea yet though.
>
> Alternatively, if someone wants to come up with a better way to initialize
> the clocksource and clock event stuff across all platforms...
I propose we use early device as I did and Magnus did on SH-Mobile
we will have a common early param "earlytimer"
then we register the drivers like this
early_platform_init("earlytimer", &time_device_driver);
and in the arm init we just have to do
early_platform_driver_register_all("earlytimer");
and call
early_platform_driver_probe("earlytimer", 1 , 0);
or let the platform do so as some of them may have more than 1 timer to
register example on shmobile
We could also have two init one for soc one for machine
if (machine_time_init)
machine_time_init()
else
soc_time_init()
as the timer is not really is ofen not machine specific but platform specific.
I see that on shmobile, at91 (3 timers sam9, rm9200, x40), nomadok, and other
This will simplify timer sharing across architecture such shmobile arm and sh
for renesas but other vendor get the same issue when they soc on different
architecture
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 23:38 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-29 9:28 ` Russell King - ARM Linux
2011-04-30 1:36 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Russell King - ARM Linux @ 2011-04-29 9:28 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Apr 29, 2011 at 01:38:23AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 22:46 Thu 28 Apr , Russell King - ARM Linux wrote:
> > On Thu, Apr 28, 2011 at 10:47:37PM +0200, Andrew Victor wrote:
> > > hi Russell,
> > >
> > > >> I think it would be cleaner still if the "struct sys_timer" could
> > > >> include a register-base-address field. ?Russell?
> > > >
> > > > That's not really what all platforms want, and with the advent of
> > > > clocksources and clock events, I think the sys_timer thing is mostly
> > > > dead.
> > >
> > > How would those systems initialize the system-timer?
> > > An "init_timer" method in the machine-description?
> >
> > I was thinking of an init_timekeeping() callback in the machine record
> > rather than having platforms provide a useless sys_timer structure, and
> > maybe having an ARM generic init_legacy_timekeeping() function for those
> > platforms which still use sys_timer() to put into the init_timekeeping()
> > hook.
> >
> > I've not really firmed up the idea yet though.
> >
> > Alternatively, if someone wants to come up with a better way to initialize
> > the clocksource and clock event stuff across all platforms...
>
> I propose we use early device as I did and Magnus did on SH-Mobile
>
> we will have a common early param "earlytimer"
>
> then we register the drivers like this
>
> early_platform_init("earlytimer", &time_device_driver);
>
> and in the arm init we just have to do
> early_platform_driver_register_all("earlytimer");
> and call
> early_platform_driver_probe("earlytimer", 1 , 0);
> or let the platform do so as some of them may have more than 1 timer to
> register example on shmobile
>
> We could also have two init one for soc one for machine
> if (machine_time_init)
> machine_time_init()
> else
> soc_time_init()
>
> as the timer is not really is ofen not machine specific but platform specific.
> I see that on shmobile, at91 (3 timers sam9, rm9200, x40), nomadok, and other
>
> This will simplify timer sharing across architecture such shmobile arm and sh
> for renesas but other vendor get the same issue when they soc on different
> architecture
It doesn't sound like this eliminates anything - it just makes things
more complex. It seems we _still_ need a callback into the platform
code to execute some kind of initialization, eg calling
early_platform_driver_* with appropriate arguments. So I'm not sure
what we're saving by effectively breaking the initialization function
out into two separate functions and an early platform driver thing.
It all sounds much more complex to me with very little benefit for the
majority of platforms, and it doesn't seem to change what's required
from core code at all - we still need to provide an initialization
call into platform code at the appropriate time.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-29 9:28 ` Russell King - ARM Linux
@ 2011-04-30 1:36 ` Jean-Christophe PLAGNIOL-VILLARD
2011-05-08 10:08 ` Russell King - ARM Linux
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-30 1:36 UTC (permalink / raw)
To: linux-arm-kernel
On 10:28 Fri 29 Apr , Russell King - ARM Linux wrote:
> On Fri, Apr 29, 2011 at 01:38:23AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 22:46 Thu 28 Apr , Russell King - ARM Linux wrote:
> > > On Thu, Apr 28, 2011 at 10:47:37PM +0200, Andrew Victor wrote:
> > > > hi Russell,
> > > >
> > > > >> I think it would be cleaner still if the "struct sys_timer" could
> > > > >> include a register-base-address field. ?Russell?
> > > > >
> > > > > That's not really what all platforms want, and with the advent of
> > > > > clocksources and clock events, I think the sys_timer thing is mostly
> > > > > dead.
> > > >
> > > > How would those systems initialize the system-timer?
> > > > An "init_timer" method in the machine-description?
> > >
> > > I was thinking of an init_timekeeping() callback in the machine record
> > > rather than having platforms provide a useless sys_timer structure, and
> > > maybe having an ARM generic init_legacy_timekeeping() function for those
> > > platforms which still use sys_timer() to put into the init_timekeeping()
> > > hook.
> > >
> > > I've not really firmed up the idea yet though.
> > >
> > > Alternatively, if someone wants to come up with a better way to initialize
> > > the clocksource and clock event stuff across all platforms...
> >
> > I propose we use early device as I did and Magnus did on SH-Mobile
> >
> > we will have a common early param "earlytimer"
> >
> > then we register the drivers like this
> >
> > early_platform_init("earlytimer", &time_device_driver);
> >
> > and in the arm init we just have to do
> > early_platform_driver_register_all("earlytimer");
> > and call
> > early_platform_driver_probe("earlytimer", 1 , 0);
> > or let the platform do so as some of them may have more than 1 timer to
> > register example on shmobile
> >
> > We could also have two init one for soc one for machine
> > if (machine_time_init)
> > machine_time_init()
> > else
> > soc_time_init()
> >
> > as the timer is not really is ofen not machine specific but platform specific.
> > I see that on shmobile, at91 (3 timers sam9, rm9200, x40), nomadok, and other
> >
> > This will simplify timer sharing across architecture such shmobile arm and sh
> > for renesas but other vendor get the same issue when they soc on different
> > architecture
>
> It doesn't sound like this eliminates anything - it just makes things
> more complex. It seems we _still_ need a callback into the platform
> code to execute some kind of initialization, eg calling
> early_platform_driver_* with appropriate arguments. So I'm not sure
> what we're saving by effectively breaking the initialization function
> out into two separate functions and an early platform driver thing.
>
> It all sounds much more complex to me with very little benefit for the
> majority of platforms, and it doesn't seem to change what's required
> from core code at all - we still need to provide an initialization
> call into platform code at the appropriate time.
yes we still need a calback to call the early probe
but just a callback for the init no resume, suspend
if we want multiple timer early which I do not think is necessarly
for really early one timer is enough if you need more you can initialise them
later
so if we keep this constrain
in the arm timer init
early_platform_driver_register_all("earlytimer");
early_platform_driver_probe("earlytimer", 1 , 0);
and in the init_early you just need to do
early_platform_add_devices(devices, nb);
so it's more generic
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-30 1:36 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-05-08 10:08 ` Russell King - ARM Linux
2011-05-08 10:44 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Russell King - ARM Linux @ 2011-05-08 10:08 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Apr 30, 2011 at 03:36:58AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> yes we still need a calback to call the early probe
> but just a callback for the init no resume, suspend
>
> if we want multiple timer early which I do not think is necessarly
> for really early one timer is enough if you need more you can initialise them
> later
>
> so if we keep this constrain
>
> in the arm timer init
> early_platform_driver_register_all("earlytimer");
> early_platform_driver_probe("earlytimer", 1 , 0);
>
> and in the init_early you just need to do
> early_platform_add_devices(devices, nb);
>
> so it's more generic
I'm still not convinced. What it seems to be doing is moving from this:
time_init() ->
system_timer->init() ->
platform code
to this:
setup_arch() ->
init_early() ->
platform code ->
early_platform_add_devices()
time_init() ->
early_platform_driver_register_all(),
early_platform_driver_probe() ->
early timer probe function (platform code)
which to me just looks a whole lot more complex without benefit.
Platform code still has to make the decision at some point about which
timers are added - in the former case via the system_timer->init()
callback or in the latter case by the init_early() callback.
I can't see how this results in something better, either by simplifing
the code or resulting in any kind of consolidation. That's backed up
by this patch adding around 230 lines of code.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-05-08 10:08 ` Russell King - ARM Linux
@ 2011-05-08 10:44 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-05-08 10:44 UTC (permalink / raw)
To: linux-arm-kernel
On 11:08 Sun 08 May , Russell King - ARM Linux wrote:
> On Sat, Apr 30, 2011 at 03:36:58AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > yes we still need a calback to call the early probe
> > but just a callback for the init no resume, suspend
> >
> > if we want multiple timer early which I do not think is necessarly
> > for really early one timer is enough if you need more you can initialise them
> > later
> >
> > so if we keep this constrain
> >
> > in the arm timer init
> > early_platform_driver_register_all("earlytimer");
> > early_platform_driver_probe("earlytimer", 1 , 0);
> >
> > and in the init_early you just need to do
> > early_platform_add_devices(devices, nb);
> >
> > so it's more generic
>
> I'm still not convinced. What it seems to be doing is moving from this:
>
> time_init() ->
> system_timer->init() ->
> platform code
>
> to this:
>
> setup_arch() ->
> init_early() ->
> platform code ->
> early_platform_add_devices()
> time_init() ->
> early_platform_driver_register_all(),
> early_platform_driver_probe() ->
> early timer probe function (platform code)
>
> which to me just looks a whole lot more complex without benefit.
>
> Platform code still has to make the decision at some point about which
> timers are added - in the former case via the system_timer->init()
> callback or in the latter case by the init_early() callback.
>
> I can't see how this results in something better, either by simplifing
> the code or resulting in any kind of consolidation. That's backed up
> by this patch adding around 230 lines of code.
Simplify cross arch timer drivers
Example on SH-Mobile
And Renesas is not the only vendor to have multiple ARCH ip shared
more are arriving
allow to probe more than one timer genericly
allow to pass resource and platform data in a standard way
this patch switch from static to allocated device that's why we add 230 lines
if you just add the early device only
you need aboud 20 lines maybe less
We could have a common cross ARCH way to init timer
via earlytimer
so the drivers are arch independant
and no need anymore to store the timer in arch/arm/....
but all timer move to drivers/clocksource/
so less code in arch specially on arm where nearly all vendor have it's own
timer drivers
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 20:47 ` Andrew Victor
2011-04-28 21:46 ` Russell King - ARM Linux
@ 2011-04-29 7:55 ` Greg Ungerer
1 sibling, 0 replies; 85+ messages in thread
From: Greg Ungerer @ 2011-04-29 7:55 UTC (permalink / raw)
To: linux-arm-kernel
Hi Andrew,
On 29/04/11 06:47, Andrew Victor wrote:
> hi Russell,
>
>>> I think it would be cleaner still if the "struct sys_timer" could
>>> include a register-base-address field. ??Russell?
>>
>> That's not really what all platforms want, and with the advent of
>> clocksources and clock events, I think the sys_timer thing is mostly
>> dead.
>
> How would those systems initialize the system-timer?
> An "init_timer" method in the machine-description?
>
>
>> I've been thinking about killing it off for a while for those platforms
>> using the GENERIC_CLOCKEVENTS stuff. ??From what I can see, the only
>> real users of it are: acorn (riscpc), at91x40, clps711x, ebsa110,
>> ep93xx, h720x, ixp2000, ixp23xx, ks8695, nuc93x, pnx4008, and samsung.
>>
>> It would be nice to get the modern stuff out of that converted to the
>> clockevents/clocksource stuff - any chance of that happening for
>> AT91x40?
>
> The AT91x40 (ARM7) is maintained by Greg Ungerer.
> Greg?
I'll have a look when I get a minute.
Regards
Greg
------------------------------------------------------------------------
Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
SnapGear Group, McAfee PHONE: +61 7 3435 2888
8 Gardner Close FAX: +61 7 3217 5323
Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-28 11:34 ` Russell King - ARM Linux
2011-04-28 13:15 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-29 6:08 ` Tony Lindgren
2011-04-29 8:31 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 1 reply; 85+ messages in thread
From: Tony Lindgren @ 2011-04-29 6:08 UTC (permalink / raw)
To: linux-arm-kernel
* Russell King - ARM Linux <linux@arm.linux.org.uk> [110428 04:32]:
> On Thu, Apr 28, 2011 at 01:23:03PM +0200, Andrew Victor wrote:
> > hi,
> >
> > > this will allow to specify the resources per soc
> > >
> > > as the 5series use a different start address for the pit
> >
> > I really don't see the fascination with early platform_devices for timer.
> > A sys_timer is initialized way earlier, and there are surely cleaner
> > ways to just pass a "base address" through to the driver.
> > The interrupt is always AT91_ID_SYS on all chips, so there is no point
> > making it configurable.
>
> Me too - it looks like this early device stuff is heading in the
> wrong direction.
Me too. Most of the stuff can be initialized much later and really
only timer and interrupts are needed early. Sure there are easily
dependencies to clock framework etc, but only those clocks need
to be initialized.
Regards,
Tony
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 09/14] at91: switch pit timer to early platform devices
2011-04-29 6:08 ` Tony Lindgren
@ 2011-04-29 8:31 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-29 8:31 UTC (permalink / raw)
To: linux-arm-kernel
On 23:08 Thu 28 Apr , Tony Lindgren wrote:
> * Russell King - ARM Linux <linux@arm.linux.org.uk> [110428 04:32]:
> > On Thu, Apr 28, 2011 at 01:23:03PM +0200, Andrew Victor wrote:
> > > hi,
> > >
> > > > this will allow to specify the resources per soc
> > > >
> > > > as the 5series use a different start address for the pit
> > >
> > > I really don't see the fascination with early platform_devices for timer.
> > > A sys_timer is initialized way earlier, and there are surely cleaner
> > > ways to just pass a "base address" through to the driver.
> > > The interrupt is always AT91_ID_SYS on all chips, so there is no point
> > > making it configurable.
> >
> > Me too - it looks like this early device stuff is heading in the
> > wrong direction.
>
> Me too. Most of the stuff can be initialized much later and really
> only timer and interrupts are needed early. Sure there are easily
> dependencies to clock framework etc, but only those clocks need
> to be initialized.
I agree too
that's why I just do timer, interrupt, earlyprintk and clocks
the rest no need to be so early
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 10/14] at91: switch st timer to early platform devices
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (8 preceding siblings ...)
2011-04-25 18:31 ` [PATCH 09/14] at91: switch pit timer to early platform devices Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 18:40 ` [PATCH 11/14] at91: move pit timer to drivers/clocksource Jean-Christophe PLAGNIOL-VILLARD
` (4 subsequent siblings)
14 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:31 UTC (permalink / raw)
To: linux-arm-kernel
this will allow to specify the resources per soc
and have only one time init for all boards except x40
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/at91rm9200.c | 6 +
arch/arm/mach-at91/at91rm9200_time.c | 271 +++++++++++++++++++++++---------
arch/arm/mach-at91/board-1arm.c | 2 +-
arch/arm/mach-at91/board-carmeva.c | 2 +-
arch/arm/mach-at91/board-cpuat91.c | 2 +-
arch/arm/mach-at91/board-csb337.c | 2 +-
arch/arm/mach-at91/board-csb637.c | 2 +-
arch/arm/mach-at91/board-eb9200.c | 2 +-
arch/arm/mach-at91/board-ecbat91.c | 2 +-
arch/arm/mach-at91/board-eco920.c | 2 +-
arch/arm/mach-at91/board-kafa.c | 2 +-
arch/arm/mach-at91/board-kb9202.c | 2 +-
arch/arm/mach-at91/board-picotux200.c | 2 +-
arch/arm/mach-at91/board-rm9200dk.c | 2 +-
arch/arm/mach-at91/board-rm9200ek.c | 2 +-
arch/arm/mach-at91/board-yl-9200.c | 2 +-
arch/arm/mach-at91/generic.h | 2 +-
arch/arm/mach-at91/soc.c | 21 +++-
arch/arm/mach-at91/soc.h | 1 +
19 files changed, 237 insertions(+), 92 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index e80d544..7b9d3a4 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -378,6 +378,11 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
0 /* Advanced Interrupt Controller (IRQ6) */
};
+struct at91_dev_resource at91rm9200_st __initdata = {
+ .mmio_base = AT91_ST,
+ .irq = AT91_ID_SYS,
+};
+
struct at91_soc __initdata at91rm9200_soc = {
.name = "at91rm9200",
.default_irq_priority = at91rm9200_default_irq_priority,
@@ -386,4 +391,5 @@ struct at91_soc __initdata at91rm9200_soc = {
.resource = at91rm9200_pios,
.num_resources = ARRAY_SIZE(at91rm9200_pios),
},
+ .st = &at91rm9200_st,
};
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 1dd69c8..538ee40 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -1,8 +1,9 @@
/*
* linux/arch/arm/mach-at91/at91rm9200_time.c
*
- * Copyright (C) 2003 SAN People
- * Copyright (C) 2003 ATMEL
+ * Copyright (C) 2003 SAN People
+ * Copyright (C) 2003 ATMEL
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -20,30 +21,58 @@
*/
#include <linux/kernel.h>
+#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/clockchips.h>
-
-#include <asm/mach/time.h>
+#include <linux/slab.h>
#include <mach/at91_st.h>
-static unsigned long last_crtr;
-static u32 irqmask;
-static struct clock_event_device clkevt;
+struct at91_st_data {
+ void __iomem *mapbase;
+ unsigned long last_crtr;
+ u32 irqmask;
+ struct clock_event_device ced;
+ struct clocksource cs;
+ struct irqaction irqaction;
+ struct platform_device *pdev;
+};
+
+static inline unsigned int at91_st_read(struct at91_st_data *data,
+ unsigned int reg_offset)
+{
+ return __raw_readl(data->mapbase + reg_offset);
+}
+
+static inline void at91_st_write(struct at91_st_data *data,
+ unsigned int reg_offset, unsigned long value)
+{
+ __raw_writel(value, data->mapbase + reg_offset);
+}
+
+static struct at91_st_data *cs_to_at91_st(struct clocksource *cs)
+{
+ return container_of(cs, struct at91_st_data, cs);
+}
+
+static struct at91_st_data *ced_to_at91_st(struct clock_event_device *ced)
+{
+ return container_of(ced, struct at91_st_data, ced);
+}
/*
* The ST_CRTR is updated asynchronously to the master clock ... but
* the updates as seen by the CPU don't seem to be strictly monotonic.
* Waiting until we read the same value twice avoids glitching.
*/
-static inline unsigned long read_CRTR(void)
+static inline unsigned long read_CRTR(struct at91_st_data *data)
{
unsigned long x1, x2;
- x1 = at91_sys_read(AT91_ST_CRTR);
+ x1 = at91_st_read(data, AT91_ST_CRTR);
do {
- x2 = at91_sys_read(AT91_ST_CRTR);
+ x2 = at91_st_read(data, AT91_ST_CRTR);
if (x1 == x2)
break;
x1 = x2;
@@ -54,9 +83,13 @@ static inline unsigned long read_CRTR(void)
/*
* IRQ handler for the timer.
*/
-static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
+static irqreturn_t at91_st_interrupt(int irq, void *dev_id)
{
- u32 sr = at91_sys_read(AT91_ST_SR) & irqmask;
+ struct at91_st_data *data = (struct at91_st_data*)dev_id;
+ struct clock_event_device *ced = &data->ced;
+ u32 sr;
+
+ sr = at91_st_read(data, AT91_ST_SR) & data->irqmask;
/*
* irqs should be disabled here, but as the irq is shared they are only
@@ -66,17 +99,17 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
/* simulate "oneshot" timer with alarm */
if (sr & AT91_ST_ALMS) {
- clkevt.event_handler(&clkevt);
+ ced->event_handler(ced);
return IRQ_HANDLED;
}
/* periodic mode should handle delayed ticks */
if (sr & AT91_ST_PITS) {
- u32 crtr = read_CRTR();
+ u32 crtr = read_CRTR(data);
- while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) {
- last_crtr += LATCH;
- clkevt.event_handler(&clkevt);
+ while (((crtr - data->last_crtr) & AT91_ST_CRTV) >= LATCH) {
+ data->last_crtr += LATCH;
+ ced->event_handler(ced);
}
return IRQ_HANDLED;
}
@@ -85,60 +118,51 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
return IRQ_NONE;
}
-static struct irqaction at91rm9200_timer_irq = {
- .name = "at91_tick",
- .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = at91rm9200_timer_interrupt
-};
-
-static cycle_t read_clk32k(struct clocksource *cs)
+static cycle_t at91_st_clocksource_read(struct clocksource *cs)
{
- return read_CRTR();
-}
+ struct at91_st_data *data = cs_to_at91_st(cs);
-static struct clocksource clk32k = {
- .name = "32k_counter",
- .rating = 150,
- .read = read_clk32k,
- .mask = CLOCKSOURCE_MASK(20),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-};
+ return read_CRTR(data);
+}
-static void
-clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
+static void at91_st_clock_event_mode(enum clock_event_mode mode,
+ struct clock_event_device *dev)
{
+ struct at91_st_data *data = ced_to_at91_st(dev);
+
/* Disable and flush pending timer interrupts */
at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
- (void) at91_sys_read(AT91_ST_SR);
+ (void) at91_st_read(data, AT91_ST_SR);
- last_crtr = read_CRTR();
+ data->last_crtr = read_CRTR(data);
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
/* PIT for periodic irqs; fixed rate of 1/HZ */
- irqmask = AT91_ST_PITS;
- at91_sys_write(AT91_ST_PIMR, LATCH);
+ data->irqmask = AT91_ST_PITS;
+ at91_st_write(data, AT91_ST_PIMR, LATCH);
break;
case CLOCK_EVT_MODE_ONESHOT:
/* ALM for oneshot irqs, set by next_event()
* before 32 seconds have passed
*/
- irqmask = AT91_ST_ALMS;
- at91_sys_write(AT91_ST_RTAR, last_crtr);
+ data->irqmask = AT91_ST_ALMS;
+ at91_st_write(data, AT91_ST_RTAR, data->last_crtr);
break;
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_RESUME:
- irqmask = 0;
+ data->irqmask = 0;
break;
}
- at91_sys_write(AT91_ST_IER, irqmask);
+ at91_st_write(data, AT91_ST_IER, data->irqmask);
}
-static int
-clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
+static int at91_st_clock_event_next(unsigned long delta,
+ struct clock_event_device *ced)
{
- u32 alm;
- int status = 0;
+ struct at91_st_data *data = ced_to_at91_st(ced);
+ u32 alm;
+ int status = 0;
BUG_ON(delta < 2);
@@ -151,59 +175,154 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
* with the value then held in CRTR ... which would mean the match
* wouldn't trigger until 32 seconds later, after CRTR wraps.
*/
- alm = read_CRTR();
+ alm = read_CRTR(data);
/* Cancel any pending alarm; flush any pending IRQ */
- at91_sys_write(AT91_ST_RTAR, alm);
- (void) at91_sys_read(AT91_ST_SR);
+ at91_st_write(data, AT91_ST_RTAR, alm);
+ (void) at91_st_read(data, AT91_ST_SR);
/* Schedule alarm by writing RTAR. */
alm += delta;
- at91_sys_write(AT91_ST_RTAR, alm);
+ at91_st_write(data, AT91_ST_RTAR, alm);
return status;
}
-static struct clock_event_device clkevt = {
- .name = "at91_tick",
- .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
- .rating = 150,
- .set_next_event = clkevt32k_next_event,
- .set_mode = clkevt32k_mode,
-};
+static void at91_st_register_clockevent(struct at91_st_data *data)
+{
+ struct clock_event_device *ced = &data->ced;
-/*
- * ST (system timer) module supports both clockevents and clocksource.
- */
-void __init at91rm9200_timer_init(void)
+ memset(ced, 0, sizeof(*ced));
+
+ ced->name = "at91_tick";
+ ced->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
+ ced->shift = 32;
+ ced->rating = 150;
+ ced->set_next_event = at91_st_clock_event_next;
+ ced->set_mode = at91_st_clock_event_mode;
+ ced->mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, ced->shift);
+ ced->max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, ced);
+ ced->min_delta_ns = clockevent_delta2ns(2, ced) + 1;
+ ced->cpumask = cpumask_of(0);
+
+ dev_info(&data->pdev->dev, "used for clock events\n");
+
+ clockevents_register_device(ced);
+}
+
+static int at91_st_register_clocksource(struct at91_st_data *data)
{
+ struct clocksource *cs = &data->cs;
+
+ cs->name = "32k_counter";
+ cs->rating = 150;
+ cs->read = at91_st_clocksource_read;
+ cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+ cs->mask = CLOCKSOURCE_MASK(20);
+
+ dev_info(&data->pdev->dev, "used as clock source\n");
+
+ clocksource_register_hz(cs, AT91_SLOW_CLOCK);
+
+ return 0;
+}
+
+static int at91_st_setup(struct at91_st_data *data,
+ struct platform_device *pdev)
+{
+ struct resource *res;
+ int irq;
+ int ret = -ENXIO;
+
+ memset(data, 0, sizeof(struct at91_st_data));
+ data->pdev = pdev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "failed to get I/O memory\n");
+ goto err0;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+
+ /* map memory, let mapbase point to our channel */
+ data->mapbase = (void * __iomem)(res->start + AT91_VA_BASE_SYS);
+
+ /* request irq using setup_irq() (too early for request_irq()) */
+ data->irqaction.name = "at91_tick";
+ data->irqaction.handler = at91_st_interrupt;
+ data->irqaction.dev_id = data;
+ data->irqaction.flags = IRQF_SHARED | IRQF_DISABLED |
+ IRQF_TIMER | IRQF_IRQPOLL;
+
/* Disable all timer interrupts, and clear any pending ones */
at91_sys_write(AT91_ST_IDR,
AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
(void) at91_sys_read(AT91_ST_SR);
- /* Make IRQs happen for the system timer */
- setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
-
/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
* directly for the clocksource and all clockevents, after adjusting
* its prescaler from the 1 Hz default.
*/
at91_sys_write(AT91_ST_RTMR, 1);
- /* Setup timer clockevent, with minimum of two ticks (important!!) */
- clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
- clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
- clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
- clkevt.cpumask = cpumask_of(0);
- clockevents_register_device(&clkevt);
+ /*
+ * Register clocksource. The high order bits of PIV are unused,
+ * so this isn't a 32-bit counter unless we get clockevent irqs.
+ */
+ at91_st_register_clocksource(data);
+
+ /* Set up irq handler */
+ setup_irq(irq, &data->irqaction);
- /* register clocksource */
- clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
+ /* Set up and register clockevents */
+ at91_st_register_clockevent(data);
+
+ return 0;
+
+err0:
+ return ret;
+}
+
+static int __devinit at91_st_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct at91_st_data *data;
+
+ if (!is_early_platform_device(pdev)) {
+ pr_info("at91_st.%d: call via non early plaform\n", pdev->id);
+ return 0;
+ }
+
+ data = kmalloc(sizeof(struct at91_st_data), GFP_KERNEL);
+ if (data == NULL) {
+ dev_err(&pdev->dev, "failed to allocate driver data\n");
+ return -ENOMEM;
+ }
+
+ ret = at91_st_setup(data, pdev);
+
+ if (ret)
+ kfree(data);
+
+ return ret;
}
-struct sys_timer at91rm9200_timer = {
- .init = at91rm9200_timer_init,
+static int __devexit at91_st_remove(struct platform_device *pdev)
+{
+ return -EBUSY; /* cannot unregister clockevent and clocksource */
+}
+
+static struct platform_driver at91_st_device_driver = {
+ .probe = at91_st_probe,
+ .remove = __devexit_p(at91_st_remove),
+ .driver = {
+ .name = "at91_st",
+ }
};
+early_platform_init("earlytimer", &at91_st_device_driver);
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index ba08329..b487dff 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -97,7 +97,7 @@ static void __init onearm_board_init(void)
MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = onearm_map_io,
.init_irq = onearm_init_irq,
.init_machine = onearm_board_init,
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index cb888cf..d2178fd 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -163,7 +163,7 @@ static void __init carmeva_board_init(void)
MACHINE_START(CARMEVA, "Carmeva")
/* Maintainer: Conitec Datasystems */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = carmeva_map_io,
.init_irq = carmeva_init_irq,
.init_machine = carmeva_board_init,
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 33ddbfa..1afdad4 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -180,7 +180,7 @@ static void __init cpuat91_board_init(void)
MACHINE_START(CPUAT91, "Eukrea")
/* Maintainer: Eric Benard - EUKREA Electromatique */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = cpuat91_map_io,
.init_irq = cpuat91_init_irq,
.init_machine = cpuat91_board_init,
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index 354e85e..1a61446 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -258,7 +258,7 @@ static void __init csb337_board_init(void)
MACHINE_START(CSB337, "Cogent CSB337")
/* Maintainer: Bill Gatliff */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = csb337_map_io,
.init_irq = csb337_init_irq,
.init_machine = csb337_board_init,
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 9bff91f..efe7c39 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -139,7 +139,7 @@ static void __init csb637_board_init(void)
MACHINE_START(CSB637, "Cogent CSB637")
/* Maintainer: Bill Gatliff */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = csb637_map_io,
.init_irq = csb637_init_irq,
.init_machine = csb637_board_init,
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 8101ef0..9643bf5 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -121,7 +121,7 @@ static void __init eb9200_board_init(void)
MACHINE_START(ATEB9200, "Embest ATEB9200")
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = eb9200_map_io,
.init_irq = eb9200_init_irq,
.init_machine = eb9200_board_init,
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index 7fb26f9..5a1537a 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -173,7 +173,7 @@ static void __init ecb_at91board_init(void)
MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
/* Maintainer: emQbit.com */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = ecb_at91map_io,
.init_irq = ecb_at91init_irq,
.init_machine = ecb_at91board_init,
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 9c979bb..efd160d 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -135,7 +135,7 @@ static void __init eco920_board_init(void)
MACHINE_START(ECO920, "eco920")
/* Maintainer: Sascha Hauer */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = eco920_map_io,
.init_irq = eco920_init_irq,
.init_machine = eco920_board_init,
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index cf7e7a0..b20bd84 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -99,7 +99,7 @@ static void __init kafa_board_init(void)
MACHINE_START(KAFA, "Sperry-Sun KAFA")
/* Maintainer: Sergei Sharonov */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = kafa_map_io,
.init_irq = kafa_init_irq,
.init_machine = kafa_board_init,
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index a56cdee..570b00d 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -140,7 +140,7 @@ static void __init kb9202_board_init(void)
MACHINE_START(KB9200, "KB920x")
/* Maintainer: KwikByte, Inc. */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = kb9202_map_io,
.init_irq = kb9202_init_irq,
.init_machine = kb9202_board_init,
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 3267b95..5184964 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -124,7 +124,7 @@ static void __init picotux200_board_init(void)
MACHINE_START(PICOTUX2XX, "picotux 200")
/* Maintainer: Kleinhenz Elektronik GmbH */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = picotux200_map_io,
.init_irq = picotux200_init_irq,
.init_machine = picotux200_board_init,
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index c14f2c2..d715327 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -228,7 +228,7 @@ static void __init dk_board_init(void)
MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
/* Maintainer: SAN People/Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = dk_map_io,
.init_irq = dk_init_irq,
.init_machine = dk_board_init,
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index ffd69c0..755929c 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -194,7 +194,7 @@ static void __init ek_board_init(void)
MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
/* Maintainer: SAN People/Atmel */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index e9ca130..16bb91d 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -599,7 +599,7 @@ static void __init yl9200_board_init(void)
MACHINE_START(YL9200, "uCdragon YL-9200")
/* Maintainer: S.Birtles */
.boot_params = AT91_SDRAM_BASE + 0x100,
- .timer = &at91rm9200_timer,
+ .timer = &at91_timer,
.map_io = yl9200_map_io,
.init_irq = yl9200_init_irq,
.init_machine = yl9200_board_init,
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 1cfe696..eb01942 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -22,7 +22,7 @@ extern void __init at91_aic_init(unsigned int priority[]);
/* Timer */
struct sys_timer;
-extern struct sys_timer at91rm9200_timer;
+extern struct sys_timer at91_timer;
extern struct sys_timer at91_timer;
extern struct sys_timer at91x40_timer;
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
index 7b44be2..1b05997 100644
--- a/arch/arm/mach-at91/soc.c
+++ b/arch/arm/mach-at91/soc.c
@@ -229,18 +229,37 @@ static struct platform_device at91_pit_device = {
.num_resources = ARRAY_SIZE(pit_resources),
};
+/*
+ * ST (system timer) module supports both clockevents and clocksource.
+ */
+static struct resource st_resources[] = {
+ [0] = RES_MEM(SZ_256),
+ [1] = RES_IRQ(),
+};
+
+static struct platform_device at91_st_device = {
+ .name = "at91_st",
+ .id = 0,
+ .resource = st_resources,
+ .num_resources = ARRAY_SIZE(st_resources),
+};
+
static void __init at91_timer_init(void)
{
struct at91_dev_resource *res;
struct platform_device *pdev;
struct resource *r;
- BUG_ON(!current_soc.pit);
+ BUG_ON(!current_soc.pit && !current_soc.st);
if (current_soc.pit) {
r = pit_resources;
res = current_soc.pit;
pdev = &at91_pit_device;
+ } else {
+ r = st_resources;
+ res = current_soc.st;
+ pdev = &at91_st_device;
}
set_resource_mem(&r[0], res->mmio_base);
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 8df07a2..a60ac0a 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -14,6 +14,7 @@ struct at91_soc {
struct at91_dev_resource_array gpio;
struct at91_dev_resource *pit;
+ struct at91_dev_resource *st;
void (*init)(unsigned long main_clock);
};
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 11/14] at91: move pit timer to drivers/clocksource
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (9 preceding siblings ...)
2011-04-25 18:31 ` [PATCH 10/14] at91: switch st " Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 18:40 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-25 19:14 ` [PATCH 12/14] at91: move st " Jean-Christophe PLAGNIOL-VILLARD
` (3 subsequent siblings)
14 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 18:40 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
MAINTAINERS | 1 +
arch/arm/mach-at91/Kconfig | 4 ++++
arch/arm/mach-at91/Makefile | 18 +++++++++---------
arch/arm/mach-at91/include/mach/at91_st.h | 20 ++++++++++----------
drivers/clocksource/Makefile | 1 +
.../clocksource/at91_pit.c | 0
6 files changed, 25 insertions(+), 19 deletions(-)
rename arch/arm/mach-at91/at91sam926x_time.c => drivers/clocksource/at91_pit.c (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 30ba179..c026709 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -655,6 +655,7 @@ W: http://www.linux4sam.org
S: Supported
F: arch/arm/mach-at91/
F: drivers/gpio/at91_gpio.c
+F: drivers/clocksource/at91_*
ARM/BCMRING ARM ARCHITECTURE
M: Jiandong Zheng <jdzheng@broadcom.com>
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 8cbc3aa..2663dea 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -97,6 +97,10 @@ config AT91_PMC_UNIT
bool
default !ARCH_AT91X40
+config AT91_PIT
+ bool
+ default !ARCH_AT91X40 && !ARCH_AT91RM9200
+
# ----------------------------------------------------------
if ARCH_AT91RM9200
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 6aa38f9..39f44d1 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -11,15 +11,15 @@ obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
# CPU-specific support
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
-obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam9g45_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91cap9_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at572d940hf_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
# AT91RM9200 board-specific support
diff --git a/arch/arm/mach-at91/include/mach/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h
index 8847173..958023f 100644
--- a/arch/arm/mach-at91/include/mach/at91_st.h
+++ b/arch/arm/mach-at91/include/mach/at91_st.h
@@ -16,34 +16,34 @@
#ifndef AT91_ST_H
#define AT91_ST_H
-#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */
+#define AT91_ST_CR (0x00) /* Control Register */
#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */
-#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */
+#define AT91_ST_PIMR (0x04) /* Period Interval Mode Register */
#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */
-#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */
+#define AT91_ST_WDMR (0x08) /* Watchdog Mode Register */
#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */
#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */
#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */
-#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */
+#define AT91_ST_RTMR (0x0c) /* Real-time Mode Register */
#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */
-#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */
+#define AT91_ST_SR (0x10) /* Status Register */
#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */
#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */
#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */
#define AT91_ST_ALMS (1 << 3) /* Alarm Status */
-#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */
-#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */
-#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */
+#define AT91_ST_IER (0x14) /* Interrupt Enable Register */
+#define AT91_ST_IDR (0x18) /* Interrupt Disable Register */
+#define AT91_ST_IMR (0x1c) /* Interrupt Mask Register */
-#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */
+#define AT91_ST_RTAR (0x20) /* Real-time Alarm Register */
#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */
-#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */
+#define AT91_ST_CRTR (0x24) /* Current Real-time Register */
#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */
#endif
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index be61ece..93556cd 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -1,3 +1,4 @@
+obj-$(CONFIG_AT91_PIT) += at91_pit.o
obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o
obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o
obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/drivers/clocksource/at91_pit.c
similarity index 100%
rename from arch/arm/mach-at91/at91sam926x_time.c
rename to drivers/clocksource/at91_pit.c
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 12/14] at91: move st timer to drivers/clocksource
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (10 preceding siblings ...)
2011-04-25 18:40 ` [PATCH 11/14] at91: move pit timer to drivers/clocksource Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-25 19:14 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-26 1:11 ` [PATCH 13/14] at91: move register clocks to soc generic init Jean-Christophe PLAGNIOL-VILLARD
` (2 subsequent siblings)
14 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-25 19:14 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/Kconfig | 4 +
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/at91rm9200_time.c | 328 ----------------------------------
drivers/clocksource/Makefile | 1 +
4 files changed, 6 insertions(+), 329 deletions(-)
delete mode 100644 arch/arm/mach-at91/at91rm9200_time.c
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 2663dea..76cf949 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -101,6 +101,10 @@ config AT91_PIT
bool
default !ARCH_AT91X40 && !ARCH_AT91RM9200
+config AT91_ST
+ bool
+ default ARCH_AT91RM9200
+
# ----------------------------------------------------------
if ARCH_AT91RM9200
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 39f44d1..41a18ed 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -10,7 +10,7 @@ obj- :=
obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
# CPU-specific support
-obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
+obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_devices.o
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
deleted file mode 100644
index 538ee40..0000000
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ /dev/null
@@ -1,328 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/at91rm9200_time.c
- *
- * Copyright (C) 2003 SAN People
- * Copyright (C) 2003 ATMEL
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/clockchips.h>
-#include <linux/slab.h>
-
-#include <mach/at91_st.h>
-
-struct at91_st_data {
- void __iomem *mapbase;
- unsigned long last_crtr;
- u32 irqmask;
- struct clock_event_device ced;
- struct clocksource cs;
- struct irqaction irqaction;
- struct platform_device *pdev;
-};
-
-static inline unsigned int at91_st_read(struct at91_st_data *data,
- unsigned int reg_offset)
-{
- return __raw_readl(data->mapbase + reg_offset);
-}
-
-static inline void at91_st_write(struct at91_st_data *data,
- unsigned int reg_offset, unsigned long value)
-{
- __raw_writel(value, data->mapbase + reg_offset);
-}
-
-static struct at91_st_data *cs_to_at91_st(struct clocksource *cs)
-{
- return container_of(cs, struct at91_st_data, cs);
-}
-
-static struct at91_st_data *ced_to_at91_st(struct clock_event_device *ced)
-{
- return container_of(ced, struct at91_st_data, ced);
-}
-
-/*
- * The ST_CRTR is updated asynchronously to the master clock ... but
- * the updates as seen by the CPU don't seem to be strictly monotonic.
- * Waiting until we read the same value twice avoids glitching.
- */
-static inline unsigned long read_CRTR(struct at91_st_data *data)
-{
- unsigned long x1, x2;
-
- x1 = at91_st_read(data, AT91_ST_CRTR);
- do {
- x2 = at91_st_read(data, AT91_ST_CRTR);
- if (x1 == x2)
- break;
- x1 = x2;
- } while (1);
- return x1;
-}
-
-/*
- * IRQ handler for the timer.
- */
-static irqreturn_t at91_st_interrupt(int irq, void *dev_id)
-{
- struct at91_st_data *data = (struct at91_st_data*)dev_id;
- struct clock_event_device *ced = &data->ced;
- u32 sr;
-
- sr = at91_st_read(data, AT91_ST_SR) & data->irqmask;
-
- /*
- * irqs should be disabled here, but as the irq is shared they are only
- * guaranteed to be off if the timer irq is registered first.
- */
- WARN_ON_ONCE(!irqs_disabled());
-
- /* simulate "oneshot" timer with alarm */
- if (sr & AT91_ST_ALMS) {
- ced->event_handler(ced);
- return IRQ_HANDLED;
- }
-
- /* periodic mode should handle delayed ticks */
- if (sr & AT91_ST_PITS) {
- u32 crtr = read_CRTR(data);
-
- while (((crtr - data->last_crtr) & AT91_ST_CRTV) >= LATCH) {
- data->last_crtr += LATCH;
- ced->event_handler(ced);
- }
- return IRQ_HANDLED;
- }
-
- /* this irq is shared ... */
- return IRQ_NONE;
-}
-
-static cycle_t at91_st_clocksource_read(struct clocksource *cs)
-{
- struct at91_st_data *data = cs_to_at91_st(cs);
-
- return read_CRTR(data);
-}
-
-static void at91_st_clock_event_mode(enum clock_event_mode mode,
- struct clock_event_device *dev)
-{
- struct at91_st_data *data = ced_to_at91_st(dev);
-
- /* Disable and flush pending timer interrupts */
- at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
- (void) at91_st_read(data, AT91_ST_SR);
-
- data->last_crtr = read_CRTR(data);
- switch (mode) {
- case CLOCK_EVT_MODE_PERIODIC:
- /* PIT for periodic irqs; fixed rate of 1/HZ */
- data->irqmask = AT91_ST_PITS;
- at91_st_write(data, AT91_ST_PIMR, LATCH);
- break;
- case CLOCK_EVT_MODE_ONESHOT:
- /* ALM for oneshot irqs, set by next_event()
- * before 32 seconds have passed
- */
- data->irqmask = AT91_ST_ALMS;
- at91_st_write(data, AT91_ST_RTAR, data->last_crtr);
- break;
- case CLOCK_EVT_MODE_SHUTDOWN:
- case CLOCK_EVT_MODE_UNUSED:
- case CLOCK_EVT_MODE_RESUME:
- data->irqmask = 0;
- break;
- }
- at91_st_write(data, AT91_ST_IER, data->irqmask);
-}
-
-static int at91_st_clock_event_next(unsigned long delta,
- struct clock_event_device *ced)
-{
- struct at91_st_data *data = ced_to_at91_st(ced);
- u32 alm;
- int status = 0;
-
- BUG_ON(delta < 2);
-
- /* The alarm IRQ uses absolute time (now+delta), not the relative
- * time (delta) in our calling convention. Like all clockevents
- * using such "match" hardware, we have a race to defend against.
- *
- * Our defense here is to have set up the clockevent device so the
- * delta is@least two. That way we never end up writing RTAR
- * with the value then held in CRTR ... which would mean the match
- * wouldn't trigger until 32 seconds later, after CRTR wraps.
- */
- alm = read_CRTR(data);
-
- /* Cancel any pending alarm; flush any pending IRQ */
- at91_st_write(data, AT91_ST_RTAR, alm);
- (void) at91_st_read(data, AT91_ST_SR);
-
- /* Schedule alarm by writing RTAR. */
- alm += delta;
- at91_st_write(data, AT91_ST_RTAR, alm);
-
- return status;
-}
-
-static void at91_st_register_clockevent(struct at91_st_data *data)
-{
- struct clock_event_device *ced = &data->ced;
-
- memset(ced, 0, sizeof(*ced));
-
- ced->name = "at91_tick";
- ced->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
- ced->shift = 32;
- ced->rating = 150;
- ced->set_next_event = at91_st_clock_event_next;
- ced->set_mode = at91_st_clock_event_mode;
- ced->mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, ced->shift);
- ced->max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, ced);
- ced->min_delta_ns = clockevent_delta2ns(2, ced) + 1;
- ced->cpumask = cpumask_of(0);
-
- dev_info(&data->pdev->dev, "used for clock events\n");
-
- clockevents_register_device(ced);
-}
-
-static int at91_st_register_clocksource(struct at91_st_data *data)
-{
- struct clocksource *cs = &data->cs;
-
- cs->name = "32k_counter";
- cs->rating = 150;
- cs->read = at91_st_clocksource_read;
- cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
- cs->mask = CLOCKSOURCE_MASK(20);
-
- dev_info(&data->pdev->dev, "used as clock source\n");
-
- clocksource_register_hz(cs, AT91_SLOW_CLOCK);
-
- return 0;
-}
-
-static int at91_st_setup(struct at91_st_data *data,
- struct platform_device *pdev)
-{
- struct resource *res;
- int irq;
- int ret = -ENXIO;
-
- memset(data, 0, sizeof(struct at91_st_data));
- data->pdev = pdev;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&pdev->dev, "failed to get I/O memory\n");
- goto err0;
- }
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- dev_err(&pdev->dev, "failed to get irq\n");
- goto err0;
- }
-
- /* map memory, let mapbase point to our channel */
- data->mapbase = (void * __iomem)(res->start + AT91_VA_BASE_SYS);
-
- /* request irq using setup_irq() (too early for request_irq()) */
- data->irqaction.name = "at91_tick";
- data->irqaction.handler = at91_st_interrupt;
- data->irqaction.dev_id = data;
- data->irqaction.flags = IRQF_SHARED | IRQF_DISABLED |
- IRQF_TIMER | IRQF_IRQPOLL;
-
- /* Disable all timer interrupts, and clear any pending ones */
- at91_sys_write(AT91_ST_IDR,
- AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
- (void) at91_sys_read(AT91_ST_SR);
-
- /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
- * directly for the clocksource and all clockevents, after adjusting
- * its prescaler from the 1 Hz default.
- */
- at91_sys_write(AT91_ST_RTMR, 1);
-
- /*
- * Register clocksource. The high order bits of PIV are unused,
- * so this isn't a 32-bit counter unless we get clockevent irqs.
- */
- at91_st_register_clocksource(data);
-
- /* Set up irq handler */
- setup_irq(irq, &data->irqaction);
-
- /* Set up and register clockevents */
- at91_st_register_clockevent(data);
-
- return 0;
-
-err0:
- return ret;
-}
-
-static int __devinit at91_st_probe(struct platform_device *pdev)
-{
- int ret;
- struct at91_st_data *data;
-
- if (!is_early_platform_device(pdev)) {
- pr_info("at91_st.%d: call via non early plaform\n", pdev->id);
- return 0;
- }
-
- data = kmalloc(sizeof(struct at91_st_data), GFP_KERNEL);
- if (data == NULL) {
- dev_err(&pdev->dev, "failed to allocate driver data\n");
- return -ENOMEM;
- }
-
- ret = at91_st_setup(data, pdev);
-
- if (ret)
- kfree(data);
-
- return ret;
-}
-
-static int __devexit at91_st_remove(struct platform_device *pdev)
-{
- return -EBUSY; /* cannot unregister clockevent and clocksource */
-}
-
-static struct platform_driver at91_st_device_driver = {
- .probe = at91_st_probe,
- .remove = __devexit_p(at91_st_remove),
- .driver = {
- .name = "at91_st",
- }
-};
-
-early_platform_init("earlytimer", &at91_st_device_driver);
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 93556cd..a2fec1c 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -1,4 +1,5 @@
obj-$(CONFIG_AT91_PIT) += at91_pit.o
+obj-$(CONFIG_AT91_ST) += at91_st.o
obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o
obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o
obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 13/14] at91: move register clocks to soc generic init
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (11 preceding siblings ...)
2011-04-25 19:14 ` [PATCH 12/14] at91: move st " Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-26 1:11 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-26 3:13 ` Ryan Mallon
2011-04-26 1:11 ` [PATCH 14/14] at91: move clock subsystem init " Jean-Christophe PLAGNIOL-VILLARD
2011-04-27 21:13 ` [PATCH 0/14] at91: factorize soc init and switch to early platform Ryan Mallon
14 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 1:11 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/at572d940hf.c | 4 +---
arch/arm/mach-at91/at91cap9.c | 4 +---
arch/arm/mach-at91/at91rm9200.c | 4 +---
arch/arm/mach-at91/at91sam9260.c | 4 +---
arch/arm/mach-at91/at91sam9261.c | 4 +---
arch/arm/mach-at91/at91sam9263.c | 4 +---
arch/arm/mach-at91/at91sam9g45.c | 4 +---
arch/arm/mach-at91/at91sam9rl.c | 4 +---
arch/arm/mach-at91/soc.c | 3 +++
arch/arm/mach-at91/soc.h | 1 +
10 files changed, 12 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
index 66405af..7d7a4f2 100644
--- a/arch/arm/mach-at91/at572d940hf.c
+++ b/arch/arm/mach-at91/at572d940hf.c
@@ -370,9 +370,6 @@ static void __init at572d940hf_initialize(unsigned long main_clock)
/* Init clock subsystem */
at91_clock_init(main_clock);
-
- /* Register the processor-specific clocks */
- at572d940hf_register_clocks();
}
/* --------------------------------------------------------------------
@@ -425,6 +422,7 @@ struct at91_dev_resource at572d940hf_pit __initdata = {
struct at91_soc __initdata at572d940hf_soc = {
.name = "at572d940hf",
.default_irq_priority = at572d940hf_default_irq_priority,
+ .register_clocks = at572d940hf_register_clocks,
.init = at572d940hf_initialize,
.gpio = {
.resource = at572d940hf_pios,
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index dd5e858..c304d9c 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -368,9 +368,6 @@ static void __init at91cap9_initialize(unsigned long main_clock)
/* Init clock subsystem */
at91_clock_init(main_clock);
- /* Register the processor-specific clocks */
- at91cap9_register_clocks();
-
/* Remember the silicon revision */
if (cpu_is_at91cap9_revB())
system_rev = 0xB;
@@ -428,6 +425,7 @@ struct at91_dev_resource at91cap9_pit __initdata = {
struct at91_soc __initdata at91cap9_soc = {
.name = "at91cap9",
.default_irq_priority = at91cap9_default_irq_priority,
+ .register_clocks = at91cap9_register_clocks,
.init = at91cap9_initialize,
.gpio = {
.resource = at91cap9_pios,
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 7b9d3a4..f5f5711 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -330,9 +330,6 @@ static void __init at91rm9200_initialize(unsigned long main_clock)
/* Init clock subsystem */
at91_clock_init(main_clock);
-
- /* Register the processor-specific clocks */
- at91rm9200_register_clocks();
}
@@ -386,6 +383,7 @@ struct at91_dev_resource at91rm9200_st __initdata = {
struct at91_soc __initdata at91rm9200_soc = {
.name = "at91rm9200",
.default_irq_priority = at91rm9200_default_irq_priority,
+ .register_clocks = at91rm9200_register_clocks,
.init = at91rm9200_initialize,
.gpio = {
.resource = at91rm9200_pios,
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 0567556b..7a2d10b 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -362,9 +362,6 @@ static void __init at91sam9260_initialize(unsigned long main_clock)
/* Init clock subsystem */
at91_clock_init(main_clock);
-
- /* Register the processor-specific clocks */
- at91sam9260_register_clocks();
}
/* --------------------------------------------------------------------
@@ -417,6 +414,7 @@ struct at91_dev_resource at91sam9260_pit __initdata = {
struct at91_soc __initdata at91sam9260_soc = {
.name = "at91sam9260",
.default_irq_priority = at91sam9260_default_irq_priority,
+ .register_clocks = at91sam9260_register_clocks,
.init = at91sam9260_initialize,
.gpio = {
.resource = at91sam9260_pios,
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 603c6fe..a2ee99d 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -328,9 +328,6 @@ static void __init at91sam9261_initialize(unsigned long main_clock)
/* Init clock subsystem */
at91_clock_init(main_clock);
-
- /* Register the processor-specific clocks */
- at91sam9261_register_clocks();
}
/* --------------------------------------------------------------------
@@ -383,6 +380,7 @@ struct at91_dev_resource at91sam9261_pit __initdata = {
struct at91_soc __initdata at91sam9261_soc = {
.name = "at91sam9261",
.default_irq_priority = at91sam9261_default_irq_priority,
+ .register_clocks = at91sam9261_register_clocks,
.init = at91sam9261_initialize,
.gpio = {
.resource = at91sam9261_pios,
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index e7ff884..0b9a6b4 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -337,9 +337,6 @@ static void __init at91sam9263_initialize(unsigned long main_clock)
/* Init clock subsystem */
at91_clock_init(main_clock);
-
- /* Register the processor-specific clocks */
- at91sam9263_register_clocks();
}
/* --------------------------------------------------------------------
@@ -392,6 +389,7 @@ struct at91_dev_resource at91sam9263_pit __initdata = {
struct at91_soc __initdata at91sam9263_soc = {
.name = "at91sam9263",
.default_irq_priority = at91sam9263_default_irq_priority,
+ .register_clocks = at91sam9263_register_clocks,
.init = at91sam9263_initialize,
.gpio = {
.resource = at91sam9263_pios,
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 077eecf..96cfc16 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -355,9 +355,6 @@ static void __init at91sam9g45_initialize(unsigned long main_clock)
/* Init clock subsystem */
at91_clock_init(main_clock);
-
- /* Register the processor-specific clocks */
- at91sam9g45_register_clocks();
}
/* --------------------------------------------------------------------
@@ -410,6 +407,7 @@ struct at91_dev_resource at91sam9g45_pit __initdata = {
struct at91_soc __initdata at91sam9g45_soc = {
.name = "at91sam9g45",
.default_irq_priority = at91sam9g45_default_irq_priority,
+ .register_clocks = at91sam9g45_register_clocks,
.init = at91sam9g45_initialize,
.gpio = {
.resource = at91sam9g45_pios,
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 7623617..638e921 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -321,9 +321,6 @@ static void __init at91sam9rl_initialize(unsigned long main_clock)
/* Init clock subsystem */
at91_clock_init(main_clock);
-
- /* Register the processor-specific clocks */
- at91sam9rl_register_clocks();
}
/* --------------------------------------------------------------------
@@ -376,6 +373,7 @@ struct at91_dev_resource at91sam9rl_pit __initdata = {
struct at91_soc __initdata at91sam9rl_soc = {
.name = "at91sam9rl",
.default_irq_priority = at91sam9rl_default_irq_priority,
+ .register_clocks = at91sam9rl_register_clocks,
.init = at91sam9rl_initialize,
.gpio = {
.resource = at91sam9rl_pios,
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
index 1b05997..c82d219 100644
--- a/arch/arm/mach-at91/soc.c
+++ b/arch/arm/mach-at91/soc.c
@@ -117,6 +117,9 @@ void __init at91_initialize(unsigned long main_clock)
current_soc.init(main_clock);
+ /* Register the processor-specific clocks */
+ current_soc.register_clocks();
+
/* Register GPIO subsystem */
at91_add_gpio();
}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index a60ac0a..ca8b30e 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -16,6 +16,7 @@ struct at91_soc {
struct at91_dev_resource *pit;
struct at91_dev_resource *st;
+ void (*register_clocks)(void);
void (*init)(unsigned long main_clock);
};
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 13/14] at91: move register clocks to soc generic init
2011-04-26 1:11 ` [PATCH 13/14] at91: move register clocks to soc generic init Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-26 3:13 ` Ryan Mallon
0 siblings, 0 replies; 85+ messages in thread
From: Ryan Mallon @ 2011-04-26 3:13 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 01:11 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Looks good.
Reviewed-by: Ryan Mallon <ryan@bluewatersys.com>
> ---
> arch/arm/mach-at91/at572d940hf.c | 4 +---
> arch/arm/mach-at91/at91cap9.c | 4 +---
> arch/arm/mach-at91/at91rm9200.c | 4 +---
> arch/arm/mach-at91/at91sam9260.c | 4 +---
> arch/arm/mach-at91/at91sam9261.c | 4 +---
> arch/arm/mach-at91/at91sam9263.c | 4 +---
> arch/arm/mach-at91/at91sam9g45.c | 4 +---
> arch/arm/mach-at91/at91sam9rl.c | 4 +---
> arch/arm/mach-at91/soc.c | 3 +++
> arch/arm/mach-at91/soc.h | 1 +
> 10 files changed, 12 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
> index 66405af..7d7a4f2 100644
> --- a/arch/arm/mach-at91/at572d940hf.c
> +++ b/arch/arm/mach-at91/at572d940hf.c
> @@ -370,9 +370,6 @@ static void __init at572d940hf_initialize(unsigned long main_clock)
>
> /* Init clock subsystem */
> at91_clock_init(main_clock);
> -
> - /* Register the processor-specific clocks */
> - at572d940hf_register_clocks();
> }
>
> /* --------------------------------------------------------------------
> @@ -425,6 +422,7 @@ struct at91_dev_resource at572d940hf_pit __initdata = {
> struct at91_soc __initdata at572d940hf_soc = {
> .name = "at572d940hf",
> .default_irq_priority = at572d940hf_default_irq_priority,
> + .register_clocks = at572d940hf_register_clocks,
> .init = at572d940hf_initialize,
> .gpio = {
> .resource = at572d940hf_pios,
> diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
> index dd5e858..c304d9c 100644
> --- a/arch/arm/mach-at91/at91cap9.c
> +++ b/arch/arm/mach-at91/at91cap9.c
> @@ -368,9 +368,6 @@ static void __init at91cap9_initialize(unsigned long main_clock)
> /* Init clock subsystem */
> at91_clock_init(main_clock);
>
> - /* Register the processor-specific clocks */
> - at91cap9_register_clocks();
> -
> /* Remember the silicon revision */
> if (cpu_is_at91cap9_revB())
> system_rev = 0xB;
> @@ -428,6 +425,7 @@ struct at91_dev_resource at91cap9_pit __initdata = {
> struct at91_soc __initdata at91cap9_soc = {
> .name = "at91cap9",
> .default_irq_priority = at91cap9_default_irq_priority,
> + .register_clocks = at91cap9_register_clocks,
> .init = at91cap9_initialize,
> .gpio = {
> .resource = at91cap9_pios,
> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> index 7b9d3a4..f5f5711 100644
> --- a/arch/arm/mach-at91/at91rm9200.c
> +++ b/arch/arm/mach-at91/at91rm9200.c
> @@ -330,9 +330,6 @@ static void __init at91rm9200_initialize(unsigned long main_clock)
>
> /* Init clock subsystem */
> at91_clock_init(main_clock);
> -
> - /* Register the processor-specific clocks */
> - at91rm9200_register_clocks();
> }
>
>
> @@ -386,6 +383,7 @@ struct at91_dev_resource at91rm9200_st __initdata = {
> struct at91_soc __initdata at91rm9200_soc = {
> .name = "at91rm9200",
> .default_irq_priority = at91rm9200_default_irq_priority,
> + .register_clocks = at91rm9200_register_clocks,
> .init = at91rm9200_initialize,
> .gpio = {
> .resource = at91rm9200_pios,
> diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
> index 0567556b..7a2d10b 100644
> --- a/arch/arm/mach-at91/at91sam9260.c
> +++ b/arch/arm/mach-at91/at91sam9260.c
> @@ -362,9 +362,6 @@ static void __init at91sam9260_initialize(unsigned long main_clock)
>
> /* Init clock subsystem */
> at91_clock_init(main_clock);
> -
> - /* Register the processor-specific clocks */
> - at91sam9260_register_clocks();
> }
>
> /* --------------------------------------------------------------------
> @@ -417,6 +414,7 @@ struct at91_dev_resource at91sam9260_pit __initdata = {
> struct at91_soc __initdata at91sam9260_soc = {
> .name = "at91sam9260",
> .default_irq_priority = at91sam9260_default_irq_priority,
> + .register_clocks = at91sam9260_register_clocks,
> .init = at91sam9260_initialize,
> .gpio = {
> .resource = at91sam9260_pios,
> diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
> index 603c6fe..a2ee99d 100644
> --- a/arch/arm/mach-at91/at91sam9261.c
> +++ b/arch/arm/mach-at91/at91sam9261.c
> @@ -328,9 +328,6 @@ static void __init at91sam9261_initialize(unsigned long main_clock)
>
> /* Init clock subsystem */
> at91_clock_init(main_clock);
> -
> - /* Register the processor-specific clocks */
> - at91sam9261_register_clocks();
> }
>
> /* --------------------------------------------------------------------
> @@ -383,6 +380,7 @@ struct at91_dev_resource at91sam9261_pit __initdata = {
> struct at91_soc __initdata at91sam9261_soc = {
> .name = "at91sam9261",
> .default_irq_priority = at91sam9261_default_irq_priority,
> + .register_clocks = at91sam9261_register_clocks,
> .init = at91sam9261_initialize,
> .gpio = {
> .resource = at91sam9261_pios,
> diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
> index e7ff884..0b9a6b4 100644
> --- a/arch/arm/mach-at91/at91sam9263.c
> +++ b/arch/arm/mach-at91/at91sam9263.c
> @@ -337,9 +337,6 @@ static void __init at91sam9263_initialize(unsigned long main_clock)
>
> /* Init clock subsystem */
> at91_clock_init(main_clock);
> -
> - /* Register the processor-specific clocks */
> - at91sam9263_register_clocks();
> }
>
> /* --------------------------------------------------------------------
> @@ -392,6 +389,7 @@ struct at91_dev_resource at91sam9263_pit __initdata = {
> struct at91_soc __initdata at91sam9263_soc = {
> .name = "at91sam9263",
> .default_irq_priority = at91sam9263_default_irq_priority,
> + .register_clocks = at91sam9263_register_clocks,
> .init = at91sam9263_initialize,
> .gpio = {
> .resource = at91sam9263_pios,
> diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
> index 077eecf..96cfc16 100644
> --- a/arch/arm/mach-at91/at91sam9g45.c
> +++ b/arch/arm/mach-at91/at91sam9g45.c
> @@ -355,9 +355,6 @@ static void __init at91sam9g45_initialize(unsigned long main_clock)
>
> /* Init clock subsystem */
> at91_clock_init(main_clock);
> -
> - /* Register the processor-specific clocks */
> - at91sam9g45_register_clocks();
> }
>
> /* --------------------------------------------------------------------
> @@ -410,6 +407,7 @@ struct at91_dev_resource at91sam9g45_pit __initdata = {
> struct at91_soc __initdata at91sam9g45_soc = {
> .name = "at91sam9g45",
> .default_irq_priority = at91sam9g45_default_irq_priority,
> + .register_clocks = at91sam9g45_register_clocks,
> .init = at91sam9g45_initialize,
> .gpio = {
> .resource = at91sam9g45_pios,
> diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
> index 7623617..638e921 100644
> --- a/arch/arm/mach-at91/at91sam9rl.c
> +++ b/arch/arm/mach-at91/at91sam9rl.c
> @@ -321,9 +321,6 @@ static void __init at91sam9rl_initialize(unsigned long main_clock)
>
> /* Init clock subsystem */
> at91_clock_init(main_clock);
> -
> - /* Register the processor-specific clocks */
> - at91sam9rl_register_clocks();
> }
>
> /* --------------------------------------------------------------------
> @@ -376,6 +373,7 @@ struct at91_dev_resource at91sam9rl_pit __initdata = {
> struct at91_soc __initdata at91sam9rl_soc = {
> .name = "at91sam9rl",
> .default_irq_priority = at91sam9rl_default_irq_priority,
> + .register_clocks = at91sam9rl_register_clocks,
> .init = at91sam9rl_initialize,
> .gpio = {
> .resource = at91sam9rl_pios,
> diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> index 1b05997..c82d219 100644
> --- a/arch/arm/mach-at91/soc.c
> +++ b/arch/arm/mach-at91/soc.c
> @@ -117,6 +117,9 @@ void __init at91_initialize(unsigned long main_clock)
>
> current_soc.init(main_clock);
>
> + /* Register the processor-specific clocks */
> + current_soc.register_clocks();
> +
> /* Register GPIO subsystem */
> at91_add_gpio();
> }
> diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
> index a60ac0a..ca8b30e 100644
> --- a/arch/arm/mach-at91/soc.h
> +++ b/arch/arm/mach-at91/soc.h
> @@ -16,6 +16,7 @@ struct at91_soc {
> struct at91_dev_resource *pit;
> struct at91_dev_resource *st;
>
> + void (*register_clocks)(void);
> void (*init)(unsigned long main_clock);
> };
>
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 14/14] at91: move clock subsystem init to soc generic init
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (12 preceding siblings ...)
2011-04-26 1:11 ` [PATCH 13/14] at91: move register clocks to soc generic init Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-26 1:11 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-26 3:13 ` Ryan Mallon
2011-04-27 21:13 ` [PATCH 0/14] at91: factorize soc init and switch to early platform Ryan Mallon
14 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 1:11 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
---
arch/arm/mach-at91/at572d940hf.c | 5 +----
arch/arm/mach-at91/at91cap9.c | 5 +----
arch/arm/mach-at91/at91rm9200.c | 5 +----
arch/arm/mach-at91/at91sam9260.c | 5 +----
arch/arm/mach-at91/at91sam9261.c | 5 +----
arch/arm/mach-at91/at91sam9263.c | 5 +----
arch/arm/mach-at91/at91sam9g45.c | 5 +----
arch/arm/mach-at91/at91sam9rl.c | 5 +----
arch/arm/mach-at91/soc.c | 5 ++++-
arch/arm/mach-at91/soc.h | 2 +-
10 files changed, 13 insertions(+), 34 deletions(-)
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
index 7d7a4f2..f945171 100644
--- a/arch/arm/mach-at91/at572d940hf.c
+++ b/arch/arm/mach-at91/at572d940hf.c
@@ -359,7 +359,7 @@ static void at572d940hf_reset(void)
* AT572D940HF processor initialization
* -------------------------------------------------------------------- */
-static void __init at572d940hf_initialize(unsigned long main_clock)
+static void __init at572d940hf_initialize(void)
{
/* Map peripherals */
iotable_init(at572d940hf_io_desc, ARRAY_SIZE(at572d940hf_io_desc));
@@ -367,9 +367,6 @@ static void __init at572d940hf_initialize(unsigned long main_clock)
at91_arch_reset = at572d940hf_reset;
at91_extern_irq = (1 << AT572D940HF_ID_IRQ0) | (1 << AT572D940HF_ID_IRQ1)
| (1 << AT572D940HF_ID_IRQ2);
-
- /* Init clock subsystem */
- at91_clock_init(main_clock);
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index c304d9c..3487f97 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -356,7 +356,7 @@ static void at91cap9_poweroff(void)
* AT91CAP9 processor initialization
* -------------------------------------------------------------------- */
-static void __init at91cap9_initialize(unsigned long main_clock)
+static void __init at91cap9_initialize(void)
{
/* Map peripherals */
iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
@@ -365,9 +365,6 @@ static void __init at91cap9_initialize(unsigned long main_clock)
pm_power_off = at91cap9_poweroff;
at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
- /* Init clock subsystem */
- at91_clock_init(main_clock);
-
/* Remember the silicon revision */
if (cpu_is_at91cap9_revB())
system_rev = 0xB;
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index f5f5711..1a16ca1 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -312,7 +312,7 @@ static void at91rm9200_reset(void)
/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
-static void __init at91rm9200_initialize(unsigned long main_clock)
+static void __init at91rm9200_initialize(void)
{
if (cpu_is_at91rm9200_bga())
at91rm9200_soc.gpio.num_resources = AT91RM9200_BGA;
@@ -327,9 +327,6 @@ static void __init at91rm9200_initialize(unsigned long main_clock)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
| (1 << AT91RM9200_ID_IRQ6);
-
- /* Init clock subsystem */
- at91_clock_init(main_clock);
}
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 7a2d10b..ae0bf40 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -344,7 +344,7 @@ static void __init at91sam9xe_initialize(void)
iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
}
-static void __init at91sam9260_initialize(unsigned long main_clock)
+static void __init at91sam9260_initialize(void)
{
/* Map peripherals */
@@ -359,9 +359,6 @@ static void __init at91sam9260_initialize(unsigned long main_clock)
pm_power_off = at91sam9260_poweroff;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
-
- /* Init clock subsystem */
- at91_clock_init(main_clock);
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index a2ee99d..52bd316 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -311,7 +311,7 @@ static void at91sam9261_poweroff(void)
* AT91SAM9261 processor initialization
* -------------------------------------------------------------------- */
-static void __init at91sam9261_initialize(unsigned long main_clock)
+static void __init at91sam9261_initialize(void)
{
/* Map peripherals */
@@ -325,9 +325,6 @@ static void __init at91sam9261_initialize(unsigned long main_clock)
pm_power_off = at91sam9261_poweroff;
at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2);
-
- /* Init clock subsystem */
- at91_clock_init(main_clock);
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 0b9a6b4..619565a 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -326,7 +326,7 @@ static void at91sam9263_poweroff(void)
* AT91SAM9263 processor initialization
* -------------------------------------------------------------------- */
-static void __init at91sam9263_initialize(unsigned long main_clock)
+static void __init at91sam9263_initialize(void)
{
/* Map peripherals */
iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
@@ -334,9 +334,6 @@ static void __init at91sam9263_initialize(unsigned long main_clock)
at91_arch_reset = at91sam9_alt_reset;
pm_power_off = at91sam9263_poweroff;
at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
-
- /* Init clock subsystem */
- at91_clock_init(main_clock);
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 96cfc16..bad29a3 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -344,7 +344,7 @@ static void at91sam9g45_poweroff(void)
* AT91SAM9G45 processor initialization
* -------------------------------------------------------------------- */
-static void __init at91sam9g45_initialize(unsigned long main_clock)
+static void __init at91sam9g45_initialize(void)
{
/* Map peripherals */
iotable_init(at91sam9g45_io_desc, ARRAY_SIZE(at91sam9g45_io_desc));
@@ -352,9 +352,6 @@ static void __init at91sam9g45_initialize(unsigned long main_clock)
at91_arch_reset = at91sam9g45_reset;
pm_power_off = at91sam9g45_poweroff;
at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
-
- /* Init clock subsystem */
- at91_clock_init(main_clock);
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 638e921..82d3805 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -292,7 +292,7 @@ static void at91sam9rl_poweroff(void)
* AT91SAM9RL processor initialization
* -------------------------------------------------------------------- */
-static void __init at91sam9rl_initialize(unsigned long main_clock)
+static void __init at91sam9rl_initialize(void)
{
unsigned long cidr, sram_size;
@@ -318,9 +318,6 @@ static void __init at91sam9rl_initialize(unsigned long main_clock)
at91_arch_reset = at91sam9_alt_reset;
pm_power_off = at91sam9rl_poweroff;
at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
-
- /* Init clock subsystem */
- at91_clock_init(main_clock);
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
index c82d219..2d4e415 100644
--- a/arch/arm/mach-at91/soc.c
+++ b/arch/arm/mach-at91/soc.c
@@ -115,7 +115,10 @@ void __init at91_initialize(unsigned long main_clock)
pr_info("AT91: detected soc: %s\n", current_soc.name);
- current_soc.init(main_clock);
+ current_soc.init();
+
+ /* Init clock subsystem */
+ at91_clock_init(main_clock);
/* Register the processor-specific clocks */
current_soc.register_clocks();
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index ca8b30e..21c66fd 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -17,7 +17,7 @@ struct at91_soc {
struct at91_dev_resource *st;
void (*register_clocks)(void);
- void (*init)(unsigned long main_clock);
+ void (*init)(void);
};
extern struct at91_soc at572d940hf_soc;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 85+ messages in thread* [PATCH 14/14] at91: move clock subsystem init to soc generic init
2011-04-26 1:11 ` [PATCH 14/14] at91: move clock subsystem init " Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-26 3:13 ` Ryan Mallon
2011-04-26 4:13 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-26 3:13 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 01:11 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
<snip>
> /* --------------------------------------------------------------------
> diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> index c82d219..2d4e415 100644
> --- a/arch/arm/mach-at91/soc.c
> +++ b/arch/arm/mach-at91/soc.c
> @@ -115,7 +115,10 @@ void __init at91_initialize(unsigned long main_clock)
>
> pr_info("AT91: detected soc: %s\n", current_soc.name);
>
> - current_soc.init(main_clock);
> + current_soc.init();
I think this patch should go near the beginning of the series so that
current_soc.init never needs to take an argument.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 14/14] at91: move clock subsystem init to soc generic init
2011-04-26 3:13 ` Ryan Mallon
@ 2011-04-26 4:13 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-26 4:32 ` Ryan Mallon
0 siblings, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 4:13 UTC (permalink / raw)
To: linux-arm-kernel
On 15:13 Tue 26 Apr , Ryan Mallon wrote:
> On 04/26/2011 01:11 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> > Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
>
> <snip>
>
> > /* --------------------------------------------------------------------
> > diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> > index c82d219..2d4e415 100644
> > --- a/arch/arm/mach-at91/soc.c
> > +++ b/arch/arm/mach-at91/soc.c
> > @@ -115,7 +115,10 @@ void __init at91_initialize(unsigned long main_clock)
> >
> > pr_info("AT91: detected soc: %s\n", current_soc.name);
> >
> > - current_soc.init(main_clock);
> > + current_soc.init();
>
> I think this patch should go near the beginning of the series so that
> current_soc.init never needs to take an argument.
no until you factorize the at91_init_clock you do need it
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 14/14] at91: move clock subsystem init to soc generic init
2011-04-26 4:13 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-26 4:32 ` Ryan Mallon
2011-04-26 4:32 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-26 4:32 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 04:13 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 15:13 Tue 26 Apr , Ryan Mallon wrote:
>> On 04/26/2011 01:11 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
>>> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
>>
>> <snip>
>>
>>> /* --------------------------------------------------------------------
>>> diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
>>> index c82d219..2d4e415 100644
>>> --- a/arch/arm/mach-at91/soc.c
>>> +++ b/arch/arm/mach-at91/soc.c
>>> @@ -115,7 +115,10 @@ void __init at91_initialize(unsigned long main_clock)
>>>
>>> pr_info("AT91: detected soc: %s\n", current_soc.name);
>>>
>>> - current_soc.init(main_clock);
>>> + current_soc.init();
>>
>> I think this patch should go near the beginning of the series so that
>> current_soc.init never needs to take an argument.
> no until you factorize the at91_init_clock you do need it
That's my point. If you move this patch earlier so that at91_init_clock
is factorised early then current_soc.init won't ever need the argument.
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 14/14] at91: move clock subsystem init to soc generic init
2011-04-26 4:32 ` Ryan Mallon
@ 2011-04-26 4:32 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-26 4:32 UTC (permalink / raw)
To: linux-arm-kernel
On 16:32 Tue 26 Apr , Ryan Mallon wrote:
> On 04/26/2011 04:13 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 15:13 Tue 26 Apr , Ryan Mallon wrote:
> >> On 04/26/2011 01:11 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >>> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> >>> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
> >>
> >> <snip>
> >>
> >>> /* --------------------------------------------------------------------
> >>> diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> >>> index c82d219..2d4e415 100644
> >>> --- a/arch/arm/mach-at91/soc.c
> >>> +++ b/arch/arm/mach-at91/soc.c
> >>> @@ -115,7 +115,10 @@ void __init at91_initialize(unsigned long main_clock)
> >>>
> >>> pr_info("AT91: detected soc: %s\n", current_soc.name);
> >>>
> >>> - current_soc.init(main_clock);
> >>> + current_soc.init();
> >>
> >> I think this patch should go near the beginning of the series so that
> >> current_soc.init never needs to take an argument.
> > no until you factorize the at91_init_clock you do need it
>
> That's my point. If you move this patch earlier so that at91_init_clock
> is factorised early then current_soc.init won't ever need the argument.
to do this I need to move the gpio and the cloock register
and to do so I need to switch to clkdev and early device
if I move the gpio I need do to much more changesets
so keep the change less intrusive is better
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 0/14] at91: factorize soc init and switch to early platform
2011-04-25 18:08 [PATCH 0/14] at91: factorize soc init and switch to early platform Jean-Christophe PLAGNIOL-VILLARD
` (13 preceding siblings ...)
2011-04-26 1:11 ` [PATCH 14/14] at91: move clock subsystem init " Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-27 21:13 ` Ryan Mallon
2011-04-28 2:26 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 2:41 ` Jean-Christophe PLAGNIOL-VILLARD
14 siblings, 2 replies; 85+ messages in thread
From: Ryan Mallon @ 2011-04-27 21:13 UTC (permalink / raw)
To: linux-arm-kernel
On 04/26/2011 06:08 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Hi,
>
> The following patch series start to factorize the soc init
> and switch gpio and timers to early platform
>
> diff stat on arm
>
> 80 files changed, 1690 insertions(+), 2053 deletions(-)
I finally had a chance to test this. On our Snapper 9G20 board
(AT91SAM9G20) the latest linux-next gives me:
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
<5>Linux version 2.6.39-rc4-next-20110427+ (ryan at okiwi) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #850 Thu Apr 28 09:07:43 NZST 2011
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: Bluewater Systems Snapper 9260/9G20 module
Memory policy: ECC disabled, Data cache writeback
<0>Kernel panic - not syncing: Impossible to detect the CPU type
[<c002fb1c>] (unwind_backtrace+0x0/0xe4) from [<c0230820>] (panic+0x50/0x178)
[<c0230820>] (panic+0x50/0x178) from [<c000d414>] (at91_initialize+0x18/0x20)
[<c000d414>] (at91_initialize+0x18/0x20) from [<c000e298>] (snapper9260_map_io+0xc/0x5c)
[<c000e298>] (snapper9260_map_io+0xc/0x5c) from [<c000d0ec>] (paging_init+0x668/0x728)
[<c000d0ec>] (paging_init+0x668/0x728) from [<c000b5cc>] (setup_arch+0x39c/0x620)
[<c000b5cc>] (setup_arch+0x39c/0x620) from [<c000873c>] (start_kernel+0x6c/0x2c8)
I'll have a better look at this later to see if I can find the problem,
though I suspect the remapping of the AT91_DBGU location is to blame.
What platforms have you tested this on?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread* [PATCH 0/14] at91: factorize soc init and switch to early platform
2011-04-27 21:13 ` [PATCH 0/14] at91: factorize soc init and switch to early platform Ryan Mallon
@ 2011-04-28 2:26 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 2:41 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-28 2:26 UTC (permalink / raw)
To: linux-arm-kernel
On 09:13 Thu 28 Apr , Ryan Mallon wrote:
> On 04/26/2011 06:08 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Hi,
> >
> > The following patch series start to factorize the soc init
> > and switch gpio and timers to early platform
> >
> > diff stat on arm
> >
> > 80 files changed, 1690 insertions(+), 2053 deletions(-)
>
> I finally had a chance to test this. On our Snapper 9G20 board
> (AT91SAM9G20) the latest linux-next gives me:
>
> Starting kernel ...
>
> Uncompressing Linux... done, booting the kernel.
> <5>Linux version 2.6.39-rc4-next-20110427+ (ryan at okiwi) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #850 Thu Apr 28 09:07:43 NZST 2011
> CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
> CPU: VIVT data cache, VIVT instruction cache
> Machine: Bluewater Systems Snapper 9260/9G20 module
> Memory policy: ECC disabled, Data cache writeback
> <0>Kernel panic - not syncing: Impossible to detect the CPU type
> [<c002fb1c>] (unwind_backtrace+0x0/0xe4) from [<c0230820>] (panic+0x50/0x178)
> [<c0230820>] (panic+0x50/0x178) from [<c000d414>] (at91_initialize+0x18/0x20)
> [<c000d414>] (at91_initialize+0x18/0x20) from [<c000e298>] (snapper9260_map_io+0xc/0x5c)
> [<c000e298>] (snapper9260_map_io+0xc/0x5c) from [<c000d0ec>] (paging_init+0x668/0x728)
> [<c000d0ec>] (paging_init+0x668/0x728) from [<c000b5cc>] (setup_arch+0x39c/0x620)
> [<c000b5cc>] (setup_arch+0x39c/0x620) from [<c000873c>] (start_kernel+0x6c/0x2c8)
>
>
> I'll have a better look at this later to see if I can find the problem,
> though I suspect the remapping of the AT91_DBGU location is to blame.
> What platforms have you tested this on?
9263ek
rm9200ek
try this branch
git://github.com/at91linux/linux-2.6-at91.git
branch test_cleanup
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 0/14] at91: factorize soc init and switch to early platform
2011-04-27 21:13 ` [PATCH 0/14] at91: factorize soc init and switch to early platform Ryan Mallon
2011-04-28 2:26 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-28 2:41 ` Jean-Christophe PLAGNIOL-VILLARD
2011-04-28 3:59 ` Ryan Mallon
1 sibling, 1 reply; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-28 2:41 UTC (permalink / raw)
To: linux-arm-kernel
On 09:13 Thu 28 Apr , Ryan Mallon wrote:
> On 04/26/2011 06:08 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Hi,
> >
> > The following patch series start to factorize the soc init
> > and switch gpio and timers to early platform
> >
> > diff stat on arm
> >
> > 80 files changed, 1690 insertions(+), 2053 deletions(-)
>
> I finally had a chance to test this. On our Snapper 9G20 board
> (AT91SAM9G20) the latest linux-next gives me:
>
> Starting kernel ...
>
> Uncompressing Linux... done, booting the kernel.
> <5>Linux version 2.6.39-rc4-next-20110427+ (ryan at okiwi) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #850 Thu Apr 28 09:07:43 NZST 2011
> CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
> CPU: VIVT data cache, VIVT instruction cache
> Machine: Bluewater Systems Snapper 9260/9G20 module
> Memory policy: ECC disabled, Data cache writeback
> <0>Kernel panic - not syncing: Impossible to detect the CPU type
> [<c002fb1c>] (unwind_backtrace+0x0/0xe4) from [<c0230820>] (panic+0x50/0x178)
> [<c0230820>] (panic+0x50/0x178) from [<c000d414>] (at91_initialize+0x18/0x20)
> [<c000d414>] (at91_initialize+0x18/0x20) from [<c000e298>] (snapper9260_map_io+0xc/0x5c)
> [<c000e298>] (snapper9260_map_io+0xc/0x5c) from [<c000d0ec>] (paging_init+0x668/0x728)
> [<c000d0ec>] (paging_init+0x668/0x728) from [<c000b5cc>] (setup_arch+0x39c/0x620)
> [<c000b5cc>] (setup_arch+0x39c/0x620) from [<c000873c>] (start_kernel+0x6c/0x2c8)
>
>
> I'll have a better look at this later to see if I can find the problem,
> though I suspect the remapping of the AT91_DBGU location is to blame.
> What platforms have you tested this on?
I already found the issue and fix it
git://github.com/at91linux/linux-2.6-at91.git test_cleanup
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 0/14] at91: factorize soc init and switch to early platform
2011-04-28 2:41 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2011-04-28 3:59 ` Ryan Mallon
2011-04-28 4:14 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 85+ messages in thread
From: Ryan Mallon @ 2011-04-28 3:59 UTC (permalink / raw)
To: linux-arm-kernel
On 04/28/2011 02:41 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 09:13 Thu 28 Apr , Ryan Mallon wrote:
>> On 04/26/2011 06:08 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> Hi,
>>>
>>> The following patch series start to factorize the soc init
>>> and switch gpio and timers to early platform
>>>
>>> diff stat on arm
>>>
>>> 80 files changed, 1690 insertions(+), 2053 deletions(-)
>>
>> I finally had a chance to test this. On our Snapper 9G20 board
>> (AT91SAM9G20) the latest linux-next gives me:
>>
>> Starting kernel ...
>>
>> Uncompressing Linux... done, booting the kernel.
>> <5>Linux version 2.6.39-rc4-next-20110427+ (ryan at okiwi) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #850 Thu Apr 28 09:07:43 NZST 2011
>> CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
>> CPU: VIVT data cache, VIVT instruction cache
>> Machine: Bluewater Systems Snapper 9260/9G20 module
>> Memory policy: ECC disabled, Data cache writeback
>> <0>Kernel panic - not syncing: Impossible to detect the CPU type
>> [<c002fb1c>] (unwind_backtrace+0x0/0xe4) from [<c0230820>] (panic+0x50/0x178)
>> [<c0230820>] (panic+0x50/0x178) from [<c000d414>] (at91_initialize+0x18/0x20)
>> [<c000d414>] (at91_initialize+0x18/0x20) from [<c000e298>] (snapper9260_map_io+0xc/0x5c)
>> [<c000e298>] (snapper9260_map_io+0xc/0x5c) from [<c000d0ec>] (paging_init+0x668/0x728)
>> [<c000d0ec>] (paging_init+0x668/0x728) from [<c000b5cc>] (setup_arch+0x39c/0x620)
>> [<c000b5cc>] (setup_arch+0x39c/0x620) from [<c000873c>] (start_kernel+0x6c/0x2c8)
>>
>>
>> I'll have a better look at this later to see if I can find the problem,
>> though I suspect the remapping of the AT91_DBGU location is to blame.
>> What platforms have you tested this on?
> I already found the issue and fix it
>
> git://github.com/at91linux/linux-2.6-at91.git test_cleanup
Okay, that is working a bit better, not quite booting yet, but a little
further along :-).
Couple of bugs I've noticed so far: In board-stamp9g20.c and
board-sam9g20ek.c you have missed the .init_irq initialisation change
for the first MACHINE_START. It causes a build failure if either of
these boards are included.
Also at91x40 (e.g. board-eb01.c) does not get converted? I don't known
anything about this SoC. Is this intentional?
~Ryan
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 85+ messages in thread
* [PATCH 0/14] at91: factorize soc init and switch to early platform
2011-04-28 3:59 ` Ryan Mallon
@ 2011-04-28 4:14 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 85+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2011-04-28 4:14 UTC (permalink / raw)
To: linux-arm-kernel
On 15:59 Thu 28 Apr , Ryan Mallon wrote:
> On 04/28/2011 02:41 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 09:13 Thu 28 Apr , Ryan Mallon wrote:
> >> On 04/26/2011 06:08 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>> Hi,
> >>>
> >>> The following patch series start to factorize the soc init
> >>> and switch gpio and timers to early platform
> >>>
> >>> diff stat on arm
> >>>
> >>> 80 files changed, 1690 insertions(+), 2053 deletions(-)
> >>
> >> I finally had a chance to test this. On our Snapper 9G20 board
> >> (AT91SAM9G20) the latest linux-next gives me:
> >>
> >> Starting kernel ...
> >>
> >> Uncompressing Linux... done, booting the kernel.
> >> <5>Linux version 2.6.39-rc4-next-20110427+ (ryan at okiwi) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #850 Thu Apr 28 09:07:43 NZST 2011
> >> CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
> >> CPU: VIVT data cache, VIVT instruction cache
> >> Machine: Bluewater Systems Snapper 9260/9G20 module
> >> Memory policy: ECC disabled, Data cache writeback
> >> <0>Kernel panic - not syncing: Impossible to detect the CPU type
> >> [<c002fb1c>] (unwind_backtrace+0x0/0xe4) from [<c0230820>] (panic+0x50/0x178)
> >> [<c0230820>] (panic+0x50/0x178) from [<c000d414>] (at91_initialize+0x18/0x20)
> >> [<c000d414>] (at91_initialize+0x18/0x20) from [<c000e298>] (snapper9260_map_io+0xc/0x5c)
> >> [<c000e298>] (snapper9260_map_io+0xc/0x5c) from [<c000d0ec>] (paging_init+0x668/0x728)
> >> [<c000d0ec>] (paging_init+0x668/0x728) from [<c000b5cc>] (setup_arch+0x39c/0x620)
> >> [<c000b5cc>] (setup_arch+0x39c/0x620) from [<c000873c>] (start_kernel+0x6c/0x2c8)
> >>
> >>
> >> I'll have a better look at this later to see if I can find the problem,
> >> though I suspect the remapping of the AT91_DBGU location is to blame.
> >> What platforms have you tested this on?
> > I already found the issue and fix it
> >
> > git://github.com/at91linux/linux-2.6-at91.git test_cleanup
>
> Okay, that is working a bit better, not quite booting yet, but a little
> further along :-).
>
> Couple of bugs I've noticed so far: In board-stamp9g20.c and
> board-sam9g20ek.c you have missed the .init_irq initialisation change
> for the first MACHINE_START. It causes a build failure if either of
> these boards are included.
>
> Also at91x40 (e.g. board-eb01.c) does not get converted? I don't known
> anything about this SoC. Is this intentional?
Yes it's intentionnal
this is a nommu soc and with just timer and clock driver so I do not update it
and this soc does not have a DBGU so until we have a real implementation it's
stay as now
Best Regards,
J.
^ permalink raw reply [flat|nested] 85+ messages in thread