From mboxrd@z Thu Jan  1 00:00:00 1970
From: mika.westerberg@iki.fi (Mika Westerberg)
Date: Sun, 5 Jun 2011 12:54:50 +0300
Subject: [PATCH v4] ARM: ep93xx: use more reliable CPLD watchdog for
	reset on ts72xx
In-Reply-To: <1307125685-5110-1-git-send-email-ynezz@true.cz>
References: <ADE657CA350FB648AAC2C43247A983F001F381FC4A7E@AUSP01VMBX24.collaborationhost.net>
	<1307125685-5110-1-git-send-email-ynezz@true.cz>
Message-ID: <20110605095450.GC16018@acer>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

On Fri, Jun 03, 2011 at 08:28:05PM +0200, Petr ?tetiar wrote:

> @@ -13,11 +16,16 @@ static inline void arch_reset(char mode, const char *cmd)
>  {
>  	local_irq_disable();
>  
> -	/*
> -	 * Set then clear the SWRST bit to initiate a software reset
> -	 */
> -	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
> -	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
> +	if (board_is_ts7200() || board_is_ts7250() || board_is_ts7260() ||
> +	    board_is_ts7300() || board_is_ts7400()) {
> +		/* We use more reliable CPLD watchdog to perform the reset */
> +		__raw_writeb(0x5, TS72XX_WDT_FEED_PHYS_BASE);
> +		__raw_writeb(0x1, TS72XX_WDT_CONTROL_PHYS_BASE);

I just noticed that you are accessing the registers via *physical* address. It
currently works because arm_machine_restart() sets up 1:1 mappings in place of
userspace before arch_reset() gets called.

This might cause some problems as the register accesses are cached, or does it
make a difference in ARM920?