* [PATCH v4 01/20] gpio/omap: remove dependency on gpio_bank_count
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 02/20] gpio/omap: use flag to identify wakeup domain Tarun Kanti DebBarma
` (18 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this
dependency from the driver by using list. Also remove the dependency on array of
pointers to gpio_bank struct of all GPIO devices.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 1 -
arch/arm/mach-omap1/gpio16xx.c | 2 -
arch/arm/mach-omap1/gpio7xx.c | 2 -
arch/arm/mach-omap2/gpio.c | 1 -
arch/arm/plat-omap/include/plat/gpio.h | 3 -
drivers/gpio/gpio-omap.c | 163 ++++++++++++++++----------------
6 files changed, 80 insertions(+), 92 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f79c6ae..e8a3bd9 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -115,7 +115,6 @@ static int __init omap15xx_gpio_init(void)
platform_device_register(&omap15xx_mpu_gpio);
platform_device_register(&omap15xx_gpio);
- gpio_bank_count = 2;
return 0;
}
postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index c69b3b1..9a97e60 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -221,8 +221,6 @@ static int __init omap16xx_gpio_init(void)
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index d7f2ad3..f5d5572 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -282,8 +282,6 @@ static int __init omap7xx_gpio_init(void)
for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
platform_device_register(omap7xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9a46d77..f805cda 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -119,7 +119,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return PTR_ERR(od);
}
- gpio_bank_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 91e8de3..dd330ed 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -202,9 +202,6 @@ struct omap_gpio_platform_data {
struct omap_gpio_reg_offs *regs;
};
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-extern int gpio_bank_count;
-
extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 6d616ee..b1333d8 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -28,7 +28,10 @@
#include <mach/gpio.h>
#include <asm/mach/irq.h>
+static LIST_HEAD(omap_gpio_list);
+
struct gpio_bank {
+ struct list_head node;
unsigned long pbase;
void __iomem *base;
u16 irq;
@@ -55,6 +58,7 @@ struct gpio_bank {
bool dbck_flag;
int stride;
u32 width;
+ u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -78,15 +82,6 @@ struct omap3_gpio_regs {
static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
#endif
-/*
- * TODO: Cleanup gpio_bank usage as it is having information
- * related to all instances of the device
- */
-static struct gpio_bank *gpio_bank;
-
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-int gpio_bank_count;
-
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
@@ -868,9 +863,8 @@ static struct platform_device omap_mpuio_device = {
/* could list the /proc/iomem resources */
};
-static inline void mpuio_init(void)
+static inline void mpuio_init(struct gpio_bank *bank)
{
- struct gpio_bank *bank = &gpio_bank[0];
platform_set_drvdata(&omap_mpuio_device, bank);
if (platform_driver_register(&omap_mpuio_driver) == 0)
@@ -878,13 +872,13 @@ static inline void mpuio_init(void)
}
#else
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif /* 16xx */
#else
#define bank_is_mpuio(bank) 0
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif
@@ -1006,20 +1000,8 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
*/
static struct lock_class_key gpio_lock_class;
-static inline int init_gpio_info(struct platform_device *pdev)
-{
- /* TODO: Analyze removing gpio_bank_count usage from driver code */
- gpio_bank = kzalloc(gpio_bank_count * sizeof(struct gpio_bank),
- GFP_KERNEL);
- if (!gpio_bank) {
- dev_err(&pdev->dev, "Memory alloc failed for gpio_bank\n");
- return -ENOMEM;
- }
- return 0;
-}
-
/* TODO: Cleanup cpu_is_* checks */
-static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
+static void omap_gpio_mod_init(struct gpio_bank *bank)
{
if (cpu_class_is_omap2()) {
if (cpu_is_omap44xx()) {
@@ -1043,13 +1025,16 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
static const u32 non_wakeup_gpios[] = {
0xe203ffc0, 0x08700040
};
- if (id < ARRAY_SIZE(non_wakeup_gpios))
- bank->non_wakeup_gpios = non_wakeup_gpios[id];
+ if (bank->id < ARRAY_SIZE(non_wakeup_gpios))
+ bank->non_wakeup_gpios =
+ non_wakeup_gpios[bank->id];
}
} else if (cpu_class_is_omap1()) {
- if (bank_is_mpuio(bank))
+ if (bank_is_mpuio(bank)) {
__raw_writew(0xffff, bank->base +
OMAP_MPUIO_GPIO_MASKIT / bank->stride);
+ mpuio_init(bank);
+ }
if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
__raw_writew(0xffff, bank->base
+ OMAP1510_GPIO_INT_MASK);
@@ -1155,35 +1140,35 @@ static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
static int __devinit omap_gpio_probe(struct platform_device *pdev)
{
- static int gpio_init_done;
struct omap_gpio_platform_data *pdata;
struct resource *res;
- int id;
struct gpio_bank *bank;
+ int ret = 0;
- if (!pdev->dev.platform_data)
- return -EINVAL;
-
- pdata = pdev->dev.platform_data;
-
- if (!gpio_init_done) {
- int ret;
-
- ret = init_gpio_info(pdev);
- if (ret)
- return ret;
+ if (!pdev->dev.platform_data) {
+ ret = -EINVAL;
+ goto err_exit;
}
- id = pdev->id;
- bank = &gpio_bank[id];
+ bank = kzalloc(sizeof(struct gpio_bank), GFP_KERNEL);
+ if (!bank) {
+ dev_err(&pdev->dev, "Memory alloc failed for gpio_bank\n");
+ ret = -ENOMEM;
+ goto err_exit;
+ }
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (unlikely(!res)) {
- dev_err(&pdev->dev, "GPIO Bank %i Invalid IRQ resource\n", id);
- return -ENODEV;
+ dev_err(&pdev->dev, "GPIO Bank %i Invalid IRQ resource\n",
+ pdev->id);
+ ret = -ENODEV;
+ goto err_free;
}
bank->irq = res->start;
+ bank->id = pdev->id;
+
+ pdata = pdev->dev.platform_data;
bank->virtual_irq_start = pdata->virtual_irq_start;
bank->method = pdata->bank_type;
bank->dev = &pdev->dev;
@@ -1203,39 +1188,46 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
/* Static mapping, never released */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!res)) {
- dev_err(&pdev->dev, "GPIO Bank %i Invalid mem resource\n", id);
- return -ENODEV;
+ dev_err(&pdev->dev, "GPIO Bank %i Invalid mem resource\n",
+ pdev->id);
+ ret = -ENODEV;
+ goto err_free;
}
bank->base = ioremap(res->start, resource_size(res));
if (!bank->base) {
- dev_err(&pdev->dev, "Could not ioremap gpio bank%i\n", id);
- return -ENOMEM;
+ dev_err(&pdev->dev, "Could not ioremap gpio bank%i\n",
+ pdev->id);
+ ret = -ENOMEM;
+ goto err_free;
}
pm_runtime_enable(bank->dev);
pm_runtime_get_sync(bank->dev);
- omap_gpio_mod_init(bank, id);
+ omap_gpio_mod_init(bank);
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
- if (!gpio_init_done)
- gpio_init_done = 1;
+ list_add_tail(&bank->node, &omap_gpio_list);
- return 0;
+ return ret;
+
+err_free:
+ kfree(bank);
+err_exit:
+ return ret;
}
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
static int omap_gpio_suspend(void)
{
- int i;
+ struct gpio_bank *bank;
if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
return 0;
- for (i = 0; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
void __iomem *wake_status;
void __iomem *wake_clear;
void __iomem *wake_set;
@@ -1279,13 +1271,12 @@ static int omap_gpio_suspend(void)
static void omap_gpio_resume(void)
{
- int i;
+ struct gpio_bank *bank;
if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
return;
- for (i = 0; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
void __iomem *wake_clear;
void __iomem *wake_set;
unsigned long flags;
@@ -1333,17 +1324,17 @@ static int workaround_enabled;
void omap2_gpio_prepare_for_idle(int off_mode)
{
- int i, c = 0;
- int min = 0;
-
- if (cpu_is_omap34xx())
- min = 1;
+ int c = 0;
+ struct gpio_bank *bank;
- for (i = min; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
u32 l1 = 0, l2 = 0;
int j;
+ /* TODO: Do not use cpu_is_omap34xx */
+ if ((cpu_is_omap34xx()) && (bank->id == 0))
+ continue;
+
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_disable(bank->dbck);
@@ -1402,16 +1393,16 @@ void omap2_gpio_prepare_for_idle(int off_mode)
void omap2_gpio_resume_after_idle(void)
{
- int i;
- int min = 0;
+ struct gpio_bank *bank;
- if (cpu_is_omap34xx())
- min = 1;
- for (i = min; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
u32 l = 0, gen, gen0, gen1;
int j;
+ /* TODO: Do not use cpu_is_omap34xx */
+ if ((cpu_is_omap34xx()) && (bank->id == 0))
+ continue;
+
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
@@ -1500,14 +1491,17 @@ void omap2_gpio_resume_after_idle(void)
#endif
#ifdef CONFIG_ARCH_OMAP3
-/* save the registers of bank 2-6 */
void omap_gpio_save_context(void)
{
- int i;
+ struct gpio_bank *bank;
+ int i = 0;
+
+ list_for_each_entry(bank, &omap_gpio_list, node) {
+ i++;
+
+ if (bank->id == 0)
+ continue;
- /* saving banks from 2-6 only since GPIO1 is in WKUP */
- for (i = 1; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
gpio_context[i].irqenable1 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
gpio_context[i].irqenable2 =
@@ -1531,13 +1525,17 @@ void omap_gpio_save_context(void)
}
}
-/* restore the required registers of bank 2-6 */
void omap_gpio_restore_context(void)
{
- int i;
+ struct gpio_bank *bank;
+ int i = 0;
+
+ list_for_each_entry(bank, &omap_gpio_list, node) {
+ i++;
+
+ if (bank->id == 0)
+ continue;
- for (i = 1; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
__raw_writel(gpio_context[i].irqenable1,
bank->base + OMAP24XX_GPIO_IRQENABLE1);
__raw_writel(gpio_context[i].irqenable2,
@@ -1582,7 +1580,6 @@ postcore_initcall(omap_gpio_drv_reg);
static int __init omap_gpio_sysinit(void)
{
- mpuio_init();
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
if (cpu_is_omap16xx() || cpu_class_is_omap2())
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 02/20] gpio/omap: use flag to identify wakeup domain
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 01/20] gpio/omap: remove dependency on gpio_bank_count Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 03/20] gpio/omap: make gpio_context part of gpio_bank structure Tarun Kanti DebBarma
` (17 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1
is in wakeup domain. Instead of identifying bank's power domain by bank id,
use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context()
during dev_init.
For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used.
omap_device_get_pwrdm() could not be used as the pwrdm information needs to be
filled in pdata, whereas omap_device_get_pwrdm() could be used only after
omap_device_build() call.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 6 ++++++
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio-omap.c | 13 ++++++-------
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index f805cda..95195a8 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,6 +24,8 @@
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
+#include "powerdomain.h"
+
static struct omap_device_pm_latency omap_gpio_latency[] = {
[0] = {
.deactivate_func = omap_device_idle_hwmods,
@@ -39,6 +41,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
struct omap_gpio_dev_attr *dev_attr;
char *name = "omap_gpio";
int id;
+ struct powerdomain *pwrdm;
/*
* extract the device id from name field available in the
@@ -107,6 +110,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -EINVAL;
}
+ pwrdm = omap_hwmod_get_pwrdm(oh);
+ pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
+
od = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), omap_gpio_latency,
ARRAY_SIZE(omap_gpio_latency),
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index dd330ed..58d0bf2 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -198,6 +198,7 @@ struct omap_gpio_platform_data {
int bank_width; /* GPIO bank width */
int bank_stride; /* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
+ bool loses_context; /* whether the bank would ever lose context */
struct omap_gpio_reg_offs *regs;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index b1333d8..93457bf 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -56,6 +56,7 @@ struct gpio_bank {
u32 dbck_enable_mask;
struct device *dev;
bool dbck_flag;
+ bool loses_context;
int stride;
u32 width;
u16 id;
@@ -1175,7 +1176,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
bank->dbck_flag = pdata->dbck_flag;
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
-
+ bank->loses_context = pdata->loses_context;
bank->regs = pdata->regs;
if (bank->regs->set_dataout && bank->regs->clr_dataout)
@@ -1331,8 +1332,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
u32 l1 = 0, l2 = 0;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) && (bank->id == 0))
+ if (!bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
@@ -1399,8 +1399,7 @@ void omap2_gpio_resume_after_idle(void)
u32 l = 0, gen, gen0, gen1;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) && (bank->id == 0))
+ if (!bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
@@ -1499,7 +1498,7 @@ void omap_gpio_save_context(void)
list_for_each_entry(bank, &omap_gpio_list, node) {
i++;
- if (bank->id == 0)
+ if (!bank->loses_context)
continue;
gpio_context[i].irqenable1 =
@@ -1533,7 +1532,7 @@ void omap_gpio_restore_context(void)
list_for_each_entry(bank, &omap_gpio_list, node) {
i++;
- if (bank->id == 0)
+ if (!bank->loses_context)
continue;
__raw_writel(gpio_context[i].irqenable1,
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 03/20] gpio/omap: make gpio_context part of gpio_bank structure
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 01/20] gpio/omap: remove dependency on gpio_bank_count Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 02/20] gpio/omap: use flag to identify wakeup domain Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 04/20] gpio/omap: fix pwrdm_post_transition call sequence Tarun Kanti DebBarma
` (16 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Currently gpio_context array used to save gpio bank's context, is used only for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it
can be specific to each gpio bank and can be used for any OMAP architecture
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio-omap.c | 76 ++++++++++++++++++++-------------------------
1 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 93457bf..322ef22 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -30,6 +30,19 @@
static LIST_HEAD(omap_gpio_list);
+struct gpio_regs {
+ u32 irqenable1;
+ u32 irqenable2;
+ u32 wake_en;
+ u32 ctrl;
+ u32 oe;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 risingdetect;
+ u32 fallingdetect;
+ u32 dataout;
+};
+
struct gpio_bank {
struct list_head node;
unsigned long pbase;
@@ -43,7 +56,7 @@ struct gpio_bank {
#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
-
+ struct gpio_regs context;
u32 saved_datain;
u32 saved_fallingdetect;
u32 saved_risingdetect;
@@ -66,23 +79,6 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
};
-#ifdef CONFIG_ARCH_OMAP3
-struct omap3_gpio_regs {
- u32 irqenable1;
- u32 irqenable2;
- u32 wake_en;
- u32 ctrl;
- u32 oe;
- u32 leveldetect0;
- u32 leveldetect1;
- u32 risingdetect;
- u32 fallingdetect;
- u32 dataout;
-};
-
-static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
-#endif
-
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
@@ -1493,33 +1489,31 @@ void omap2_gpio_resume_after_idle(void)
void omap_gpio_save_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- i++;
if (!bank->loses_context)
continue;
- gpio_context[i].irqenable1 =
+ bank->context.irqenable1 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
- gpio_context[i].irqenable2 =
+ bank->context.irqenable2 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
- gpio_context[i].wake_en =
+ bank->context.wake_en =
__raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- gpio_context[i].ctrl =
+ bank->context.ctrl =
__raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- gpio_context[i].oe =
+ bank->context.oe =
__raw_readl(bank->base + OMAP24XX_GPIO_OE);
- gpio_context[i].leveldetect0 =
+ bank->context.leveldetect0 =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- gpio_context[i].leveldetect1 =
+ bank->context.leveldetect1 =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- gpio_context[i].risingdetect =
+ bank->context.risingdetect =
__raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
- gpio_context[i].fallingdetect =
+ bank->context.fallingdetect =
__raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- gpio_context[i].dataout =
+ bank->context.dataout =
__raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
}
}
@@ -1527,33 +1521,31 @@ void omap_gpio_save_context(void)
void omap_gpio_restore_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- i++;
if (!bank->loses_context)
continue;
- __raw_writel(gpio_context[i].irqenable1,
+ __raw_writel(bank->context.irqenable1,
bank->base + OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(gpio_context[i].irqenable2,
+ __raw_writel(bank->context.irqenable2,
bank->base + OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(gpio_context[i].wake_en,
+ __raw_writel(bank->context.wake_en,
bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(gpio_context[i].ctrl,
+ __raw_writel(bank->context.ctrl,
bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(gpio_context[i].oe,
+ __raw_writel(bank->context.oe,
bank->base + OMAP24XX_GPIO_OE);
- __raw_writel(gpio_context[i].leveldetect0,
+ __raw_writel(bank->context.leveldetect0,
bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(gpio_context[i].leveldetect1,
+ __raw_writel(bank->context.leveldetect1,
bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(gpio_context[i].risingdetect,
+ __raw_writel(bank->context.risingdetect,
bank->base + OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(gpio_context[i].fallingdetect,
+ __raw_writel(bank->context.fallingdetect,
bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(gpio_context[i].dataout,
+ __raw_writel(bank->context.dataout,
bank->base + OMAP24XX_GPIO_DATAOUT);
}
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 04/20] gpio/omap: fix pwrdm_post_transition call sequence
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (2 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 03/20] gpio/omap: make gpio_context part of gpio_bank structure Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 05/20] gpio/omap: handle save/restore ctx in GPIO driver Tarun Kanti DebBarma
` (15 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
The context lost count is modified in omap_sram_idle() path when
pwrdm_post_transition() is called. But pwrdm_post_transition() is called
only after omap_gpio_resume_after_idle() is called. Correct this so that
context lost count is modified before calling omap_gpio_resume_after_idle().
This would be useful when OMAP GPIO save/restore context is called by
the OMAP GPIO driver itself.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/pm34xx.c | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c155c9d..51d5a5c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -375,7 +375,6 @@ void omap_sram_idle(void)
printk(KERN_ERR "Invalid mpu state in sram_idle\n");
return;
}
- pwrdm_pre_transition();
/* NEON control */
if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
@@ -398,6 +397,8 @@ void omap_sram_idle(void)
if (!console_trylock())
goto console_still_active;
+ pwrdm_pre_transition();
+
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
@@ -467,6 +468,8 @@ void omap_sram_idle(void)
}
omap3_intc_resume_idle();
+ pwrdm_post_transition();
+
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
@@ -490,8 +493,6 @@ console_still_active:
omap3_disable_io_chain();
}
- pwrdm_post_transition();
-
clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 05/20] gpio/omap: handle save/restore ctx in GPIO driver
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (3 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 04/20] gpio/omap: fix pwrdm_post_transition call sequence Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 06/20] gpio/omap: make non-wakeup GPIO part of pdata Tarun Kanti DebBarma
` (14 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions
to handle save context & restore context respectively in the OMAP GPIO driver
itself instead of calling these functions from pm specific files.
For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in
gpio_resume_after_idle() call it again. If the count is different, do restore
context. The workaround_enabled flag is no more required and is removed.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 12 +++
arch/arm/mach-omap2/pm34xx.c | 14 ----
arch/arm/plat-omap/include/plat/gpio.h | 5 +-
drivers/gpio/gpio-omap.c | 131 ++++++++++++++------------------
4 files changed, 73 insertions(+), 89 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 95195a8..2e65377 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -23,6 +23,7 @@
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
+#include <plat/omap-pm.h>
#include "powerdomain.h"
@@ -34,6 +35,16 @@ static struct omap_device_pm_latency omap_gpio_latency[] = {
},
};
+#ifdef CONFIG_PM
+static int omap_gpio_get_context_loss(struct device *dev)
+{
+ return omap_pm_get_dev_context_loss_count(dev);
+}
+
+#else
+#define omap_gpio_get_context_loss NULL
+#endif
+
static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
{
struct omap_device *od;
@@ -63,6 +74,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->bank_width = dev_attr->bank_width;
pdata->dbck_flag = dev_attr->dbck_flag;
pdata->virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1);
+ pdata->get_context_loss_count = omap_gpio_get_context_loss;
pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
if (!pdata) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 51d5a5c..0aaa32c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -91,16 +91,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
-static inline void omap3_per_save_context(void)
-{
- omap_gpio_save_context();
-}
-
-static inline void omap3_per_restore_context(void)
-{
- omap_gpio_restore_context();
-}
-
static void omap3_enable_io_chain(void)
{
int timeout = 0;
@@ -405,8 +395,6 @@ void omap_sram_idle(void)
omap_uart_prepare_idle(2);
omap_uart_prepare_idle(3);
omap2_gpio_prepare_for_idle(per_going_off);
- if (per_next_state == PWRDM_POWER_OFF)
- omap3_per_save_context();
}
/* CORE */
@@ -474,8 +462,6 @@ void omap_sram_idle(void)
if (per_next_state < PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
omap2_gpio_resume_after_idle();
- if (per_prev_state == PWRDM_POWER_OFF)
- omap3_per_restore_context();
omap_uart_resume_idle(2);
omap_uart_resume_idle(3);
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 58d0bf2..f7798b5 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -201,14 +201,15 @@ struct omap_gpio_platform_data {
bool loses_context; /* whether the bank would ever lose context */
struct omap_gpio_reg_offs *regs;
+
+ /* Return context loss count due to PM states changing */
+ int (*get_context_loss_count)(struct device *dev);
};
extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
extern void omap_set_gpio_debounce_time(int gpio, int enable);
-extern void omap_gpio_save_context(void);
-extern void omap_gpio_restore_context(void);
/*-------------------------------------------------------------------------*/
/* Wrappers for "new style" GPIO calls, using the new infrastructure
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 322ef22..412a2cb 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -72,9 +72,11 @@ struct gpio_bank {
bool loses_context;
int stride;
u32 width;
+ u32 ctx_loss_count;
u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
+ int (*get_context_loss_count)(struct device *dev);
struct omap_gpio_reg_offs *regs;
};
@@ -1173,6 +1175,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
bank->loses_context = pdata->loses_context;
+ bank->get_context_loss_count = pdata->get_context_loss_count;
bank->regs = pdata->regs;
if (bank->regs->set_dataout && bank->regs->clr_dataout)
@@ -1317,11 +1320,11 @@ static struct syscore_ops omap_gpio_syscore_ops = {
#ifdef CONFIG_ARCH_OMAP2PLUS
-static int workaround_enabled;
+static void omap_gpio_save_context(struct gpio_bank *bank);
+static void omap_gpio_restore_context(struct gpio_bank *bank);
void omap2_gpio_prepare_for_idle(int off_mode)
{
- int c = 0;
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
@@ -1341,7 +1344,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
* non-wakeup GPIOs. Otherwise spurious IRQs will be
* generated. See OMAP2420 Errata item 1.101. */
if (!(bank->enabled_non_wakeup_gpios))
- continue;
+ goto save_gpio_ctx;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
bank->saved_datain = __raw_readl(bank->base +
@@ -1378,13 +1381,13 @@ void omap2_gpio_prepare_for_idle(int off_mode)
__raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
}
- c++;
- }
- if (!c) {
- workaround_enabled = 0;
- return;
+save_gpio_ctx:
+ if (bank->get_context_loss_count)
+ bank->ctx_loss_count =
+ bank->get_context_loss_count(bank->dev);
+
+ omap_gpio_save_context(bank);
}
- workaround_enabled = 1;
}
void omap2_gpio_resume_after_idle(void)
@@ -1392,6 +1395,7 @@ void omap2_gpio_resume_after_idle(void)
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
+ u32 ctx_lost_cnt_after;
u32 l = 0, gen, gen0, gen1;
int j;
@@ -1401,8 +1405,13 @@ void omap2_gpio_resume_after_idle(void)
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
- if (!workaround_enabled)
- continue;
+ if (bank->get_context_loss_count) {
+ ctx_lost_cnt_after =
+ bank->get_context_loss_count(bank->dev);
+ if (ctx_lost_cnt_after != bank->ctx_loss_count ||
+ !ctx_lost_cnt_after)
+ omap_gpio_restore_context(bank);
+ }
if (!(bank->enabled_non_wakeup_gpios))
continue;
@@ -1480,74 +1489,50 @@ void omap2_gpio_resume_after_idle(void)
}
}
}
-
}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-void omap_gpio_save_context(void)
+static void omap_gpio_save_context(struct gpio_bank *bank)
{
- struct gpio_bank *bank;
-
- list_for_each_entry(bank, &omap_gpio_list, node) {
-
- if (!bank->loses_context)
- continue;
-
- bank->context.irqenable1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
- bank->context.irqenable2 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
- bank->context.wake_en =
- __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl =
- __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe =
- __raw_readl(bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- bank->context.risingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
- bank->context.fallingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout =
- __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
- }
+ bank->context.irqenable1 =
+ __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ bank->context.irqenable2 =
+ __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ bank->context.wake_en =
+ __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
+ bank->context.ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
+ bank->context.oe = __raw_readl(bank->base + OMAP24XX_GPIO_OE);
+ bank->context.leveldetect0 =
+ __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ bank->context.leveldetect1 =
+ __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ bank->context.risingdetect =
+ __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ bank->context.fallingdetect =
+ __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
+ bank->context.dataout =
+ __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
}
-void omap_gpio_restore_context(void)
+static void omap_gpio_restore_context(struct gpio_bank *bank)
{
- struct gpio_bank *bank;
-
- list_for_each_entry(bank, &omap_gpio_list, node) {
-
- if (!bank->loses_context)
- continue;
-
- __raw_writel(bank->context.irqenable1,
- bank->base + OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(bank->context.irqenable2,
- bank->base + OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(bank->context.wake_en,
- bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl,
- bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe,
- bank->base + OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0,
- bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1,
- bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout,
- bank->base + OMAP24XX_GPIO_DATAOUT);
- }
+ __raw_writel(bank->context.irqenable1,
+ bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_writel(bank->context.irqenable2,
+ bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ __raw_writel(bank->context.wake_en,
+ bank->base + OMAP24XX_GPIO_WAKE_EN);
+ __raw_writel(bank->context.ctrl, bank->base + OMAP24XX_GPIO_CTRL);
+ __raw_writel(bank->context.oe, bank->base + OMAP24XX_GPIO_OE);
+ __raw_writel(bank->context.leveldetect0,
+ bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_writel(bank->context.leveldetect1,
+ bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_writel(bank->context.risingdetect,
+ bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ __raw_writel(bank->context.fallingdetect,
+ bank->base + OMAP24XX_GPIO_FALLINGDETECT);
+ __raw_writel(bank->context.dataout,
+ bank->base + OMAP24XX_GPIO_DATAOUT);
}
#endif
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 06/20] gpio/omap: make non-wakeup GPIO part of pdata
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (4 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 05/20] gpio/omap: handle save/restore ctx in GPIO driver Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 07/20] gpio/omap: avoid cpu checks during module ena/disable Tarun Kanti DebBarma
` (13 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making
non_wakeup_gpios as part of pdata.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 8 ++++++++
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio-omap.c | 8 +-------
3 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 2e65377..4952a9d 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -84,6 +84,14 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
switch (oh->class->rev) {
case 0:
+ if (id == 1)
+ /* non-wakeup GPIO pins for OMAP2 Bank1 */
+ pdata->non_wakeup_gpios = 0xe203ffc0;
+ else if (id == 2)
+ /* non-wakeup GPIO pins for OMAP2 Bank2 */
+ pdata->non_wakeup_gpios = 0x08700040;
+ /* fall through */
+
case 1:
pdata->bank_type = METHOD_GPIO_24XX;
pdata->regs->revision = OMAP24XX_GPIO_REVISION;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index f7798b5..ce417cd 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
int bank_stride; /* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
bool loses_context; /* whether the bank would ever lose context */
+ u32 non_wakeup_gpios;
struct omap_gpio_reg_offs *regs;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 412a2cb..057f8c0 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1020,13 +1020,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
/* Initialize interface clk ungated, module enabled */
__raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
- } else if (cpu_is_omap24xx()) {
- static const u32 non_wakeup_gpios[] = {
- 0xe203ffc0, 0x08700040
- };
- if (bank->id < ARRAY_SIZE(non_wakeup_gpios))
- bank->non_wakeup_gpios =
- non_wakeup_gpios[bank->id];
}
} else if (cpu_class_is_omap1()) {
if (bank_is_mpuio(bank)) {
@@ -1174,6 +1167,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
bank->dbck_flag = pdata->dbck_flag;
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
+ bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
bank->loses_context = pdata->loses_context;
bank->get_context_loss_count = pdata->get_context_loss_count;
bank->regs = pdata->regs;
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 07/20] gpio/omap: avoid cpu checks during module ena/disable
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (5 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 06/20] gpio/omap: make non-wakeup GPIO part of pdata Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 08/20] gpio/omap: further cleanup using wakeup_status register Tarun Kanti DebBarma
` (12 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio
request/free.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 2 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio-omap.c | 53 ++++++++++++++------------------
3 files changed, 26 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 4952a9d..cdbc728 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -107,6 +107,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
+ pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -123,6 +124,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
+ pdata->regs->ctrl = OMAP4_GPIO_CTRL;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index ce417cd..cf41743 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
u16 clr_irqenable;
u16 debounce;
u16 debounce_en;
+ u16 ctrl;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 057f8c0..5862368 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -83,6 +83,7 @@ struct gpio_bank {
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
+#define GPIO_MOD_CTRL_BIT BIT(0)
static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
{
@@ -576,22 +577,18 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- if (!bank->mod_usage) {
- void __iomem *reg = bank->base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is enabled, clocks are not gated */
- ctrl &= 0xFFFFFFFE;
- __raw_writel(ctrl, reg);
- }
- bank->mod_usage |= 1 << offset;
+ if (bank->regs->ctrl && !bank->mod_usage) {
+ void __iomem *reg = bank->base + bank->regs->ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is enabled, clocks are not gated */
+ ctrl &= ~GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
+ bank->mod_usage |= 1 << offset;
+
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
@@ -624,22 +621,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
__raw_writel(1 << offset, reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- bank->mod_usage &= ~(1 << offset);
- if (!bank->mod_usage) {
- void __iomem *reg = bank->base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is disabled, clocks are gated */
- ctrl |= 1;
- __raw_writel(ctrl, reg);
- }
+ bank->mod_usage &= ~(1 << offset);
+
+ if (bank->regs->ctrl && !bank->mod_usage) {
+ void __iomem *reg = bank->base + bank->regs->ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is disabled, clocks are gated */
+ ctrl |= GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
_reset_gpio(bank, bank->chip.base + offset);
spin_unlock_irqrestore(&bank->lock, flags);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 08/20] gpio/omap: further cleanup using wakeup_status register
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (6 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 07/20] gpio/omap: avoid cpu checks during module ena/disable Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 09/20] gpio/omap: cleanup omap1 related macros Tarun Kanti DebBarma
` (11 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
Wakeup istatus register offset initialized according to OMAP versions
during device registration. Use this to avoid version checks.
Starting with OMAP4, legacy registers should not be used in combination
with the updated regsiters. Use wkup_status register consistently for
all SoCs wherever applicable.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio16xx.c | 1 +
arch/arm/mach-omap2/gpio.c | 2 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio-omap.c | 109 ++++++--------------------------
4 files changed, 24 insertions(+), 89 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 9a97e60..0bc5032 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -89,6 +89,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.irqenable = OMAP1610_GPIO_IRQENABLE1,
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
+ .wkup_status = OMAP1610_GPIO_WAKEUPENABLE,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index cdbc728..fd05cea 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -108,6 +108,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
+ pdata->regs->wkup_status = OMAP24XX_GPIO_WAKE_EN;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -125,6 +126,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
+ pdata->regs->wkup_status = OMAP4_GPIO_IRQWAKEN0;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index cf41743..817997d 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -189,6 +189,7 @@ struct omap_gpio_reg_offs {
u16 debounce;
u16 debounce_en;
u16 ctrl;
+ u16 wkup_status;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 5862368..c9d12c5 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -50,10 +50,8 @@ struct gpio_bank {
u16 irq;
u16 virtual_irq_start;
int method;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
u32 suspend_wakeup;
u32 saved_wakeup;
-#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
struct gpio_regs context;
@@ -597,30 +595,15 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
+ void __iomem *base = bank->base;
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
-#ifdef CONFIG_ARCH_OMAP16XX
- if (bank->method == METHOD_GPIO_1610) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (bank->method == METHOD_GPIO_24XX) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- if (bank->method == METHOD_GPIO_44XX) {
+
+ if (bank->regs->wkup_status)
/* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
- __raw_writel(1 << offset, reg);
- }
-#endif
+ _gpio_rmw(base, bank->regs->wkup_status, 1 << offset, 0);
+
bank->mod_usage &= ~(1 << offset);
if (bank->regs->ctrl && !bank->mod_usage) {
@@ -1065,8 +1048,8 @@ omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
ct->chip.irq_mask = irq_gc_mask_set_bit;
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
ct->chip.irq_set_type = gpio_irq_type;
- /* REVISIT: assuming only 16xx supports MPUIO wake events */
- if (cpu_is_omap16xx())
+
+ if (bank->regs->wkup_status)
ct->chip.irq_set_wake = gpio_wake_enable,
ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride;
@@ -1095,7 +1078,8 @@ static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
if (bank_is_mpuio(bank)) {
bank->chip.label = "mpuio";
#ifdef CONFIG_ARCH_OMAP16XX
- bank->chip.dev = &omap_mpuio_device.dev;
+ if (bank->regs->wkup_status)
+ bank->chip.dev = &omap_mpuio_device.dev;
#endif
bank->chip.base = OMAP_MPUIO(0);
} else {
@@ -1206,50 +1190,24 @@ err_exit:
return ret;
}
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
static int omap_gpio_suspend(void)
{
struct gpio_bank *bank;
- if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
- return 0;
-
list_for_each_entry(bank, &omap_gpio_list, node) {
+ void __iomem *base = bank->base;
void __iomem *wake_status;
- void __iomem *wake_clear;
- void __iomem *wake_set;
unsigned long flags;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
- wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
- wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
- continue;
- }
+ if (!bank->regs->wkup_status)
+ return 0;
+
+ wake_status = bank->base + bank->regs->wkup_status;
spin_lock_irqsave(&bank->lock, flags);
bank->saved_wakeup = __raw_readl(wake_status);
- __raw_writel(0xffffffff, wake_clear);
- __raw_writel(bank->suspend_wakeup, wake_set);
+ _gpio_rmw(base, bank->regs->wkup_status,
+ bank->suspend_wakeup, 1);
spin_unlock_irqrestore(&bank->lock, flags);
}
@@ -1260,40 +1218,15 @@ static void omap_gpio_resume(void)
{
struct gpio_bank *bank;
- if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
- return;
-
list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *wake_clear;
- void __iomem *wake_set;
+ void __iomem *base = bank->base;
unsigned long flags;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
- continue;
- }
+ if (!bank->regs->wkup_status)
+ return;
spin_lock_irqsave(&bank->lock, flags);
- __raw_writel(0xffffffff, wake_clear);
- __raw_writel(bank->saved_wakeup, wake_set);
+ _gpio_rmw(base, bank->regs->wkup_status, bank->saved_wakeup, 1);
spin_unlock_irqrestore(&bank->lock, flags);
}
}
@@ -1303,8 +1236,6 @@ static struct syscore_ops omap_gpio_syscore_ops = {
.resume = omap_gpio_resume,
};
-#endif
-
#ifdef CONFIG_ARCH_OMAP2PLUS
static void omap_gpio_save_context(struct gpio_bank *bank);
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 09/20] gpio/omap: cleanup omap1 related macros
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (7 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 08/20] gpio/omap: further cleanup using wakeup_status register Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 10/20] gpio/omap: use level/edge detect reg offsets Tarun Kanti DebBarma
` (10 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
mpuio_init() function is defined under #ifdefs. It is required only in case
of MPUIO bank type and only when PM operations are supported by it.
This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type.
For all the other cases it is a dummy function. Hence clean up the same
and remove all the OMAP SoC specific #ifdefs.
bank_is_mpuio() is defined as a check to identify if the bank type is MPUIO.
It is not required to define it separately as zero for OMAP2PLUS. Remove this.
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio-omap.c | 19 -------------------
1 files changed, 0 insertions(+), 19 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index c9d12c5..fe02e7a 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -777,14 +777,8 @@ static struct irq_chip gpio_irq_chip = {
/*---------------------------------------------------------------------*/
-#ifdef CONFIG_ARCH_OMAP1
-
#define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO)
-#ifdef CONFIG_ARCH_OMAP16XX
-
-#include <linux/platform_device.h>
-
static int omap_mpuio_suspend_noirq(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
@@ -846,17 +840,6 @@ static inline void mpuio_init(struct gpio_bank *bank)
(void) platform_device_register(&omap_mpuio_device);
}
-#else
-static inline void mpuio_init(struct gpio_bank *bank) {}
-#endif /* 16xx */
-
-#else
-
-#define bank_is_mpuio(bank) 0
-static inline void mpuio_init(struct gpio_bank *bank) {}
-
-#endif
-
/*---------------------------------------------------------------------*/
/* REVISIT these are stupid implementations! replace by ones that
@@ -1077,10 +1060,8 @@ static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
bank->chip.to_irq = gpio_2irq;
if (bank_is_mpuio(bank)) {
bank->chip.label = "mpuio";
-#ifdef CONFIG_ARCH_OMAP16XX
if (bank->regs->wkup_status)
bank->chip.dev = &omap_mpuio_device.dev;
-#endif
bank->chip.base = OMAP_MPUIO(0);
} else {
bank->chip.label = "gpio";
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 10/20] gpio/omap: use level/edge detect reg offsets
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (8 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 09/20] gpio/omap: cleanup omap1 related macros Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 11/20] gpio/omap: remove hardcoded offsets in ctxt save/restore Tarun Kanti DebBarma
` (9 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now remove
lot of revision checks in these functions.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 8 ++
arch/arm/plat-omap/include/plat/gpio.h | 4 +
drivers/gpio/gpio-omap.c | 118 ++++++++++----------------------
3 files changed, 48 insertions(+), 82 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index fd05cea..8745c3a 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -109,6 +109,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
pdata->regs->wkup_status = OMAP24XX_GPIO_WAKE_EN;
+ pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
+ pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
+ pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT;
+ pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -127,6 +131,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
pdata->regs->wkup_status = OMAP4_GPIO_IRQWAKEN0;
+ pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
+ pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
+ pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
+ pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 817997d..7d12fe8 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -190,6 +190,10 @@ struct omap_gpio_reg_offs {
u16 debounce_en;
u16 ctrl;
u16 wkup_status;
+ u16 leveldetect0;
+ u16 leveldetect1;
+ u16 risingdetect;
+ u16 fallingdetect;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index fe02e7a..f895c15 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -256,15 +256,9 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
bank->enabled_non_wakeup_gpios &= ~gpio_bit;
}
- if (cpu_is_omap44xx()) {
- bank->level_mask =
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
- } else {
- bank->level_mask =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- }
+ bank->level_mask =
+ __raw_readl(bank->base + bank->regs->leveldetect0) |
+ __raw_readl(bank->base + bank->regs->leveldetect1);
}
#endif
@@ -404,12 +398,12 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
if (type & ~IRQ_TYPE_SENSE_MASK)
return -EINVAL;
- /* OMAP1 allows only only edge triggering */
- if (!cpu_class_is_omap2()
- && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
+ bank = irq_data_get_irq_chip_data(d);
+
+ if (!bank->regs->leveldetect0 &&
+ (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
return -EINVAL;
- bank = irq_data_get_irq_chip_data(d);
spin_lock_irqsave(&bank->lock, flags);
retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
spin_unlock_irqrestore(&bank->lock, flags);
@@ -657,9 +651,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
isr &= 0x0000ffff;
- if (cpu_class_is_omap2()) {
+ if (bank->level_mask)
level_mask = bank->level_mask & enabled;
- }
/* clear edge sensitive interrupts before handler(s) are
called so that we don't miss any interrupt occurred while
@@ -1245,40 +1238,18 @@ void omap2_gpio_prepare_for_idle(int off_mode)
if (!(bank->enabled_non_wakeup_gpios))
goto save_gpio_ctx;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- bank->saved_datain = __raw_readl(bank->base +
- OMAP24XX_GPIO_DATAIN);
- l1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- l2 = __raw_readl(bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- }
-
- if (cpu_is_omap44xx()) {
- bank->saved_datain = __raw_readl(bank->base +
- OMAP4_GPIO_DATAIN);
- l1 = __raw_readl(bank->base +
- OMAP4_GPIO_FALLINGDETECT);
- l2 = __raw_readl(bank->base +
- OMAP4_GPIO_RISINGDETECT);
- }
+ bank->saved_datain = __raw_readl(bank->base +
+ bank->regs->datain);
+ l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
+ l2 = __raw_readl(bank->base + bank->regs->risingdetect);
bank->saved_fallingdetect = l1;
bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- __raw_writel(l1, bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(l2, bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- }
-
- if (cpu_is_omap44xx()) {
- __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
- }
+ __raw_writel(l1, bank->base + bank->regs->fallingdetect);
+ __raw_writel(l2, bank->base + bank->regs->risingdetect);
save_gpio_ctx:
if (bank->get_context_loss_count)
@@ -1315,21 +1286,11 @@ void omap2_gpio_resume_after_idle(void)
if (!(bank->enabled_non_wakeup_gpios))
continue;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- __raw_writel(bank->saved_fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->saved_risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
- l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
- }
-
- if (cpu_is_omap44xx()) {
- __raw_writel(bank->saved_fallingdetect,
- bank->base + OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(bank->saved_risingdetect,
- bank->base + OMAP4_GPIO_RISINGDETECT);
- l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
- }
+ __raw_writel(bank->saved_fallingdetect,
+ bank->base + bank->regs->fallingdetect);
+ __raw_writel(bank->saved_risingdetect,
+ bank->base + bank->regs->risingdetect);
+ l = __raw_readl(bank->base + bank->regs->datain);
/* Check if any of the non-wakeup interrupt GPIOs have changed
* state. If so, generate an IRQ by software. This is
@@ -1357,35 +1318,28 @@ void omap2_gpio_resume_after_idle(void)
if (gen) {
u32 old0, old1;
+ old0 = __raw_readl(bank->base +
+ bank->regs->leveldetect0);
+ old1 = __raw_readl(bank->base +
+ bank->regs->leveldetect1);
+
+ __raw_writel(old0, bank->base +
+ bank->regs->leveldetect0);
+ __raw_writel(old1, bank->base +
+ bank->regs->leveldetect1);
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- old0 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- old1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(old0 | gen, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(old1 | gen, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(old0, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(old1, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
+ old0 |= gen;
+ old1 |= gen;
}
if (cpu_is_omap44xx()) {
- old0 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- old1 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(old0 | l, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(old1 | l, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(old0, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(old1, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
+ old0 |= l;
+ old1 |= l;
}
+ __raw_writel(old0, bank->base +
+ bank->regs->leveldetect0);
+ __raw_writel(old1, bank->base +
+ bank->regs->leveldetect1);
}
}
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 11/20] gpio/omap: remove hardcoded offsets in ctxt save/restore
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (9 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 10/20] gpio/omap: use level/edge detect reg offsets Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 12/20] gpio/omap: cleanup set_gpio_triggering function Tarun Kanti DebBarma
` (8 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
It is not required to use hard-coded offsets any more in context save and
restore functions and instead use the generic offsets which have been correctly
initialized during device registration.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 2 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio-omap.c | 42 +++++++++++++++----------------
3 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 8745c3a..0ee9a55 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -103,6 +103,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1;
+ pdata->regs->irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
@@ -125,6 +126,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
+ pdata->regs->irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 7d12fe8..0ad4f49 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -184,6 +184,7 @@ struct omap_gpio_reg_offs {
u16 irqstatus;
u16 irqstatus2;
u16 irqenable;
+ u16 irqenable2;
u16 set_irqenable;
u16 clr_irqenable;
u16 debounce;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index f895c15..d93f8cd 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1347,45 +1347,43 @@ void omap2_gpio_resume_after_idle(void)
static void omap_gpio_save_context(struct gpio_bank *bank)
{
bank->context.irqenable1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_readl(bank->base + bank->regs->irqenable);
bank->context.irqenable2 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ __raw_readl(bank->base + bank->regs->irqenable2);
bank->context.wake_en =
- __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe = __raw_readl(bank->base + OMAP24XX_GPIO_OE);
+ __raw_readl(bank->base + bank->regs->wkup_status);
+ bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
+ bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
bank->context.leveldetect0 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_readl(bank->base + bank->regs->leveldetect0);
bank->context.leveldetect1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_readl(bank->base + bank->regs->leveldetect1);
bank->context.risingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ __raw_readl(bank->base + bank->regs->risingdetect);
bank->context.fallingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout =
- __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
+ __raw_readl(bank->base + bank->regs->fallingdetect);
+ bank->context.dataout = __raw_readl(bank->base + bank->regs->dataout);
}
static void omap_gpio_restore_context(struct gpio_bank *bank)
{
__raw_writel(bank->context.irqenable1,
- bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ bank->base + bank->regs->irqenable);
__raw_writel(bank->context.irqenable2,
- bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ bank->base + bank->regs->irqenable2);
__raw_writel(bank->context.wake_en,
- bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl, bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base + OMAP24XX_GPIO_OE);
+ bank->base + bank->regs->wkup_status);
+ __raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl);
+ __raw_writel(bank->context.oe, bank->base + bank->regs->direction);
__raw_writel(bank->context.leveldetect0,
- bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ bank->base + bank->regs->leveldetect0);
__raw_writel(bank->context.leveldetect1,
- bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ bank->base + bank->regs->leveldetect1);
__raw_writel(bank->context.risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ bank->base + bank->regs->risingdetect);
__raw_writel(bank->context.fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout,
- bank->base + OMAP24XX_GPIO_DATAOUT);
+ bank->base + bank->regs->fallingdetect);
+ __raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
}
#endif
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 12/20] gpio/omap: cleanup set_gpio_triggering function
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (10 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 11/20] gpio/omap: remove hardcoded offsets in ctxt save/restore Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 13/20] gpio/omap: cleanup omap_gpio_mod_init function Tarun Kanti DebBarma
` (7 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
Also, use wkup_status register consistently instead of referring to wakeup
clear and wakeup set register offsets.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 2 +
arch/arm/mach-omap1/gpio16xx.c | 3 +
arch/arm/mach-omap1/gpio7xx.c | 2 +
arch/arm/mach-omap2/gpio.c | 4 +
arch/arm/plat-omap/include/plat/gpio.h | 3 +
drivers/gpio/gpio-omap.c | 152 ++++++++------------------------
6 files changed, 52 insertions(+), 114 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index e8a3bd9..fd2fe8f 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqstatus = OMAP1510_GPIO_INT_STATUS,
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
+ .irqctrl = OMAP1510_GPIO_INT_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 0bc5032..08dda3c 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -90,6 +91,8 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
.wkup_status = OMAP1610_GPIO_WAKEUPENABLE,
+ .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
+ .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index f5d5572..6e439ff 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT / 2,
.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
.irqenable_inv = true,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.irqstatus = OMAP7XX_GPIO_INT_STATUS,
.irqenable = OMAP7XX_GPIO_INT_MASK,
.irqenable_inv = true,
+ .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 0ee9a55..c99eea4 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -82,6 +82,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
+ pdata->regs->irqctrl = 0;
+ pdata->regs->edgectrl1 = 0;
+ pdata->regs->edgectrl2 = 0;
+
switch (oh->class->rev) {
case 0:
if (id == 1)
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 0ad4f49..4f584de 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -195,6 +195,9 @@ struct omap_gpio_reg_offs {
u16 leveldetect1;
u16 risingdetect;
u16 fallingdetect;
+ u16 irqctrl;
+ u16 edgectrl1;
+ u16 edgectrl2;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index d93f8cd..5b32bbf 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -199,49 +199,25 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
__raw_writel(val, reg);
}
-#ifdef CONFIG_ARCH_OMAP2PLUS
-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
+static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
int trigger)
{
void __iomem *base = bank->base;
u32 gpio_bit = 1 << gpio;
- if (cpu_is_omap44xx()) {
- _gpio_rmw(base, OMAP4_GPIO_LEVELDETECT0, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_LOW);
- _gpio_rmw(base, OMAP4_GPIO_LEVELDETECT1, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_HIGH);
- _gpio_rmw(base, OMAP4_GPIO_RISINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_RISING);
- _gpio_rmw(base, OMAP4_GPIO_FALLINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_FALLING);
- } else {
- _gpio_rmw(base, OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_LOW);
- _gpio_rmw(base, OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_HIGH);
- _gpio_rmw(base, OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_RISING);
- _gpio_rmw(base, OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_FALLING);
- }
- if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
- if (cpu_is_omap44xx()) {
- _gpio_rmw(base, OMAP4_GPIO_IRQWAKEN0, gpio_bit,
+ _gpio_rmw(base, bank->regs->leveldetect0, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_LOW);
+ _gpio_rmw(base, bank->regs->leveldetect1, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_HIGH);
+ _gpio_rmw(base, bank->regs->risingdetect, gpio_bit,
+ trigger & IRQ_TYPE_EDGE_RISING);
+ _gpio_rmw(base, bank->regs->fallingdetect, gpio_bit,
+ trigger & IRQ_TYPE_EDGE_FALLING);
+
+ if (likely(!(bank->non_wakeup_gpios & gpio_bit)))
+ _gpio_rmw(base, bank->regs->wkup_status, gpio_bit,
trigger != 0);
- } else {
- /*
- * GPIO wakeup request can only be generated on edge
- * transitions
- */
- if (trigger & IRQ_TYPE_EDGE_BOTH)
- __raw_writel(1 << gpio, bank->base
- + OMAP24XX_GPIO_SETWKUENA);
- else
- __raw_writel(1 << gpio, bank->base
- + OMAP24XX_GPIO_CLEARWKUENA);
- }
- }
+
/* This part needs to be executed always for OMAP34xx */
if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
/*
@@ -260,7 +236,6 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
__raw_readl(bank->base + bank->regs->leveldetect0) |
__raw_readl(bank->base + bank->regs->leveldetect1);
}
-#endif
#ifdef CONFIG_ARCH_OMAP1
/*
@@ -272,23 +247,10 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
void __iomem *reg = bank->base;
u32 l = 0;
- switch (bank->method) {
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
- break;
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_CONTROL;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_CONTROL;
- break;
-#endif
- default:
+ if (!bank->regs->irqctrl)
return;
- }
+
+ reg += bank->regs->irqctrl;
l = __raw_readl(reg);
if ((l >> gpio) & 1)
@@ -298,31 +260,21 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
__raw_writel(l, reg);
}
+#else
+static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {}
#endif
static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
{
void __iomem *reg = bank->base;
+ void __iomem *base = bank->base;
u32 l = 0;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
- l = __raw_readl(reg);
- if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
- else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_CONTROL;
+ if (bank->regs->leveldetect0 && bank->regs->wkup_status) {
+ set_gpio_trigger(bank, gpio, trigger);
+ } else if (bank->regs->irqctrl) {
+ reg += bank->regs->irqctrl;
+
l = __raw_readl(reg);
if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
bank->toggle_mask |= 1 << gpio;
@@ -331,15 +283,16 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
else if (trigger & IRQ_TYPE_EDGE_FALLING)
l &= ~(1 << gpio);
else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
+ return -EINVAL;
+
+ __raw_writel(l, reg);
+
+ } else if (bank->regs->edgectrl1) {
if (gpio & 0x08)
- reg += OMAP1610_GPIO_EDGE_CTRL2;
+ reg += bank->regs->edgectrl2;
else
- reg += OMAP1610_GPIO_EDGE_CTRL1;
+ reg += bank->regs->edgectrl1;
+
gpio &= 0x07;
l = __raw_readl(reg);
l &= ~(3 << (gpio << 1));
@@ -347,40 +300,13 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
l |= 2 << (gpio << 1);
if (trigger & IRQ_TYPE_EDGE_FALLING)
l |= 1 << (gpio << 1);
- if (trigger)
- /* Enable wake-up during idle for dynamic tick */
- __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
- else
- __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_CONTROL;
- l = __raw_readl(reg);
- if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
- else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- case METHOD_GPIO_24XX:
- case METHOD_GPIO_44XX:
- set_24xx_gpio_triggering(bank, gpio, trigger);
- return 0;
-#endif
- default:
- goto bad;
+
+ _gpio_rmw(base, bank->regs->wkup_status, 1 << gpio, trigger);
+
+ __raw_writel(l, reg);
}
- __raw_writel(l, reg);
+
return 0;
-bad:
- return -EINVAL;
}
static int gpio_irq_type(struct irq_data *d, unsigned type)
@@ -511,7 +437,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
unsigned long flags;
if (bank->non_wakeup_gpios & gpio_bit) {
- dev_err(bank->dev,
+ dev_err(bank->dev,
"Unable to modify wakeup on non-wakeup GPIO%d\n", gpio);
return -EINVAL;
}
@@ -680,7 +606,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (!(isr & 1))
continue;
-#ifdef CONFIG_ARCH_OMAP1
/*
* Some chips can't respond to both rising and falling
* at the same time. If this irq was requested with
@@ -690,7 +615,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
*/
if (bank->toggle_mask & (1 << gpio_index))
_toggle_gpio_edge_triggering(bank, gpio_index);
-#endif
generic_handle_irq(gpio_irq);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 13/20] gpio/omap: cleanup omap_gpio_mod_init function
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (11 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 12/20] gpio/omap: cleanup set_gpio_triggering function Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-14 5:56 ` Todd Poynor
2011-07-13 13:54 ` [PATCH v4 14/20] gpio/omap: use pinctrl offset instead of macro Tarun Kanti DebBarma
` (6 subsequent siblings)
19 siblings, 1 reply; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
With register offsets now defined for respective OMAP versions we can get rid
of cpu_class_* checks. This function now has common initialization code for
all OMAP versions. Initialization specific to OMAP16xx has been moved within
omap16xx_gpio_init().
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio16xx.c | 21 ++++++++++++-
drivers/gpio/gpio-omap.c | 68 +++++++++------------------------------
2 files changed, 36 insertions(+), 53 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 08dda3c..57f5603 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -218,12 +218,31 @@ static struct __initdata platform_device * omap16xx_gpio_dev[] = {
static int __init omap16xx_gpio_init(void)
{
int i;
+ void __iomem *base;
+ struct resource *res;
+ struct platform_device *pdev;
+ struct omap_gpio_platform_data *pdata;
if (!cpu_is_omap16xx())
return -EINVAL;
- for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
+ for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
+ pdev = omap16xx_gpio_dev[i];
+ pdata = pdev->dev.platform_data;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = ioremap(res->start, resource_size(res));
+
+ __raw_writel(0x0014, base + OMAP1610_GPIO_SYSCONFIG);
+
+ /*
+ * Enable system clock for GPIO module.
+ * The CAM_CLK_CTRL *is* really the right place.
+ */
+ omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
+ ULPD_CAM_CLK_CTRL);
+
platform_device_register(omap16xx_gpio_dev[i]);
+ }
return 0;
}
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 5b32bbf..0da78f3 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -875,62 +875,26 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
*/
static struct lock_class_key gpio_lock_class;
-/* TODO: Cleanup cpu_is_* checks */
static void omap_gpio_mod_init(struct gpio_bank *bank)
{
- if (cpu_class_is_omap2()) {
- if (cpu_is_omap44xx()) {
- __raw_writel(0xffffffff, bank->base +
- OMAP4_GPIO_IRQSTATUSCLR0);
- __raw_writel(0x00000000, bank->base +
- OMAP4_GPIO_DEBOUNCENABLE);
- /* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
- } else if (cpu_is_omap34xx()) {
- __raw_writel(0x00000000, bank->base +
- OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(0xffffffff, bank->base +
- OMAP24XX_GPIO_IRQSTATUS1);
- __raw_writel(0x00000000, bank->base +
- OMAP24XX_GPIO_DEBOUNCE_EN);
-
- /* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
- }
- } else if (cpu_class_is_omap1()) {
- if (bank_is_mpuio(bank)) {
- __raw_writew(0xffff, bank->base +
- OMAP_MPUIO_GPIO_MASKIT / bank->stride);
- mpuio_init(bank);
- }
- if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
- __raw_writew(0xffff, bank->base
- + OMAP1510_GPIO_INT_MASK);
- __raw_writew(0x0000, bank->base
- + OMAP1510_GPIO_INT_STATUS);
- }
- if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
- __raw_writew(0x0000, bank->base
- + OMAP1610_GPIO_IRQENABLE1);
- __raw_writew(0xffff, bank->base
- + OMAP1610_GPIO_IRQSTATUS1);
- __raw_writew(0x0014, bank->base
- + OMAP1610_GPIO_SYSCONFIG);
+ void __iomem *base = bank->base;
+ u32 l = 0xffffffff;
- /*
- * Enable system clock for GPIO module.
- * The CAM_CLK_CTRL *is* really the right place.
- */
- omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
- ULPD_CAM_CLK_CTRL);
- }
- if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
- __raw_writel(0xffffffff, bank->base
- + OMAP7XX_GPIO_INT_MASK);
- __raw_writel(0x00000000, bank->base
- + OMAP7XX_GPIO_INT_STATUS);
- }
+ if (bank_is_mpuio(bank)) {
+ __raw_writel(0xffff, bank->base + bank->regs->irqenable);
+ if (bank->regs->wkup_status)
+ mpuio_init(bank);
+ return;
}
+
+ if (bank->width == 16)
+ l = 0xffff;
+
+ _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv);
+ _gpio_rmw(base, bank->regs->irqstatus, l,
+ bank->regs->irqenable_inv == false);
+ _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->debounce_en != 0);
+ _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->ctrl != 0);
}
static __init void
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 13/20] gpio/omap: cleanup omap_gpio_mod_init function
2011-07-13 13:54 ` [PATCH v4 13/20] gpio/omap: cleanup omap_gpio_mod_init function Tarun Kanti DebBarma
@ 2011-07-14 5:56 ` Todd Poynor
2011-07-14 5:57 ` DebBarma, Tarun Kanti
0 siblings, 1 reply; 25+ messages in thread
From: Todd Poynor @ 2011-07-14 5:56 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jul 13, 2011 at 07:24:12PM +0530, Tarun Kanti DebBarma wrote:
> With register offsets now defined for respective OMAP versions we can get rid
> of cpu_class_* checks. This function now has common initialization code for
> all OMAP versions. Initialization specific to OMAP16xx has been moved within
> omap16xx_gpio_init().
>
...
> - for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
> + for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
> + pdev = omap16xx_gpio_dev[i];
> + pdata = pdev->dev.platform_data;
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + base = ioremap(res->start, resource_size(res));
Should check platform_get_resource and ioremap error returns.
> +
> + __raw_writel(0x0014, base + OMAP1610_GPIO_SYSCONFIG);
Todd
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH v4 13/20] gpio/omap: cleanup omap_gpio_mod_init function
2011-07-14 5:56 ` Todd Poynor
@ 2011-07-14 5:57 ` DebBarma, Tarun Kanti
0 siblings, 0 replies; 25+ messages in thread
From: DebBarma, Tarun Kanti @ 2011-07-14 5:57 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Todd Poynor [mailto:toddpoynor at google.com]
> Sent: Thursday, July 14, 2011 11:26 AM
> To: DebBarma, Tarun Kanti
> Cc: linux-omap at vger.kernel.org; Hilman, Kevin; Shilimkar, Santosh;
> tony at atomide.com; linux-arm-kernel at lists.infradead.org; Varadarajan,
> Charulatha
> Subject: Re: [PATCH v4 13/20] gpio/omap: cleanup omap_gpio_mod_init
> function
>
> On Wed, Jul 13, 2011 at 07:24:12PM +0530, Tarun Kanti DebBarma wrote:
> > With register offsets now defined for respective OMAP versions we can
> get rid
> > of cpu_class_* checks. This function now has common initialization code
> for
> > all OMAP versions. Initialization specific to OMAP16xx has been moved
> within
> > omap16xx_gpio_init().
> >
> ...
> > - for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
> > + for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
> > + pdev = omap16xx_gpio_dev[i];
> > + pdata = pdev->dev.platform_data;
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + base = ioremap(res->start, resource_size(res));
>
>
> Should check platform_get_resource and ioremap error returns.
Ok, thanks.
--
Tarun
>
> > +
> > + __raw_writel(0x0014, base + OMAP1610_GPIO_SYSCONFIG);
>
>
> Todd
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v4 14/20] gpio/omap: use pinctrl offset instead of macro
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (12 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 13/20] gpio/omap: cleanup omap_gpio_mod_init function Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 15/20] gpio/omap: use readl in irq_handler for all access Tarun Kanti DebBarma
` (5 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 1 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio-omap.c | 8 +++-----
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index fd2fe8f..020725f 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -85,6 +85,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
.irqctrl = OMAP1510_GPIO_INT_CONTROL,
+ .pinctrl = OMAP1510_GPIO_PIN_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 4f584de..3a05c58 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -198,6 +198,7 @@ struct omap_gpio_reg_offs {
u16 irqctrl;
u16 edgectrl1;
u16 edgectrl2;
+ u16 pinctrl;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 0da78f3..742c310 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -486,15 +486,13 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
*/
_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
-#ifdef CONFIG_ARCH_OMAP15XX
- if (bank->method == METHOD_GPIO_1510) {
- void __iomem *reg;
+ if (bank->regs->pinctrl) {
+ void __iomem *reg = bank->base + bank->regs->pinctrl;
/* Claim the pin for MPU */
- reg = bank->base + OMAP1510_GPIO_PIN_CONTROL;
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
-#endif
+
if (bank->regs->ctrl && !bank->mod_usage) {
void __iomem *reg = bank->base + bank->regs->ctrl;
u32 ctrl;
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 15/20] gpio/omap: use readl in irq_handler for all access
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (13 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 14/20] gpio/omap: use pinctrl offset instead of macro Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 16/20] gpio/omap: remove bank->method & METHOD_* macros Tarun Kanti DebBarma
` (4 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Even when bank->width is 16, all the OMAP1 registers are 4-byte aligned, so just
use a 4-byte read. The 'enabled' mask is already taking care to mask for bank width.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
drivers/gpio/gpio-omap.c | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 742c310..ef2ad76 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -572,8 +572,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
enabled = _get_gpio_irqbank_mask(bank);
isr_saved = isr = __raw_readl(isr_reg) & enabled;
- if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
- isr &= 0x0000ffff;
if (bank->level_mask)
level_mask = bank->level_mask & enabled;
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 16/20] gpio/omap: remove bank->method & METHOD_* macros
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (14 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 15/20] gpio/omap: use readl in irq_handler for all access Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 17/20] gpio/omap: fix bankwidth for OMAP7xx MPUIO Tarun Kanti DebBarma
` (3 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Signed-off-by: Charulatha V <charu@ti.com>
The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they
need to be handled separately. Identify the same using a flag and remove all
METHOD_* macros.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 3 +--
arch/arm/mach-omap1/gpio16xx.c | 6 +-----
arch/arm/mach-omap1/gpio7xx.c | 8 +-------
arch/arm/mach-omap2/gpio.c | 2 --
arch/arm/plat-omap/include/plat/gpio.h | 8 +-------
drivers/gpio/gpio-omap.c | 14 +++++---------
6 files changed, 9 insertions(+), 32 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 020725f..c51593c 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -47,7 +47,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
+ .is_mpuio = true,
.bank_width = 16,
.bank_stride = 1,
.regs = &omap15xx_mpuio_regs,
@@ -90,7 +90,6 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_1510,
.bank_width = 16,
.regs = &omap15xx_gpio_regs,
};
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 57f5603..8a3e758 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -50,7 +50,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
+ .is_mpuio = true,
.bank_width = 16,
.bank_stride = 1,
.regs = &omap16xx_mpuio_regs,
@@ -97,7 +97,6 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = &omap16xx_gpio_regs,
};
@@ -127,7 +126,6 @@ static struct __initdata resource omap16xx_gpio2_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 16,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = &omap16xx_gpio_regs,
};
@@ -157,7 +155,6 @@ static struct __initdata resource omap16xx_gpio3_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
.virtual_irq_start = IH_GPIO_BASE + 32,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = &omap16xx_gpio_regs,
};
@@ -187,7 +184,6 @@ static struct __initdata resource omap16xx_gpio4_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
.virtual_irq_start = IH_GPIO_BASE + 48,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = &omap16xx_gpio_regs,
};
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 6e439ff..91a7691 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -52,8 +52,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
.bank_width = 32,
+ .is_mpuio = true,
.bank_stride = 2,
.regs = &omap7xx_mpuio_regs,
};
@@ -94,7 +94,6 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_7XX,
.bank_width = 32,
.regs = &omap7xx_gpio_regs,
};
@@ -124,7 +123,6 @@ static struct __initdata resource omap7xx_gpio2_resources[] = {
static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 32,
- .bank_type = METHOD_GPIO_7XX,
.bank_width = 32,
.regs = &omap7xx_gpio_regs,
};
@@ -154,7 +152,6 @@ static struct __initdata resource omap7xx_gpio3_resources[] = {
static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {
.virtual_irq_start = IH_GPIO_BASE + 64,
- .bank_type = METHOD_GPIO_7XX,
.bank_width = 32,
.regs = &omap7xx_gpio_regs,
};
@@ -184,7 +181,6 @@ static struct __initdata resource omap7xx_gpio4_resources[] = {
static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {
.virtual_irq_start = IH_GPIO_BASE + 96,
- .bank_type = METHOD_GPIO_7XX,
.bank_width = 32,
.regs = &omap7xx_gpio_regs,
};
@@ -214,7 +210,6 @@ static struct __initdata resource omap7xx_gpio5_resources[] = {
static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {
.virtual_irq_start = IH_GPIO_BASE + 128,
- .bank_type = METHOD_GPIO_7XX,
.bank_width = 32,
.regs = &omap7xx_gpio_regs,
};
@@ -244,7 +239,6 @@ static struct __initdata resource omap7xx_gpio6_resources[] = {
static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {
.virtual_irq_start = IH_GPIO_BASE + 160,
- .bank_type = METHOD_GPIO_7XX,
.bank_width = 32,
.regs = &omap7xx_gpio_regs,
};
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index c99eea4..1e72a56 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -97,7 +97,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
/* fall through */
case 1:
- pdata->bank_type = METHOD_GPIO_24XX;
pdata->regs->revision = OMAP24XX_GPIO_REVISION;
pdata->regs->direction = OMAP24XX_GPIO_OE;
pdata->regs->datain = OMAP24XX_GPIO_DATAIN;
@@ -120,7 +119,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
break;
case 2:
- pdata->bank_type = METHOD_GPIO_44XX;
pdata->regs->revision = OMAP4_GPIO_REVISION;
pdata->regs->direction = OMAP4_GPIO_OE;
pdata->regs->datain = OMAP4_GPIO_DATAIN;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 3a05c58..acb5e2c 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -162,13 +162,6 @@
IH_MPUIO_BASE + ((nr) & 0x0f) : \
IH_GPIO_BASE + (nr))
-#define METHOD_MPUIO 0
-#define METHOD_GPIO_1510 1
-#define METHOD_GPIO_1610 2
-#define METHOD_GPIO_7XX 3
-#define METHOD_GPIO_24XX 5
-#define METHOD_GPIO_44XX 6
-
struct omap_gpio_dev_attr {
int bank_width; /* GPIO bank width */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
@@ -210,6 +203,7 @@ struct omap_gpio_platform_data {
int bank_stride; /* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
bool loses_context; /* whether the bank would ever lose context */
+ bool is_mpuio; /* whether the bank is of type MPUIO */
u32 non_wakeup_gpios;
struct omap_gpio_reg_offs *regs;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index ef2ad76..4191555 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -49,7 +49,6 @@ struct gpio_bank {
void __iomem *base;
u16 irq;
u16 virtual_irq_start;
- int method;
u32 suspend_wakeup;
u32 saved_wakeup;
u32 non_wakeup_gpios;
@@ -66,6 +65,7 @@ struct gpio_bank {
u32 mod_usage;
u32 dbck_enable_mask;
struct device *dev;
+ bool is_mpuio;
bool dbck_flag;
bool loses_context;
int stride;
@@ -755,10 +755,6 @@ static inline void mpuio_init(struct gpio_bank *bank)
/*---------------------------------------------------------------------*/
-/* REVISIT these are stupid implementations! replace by ones that
- * don't switch on METHOD_* and which mostly avoid spinlocks
- */
-
static int gpio_input(struct gpio_chip *chip, unsigned offset)
{
struct gpio_bank *bank;
@@ -876,7 +872,7 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
void __iomem *base = bank->base;
u32 l = 0xffffffff;
- if (bank_is_mpuio(bank)) {
+ if (bank->is_mpuio) {
__raw_writel(0xffff, bank->base + bank->regs->irqenable);
if (bank->regs->wkup_status)
mpuio_init(bank);
@@ -935,7 +931,7 @@ static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
bank->chip.set_debounce = gpio_debounce;
bank->chip.set = gpio_set;
bank->chip.to_irq = gpio_2irq;
- if (bank_is_mpuio(bank)) {
+ if (bank->is_mpuio) {
bank->chip.label = "mpuio";
if (bank->regs->wkup_status)
bank->chip.dev = &omap_mpuio_device.dev;
@@ -953,7 +949,7 @@ static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
j < bank->virtual_irq_start + bank->width; j++) {
irq_set_lockdep_class(j, &gpio_lock_class);
irq_set_chip_data(j, bank);
- if (bank_is_mpuio(bank)) {
+ if (bank->is_mpuio) {
omap_mpuio_alloc_gc(bank, j, bank->width);
} else {
irq_set_chip(j, &gpio_irq_chip);
@@ -997,11 +993,11 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
pdata = pdev->dev.platform_data;
bank->virtual_irq_start = pdata->virtual_irq_start;
- bank->method = pdata->bank_type;
bank->dev = &pdev->dev;
bank->dbck_flag = pdata->dbck_flag;
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
+ bank->is_mpuio = pdata->is_mpuio;
bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
bank->loses_context = pdata->loses_context;
bank->get_context_loss_count = pdata->get_context_loss_count;
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 17/20] gpio/omap: fix bankwidth for OMAP7xx MPUIO
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (15 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 16/20] gpio/omap: remove bank->method & METHOD_* macros Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 18/20] gpio/omap: use pm-runtime framework Tarun Kanti DebBarma
` (2 subsequent siblings)
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
In all OMAP1 SoCs, the MPUIO bank width is 16 bits. But, in OMAP7xx,
it is wrongly initialised to 32. Fix this.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio7xx.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 91a7691..65949c8 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -52,8 +52,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_width = 32,
.is_mpuio = true,
+ .bank_width = 16,
.bank_stride = 2,
.regs = &omap7xx_mpuio_regs,
};
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 18/20] gpio/omap: use pm-runtime framework
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (16 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 17/20] gpio/omap: fix bankwidth for OMAP7xx MPUIO Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-14 6:09 ` Todd Poynor
2011-07-13 13:54 ` [PATCH v4 19/20] gpio/omap: optimize suspend and resume functions Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 20/20] gpio/omap: cleanup prepare_for_idle and resume_after_idle Tarun Kanti DebBarma
19 siblings, 1 reply; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put_sync()
for enabling/disabling clocks appropriately. Remove syscore_ops and
instead use dev_pm_ops now.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
drivers/gpio/gpio-omap.c | 99 ++++++++++++++++++++++++++++++++++++----------
1 files changed, 78 insertions(+), 21 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 4191555..3f1b992 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -79,6 +79,8 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
};
+static void omap_gpio_mod_init(struct gpio_bank *bank);
+
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
#define GPIO_MOD_CTRL_BIT BIT(0)
@@ -479,6 +481,22 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
+ /*
+ * If this is the first gpio_request for the bank,
+ * enable the bank module.
+ */
+ if (!bank->mod_usage) {
+ if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0)) {
+ dev_err(bank->dev, "%s: GPIO bank %d "
+ "pm_runtime_get_sync failed\n",
+ __func__, bank->id);
+ return -EINVAL;
+ }
+
+ /* Initialize the gpio bank registers to init time value */
+ omap_gpio_mod_init(bank);
+ }
+
spin_lock_irqsave(&bank->lock, flags);
/* Set trigger to none. You need to enable the desired trigger with
@@ -536,6 +554,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
_reset_gpio(bank, bank->chip.base + offset);
spin_unlock_irqrestore(&bank->lock, flags);
+
+ /*
+ * If this is the last gpio to be freed in the bank,
+ * disable the bank module.
+ */
+ if (!bank->mod_usage) {
+ if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0)) {
+ dev_err(bank->dev, "%s: GPIO bank %d "
+ "pm_runtime_put_sync failed\n",
+ __func__, bank->id);
+ }
+ }
}
/*
@@ -560,6 +590,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
chained_irq_enter(chip, desc);
bank = irq_get_handler_data(irq);
+
+ pm_runtime_get_sync(bank->dev);
+
isr_reg = bank->base + bank->regs->irqstatus;
if (WARN_ON(!isr_reg))
@@ -622,6 +655,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
exit:
if (!unmasked)
chained_irq_exit(chip, desc);
+
+ pm_runtime_put_sync(bank->dev);
}
static void gpio_irq_shutdown(struct irq_data *d)
@@ -1028,12 +1063,25 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
}
pm_runtime_enable(bank->dev);
- pm_runtime_get_sync(bank->dev);
+ pm_runtime_irq_safe(bank->dev);
+ if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0)) {
+ dev_err(bank->dev, "%s: GPIO bank %d pm_runtime_get_sync "
+ "failed\n", __func__, bank->id);
+ iounmap(bank->base);
+ return -EINVAL;
+ }
omap_gpio_mod_init(bank);
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
+ if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0)) {
+ dev_err(bank->dev, "%s: GPIO bank %d pm_runtime_put_sync "
+ "failed\n", __func__, bank->id);
+ iounmap(bank->base);
+ return -EINVAL;
+ }
+
list_add_tail(&bank->node, &omap_gpio_list);
return ret;
@@ -1044,10 +1092,12 @@ err_exit:
return ret;
}
-static int omap_gpio_suspend(void)
+static int omap_gpio_suspend(struct device *dev)
{
struct gpio_bank *bank;
+ pm_runtime_get_sync(dev);
+
list_for_each_entry(bank, &omap_gpio_list, node) {
void __iomem *base = bank->base;
void __iomem *wake_status;
@@ -1065,30 +1115,33 @@ static int omap_gpio_suspend(void)
spin_unlock_irqrestore(&bank->lock, flags);
}
+ pm_runtime_put_sync(dev);
+
return 0;
}
-static void omap_gpio_resume(void)
+static int omap_gpio_resume(struct device *dev)
{
struct gpio_bank *bank;
+ pm_runtime_get_sync(dev);
+
list_for_each_entry(bank, &omap_gpio_list, node) {
void __iomem *base = bank->base;
unsigned long flags;
if (!bank->regs->wkup_status)
- return;
+ return 0;
spin_lock_irqsave(&bank->lock, flags);
_gpio_rmw(base, bank->regs->wkup_status, bank->saved_wakeup, 1);
spin_unlock_irqrestore(&bank->lock, flags);
}
-}
-static struct syscore_ops omap_gpio_syscore_ops = {
- .suspend = omap_gpio_suspend,
- .resume = omap_gpio_resume,
-};
+ pm_runtime_put_sync(dev);
+
+ return 0;
+}
#ifdef CONFIG_ARCH_OMAP2PLUS
@@ -1112,6 +1165,11 @@ void omap2_gpio_prepare_for_idle(int off_mode)
if (!off_mode)
continue;
+ if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0))
+ dev_err(bank->dev, "%s: GPIO bank %d "
+ "pm_runtime_put_sync failed\n",
+ __func__, bank->id);
+
/* If going to OFF, remove triggering for all
* non-wakeup GPIOs. Otherwise spurious IRQs will be
* generated. See OMAP2420 Errata item 1.101. */
@@ -1152,6 +1210,11 @@ void omap2_gpio_resume_after_idle(void)
if (!bank->loses_context)
continue;
+ if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0))
+ dev_err(bank->dev, "%s: GPIO bank %d "
+ "pm_runtime_get_sync failed\n",
+ __func__, bank->id);
+
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
@@ -1267,10 +1330,16 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)
}
#endif
+static const struct dev_pm_ops gpio_pm_ops = {
+ .suspend = omap_gpio_suspend,
+ .resume = omap_gpio_resume,
+};
+
static struct platform_driver omap_gpio_driver = {
.probe = omap_gpio_probe,
.driver = {
.name = "omap_gpio",
+ .pm = &gpio_pm_ops,
},
};
@@ -1285,15 +1354,3 @@ static int __init omap_gpio_drv_reg(void)
}
postcore_initcall(omap_gpio_drv_reg);
-static int __init omap_gpio_sysinit(void)
-{
-
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
- if (cpu_is_omap16xx() || cpu_class_is_omap2())
- register_syscore_ops(&omap_gpio_syscore_ops);
-#endif
-
- return 0;
-}
-
-arch_initcall(omap_gpio_sysinit);
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 18/20] gpio/omap: use pm-runtime framework
2011-07-13 13:54 ` [PATCH v4 18/20] gpio/omap: use pm-runtime framework Tarun Kanti DebBarma
@ 2011-07-14 6:09 ` Todd Poynor
2011-07-14 7:22 ` DebBarma, Tarun Kanti
0 siblings, 1 reply; 25+ messages in thread
From: Todd Poynor @ 2011-07-14 6:09 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jul 13, 2011 at 07:24:17PM +0530, Tarun Kanti DebBarma wrote:
> From: Charulatha V <charu@ti.com>
>
> Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put_sync()
> for enabling/disabling clocks appropriately. Remove syscore_ops and
> instead use dev_pm_ops now.
>
...
> + /*
> + * If this is the first gpio_request for the bank,
> + * enable the bank module.
> + */
> + if (!bank->mod_usage) {
> + if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0)) {
> + dev_err(bank->dev, "%s: GPIO bank %d "
> + "pm_runtime_get_sync failed\n",
> + __func__, bank->id);
> + return -EINVAL;
> + }
> +
> + /* Initialize the gpio bank registers to init time value */
> + omap_gpio_mod_init(bank);
> + }
> +
> spin_lock_irqsave(&bank->lock, flags);
Does the check for first gpio_request and omap_gpio_mod_init() call
need concurrency protection, possibly moved under the spinlock?
>
> /* Set trigger to none. You need to enable the desired trigger with
> @@ -536,6 +554,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
>
> _reset_gpio(bank, bank->chip.base + offset);
> spin_unlock_irqrestore(&bank->lock, flags);
> +
> + /*
> + * If this is the last gpio to be freed in the bank,
> + * disable the bank module.
> + */
> + if (!bank->mod_usage) {
> + if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0)) {
> + dev_err(bank->dev, "%s: GPIO bank %d "
> + "pm_runtime_put_sync failed\n",
> + __func__, bank->id);
> + }
> + }
And need mutual exclusion here?
Todd
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH v4 18/20] gpio/omap: use pm-runtime framework
2011-07-14 6:09 ` Todd Poynor
@ 2011-07-14 7:22 ` DebBarma, Tarun Kanti
0 siblings, 0 replies; 25+ messages in thread
From: DebBarma, Tarun Kanti @ 2011-07-14 7:22 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Todd Poynor [mailto:toddpoynor at google.com]
> Sent: Thursday, July 14, 2011 11:40 AM
> To: DebBarma, Tarun Kanti
> Cc: linux-omap at vger.kernel.org; Hilman, Kevin; Shilimkar, Santosh;
> tony at atomide.com; linux-arm-kernel at lists.infradead.org; Varadarajan,
> Charulatha
> Subject: Re: [PATCH v4 18/20] gpio/omap: use pm-runtime framework
>
> On Wed, Jul 13, 2011 at 07:24:17PM +0530, Tarun Kanti DebBarma wrote:
> > From: Charulatha V <charu@ti.com>
> >
> > Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put_sync()
> > for enabling/disabling clocks appropriately. Remove syscore_ops and
> > instead use dev_pm_ops now.
> >
> ...
> > + /*
> > + * If this is the first gpio_request for the bank,
> > + * enable the bank module.
> > + */
> > + if (!bank->mod_usage) {
> > + if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0)) {
> > + dev_err(bank->dev, "%s: GPIO bank %d "
> > + "pm_runtime_get_sync failed\n",
> > + __func__, bank->id);
> > + return -EINVAL;
> > + }
> > +
> > + /* Initialize the gpio bank registers to init time value */
> > + omap_gpio_mod_init(bank);
> > + }
> > +
> > spin_lock_irqsave(&bank->lock, flags);
>
> Does the check for first gpio_request and omap_gpio_mod_init() call
> need concurrency protection, possibly moved under the spinlock?
I believe, with pm_runtime_irq_safe() already in place, we could move
them including *_get_sync() under spinlock.
>
> >
> > /* Set trigger to none. You need to enable the desired trigger with
> > @@ -536,6 +554,18 @@ static void omap_gpio_free(struct gpio_chip *chip,
> unsigned offset)
> >
> > _reset_gpio(bank, bank->chip.base + offset);
> > spin_unlock_irqrestore(&bank->lock, flags);
> > +
> > + /*
> > + * If this is the last gpio to be freed in the bank,
> > + * disable the bank module.
> > + */
> > + if (!bank->mod_usage) {
> > + if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0)) {
> > + dev_err(bank->dev, "%s: GPIO bank %d "
> > + "pm_runtime_put_sync failed\n",
> > + __func__, bank->id);
> > + }
> > + }
>
> And need mutual exclusion here?
Yes.
I will verify and take action. Thanks.
--
Tarun
>
>
> Todd
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v4 19/20] gpio/omap: optimize suspend and resume functions
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (17 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 18/20] gpio/omap: use pm-runtime framework Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
2011-07-13 13:54 ` [PATCH v4 20/20] gpio/omap: cleanup prepare_for_idle and resume_after_idle Tarun Kanti DebBarma
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
There is no need to operate on all the banks every time the function is called.
Just operate on the current bank passed by the framework.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
drivers/gpio/gpio-omap.c | 53 +++++++++++++++++++++------------------------
1 files changed, 25 insertions(+), 28 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 3f1b992..47e5e20 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1062,6 +1062,8 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
goto err_free;
}
+ platform_set_drvdata(pdev, bank);
+
pm_runtime_enable(bank->dev);
pm_runtime_irq_safe(bank->dev);
if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0)) {
@@ -1094,26 +1096,23 @@ err_exit:
static int omap_gpio_suspend(struct device *dev)
{
- struct gpio_bank *bank;
-
- pm_runtime_get_sync(dev);
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ void __iomem *base = bank->base;
+ void __iomem *wake_status;
+ unsigned long flags;
- list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *base = bank->base;
- void __iomem *wake_status;
- unsigned long flags;
+ if (!bank->regs->wkup_status || !bank->suspend_wakeup)
+ return 0;
- if (!bank->regs->wkup_status)
- return 0;
+ wake_status = bank->base + bank->regs->wkup_status;
- wake_status = bank->base + bank->regs->wkup_status;
+ pm_runtime_get_sync(dev);
- spin_lock_irqsave(&bank->lock, flags);
- bank->saved_wakeup = __raw_readl(wake_status);
- _gpio_rmw(base, bank->regs->wkup_status,
- bank->suspend_wakeup, 1);
- spin_unlock_irqrestore(&bank->lock, flags);
- }
+ spin_lock_irqsave(&bank->lock, flags);
+ bank->saved_wakeup = __raw_readl(wake_status);
+ _gpio_rmw(base, bank->regs->wkup_status, bank->suspend_wakeup, 1);
+ spin_unlock_irqrestore(&bank->lock, flags);
pm_runtime_put_sync(dev);
@@ -1122,21 +1121,19 @@ static int omap_gpio_suspend(struct device *dev)
static int omap_gpio_resume(struct device *dev)
{
- struct gpio_bank *bank;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ void __iomem *base = bank->base;
+ unsigned long flags;
- pm_runtime_get_sync(dev);
+ if (!bank->regs->wkup_status || !bank->saved_wakeup)
+ return 0;
- list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *base = bank->base;
- unsigned long flags;
-
- if (!bank->regs->wkup_status)
- return 0;
+ pm_runtime_get_sync(dev);
- spin_lock_irqsave(&bank->lock, flags);
- _gpio_rmw(base, bank->regs->wkup_status, bank->saved_wakeup, 1);
- spin_unlock_irqrestore(&bank->lock, flags);
- }
+ spin_lock_irqsave(&bank->lock, flags);
+ _gpio_rmw(base, bank->regs->wkup_status, bank->saved_wakeup, 1);
+ spin_unlock_irqrestore(&bank->lock, flags);
pm_runtime_put_sync(dev);
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH v4 20/20] gpio/omap: cleanup prepare_for_idle and resume_after_idle
2011-07-13 13:53 [PATCH v4 00/20] gpio/omap: driver cleanup and fixes Tarun Kanti DebBarma
` (18 preceding siblings ...)
2011-07-13 13:54 ` [PATCH v4 19/20] gpio/omap: optimize suspend and resume functions Tarun Kanti DebBarma
@ 2011-07-13 13:54 ` Tarun Kanti DebBarma
19 siblings, 0 replies; 25+ messages in thread
From: Tarun Kanti DebBarma @ 2011-07-13 13:54 UTC (permalink / raw)
To: linux-arm-kernel
Simplify omap2_gpio_prepare_for_idle() and omap2_gpio_resume_after_idle()
by moving most of the stuff to *_pm_runtime_suspend() and *_pm_runtime_resume().
Also, omap_gpio_suspend() and omap_gpio_resume() optimized to operate per
GPIO bank instead of operating on entire list every time.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio-omap.c | 234 ++++++++++++++++++++++++---------------------
1 files changed, 125 insertions(+), 109 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 47e5e20..32281f6 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1145,142 +1145,153 @@ static int omap_gpio_resume(struct device *dev)
static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
-void omap2_gpio_prepare_for_idle(int off_mode)
+static int omap_gpio_runtime_suspend(struct device *dev)
{
- struct gpio_bank *bank;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ u32 l1 = 0, l2 = 0;
+ int j;
- list_for_each_entry(bank, &omap_gpio_list, node) {
- u32 l1 = 0, l2 = 0;
- int j;
+ for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
+ clk_disable(bank->dbck);
- if (!bank->loses_context)
- continue;
+ /* If going to OFF, remove triggering for all
+ * non-wakeup GPIOs. Otherwise spurious IRQs will be
+ * generated. See OMAP2420 Errata item 1.101. */
+ if (!(bank->enabled_non_wakeup_gpios))
+ goto save_gpio_ctx;
- for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
- clk_disable(bank->dbck);
+ bank->saved_datain = __raw_readl(bank->base +
+ bank->regs->datain);
+ l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
+ l2 = __raw_readl(bank->base + bank->regs->risingdetect);
- if (!off_mode)
- continue;
+ bank->saved_fallingdetect = l1;
+ bank->saved_risingdetect = l2;
+ l1 &= ~bank->enabled_non_wakeup_gpios;
+ l2 &= ~bank->enabled_non_wakeup_gpios;
- if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0))
- dev_err(bank->dev, "%s: GPIO bank %d "
- "pm_runtime_put_sync failed\n",
- __func__, bank->id);
+ __raw_writel(l1, bank->base + bank->regs->fallingdetect);
+ __raw_writel(l2, bank->base + bank->regs->risingdetect);
+
+save_gpio_ctx:
+ if (bank->get_context_loss_count)
+ bank->ctx_loss_count = bank->get_context_loss_count(bank->dev);
+ omap_gpio_save_context(bank);
+
+ return 0;
+}
+
+static int omap_gpio_runtime_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ u32 ctx_lost_cnt_after;
+ u32 l = 0, gen, gen0, gen1;
+ int j;
+
+ for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
+ clk_enable(bank->dbck);
- /* If going to OFF, remove triggering for all
- * non-wakeup GPIOs. Otherwise spurious IRQs will be
- * generated. See OMAP2420 Errata item 1.101. */
- if (!(bank->enabled_non_wakeup_gpios))
- goto save_gpio_ctx;
+ if (bank->get_context_loss_count) {
+ ctx_lost_cnt_after =
+ bank->get_context_loss_count(bank->dev);
+ if (ctx_lost_cnt_after != bank->ctx_loss_count ||
+ !ctx_lost_cnt_after)
+ omap_gpio_restore_context(bank);
+ }
- bank->saved_datain = __raw_readl(bank->base +
- bank->regs->datain);
- l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
- l2 = __raw_readl(bank->base + bank->regs->risingdetect);
+ if (!(bank->enabled_non_wakeup_gpios))
+ return 0;
- bank->saved_fallingdetect = l1;
- bank->saved_risingdetect = l2;
- l1 &= ~bank->enabled_non_wakeup_gpios;
- l2 &= ~bank->enabled_non_wakeup_gpios;
+ __raw_writel(bank->saved_fallingdetect,
+ bank->base + bank->regs->fallingdetect);
+ __raw_writel(bank->saved_risingdetect,
+ bank->base + bank->regs->risingdetect);
+ l = __raw_readl(bank->base + bank->regs->datain);
- __raw_writel(l1, bank->base + bank->regs->fallingdetect);
- __raw_writel(l2, bank->base + bank->regs->risingdetect);
+ /* Check if any of the non-wakeup interrupt GPIOs have changed
+ * state. If so, generate an IRQ by software. This is
+ * horribly racy, but it's the best we can do to work around
+ * this silicon bug. */
+ l ^= bank->saved_datain;
+ l &= bank->enabled_non_wakeup_gpios;
-save_gpio_ctx:
- if (bank->get_context_loss_count)
- bank->ctx_loss_count =
- bank->get_context_loss_count(bank->dev);
+ /*
+ * No need to generate IRQs for the rising edge for gpio IRQs
+ * configured with falling edge only; and vice versa.
+ */
+ gen0 = l & bank->saved_fallingdetect;
+ gen0 &= bank->saved_datain;
+ gen1 = l & bank->saved_risingdetect;
+ gen1 &= ~(bank->saved_datain);
+
+ /* FIXME: Consider GPIO IRQs with level detections properly! */
+ gen = l & (~(bank->saved_fallingdetect) &
+ ~(bank->saved_risingdetect));
+ /* Consider all GPIO IRQs needed to be updated */
+ gen |= gen0 | gen1;
+
+ if (gen) {
+ u32 old0, old1;
+
+ old0 = __raw_readl(bank->base +
+ bank->regs->leveldetect0);
+ old1 = __raw_readl(bank->base +
+ bank->regs->leveldetect1);
+
+ __raw_writel(old0, bank->base +
+ bank->regs->leveldetect0);
+ __raw_writel(old1, bank->base +
+ bank->regs->leveldetect1);
+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
+ old0 |= gen;
+ old1 |= gen;
+ }
- omap_gpio_save_context(bank);
+ if (cpu_is_omap44xx()) {
+ old0 |= l;
+ old1 |= l;
+ }
+ __raw_writel(old0, bank->base +
+ bank->regs->leveldetect0);
+ __raw_writel(old1, bank->base +
+ bank->regs->leveldetect1);
}
+
+ return 0;
}
-void omap2_gpio_resume_after_idle(void)
+void omap2_gpio_prepare_for_idle(int off_mode)
{
struct gpio_bank *bank;
- list_for_each_entry(bank, &omap_gpio_list, node) {
- u32 ctx_lost_cnt_after;
- u32 l = 0, gen, gen0, gen1;
- int j;
+ if (!off_mode)
+ return;
- if (!bank->loses_context)
+ list_for_each_entry(bank, &omap_gpio_list, node) {
+ if (!bank->mod_usage || !bank->loses_context)
continue;
- if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0))
+ if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0))
dev_err(bank->dev, "%s: GPIO bank %d "
- "pm_runtime_get_sync failed\n",
+ "pm_runtime_put_sync failed\n",
__func__, bank->id);
+ }
+}
- for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
- clk_enable(bank->dbck);
-
- if (bank->get_context_loss_count) {
- ctx_lost_cnt_after =
- bank->get_context_loss_count(bank->dev);
- if (ctx_lost_cnt_after != bank->ctx_loss_count ||
- !ctx_lost_cnt_after)
- omap_gpio_restore_context(bank);
- }
+void omap2_gpio_resume_after_idle(void)
+{
+ struct gpio_bank *bank;
- if (!(bank->enabled_non_wakeup_gpios))
+ list_for_each_entry(bank, &omap_gpio_list, node) {
+ if (!bank->mod_usage || !bank->loses_context)
continue;
- __raw_writel(bank->saved_fallingdetect,
- bank->base + bank->regs->fallingdetect);
- __raw_writel(bank->saved_risingdetect,
- bank->base + bank->regs->risingdetect);
- l = __raw_readl(bank->base + bank->regs->datain);
-
- /* Check if any of the non-wakeup interrupt GPIOs have changed
- * state. If so, generate an IRQ by software. This is
- * horribly racy, but it's the best we can do to work around
- * this silicon bug. */
- l ^= bank->saved_datain;
- l &= bank->enabled_non_wakeup_gpios;
-
- /*
- * No need to generate IRQs for the rising edge for gpio IRQs
- * configured with falling edge only; and vice versa.
- */
- gen0 = l & bank->saved_fallingdetect;
- gen0 &= bank->saved_datain;
-
- gen1 = l & bank->saved_risingdetect;
- gen1 &= ~(bank->saved_datain);
-
- /* FIXME: Consider GPIO IRQs with level detections properly! */
- gen = l & (~(bank->saved_fallingdetect) &
- ~(bank->saved_risingdetect));
- /* Consider all GPIO IRQs needed to be updated */
- gen |= gen0 | gen1;
-
- if (gen) {
- u32 old0, old1;
-
- old0 = __raw_readl(bank->base +
- bank->regs->leveldetect0);
- old1 = __raw_readl(bank->base +
- bank->regs->leveldetect1);
-
- __raw_writel(old0, bank->base +
- bank->regs->leveldetect0);
- __raw_writel(old1, bank->base +
- bank->regs->leveldetect1);
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- old0 |= gen;
- old1 |= gen;
- }
-
- if (cpu_is_omap44xx()) {
- old0 |= l;
- old1 |= l;
- }
- __raw_writel(old0, bank->base +
- bank->regs->leveldetect0);
- __raw_writel(old1, bank->base +
- bank->regs->leveldetect1);
- }
+ if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0))
+ dev_err(bank->dev, "%s: GPIO bank %d "
+ "pm_runtime_get_sync failed\n",
+ __func__, bank->id);
}
}
@@ -1325,9 +1336,14 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)
bank->base + bank->regs->fallingdetect);
__raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
}
+#else
+#define omap_gpio_runtime_suspend NULL
+#define omap_gpio_runtime_resume NULL
#endif
static const struct dev_pm_ops gpio_pm_ops = {
+ .runtime_suspend = omap_gpio_runtime_suspend,
+ .runtime_resume = omap_gpio_runtime_resume,
.suspend = omap_gpio_suspend,
.resume = omap_gpio_resume,
};
--
1.6.0.4
^ permalink raw reply related [flat|nested] 25+ messages in thread