From: broonie@opensource.wolfsonmicro.com (Mark Brown)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RESEND] ASoC: sgtl5000: fix cache handling
Date: Wed, 3 Aug 2011 08:52:37 +0900 [thread overview]
Message-ID: <20110802235236.GB30717@opensource.wolfsonmicro.com> (raw)
In-Reply-To: <1312306939-5140-1-git-send-email-w.sang@pengutronix.de>
On Tue, Aug 02, 2011 at 07:42:19PM +0200, Wolfram Sang wrote:
> Cache handling in this driver is broken. The chip has 16-bit registers, yet the
> register numbers also increase by 2 per register, i.e. there are only
> even-numbered registers. The cache in this driver, though, simply increments
> register numbers, so it does need some mapping as seen in
> sgtl5000_restore_regs(), note the '>> 1':
Applied, thanks.
prev parent reply other threads:[~2011-08-02 23:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-02 17:42 [PATCH RESEND] ASoC: sgtl5000: fix cache handling Wolfram Sang
2011-08-02 20:11 ` Liam Girdwood
2011-08-02 23:52 ` Mark Brown [this message]
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