From: jamie@jamieiles.com (Jamie Iles)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 00/10] ARM: perf: updates for 3.2
Date: Tue, 9 Aug 2011 10:54:34 +0100 [thread overview]
Message-ID: <20110809095434.GE3210@pulham.picochip.com> (raw)
In-Reply-To: <20110809094234.GA3242@e102144-lin.cambridge.arm.com>
On Tue, Aug 09, 2011 at 10:42:34AM +0100, Will Deacon wrote:
> On Tue, Aug 09, 2011 at 10:35:05AM +0100, Jamie Iles wrote:
> > Hi Will,
>
> Hi Jamie,
>
> > On Mon, Aug 08, 2011 at 06:16:01PM +0100, Will Deacon wrote:
> > > Hello,
> > >
> > > This patch series contains a number of updates to the ARM PMU and perf
> > > code so that we can support mode exclusion, which is new in debug
> > > architecture 7.1 (as implemented by the Cortex-A15). Some of these
> > > updates also coincide with work to support System PMUs (PMUs that are
> > > not affine to a single CPU) but that is a larger body of work which will
> > > be posted separately at a later date.
> > >
> > > The patches do the following:
> > >
> > > 1.) Greatly simplify the PMU reservation mechanism so that the
> > > handling of platform_devices is moved into perf.
> > > 2.) Cleans up the interrupt registration and some of the types used
> > > to represent events and registers.
> > > 3.) Moves event indexing to start from zero rather than one, making
> > > the code more readable and also easier to extend for mode
> > > exclusion.
> > > 4.) Adds support for mode exclusion (user / kernel / hyp) and
> > > implements this for Cortex-A15.
> > >
> > > I've been running these patches since 3.0, so they've been tested on
> > > 1176, 11MPCore, Cortex-A5, Cortex-A9 and Cortex-A15 platforms.
> >
> > A quick glance through them and they all look nice to me, but I can't
> > get them to apply to any tree (next and master). It looks like they're
> > based on a tree with changes to the v7 perf support so I'm guessing it's
> > your patches with A15 support.
>
> Thanks for taking a look. The patches should just apply against -rc1:
>
> http://www.linux-arm.org/git?p=linux-2.6-wd.git;a=shortlog;h=refs/heads/perf-updates
Yes, you're quite right. I seem to have lost patches 1 and 4. Probably
finger trouble on my part!
Anyhow, I've pulled from your git tree and they appear to work nicely,
so:
Acked-by: Jamie Iles <jamie@jamieiles.com>
Jamie
next prev parent reply other threads:[~2011-08-09 9:54 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-08 17:16 [PATCH 00/10] ARM: perf: updates for 3.2 Will Deacon
2011-08-08 17:16 ` [PATCH 01/10] ARM: perf: de-const struct arm_pmu Will Deacon
2011-08-08 17:16 ` [PATCH 02/10] ARM: PMU: move CPU PMU platform device handling and init into perf Will Deacon
2011-08-08 17:16 ` [PATCH 03/10] ARM: perf: use cpumask_t to record active IRQs Will Deacon
2011-08-08 17:16 ` [PATCH 04/10] ARM: perf: use u32 instead of unsigned long for PMNC register Will Deacon
2011-08-08 17:16 ` [PATCH 05/10] ARM: perf: use integers for ARMv7 event indices Will Deacon
2011-08-08 17:16 ` [PATCH 06/10] ARM: perf: index ARMv7 event counters starting from zero Will Deacon
2011-08-08 17:16 ` [PATCH 07/10] ARM: perf: index Xscale and ARMv6 " Will Deacon
2011-08-08 17:16 ` [PATCH 08/10] ARM: perf: index PMU registers " Will Deacon
2011-08-08 17:16 ` [PATCH 09/10] ARM: perf: allow armpmu to implement mode exclusion Will Deacon
2011-08-08 17:16 ` [PATCH 10/10] ARM: perf: add mode exclusion for Cortex-A15 PMU Will Deacon
[not found] ` <CAKHPGBZ1eXzhsjFvLt_KTYKsR_OH7rgbeSGedTY5g8dhi90uzQ@mail.gmail.com>
2011-08-25 3:09 ` Ashwin Chaugule
2011-08-25 9:51 ` Will Deacon
2011-08-09 9:35 ` [PATCH 00/10] ARM: perf: updates for 3.2 Jamie Iles
2011-08-09 9:42 ` Will Deacon
2011-08-09 9:54 ` Jamie Iles [this message]
2011-08-09 10:01 ` Will Deacon
2011-08-09 10:14 ` Jean Pihet
2011-08-09 10:52 ` Will Deacon
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