[RFC PATCH 00/12] arm/tegra: Initialize GPIO & pinmux from DT

[RFC PATCH 00/12] arm/tegra: Initialize GPIO & pinmux from DT

[Stephen Warren]

This patch modifies Tegra's device tree support to remove the dependency
on harmony_pinmux_init(), thus making it completely board-independent.

Some notes:

* This series is built on top of linux-next with a bunch of patches
  applied, in particular the removal of irq_to_gpio and custom gpio_to_irq
  that I'm in the process of sending to Russell. I haven't yet thought
  through how/where to merge this without causing all kinds of conflicts.

* I took care to preserve bisectability of Tegra DT support. However,
  linux-next doesn't yet have entirely useful Tegra DT support; some stuff
  from Grant's devicetree/next hasn't been pushed into linux-next yet. If
  we don't care about bisectability, I can remove a couple commits and
  possibly squash some others.

* The approach taken here is to have a custom semantic SoC-specific
  binding for each the gpio and pinmux drivers. Other alternatives
  suggested included:

  1) A generic "list of register writes" to be performed at boot. This has
     the advantage of reusability across different SoCs. However, this
     approach isn't semantic, and requires detailed knowledge of pinmux
     registers and potentially fiddly calculations when constructing the
     device tree.

  2) The ability to define disabled child nodes of the pinmux controller
     that are not processed by tegra_pinmux_probe_dt(). Other devices may
     refer to those using phandles, and later enable/disable them, thus
     representing dynamic pinmuxing in the device tree. I wasn't convinced
     whether we should represent dynamic pinmuxing using phandles.

  I discussed in more detail why I prefer the current proposal in various
  email threads.

* tegra_pinmux_probe_dt() enumerates all legal pingroup names, and searches
  for a pinmux controller subnode of that name, then processes each one
  that is found. An alternative that some may prefer would be to enumerate
  each child node of the pinmux controller, and have each node contain an
  explicit pingroup name property instead. Does anyone have any preference
  here? I suppose the latter option would obviate the need to add
  of_find_child_node_by_name().

Thanks for reading!

Stephen Warren (12):
  dt: Add of_find_child_node_by_name()
  arm/tegra: Prep boards for gpio/pinmux conversion to pdevs
  arm/tegra: Avoid duplicate gpio/pinmux devices with dt
  arm/tegra: board-dt: Add AUXDATA for tegra-gpio and tegra-pinmux
  arm/dt: Tegra: Add nvidia,gpios property to GPIO controller
  arm/dt: Tegra: Add pinmux node
  gpio/tegra: Convert to a platform device
  gpio/tegra: Add device tree support
  arm/tegra: Convert pinmux driver to a platform device
  arm/tegra: Add device tree support to pinmux driver
  arm/tegra: board-dt: Remove dependency on non-dt pinmux functions
  arm/tegra: Remove temporary gpio/pinmux registration workaround

 arch/arm/boot/dts/tegra-harmony.dts          |  479 ++++++++++++++++++++++++++
 arch/arm/boot/dts/tegra-seaboard.dts         |  409 ++++++++++++++++++++++
 arch/arm/boot/dts/tegra20.dtsi               |    5 +
 arch/arm/mach-tegra/Makefile                 |    1 -
 arch/arm/mach-tegra/board-dt.c               |   12 +-
 arch/arm/mach-tegra/board-harmony-pinmux.c   |    8 +
 arch/arm/mach-tegra/board-paz00-pinmux.c     |    8 +
 arch/arm/mach-tegra/board-seaboard-pinmux.c  |    9 +-
 arch/arm/mach-tegra/board-trimslice-pinmux.c |    7 +
 arch/arm/mach-tegra/devices.c                |   10 +
 arch/arm/mach-tegra/devices.h                |    2 +
 arch/arm/mach-tegra/pinmux.c                 |  136 ++++++++
 drivers/gpio/gpio-tegra.c                    |   56 +++-
 drivers/of/base.c                            |   18 +
 include/linux/of.h                           |    2 +
 15 files changed, 1138 insertions(+), 24 deletions(-)

[RFC PATCH 01/12] dt: Add of_find_child_node_by_name()

[Stephen Warren]

This function retrieves a named child node of a given parent node.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 drivers/of/base.c  |   18 ++++++++++++++++++
 include/linux/of.h |    2 ++
 2 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index 3ff22e3..7eea9e3 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -388,6 +388,24 @@ struct device_node *of_find_node_by_name(struct device_node *from,
 }
 EXPORT_SYMBOL(of_find_node_by_name);
 
+struct device_node *of_find_child_node_by_name(
+	const struct device_node *parent, const char *name)
+{
+	struct device_node *child;
+
+	read_lock(&devtree_lock);
+
+	for_each_child_of_node(parent, child) {
+		if (!strcmp(child->name, name))
+			break;
+	}
+
+	read_unlock(&devtree_lock);
+
+	return child;
+}
+EXPORT_SYMBOL(of_find_child_node_by_name);
+
 /**
  *	of_find_node_by_type - Find a node by its "device_type" property
  *	@from:	The node to start searching from, or NULL to start searching
diff --git a/include/linux/of.h b/include/linux/of.h
index 9180dc5..032c71b 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -161,6 +161,8 @@ extern struct device_node *of_find_node_by_name(struct device_node *from,
 #define for_each_node_by_name(dn, name) \
 	for (dn = of_find_node_by_name(NULL, name); dn; \
 	     dn = of_find_node_by_name(dn, name))
+extern struct device_node *of_find_child_node_by_name(
+	const struct device_node *node, const char *name);
 extern struct device_node *of_find_node_by_type(struct device_node *from,
 	const char *type);
 #define for_each_node_by_type(dn, type) \
-- 
1.7.0.4

[RFC PATCH 02/12] arm/tegra: Prep boards for gpio/pinmux conversion to pdevs

[Stephen Warren]

The Tegra GPIO driver will be converted from static registration via
postcore_initcall() to be a platform device later in this patch series.
A new Tegra pinmux platform device will also be added.

Prepare for this by modifying all boards to register the appropriate
platform devices before-hand, so that when the drivers are converted,
those devices will be probed, and git bisectability will be maintained.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/board-harmony-pinmux.c   |    8 ++++++++
 arch/arm/mach-tegra/board-paz00-pinmux.c     |    8 ++++++++
 arch/arm/mach-tegra/board-seaboard-pinmux.c  |    9 +++++++--
 arch/arm/mach-tegra/board-trimslice-pinmux.c |    7 +++++++
 arch/arm/mach-tegra/devices.c                |   10 ++++++++++
 arch/arm/mach-tegra/devices.h                |    2 ++
 6 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 4d63e2e..e99b456 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -20,6 +20,7 @@
 
 #include "gpio-names.h"
 #include "board-harmony.h"
+#include "devices.h"
 
 static struct tegra_pingroup_config harmony_pinmux[] = {
 	{TEGRA_PINGROUP_ATA,   TEGRA_MUX_IDE,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
@@ -140,6 +141,11 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
 	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
 };
 
+static struct platform_device *pinmux_devices[] = {
+	&tegra_gpio_device,
+	&tegra_pinmux_device,
+};
+
 static struct tegra_gpio_table gpio_table[] = {
 	{ .gpio = TEGRA_GPIO_SD2_CD,		.enable = true	},
 	{ .gpio = TEGRA_GPIO_SD2_WP,		.enable = true	},
@@ -155,6 +161,8 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void harmony_pinmux_init(void)
 {
+	platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+
 	tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
 
 	tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index bdd2627..43633f4 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -20,6 +20,7 @@
 
 #include "gpio-names.h"
 #include "board-paz00.h"
+#include "devices.h"
 
 static struct tegra_pingroup_config paz00_pinmux[] = {
 	{TEGRA_PINGROUP_ATA,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
@@ -140,6 +141,11 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
 	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
 };
 
+static struct platform_device *pinmux_devices[] = {
+	&tegra_gpio_device,
+	&tegra_pinmux_device,
+};
+
 static struct tegra_gpio_table gpio_table[] = {
 	{ .gpio = TEGRA_GPIO_SD1_CD,	.enable = true },
 	{ .gpio = TEGRA_GPIO_SD1_WP,	.enable = true },
@@ -149,6 +155,8 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void paz00_pinmux_init(void)
 {
+	platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+
 	tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
 
 	tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index 74f78b7..f092298 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -21,6 +21,7 @@
 
 #include "gpio-names.h"
 #include "board-seaboard.h"
+#include "devices.h"
 
 #define DEFAULT_DRIVE(_name)					\
 	{							\
@@ -157,8 +158,10 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
 	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
 };
 
-
-
+static struct platform_device *pinmux_devices[] = {
+	&tegra_gpio_device,
+	&tegra_pinmux_device,
+};
 
 static struct tegra_gpio_table gpio_table[] = {
 	{ .gpio = TEGRA_GPIO_SD2_CD,		.enable = true },
@@ -173,6 +176,8 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void __init seaboard_pinmux_init(void)
 {
+	platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+
 	tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
 
 	tegra_drive_pinmux_config_table(seaboard_drive_pinmux,
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index bcb1916..4969dd2 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -21,6 +21,7 @@
 
 #include "gpio-names.h"
 #include "board-trimslice.h"
+#include "devices.h"
 
 static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
 	{TEGRA_PINGROUP_ATA,   TEGRA_MUX_IDE,           TEGRA_PUPD_NORMAL,	TEGRA_TRI_TRISTATE},
@@ -141,6 +142,11 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
 	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
 };
 
+static struct platform_device *pinmux_devices[] = {
+	&tegra_gpio_device,
+	&tegra_pinmux_device,
+};
+
 static struct tegra_gpio_table gpio_table[] = {
 	{ .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true	}, /* mmc4 cd */
 	{ .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true	}, /* mmc4 wp */
@@ -151,6 +157,7 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void __init trimslice_pinmux_init(void)
 {
+	platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
 	tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
 	tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
 }
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 57e35d2..48262bf 100644
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -31,6 +31,16 @@
 #include <mach/usb_phy.h>
 #include "gpio-names.h"
 
+struct platform_device tegra_gpio_device = {
+	.name		= "tegra-gpio",
+	.id		= -1,
+};
+
+struct platform_device tegra_pinmux_device = {
+	.name		= "tegra-pinmux",
+	.id		= -1,
+};
+
 static struct resource i2c_resource1[] = {
 	[0] = {
 		.start	= INT_I2C,
diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h
index 4a7dc0a..873ecb2 100644
--- a/arch/arm/mach-tegra/devices.h
+++ b/arch/arm/mach-tegra/devices.h
@@ -21,6 +21,8 @@
 
 #include <linux/platform_device.h>
 
+extern struct platform_device tegra_gpio_device;
+extern struct platform_device tegra_pinmux_device;
 extern struct platform_device tegra_sdhci_device1;
 extern struct platform_device tegra_sdhci_device2;
 extern struct platform_device tegra_sdhci_device3;
-- 
1.7.0.4

[RFC PATCH 03/12] arm/tegra: Avoid duplicate gpio/pinmux devices with dt

[Stephen Warren]

A future change will set up complete gpio and pinmux platform device
registration in device-tree files, via board-dt.c. When board-dt.c calls
into harmony/seaboard_pinmux_init(), this will cause a duplicate
registration of those platform devices, which will kernel boot failure.

To solve this, modify  so that it only
registers the platform devices when actually running on Harmony; when
board-dt.c is in use, a different machine type is used.

This change is a temporary measure to ensure git bisectability. It will
be reverted when board-dt.c no longer calls harmony/seaboard_pinmux_init().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/board-harmony-pinmux.c  |    5 ++++-
 arch/arm/mach-tegra/board-seaboard-pinmux.c |    5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index e99b456..130018d 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -14,6 +14,8 @@
  *
  */
 
+#include <asm/mach-types.h>
+
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 #include <mach/pinmux.h>
@@ -161,7 +163,8 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void harmony_pinmux_init(void)
 {
-	platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+	if (machine_is_harmony())
+		platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
 
 	tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
 
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index f092298..bc4dc17 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -12,6 +12,8 @@
  *
  */
 
+#include <asm/mach-types.h>
+
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
@@ -176,7 +178,8 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void __init seaboard_pinmux_init(void)
 {
-	platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+	if (machine_is_seaboard())
+		platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
 
 	tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
 
-- 
1.7.0.4

[RFC PATCH 04/12] arm/tegra: board-dt: Add AUXDATA for tegra-gpio and tegra-pinmux

[Stephen Warren]

Add AUXDATA so that Tegra GPIO and pinmux devices that are instantiated
from device-tree are named consistently with the static platform devices
in mach-tegra/devices.c. Note that the device-tree file tegra20.dtsi
already includes a node for the Tegra GPIO controller, whereas the node
for the Tegra pinmux controller will be added in a subsequent commit.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/board-dt.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index 9f47e04..1995b79 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -50,6 +50,8 @@ void seaboard_pinmux_init(void);
 
 
 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
+	OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
+	OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE, "tegra-pinmux", NULL),
 	OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
 	OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
 	OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
-- 
1.7.0.4

[RFC PATCH 05/12] arm/dt: Tegra: Add nvidia, gpios property to GPIO controller

[Stephen Warren]

Add board-specific gpio node for Harmony and Seaboard. This lists the
GPIOs used by the board. Note that not all GPIOs that exist on the board
are listed; only those used by devices currently supported by device
tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/boot/dts/tegra-harmony.dts  |   15 +++++++++++++++
 arch/arm/boot/dts/tegra-seaboard.dts |    8 ++++++++
 2 files changed, 23 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 4c05334..c9bb847 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -15,6 +15,21 @@
 		reg = < 0x00000000 0x40000000 >;
 	};
 
+	gpio: gpio at 6000d000 {
+		nvidia,gpios = <
+			69	// TEGRA_GPIO_PI5 SD2_CD
+			57	// TEGRA_GPIO_PH1 SD2_WP
+			155	// TEGRA_GPIO_PT3 SD2_POWER
+			58	// TEGRA_GPIO_PH2 SD4_CD
+			59	// TEGRA_GPIO_PH3 SD4_WP
+			70	// TEGRA_GPIO_PI6 SD4_POWER
+			187	// TEGRA_GPIO_PX3 CDC_IRQ
+			178	// TEGRA_GPIO_PW2 HP_DET
+			184	// TEGRA_GPIO_PX0 INT_MIC_EN
+			185	// TEGRA_GPIO_PX1 EXT_MIC_EN
+		>;
+	};
+
 	i2c at 7000c000 {
 		clock-frequency = <400000>;
 
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 1940cae..b0d44a5 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -16,6 +16,14 @@
 		reg = < 0x00000000 0x40000000 >;
 	};
 
+	gpio: gpio at 6000d000 {
+		nvidia,gpios = <
+			69 // TEGRA_GPIO_PI5 SD2_CD
+			57 // TEGRA_GPIO_PH1 SD2_WP
+			70 // TEGRA_GPIO_PI6 SD2_POWER
+		>;
+	};
+
 	serial at 70006300 {
 		clock-frequency = < 216000000 >;
 	};
-- 
1.7.0.4

[RFC PATCH 06/12] arm/dt: Tegra: Add pinmux node

[Stephen Warren]

Add a pinmux node to tegra20.dtsi in order to instantiate the future
pinmux device. Add pinmux nodes to Harmony and Seaboard, which detail
the entire default pinmux configuration. This configuration is identical
to that in board-harmony/seaboard-pinmux.c.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/boot/dts/tegra-harmony.dts  |  464 ++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/tegra-seaboard.dts |  401 +++++++++++++++++++++++++++++
 arch/arm/boot/dts/tegra20.dtsi       |    5 +
 3 files changed, 870 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index c9bb847..066a338 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -30,6 +30,470 @@
 		>;
 	};
 
+	pinmux: pinmux at 70000000 {
+		ATA {
+			nvidia,function = "IDE";
+		};
+		ATB {
+			nvidia,function = "SDIO4";
+		};
+		ATC {
+			nvidia,function = "NAND";
+		};
+		ATD {
+			nvidia,function = "GMI";
+		};
+		ATE {
+			nvidia,function = "GMI";
+		};
+		CDEV1 {
+			nvidia,function = "PLLA_OUT";
+		};
+		CDEV2 {
+			nvidia,function = "PLLP_OUT4";
+			nvidia,pull = "down";
+			nvidia,tristate;
+		};
+		CRTP {
+			nvidia,function = "CRT";
+			nvidia,tristate;
+		};
+		CSUS {
+			nvidia,function = "VI_SENSOR_CLK";
+			nvidia,pull = "down";
+			nvidia,tristate;
+		};
+		DAP1 {
+			nvidia,function = "DAP1";
+		};
+		DAP2 {
+			nvidia,function = "DAP2";
+			nvidia,tristate;
+		};
+		DAP3 {
+			nvidia,function = "DAP3";
+			nvidia,tristate;
+		};
+		DAP4 {
+			nvidia,function = "DAP4";
+			nvidia,tristate;
+		};
+		DDC {
+			nvidia,function = "I2C2";
+			nvidia,pull = "up";
+		};
+		DTA {
+			nvidia,function = "SDIO2";
+			nvidia,pull = "up";
+		};
+		DTB {
+			nvidia,function = "RSVD1";
+		};
+		DTC {
+			nvidia,function = "RSVD1";
+			nvidia,tristate;
+		};
+		DTD {
+			nvidia,function = "SDIO2";
+			nvidia,pull = "up";
+		};
+		DTE {
+			nvidia,function = "RSVD1";
+			nvidia,tristate;
+		};
+		DTF {
+			nvidia,function = "I2C3";
+			nvidia,tristate;
+		};
+		GMA {
+			nvidia,function = "SDIO4";
+		};
+		GMB {
+			nvidia,function = "GMI";
+		};
+		GMC {
+			nvidia,function = "UARTD";
+		};
+		GMD {
+			nvidia,function = "GMI";
+		};
+		GME {
+			nvidia,function = "SDIO4";
+		};
+		GPU {
+			nvidia,function = "GMI";
+			nvidia,tristate;
+		};
+		GPU7 {
+			nvidia,function = "RTCK";
+		};
+		GPV {
+			nvidia,function = "PCIE";
+			nvidia,tristate;
+		};
+		HDINT {
+			nvidia,function = "HDMI";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		I2CP {
+			nvidia,function = "I2C";
+		};
+		IRRX {
+			nvidia,function = "UARTA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		IRTX {
+			nvidia,function = "UARTA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		KBCA {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCB {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCC {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCD {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCE {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCF {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		LCSN {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LD0 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD1 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD10 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD11 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD12 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD13 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD14 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD15 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD16 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD17 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD2 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD3 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD4 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD5 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD6 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD7 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD8 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LD9 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LDC {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LDI {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LHP0 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LHP1 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LHP2 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LHS {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+		};
+		LM0 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+		};
+		LM1 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LPP {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LPW0 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+		};
+		LPW1 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LPW2 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+		};
+		LSC0 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+		};
+		LSC1 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LSCK {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LSDA {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LSDI {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LSPI {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+		};
+		LVP0 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		LVP1 {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "down";
+		};
+		LVS {
+			nvidia,function = "DISPLAYA";
+			nvidia,pull = "up";
+		};
+		OWC {
+			nvidia,function = "RSVD2";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		PMC {
+			nvidia,function = "PWR_ON";
+		};
+		PTA {
+			nvidia,function = "HDMI";
+		};
+		RM {
+			nvidia,function = "I2C";
+		};
+		SDB {
+			nvidia,function = "PWM";
+			nvidia,tristate;
+		};
+		SDC {
+			nvidia,function = "PWM";
+			nvidia,pull = "up";
+		};
+		SDD {
+			nvidia,function = "PWM";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		SDIO1 {
+			nvidia,function = "SDIO1";
+			nvidia,tristate;
+		};
+		SLXA {
+			nvidia,function = "PCIE";
+			nvidia,tristate;
+		};
+		SLXC {
+			nvidia,function = "SPDIF";
+			nvidia,tristate;
+		};
+		SLXD {
+			nvidia,function = "SPDIF";
+			nvidia,tristate;
+		};
+		SLXK {
+			nvidia,function = "PCIE";
+			nvidia,tristate;
+		};
+		SPDI {
+			nvidia,function = "RSVD2";
+			nvidia,tristate;
+		};
+		SPDO {
+			nvidia,function = "RSVD2";
+			nvidia,tristate;
+		};
+		SPIA {
+			nvidia,function = "GMI";
+		};
+		SPIB {
+			nvidia,function = "GMI";
+		};
+		SPIC {
+			nvidia,function = "GMI";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		SPID {
+			nvidia,function = "SPI1";
+			nvidia,pull = "down";
+			nvidia,tristate;
+		};
+		SPIE {
+			nvidia,function = "SPI1";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		SPIF {
+			nvidia,function = "SPI1";
+			nvidia,pull = "down";
+			nvidia,tristate;
+		};
+		SPIG {
+			nvidia,function = "SPI2_ALT";
+			nvidia,tristate;
+		};
+		SPIH {
+			nvidia,function = "SPI2_ALT";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		UAA {
+			nvidia,function = "ULPI";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		UAB {
+			nvidia,function = "ULPI";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		UAC {
+			nvidia,function = "RSVD2";
+			nvidia,tristate;
+		};
+		UAD {
+			nvidia,function = "IRDA";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		UCA {
+			nvidia,function = "UARTC";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		UCB {
+			nvidia,function = "UARTC";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		UDA {
+			nvidia,function = "ULPI";
+			nvidia,tristate;
+		};
+		CK32 {
+			nvidia,function = "NONE";
+		};
+		DDRC {
+			nvidia,function = "NONE";
+		};
+		PMCA {
+			nvidia,function = "NONE";
+		};
+		PMCB {
+			nvidia,function = "NONE";
+		};
+		PMCC {
+			nvidia,function = "NONE";
+		};
+		PMCD {
+			nvidia,function = "NONE";
+		};
+		PMCE {
+			nvidia,function = "NONE";
+		};
+		XM2C {
+			nvidia,function = "NONE";
+		};
+		XM2D {
+			nvidia,function = "NONE";
+		};
+	};
+
 	i2c at 7000c000 {
 		clock-frequency = <400000>;
 
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index b0d44a5..7ac3ab3 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -24,6 +24,407 @@
 		>;
 	};
 
+	pinmux: pinmux at 70000000 {
+		ATA {
+			nvidia,function = "IDE";
+		};
+		ATB {
+			nvidia,function = "SDIO4";
+		};
+		ATC {
+			nvidia,function = "NAND";
+		};
+		ATD {
+			nvidia,function = "GMI";
+		};
+		ATE {
+			nvidia,function = "GMI";
+			nvidia,tristate;
+		};
+		CDEV1 {
+			nvidia,function = "PLLA_OUT";
+		};
+		CDEV2 {
+			nvidia,function = "PLLP_OUT4";
+		};
+		CRTP {
+			nvidia,function = "CRT";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		CSUS {
+			nvidia,function = "VI_SENSOR_CLK";
+			nvidia,tristate;
+		};
+		DAP1 {
+			nvidia,function = "DAP1";
+		};
+		DAP2 {
+			nvidia,function = "DAP2";
+		};
+		DAP3 {
+			nvidia,function = "DAP3";
+			nvidia,tristate;
+		};
+		DAP4 {
+			nvidia,function = "DAP4";
+		};
+		DDC {
+			nvidia,function = "RSVD2";
+			nvidia,tristate;
+		};
+		DTA {
+			nvidia,function = "VI";
+			nvidia,pull = "down";
+		};
+		DTB {
+			nvidia,function = "VI";
+			nvidia,pull = "down";
+		};
+		DTC {
+			nvidia,function = "VI";
+			nvidia,pull = "down";
+		};
+		DTD {
+			nvidia,function = "VI";
+			nvidia,pull = "down";
+		};
+		DTE {
+			nvidia,function = "VI";
+			nvidia,pull = "down";
+			nvidia,tristate;
+		};
+		DTF {
+			nvidia,function = "I2C3";
+		};
+		GMA {
+			nvidia,function = "SDIO4";
+		};
+		GMB {
+			nvidia,function = "GMI";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		GMC {
+			nvidia,function = "UARTD";
+		};
+		GMD {
+			nvidia,function = "SFLASH";
+		};
+		GME {
+			nvidia,function = "SDIO4";
+		};
+		GPU {
+			nvidia,function = "PWM";
+		};
+		GPU7 {
+			nvidia,function = "RTCK";
+		};
+		GPV {
+			nvidia,function = "PCIE";
+			nvidia,tristate;
+		};
+		HDINT {
+			nvidia,function = "HDMI";
+			nvidia,tristate;
+		};
+		I2CP {
+			nvidia,function = "I2C";
+		};
+		IRRX {
+			nvidia,function = "UARTB";
+		};
+		IRTX {
+			nvidia,function = "UARTB";
+		};
+		KBCA {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCB {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCC {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCD {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCE {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		KBCF {
+			nvidia,function = "KBC";
+			nvidia,pull = "up";
+		};
+		LCSN {
+			nvidia,function = "RSVD4";
+			nvidia,tristate;
+		};
+		LD0 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD1 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD10 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD11 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD12 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD13 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD14 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD15 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD16 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD17 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD2 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD3 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD4 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD5 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD6 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD7 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD8 {
+			nvidia,function = "DISPLAYA";
+		};
+		LD9 {
+			nvidia,function = "DISPLAYA";
+		};
+		LDC {
+			nvidia,function = "RSVD4";
+			nvidia,tristate;
+		};
+		LDI {
+			nvidia,function = "DISPLAYA";
+		};
+		LHP0 {
+			nvidia,function = "DISPLAYA";
+		};
+		LHP1 {
+			nvidia,function = "DISPLAYA";
+		};
+		LHP2 {
+			nvidia,function = "DISPLAYA";
+		};
+		LHS {
+			nvidia,function = "DISPLAYA";
+		};
+		LM0 {
+			nvidia,function = "RSVD4";
+		};
+		LM1 {
+			nvidia,function = "CRT";
+			nvidia,tristate;
+		};
+		LPP {
+			nvidia,function = "DISPLAYA";
+		};
+		LPW0 {
+			nvidia,function = "HDMI";
+		};
+		LPW1 {
+			nvidia,function = "RSVD4";
+			nvidia,tristate;
+		};
+		LPW2 {
+			nvidia,function = "HDMI";
+		};
+		LSC0 {
+			nvidia,function = "DISPLAYA";
+		};
+		LSC1 {
+			nvidia,function = "HDMI";
+			nvidia,tristate;
+		};
+		LSCK {
+			nvidia,function = "HDMI";
+			nvidia,tristate;
+		};
+		LSDA {
+			nvidia,function = "HDMI";
+			nvidia,tristate;
+		};
+		LSDI {
+			nvidia,function = "RSVD4";
+			nvidia,tristate;
+		};
+		LSPI {
+			nvidia,function = "DISPLAYA";
+		};
+		LVP0 {
+			nvidia,function = "RSVD4";
+			nvidia,tristate;
+		};
+		LVP1 {
+			nvidia,function = "DISPLAYA";
+		};
+		LVS {
+			nvidia,function = "DISPLAYA";
+		};
+		OWC {
+			nvidia,function = "RSVD2";
+			nvidia,tristate;
+		};
+		PMC {
+			nvidia,function = "PWR_ON";
+		};
+		PTA {
+			nvidia,function = "HDMI";
+		};
+		RM {
+			nvidia,function = "I2C";
+		};
+		SDB {
+			nvidia,function = "SDIO3";
+		};
+		SDC {
+			nvidia,function = "SDIO3";
+		};
+		SDD {
+			nvidia,function = "SDIO3";
+		};
+		SDIO1 {
+			nvidia,function = "SDIO1";
+			nvidia,pull = "up";
+		};
+		SLXA {
+			nvidia,function = "PCIE";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		SLXC {
+			nvidia,function = "SPDIF";
+			nvidia,tristate;
+		};
+		SLXD {
+			nvidia,function = "SPDIF";
+		};
+		SLXK {
+			nvidia,function = "PCIE";
+		};
+		SPDI {
+			nvidia,function = "RSVD2";
+		};
+		SPDO {
+			nvidia,function = "RSVD2";
+		};
+		SPIA {
+			nvidia,function = "GMI";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		SPIB {
+			nvidia,function = "GMI";
+			nvidia,tristate;
+		};
+		SPIC {
+			nvidia,function = "GMI";
+			nvidia,pull = "up";
+		};
+		SPID {
+			nvidia,function = "SPI1";
+			nvidia,tristate;
+		};
+		SPIE {
+			nvidia,function = "SPI1";
+			nvidia,tristate;
+		};
+		SPIF {
+			nvidia,function = "SPI1";
+			nvidia,pull = "down";
+			nvidia,tristate;
+		};
+		SPIG {
+			nvidia,function = "SPI2_ALT";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		SPIH {
+			nvidia,function = "SPI2_ALT";
+			nvidia,pull = "up";
+			nvidia,tristate;
+		};
+		UAA {
+			nvidia,function = "ULPI";
+			nvidia,pull = "up";
+		};
+		UAB {
+			nvidia,function = "ULPI";
+			nvidia,pull = "up";
+		};
+		UAC {
+			nvidia,function = "RSVD2";
+		};
+		UAD {
+			nvidia,function = "IRDA";
+		};
+		UCA {
+			nvidia,function = "UARTC";
+		};
+		UCB {
+			nvidia,function = "UARTC";
+		};
+		UDA {
+			nvidia,function = "ULPI";
+		};
+		CK32 {
+			nvidia,function = "NONE";
+		};
+		DDRC {
+			nvidia,function = "NONE";
+		};
+		PMCA {
+			nvidia,function = "NONE";
+		};
+		PMCB {
+			nvidia,function = "NONE";
+		};
+		PMCC {
+			nvidia,function = "NONE";
+		};
+		PMCD {
+			nvidia,function = "NONE";
+		};
+		PMCE {
+			nvidia,function = "NONE";
+		};
+		XM2C {
+			nvidia,function = "NONE";
+		};
+		XM2D {
+			nvidia,function = "NONE";
+		};
+	};
+
 	serial at 70006300 {
 		clock-frequency = < 216000000 >;
 	};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 5727595..5921c1d 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -77,6 +77,11 @@
 		gpio-controller;
 	};
 
+	pinmux: pinmux at 70000000 {
+		compatible = "nvidia,tegra20-pinmux";
+		reg = < 0x70000000 0xc00 >;
+	};
+
 	serial at 70006000 {
 		compatible = "nvidia,tegra20-uart";
 		reg = <0x70006000 0x40>;
-- 
1.7.0.4

[RFC PATCH 07/12] gpio/tegra: Convert to a platform device

[Stephen Warren]

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 drivers/gpio/gpio-tegra.c |   25 ++++++++++++++-----------
 1 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index df64536..4da4839 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -20,10 +20,10 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-
 #include <linux/io.h>
 #include <linux/gpio.h>
 #include <linux/of.h>
+#include <linux/platform_device.h>
 
 #include <asm/mach/irq.h>
 
@@ -332,7 +332,7 @@ static struct irq_chip tegra_gpio_irq_chip = {
  */
 static struct lock_class_key gpio_lock_class;
 
-static int __init tegra_gpio_init(void)
+static int __init tegra_gpio_probe(struct platform_device *pdev)
 {
 	struct tegra_gpio_bank *bank;
 	int gpio;
@@ -346,15 +346,6 @@ static int __init tegra_gpio_init(void)
 		}
 	}
 
-#ifdef CONFIG_OF_GPIO
-	/*
-	 * This isn't ideal, but it gets things hooked up until this
-	 * driver is converted into a platform_device
-	 */
-	tegra_gpio_chip.of_node = of_find_compatible_node(NULL, NULL,
-						"nvidia,tegra20-gpio");
-#endif /* CONFIG_OF_GPIO */
-
 	gpiochip_add(&tegra_gpio_chip);
 
 	for (gpio = 0; gpio < TEGRA_NR_GPIOS; gpio++) {
@@ -383,6 +374,18 @@ static int __init tegra_gpio_init(void)
 	return 0;
 }
 
+static struct platform_driver tegra_gpio_driver = {
+	.driver		= {
+		.name	= "tegra-gpio",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= tegra_gpio_probe,
+};
+
+static int __init tegra_gpio_init(void)
+{
+	return platform_driver_register(&tegra_gpio_driver);
+}
 postcore_initcall(tegra_gpio_init);
 
 void __init tegra_gpio_config(struct tegra_gpio_table *table, int num)
-- 
1.7.0.4

[RFC PATCH 08/12] gpio/tegra: Add device tree support

[Stephen Warren]

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 drivers/gpio/gpio-tegra.c |   31 +++++++++++++++++++++++++++++++
 1 files changed, 31 insertions(+), 0 deletions(-)

diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 4da4839..923b413 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -326,6 +326,29 @@ static struct irq_chip tegra_gpio_irq_chip = {
 #endif
 };
 
+#ifdef CONFIG_OF
+static void __init tegra_gpio_probe_dt(struct platform_device *pdev)
+{
+	const __be32 *gpios;
+	u32 gpioslen;
+	int i;
+
+	gpios = of_get_property(pdev->dev.of_node, "nvidia,gpios", &gpioslen);
+	if (gpios == NULL)
+		return;
+
+	gpioslen /= sizeof(*gpios);
+	for (i = 0; i < gpioslen; i++, gpios++) {
+		u32 gpio = be32_to_cpup(gpios);
+		dev_err(&pdev->dev, "Enabling GPIO %d\n", gpio);
+		tegra_gpio_enable(gpio);
+	}
+}
+#else
+static inline void __init tegra_gpio_probe_dt(struct platform_device *pdev)
+{
+}
+#endif
 
 /* This lock class tells lockdep that GPIO irqs are in a different
  * category than their parents, so it won't report false recursion.
@@ -371,13 +394,21 @@ static int __init tegra_gpio_probe(struct platform_device *pdev)
 			spin_lock_init(&bank->lvl_lock[j]);
 	}
 
+	tegra_gpio_probe_dt(pdev);
+
 	return 0;
 }
 
+static struct of_device_id tegra_gpio_of_match[] __devinitdata = {
+	{ .compatible = "nvidia,tegra20-gpio", },
+	{ },
+};
+
 static struct platform_driver tegra_gpio_driver = {
 	.driver		= {
 		.name	= "tegra-gpio",
 		.owner	= THIS_MODULE,
+		.of_match_table = tegra_gpio_of_match,
 	},
 	.probe		= tegra_gpio_probe,
 };
-- 
1.7.0.4

[RFC PATCH 09/12] arm/tegra: Convert pinmux driver to a platform device

[Stephen Warren]

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/pinmux.c |   21 +++++++++++++++++++++
 1 files changed, 21 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
index f80d507..05fa1a3 100644
--- a/arch/arm/mach-tegra/pinmux.c
+++ b/arch/arm/mach-tegra/pinmux.c
@@ -20,6 +20,7 @@
 #include <linux/errno.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 
 #include <mach/iomap.h>
 #include <mach/pinmux.h>
@@ -665,6 +666,26 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
 	}
 }
 
+static int __init tegra_pinmux_probe(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct platform_driver tegra_pinmux_driver = {
+	.driver		= {
+		.name	= "tegra-pinmux",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= tegra_pinmux_probe,
+};
+
+static int __init tegra_pinmux_init(void)
+{
+	return platform_driver_register(&tegra_pinmux_driver);
+}
+postcore_initcall(tegra_pinmux_init);
+
+
 #ifdef	CONFIG_DEBUG_FS
 
 #include <linux/debugfs.h>
-- 
1.7.0.4

[RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver

[Stephen Warren]

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/pinmux.c |  115 ++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 115 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
index 05fa1a3..33246c2 100644
--- a/arch/arm/mach-tegra/pinmux.c
+++ b/arch/arm/mach-tegra/pinmux.c
@@ -20,6 +20,7 @@
 #include <linux/errno.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
+#include <linux/of.h>
 #include <linux/platform_device.h>
 
 #include <mach/iomap.h>
@@ -147,6 +148,41 @@ static const char *func_name(enum tegra_mux_func func)
 	return tegra_mux_names[func];
 }
 
+#ifdef CONFIG_OF
+static int func_enum(const char *name, enum tegra_mux_func *func_out)
+{
+	int func;
+
+	if (!strcmp(name, "RSVD1")) {
+		*func_out = TEGRA_MUX_RSVD1;
+		return 0;
+	}
+	if (!strcmp(name, "RSVD2")) {
+		*func_out = TEGRA_MUX_RSVD2;
+		return 0;
+	}
+	if (!strcmp(name, "RSVD3")) {
+		*func_out = TEGRA_MUX_RSVD3;
+		return 0;
+	}
+	if (!strcmp(name, "RSVD4")) {
+		*func_out = TEGRA_MUX_RSVD4;
+		return 0;
+	}
+	if (!strcmp(name, "NONE")) {
+		*func_out = TEGRA_MUX_NONE;
+		return 0;
+	}
+
+	for (func = 0; func < TEGRA_MAX_MUX; func++)
+		if (!strcmp(name, tegra_mux_names[func])) {
+			*func_out = func;
+			return 0;
+		}
+
+	return -EINVAL;
+}
+#endif
 
 static const char *tri_name(unsigned long val)
 {
@@ -666,15 +702,94 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
 	}
 }
 
+#ifdef CONFIG_OF
+static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
+{
+	int pg;
+
+	for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
+		const char *pg_name = pingroup_name(pg);
+		struct tegra_pingroup_config config;
+		struct device_node *pg_node;
+		int ret;
+		const char *s;
+
+		pg_node = of_find_child_node_by_name(pdev->dev.of_node,
+						     pg_name);
+		if (pg_node == NULL)
+			continue;
+
+		config.pingroup = pg;
+
+		ret = of_property_read_string(pg_node, "nvidia,function", &s);
+		if (ret < 0) {
+			dev_err(&pdev->dev,
+				"%s: Missing property nvidia,function\n",
+				pg_name);
+			continue;
+		}
+		ret = func_enum(s, &config.func);
+		if (ret < 0) {
+			dev_err(&pdev->dev,
+				"%s: Invalid nvidia,function value %s\n",
+				pg_name, s);
+			continue;
+		}
+
+		ret = of_property_read_string(pg_node, "nvidia,pull", &s);
+		if (ret >= 0) {
+			if (!strcmp(s, "up"))
+				config.pupd = TEGRA_PUPD_PULL_UP;
+			else if (!strcmp(s, "down"))
+				config.pupd = TEGRA_PUPD_PULL_DOWN;
+			else if (!strcmp(s, "normal"))
+				config.pupd = TEGRA_PUPD_NORMAL;
+			else {
+				dev_err(&pdev->dev,
+					"%s: Invalid nvidia,pull value %s\n",
+					pg_name, s);
+				continue;
+			}
+		} else
+			config.pupd = TEGRA_PUPD_NORMAL;
+
+		if (of_find_property(pg_node, "nvidia,tristate", NULL))
+			config.tristate = TEGRA_TRI_TRISTATE;
+		else
+			config.tristate = TEGRA_TRI_NORMAL;
+
+		dev_err(&pdev->dev, "%s: func %d (%s) pull %d tri %d\n",
+			pg_name, config.func, func_name(config.func),
+			config.pupd, config.tristate);
+
+		tegra_pinmux_config_pingroup(&config);
+
+		of_node_put(pg_node);
+	}
+}
+#else
+static inline void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
+{
+}
+#endif
+
 static int __init tegra_pinmux_probe(struct platform_device *pdev)
 {
+	tegra_pinmux_probe_dt(pdev);
+
 	return 0;
 }
 
+static struct of_device_id tegra_pinmux_of_match[] __devinitdata = {
+	{ .compatible = "nvidia,tegra20-pinmux", },
+	{ },
+};
+
 static struct platform_driver tegra_pinmux_driver = {
 	.driver		= {
 		.name	= "tegra-pinmux",
 		.owner	= THIS_MODULE,
+		.of_match_table = tegra_pinmux_of_match,
 	},
 	.probe		= tegra_pinmux_probe,
 };
-- 
1.7.0.4

[RFC PATCH 11/12] arm/tegra: board-dt: Remove dependency on non-dt pinmux functions

[Stephen Warren]

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/Makefile   |    1 -
 arch/arm/mach-tegra/board-dt.c |   10 ----------
 2 files changed, 0 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index f11b910..bab6544 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -30,7 +30,6 @@ obj-${CONFIG_MACH_SEABOARD}             += board-seaboard.o
 obj-${CONFIG_MACH_SEABOARD}             += board-seaboard-pinmux.o
 
 obj-${CONFIG_MACH_TEGRA_DT}             += board-dt.o
-obj-${CONFIG_MACH_TEGRA_DT}             += board-harmony-pinmux.o
 
 obj-${CONFIG_MACH_TRIMSLICE}            += board-trimslice.o
 obj-${CONFIG_MACH_TRIMSLICE}            += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index 1995b79..06e82c4 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -41,14 +41,9 @@
 #include <mach/irqs.h>
 
 #include "board.h"
-#include "board-harmony.h"
 #include "clock.h"
 #include "devices.h"
 
-void harmony_pinmux_init(void);
-void seaboard_pinmux_init(void);
-
-
 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
 	OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
 	OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE, "tegra-pinmux", NULL),
@@ -93,11 +88,6 @@ static void __init tegra_dt_init(void)
 
 	tegra_clk_init_from_table(tegra_dt_clk_init_table);
 
-	if (of_machine_is_compatible("nvidia,harmony"))
-		harmony_pinmux_init();
-	else if (of_machine_is_compatible("nvidia,seaboard"))
-		seaboard_pinmux_init();
-
 	/*
 	 * Finished with the static registrations now; fill in the missing
 	 * devices
-- 
1.7.0.4

[RFC PATCH 12/12] arm/tegra: Remove temporary gpio/pinmux registration workaround

[Stephen Warren]

This reverts commit "arm/tegra: Prevent duplicate gpio/pinmux pdev
registration with dt"; board-dt.c no long calls harmony/
seaboard_pinmux_init(), so the workaround is no longer needed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/board-harmony-pinmux.c  |    5 +----
 arch/arm/mach-tegra/board-seaboard-pinmux.c |    5 +----
 2 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 130018d..e99b456 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -14,8 +14,6 @@
  *
  */
 
-#include <asm/mach-types.h>
-
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 #include <mach/pinmux.h>
@@ -163,8 +161,7 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void harmony_pinmux_init(void)
 {
-	if (machine_is_harmony())
-		platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+	platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
 
 	tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
 
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index bc4dc17..f092298 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -12,8 +12,6 @@
  *
  */
 
-#include <asm/mach-types.h>
-
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
@@ -178,8 +176,7 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void __init seaboard_pinmux_init(void)
 {
-	if (machine_is_seaboard())
-		platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+	platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
 
 	tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
 
-- 
1.7.0.4

[RFC PATCH 08/12] gpio/tegra: Add device tree support

[Belisko Marek]

On Sat, Aug 13, 2011 at 12:54 AM, Stephen Warren <swarren@nvidia.com> wrote:
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> ?drivers/gpio/gpio-tegra.c | ? 31 +++++++++++++++++++++++++++++++
> ?1 files changed, 31 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
> index 4da4839..923b413 100644
> --- a/drivers/gpio/gpio-tegra.c
> +++ b/drivers/gpio/gpio-tegra.c
> @@ -326,6 +326,29 @@ static struct irq_chip tegra_gpio_irq_chip = {
> ?#endif
> ?};
>
> +#ifdef CONFIG_OF
> +static void __init tegra_gpio_probe_dt(struct platform_device *pdev)
> +{
> + ? ? ? const __be32 *gpios;
> + ? ? ? u32 gpioslen;
> + ? ? ? int i;
> +
> + ? ? ? gpios = of_get_property(pdev->dev.of_node, "nvidia,gpios", &gpioslen);
> + ? ? ? if (gpios == NULL)
> + ? ? ? ? ? ? ? return;
> +
> + ? ? ? gpioslen /= sizeof(*gpios);
> + ? ? ? for (i = 0; i < gpioslen; i++, gpios++) {
> + ? ? ? ? ? ? ? u32 gpio = be32_to_cpup(gpios);
> + ? ? ? ? ? ? ? dev_err(&pdev->dev, "Enabling GPIO %d\n", gpio);
Is really necessary to print all enabled gpio's to console? Also seen
same in pinmux probe.
> + ? ? ? ? ? ? ? tegra_gpio_enable(gpio);
> + ? ? ? }
> +}
> +#else
> +static inline void __init tegra_gpio_probe_dt(struct platform_device *pdev)
> +{
> +}
> +#endif
>
> ?/* This lock class tells lockdep that GPIO irqs are in a different
> ?* category than their parents, so it won't report false recursion.
> @@ -371,13 +394,21 @@ static int __init tegra_gpio_probe(struct platform_device *pdev)
> ? ? ? ? ? ? ? ? ? ? ? ?spin_lock_init(&bank->lvl_lock[j]);
> ? ? ? ?}
>
> + ? ? ? tegra_gpio_probe_dt(pdev);
> +
> ? ? ? ?return 0;
> ?}
>
> +static struct of_device_id tegra_gpio_of_match[] __devinitdata = {
> + ? ? ? { .compatible = "nvidia,tegra20-gpio", },
> + ? ? ? { },
> +};
> +
> ?static struct platform_driver tegra_gpio_driver = {
> ? ? ? ?.driver ? ? ? ? = {
> ? ? ? ? ? ? ? ?.name ? = "tegra-gpio",
> ? ? ? ? ? ? ? ?.owner ?= THIS_MODULE,
> + ? ? ? ? ? ? ? .of_match_table = tegra_gpio_of_match,
> ? ? ? ?},
> ? ? ? ?.probe ? ? ? ? ?= tegra_gpio_probe,
> ?};
> --
> 1.7.0.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at ?http://www.tux.org/lkml/
>

regards,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
icq: 290551086
web: http://open-nandra.com

[RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver

[Jamie Iles]

Hi Stephen,

On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
>  arch/arm/mach-tegra/pinmux.c |  115 ++++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 115 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
> index 05fa1a3..33246c2 100644
> --- a/arch/arm/mach-tegra/pinmux.c
> +++ b/arch/arm/mach-tegra/pinmux.c
> @@ -20,6 +20,7 @@
>  #include <linux/errno.h>
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
> +#include <linux/of.h>
>  #include <linux/platform_device.h>
>  
>  #include <mach/iomap.h>
> @@ -147,6 +148,41 @@ static const char *func_name(enum tegra_mux_func func)
>  	return tegra_mux_names[func];
>  }
>  
> +#ifdef CONFIG_OF
> +static int func_enum(const char *name, enum tegra_mux_func *func_out)
> +{
> +	int func;
> +
> +	if (!strcmp(name, "RSVD1")) {
> +		*func_out = TEGRA_MUX_RSVD1;
> +		return 0;
> +	}
> +	if (!strcmp(name, "RSVD2")) {
> +		*func_out = TEGRA_MUX_RSVD2;
> +		return 0;
> +	}
> +	if (!strcmp(name, "RSVD3")) {
> +		*func_out = TEGRA_MUX_RSVD3;
> +		return 0;
> +	}
> +	if (!strcmp(name, "RSVD4")) {
> +		*func_out = TEGRA_MUX_RSVD4;
> +		return 0;
> +	}
> +	if (!strcmp(name, "NONE")) {
> +		*func_out = TEGRA_MUX_NONE;
> +		return 0;
> +	}
> +
> +	for (func = 0; func < TEGRA_MAX_MUX; func++)
> +		if (!strcmp(name, tegra_mux_names[func])) {
> +			*func_out = func;
> +			return 0;
> +		}
> +
> +	return -EINVAL;
> +}
> +#endif
>  
>  static const char *tri_name(unsigned long val)
>  {
> @@ -666,15 +702,94 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
>  	}
>  }
>  
> +#ifdef CONFIG_OF
> +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> +{
> +	int pg;
> +
> +	for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> +		const char *pg_name = pingroup_name(pg);
> +		struct tegra_pingroup_config config;
> +		struct device_node *pg_node;
> +		int ret;
> +		const char *s;
> +
> +		pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> +						     pg_name);
> +		if (pg_node == NULL)
> +			continue;

Rather than iterating over all of the mux names in the pinmux driver and 
searching for a matching DT node, could you not do it the other way 
round?  So do an for_each_child_of_node() on the pinmux node then find 
the matching pingroup keyed by the node name?  This would eliminate 
of_find_child_node_by_name().  You could also catch invalid 
configurations for non-existent pins this way.

Jamie

[RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver

[Jamie Iles]

On Sat, Aug 13, 2011 at 11:43:23AM +0100, Jamie Iles wrote:
> Hi Stephen,
> 
> On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> > Signed-off-by: Stephen Warren <swarren@nvidia.com>
> > ---
> >  arch/arm/mach-tegra/pinmux.c |  115 ++++++++++++++++++++++++++++++++++++++++++
> >  1 files changed, 115 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
> > index 05fa1a3..33246c2 100644
> > --- a/arch/arm/mach-tegra/pinmux.c
> > +++ b/arch/arm/mach-tegra/pinmux.c
> > @@ -20,6 +20,7 @@
> >  #include <linux/errno.h>
> >  #include <linux/spinlock.h>
> >  #include <linux/io.h>
> > +#include <linux/of.h>
> >  #include <linux/platform_device.h>
> >  
> >  #include <mach/iomap.h>
> > @@ -147,6 +148,41 @@ static const char *func_name(enum tegra_mux_func func)
> >  	return tegra_mux_names[func];
> >  }
> >  
> > +#ifdef CONFIG_OF
> > +static int func_enum(const char *name, enum tegra_mux_func *func_out)
> > +{
> > +	int func;
> > +
> > +	if (!strcmp(name, "RSVD1")) {
> > +		*func_out = TEGRA_MUX_RSVD1;
> > +		return 0;
> > +	}
> > +	if (!strcmp(name, "RSVD2")) {
> > +		*func_out = TEGRA_MUX_RSVD2;
> > +		return 0;
> > +	}
> > +	if (!strcmp(name, "RSVD3")) {
> > +		*func_out = TEGRA_MUX_RSVD3;
> > +		return 0;
> > +	}
> > +	if (!strcmp(name, "RSVD4")) {
> > +		*func_out = TEGRA_MUX_RSVD4;
> > +		return 0;
> > +	}
> > +	if (!strcmp(name, "NONE")) {
> > +		*func_out = TEGRA_MUX_NONE;
> > +		return 0;
> > +	}
> > +
> > +	for (func = 0; func < TEGRA_MAX_MUX; func++)
> > +		if (!strcmp(name, tegra_mux_names[func])) {
> > +			*func_out = func;
> > +			return 0;
> > +		}
> > +
> > +	return -EINVAL;
> > +}
> > +#endif
> >  
> >  static const char *tri_name(unsigned long val)
> >  {
> > @@ -666,15 +702,94 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
> >  	}
> >  }
> >  
> > +#ifdef CONFIG_OF
> > +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> > +{
> > +	int pg;
> > +
> > +	for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> > +		const char *pg_name = pingroup_name(pg);
> > +		struct tegra_pingroup_config config;
> > +		struct device_node *pg_node;
> > +		int ret;
> > +		const char *s;
> > +
> > +		pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> > +						     pg_name);
> > +		if (pg_node == NULL)
> > +			continue;
> 
> Rather than iterating over all of the mux names in the pinmux driver and 
> searching for a matching DT node, could you not do it the other way 
> round?  So do an for_each_child_of_node() on the pinmux node then find 
> the matching pingroup keyed by the node name?  This would eliminate 
> of_find_child_node_by_name().  You could also catch invalid 
> configurations for non-existent pins this way.

I just re-read your introduction email and saw you've already discussed 
this!  Would this require an explicit pin name property though or could 
you just key off of the pg_node->name?

Jamie

[RFC PATCH 00/12] arm/tegra: Initialize GPIO & pinmux from DT

[Shawn Guo]

On Fri, Aug 12, 2011 at 04:54:45PM -0600, Stephen Warren wrote:
> This patch modifies Tegra's device tree support to remove the dependency
> on harmony_pinmux_init(), thus making it completely board-independent.
> 
> Some notes:
> 
> * This series is built on top of linux-next with a bunch of patches
>   applied, in particular the removal of irq_to_gpio and custom gpio_to_irq
>   that I'm in the process of sending to Russell. I haven't yet thought
>   through how/where to merge this without causing all kinds of conflicts.
> 
> * I took care to preserve bisectability of Tegra DT support. However,
>   linux-next doesn't yet have entirely useful Tegra DT support; some stuff
>   from Grant's devicetree/next hasn't been pushed into linux-next yet. If
>   we don't care about bisectability, I can remove a couple commits and
>   possibly squash some others.
> 
> * The approach taken here is to have a custom semantic SoC-specific
>   binding for each the gpio and pinmux drivers. Other alternatives
>   suggested included:
> 
>   1) A generic "list of register writes" to be performed at boot. This has
>      the advantage of reusability across different SoCs. However, this
>      approach isn't semantic, and requires detailed knowledge of pinmux
>      registers and potentially fiddly calculations when constructing the
>      device tree.
> 
>   2) The ability to define disabled child nodes of the pinmux controller
>      that are not processed by tegra_pinmux_probe_dt(). Other devices may
>      refer to those using phandles, and later enable/disable them, thus
>      representing dynamic pinmuxing in the device tree. I wasn't convinced
>      whether we should represent dynamic pinmuxing using phandles.
> 
>   I discussed in more detail why I prefer the current proposal in various
>   email threads.
> 
Glad to see the second soc specific pinmux binding besides the one
below for i.mx.

  http://permalink.gmane.org/gmane.linux.drivers.devicetree/6962

> * tegra_pinmux_probe_dt() enumerates all legal pingroup names, and searches
>   for a pinmux controller subnode of that name, then processes each one
>   that is found. An alternative that some may prefer would be to enumerate
>   each child node of the pinmux controller, and have each node contain an
>   explicit pingroup name property instead. Does anyone have any preference
>   here? I suppose the latter option would obviate the need to add
>   of_find_child_node_by_name().
> 
I agree with Jamie that the latter option seems better/simper.

> Thanks for reading!
> 
> Stephen Warren (12):
>   dt: Add of_find_child_node_by_name()
>   arm/tegra: Prep boards for gpio/pinmux conversion to pdevs
>   arm/tegra: Avoid duplicate gpio/pinmux devices with dt
>   arm/tegra: board-dt: Add AUXDATA for tegra-gpio and tegra-pinmux
>   arm/dt: Tegra: Add nvidia,gpios property to GPIO controller
>   arm/dt: Tegra: Add pinmux node
>   gpio/tegra: Convert to a platform device
>   gpio/tegra: Add device tree support
>   arm/tegra: Convert pinmux driver to a platform device
>   arm/tegra: Add device tree support to pinmux driver
>   arm/tegra: board-dt: Remove dependency on non-dt pinmux functions
>   arm/tegra: Remove temporary gpio/pinmux registration workaround
> 
>  arch/arm/boot/dts/tegra-harmony.dts          |  479 ++++++++++++++++++++++++++
>  arch/arm/boot/dts/tegra-seaboard.dts         |  409 ++++++++++++++++++++++
>  arch/arm/boot/dts/tegra20.dtsi               |    5 +
>  arch/arm/mach-tegra/Makefile                 |    1 -
>  arch/arm/mach-tegra/board-dt.c               |   12 +-
>  arch/arm/mach-tegra/board-harmony-pinmux.c   |    8 +
>  arch/arm/mach-tegra/board-paz00-pinmux.c     |    8 +
>  arch/arm/mach-tegra/board-seaboard-pinmux.c  |    9 +-
>  arch/arm/mach-tegra/board-trimslice-pinmux.c |    7 +
>  arch/arm/mach-tegra/devices.c                |   10 +
>  arch/arm/mach-tegra/devices.h                |    2 +
>  arch/arm/mach-tegra/pinmux.c                 |  136 ++++++++
>  drivers/gpio/gpio-tegra.c                    |   56 +++-
>  drivers/of/base.c                            |   18 +
>  include/linux/of.h                           |    2 +
>  15 files changed, 1138 insertions(+), 24 deletions(-)
> 
Generally, you need to document the bindings you come with in
Documentation/devicetree/bindings/

-- 
Regards,
Shawn

[RFC PATCH 05/12] arm/dt: Tegra: Add nvidia,gpios property to GPIO controller

[Olof Johansson]

On Fri, Aug 12, 2011 at 3:54 PM, Stephen Warren <swarren@nvidia.com> wrote:
> Add board-specific gpio node for Harmony and Seaboard. This lists the
> GPIOs used by the board. Note that not all GPIOs that exist on the board
> are listed; only those used by devices currently supported by device
> tree.


I don't want to bikeshed over this, but something like
"nvidia,enabled-gpios" could be a bit more descriptive. Either way is
OK though.

The property should be documented under the bindings Documentation/
hierarchy though.


-Olof

[RFC PATCH 06/12] arm/dt: Tegra: Add pinmux node

[Olof Johansson]

Hi,

On Fri, Aug 12, 2011 at 3:54 PM, Stephen Warren <swarren@nvidia.com> wrote:
> Add a pinmux node to tegra20.dtsi in order to instantiate the future
> pinmux device. Add pinmux nodes to Harmony and Seaboard, which detail
> the entire default pinmux configuration. This configuration is identical
> to that in board-harmony/seaboard-pinmux.c.

Again, documentation for the binding is needed.

Seeing the table coded up now though, I wonder if it could make sense
to flip it around? The number of functions multiplexed out are fewer
than the pin groups (and this would be even more true on platforms
that have per-pin configurations and/or smaller groups).

I.e. something like:

    sdio4 {
            nvidia,pingroups = < DTA DTD >; // Not sure how to
reference this though -- integers would be hard to read. DTA/DTD
aren't valid values in the syntax.
            nvidia,pull-up
    },

And any pingroups not covered by a function would be left alone (one
could easily define a few no-op functions to set pull up/down and
tristate values on the unused groups).

[...]

> + ? ? ? pinmux: pinmux at 70000000 {
> + ? ? ? ? ? ? ? ATA {

I would prefer seeing these in lower case (since device tree tends to
be no-caps). Should be easy to switch to strcasecmp in the code.

[...]
> + ? ? ? ? ? ? ? CDEV2 {
> + ? ? ? ? ? ? ? ? ? ? ? nvidia,function = "PLLP_OUT4";

The string here is a bit unfortunate. It's really just used to map
from the string to an integer anyway, with the reverse mapping being
produced by the debugfs output. But especially if the function is
flipped above, the different pingroups referenced might not use the
same value for each function, so some sort of lookup will still be
needed. Not much to do about, it seems. :(


> + ? ? ? ? ? ? ? ? ? ? ? nvidia,pull = "down";

This should be done by discrete properties instead: nvidia,pull-up,
nvidia-pull-down (and omitted means normal), without values.


-Olof

[RFC PATCH 12/12] arm/tegra: Remove temporary gpio/pinmux registration workaround

[Sergei Shtylyov]

Hello.

On 13-08-2011 2:54, Stephen Warren wrote:

> This reverts commit "arm/tegra: Prevent duplicate gpio/pinmux pdev

    Would be good to also include the commit ID for gitweb.

> registration with dt"; board-dt.c no long calls harmony/
> seaboard_pinmux_init(), so the workaround is no longer needed.

> Signed-off-by: Stephen Warren<swarren@nvidia.com>

WBR, Sergei

[RFC PATCH 08/12] gpio/tegra: Add device tree support

[Stephen Warren]

Belisko Marek wrote at Saturday, August 13, 2011 3:49 AM:
> On Sat, Aug 13, 2011 at 12:54 AM, Stephen Warren <swarren@nvidia.com> wrote:
> > Signed-off-by: Stephen Warren <swarren@nvidia.com>
> > ---
> > ?drivers/gpio/gpio-tegra.c | ? 31 +++++++++++++++++++++++++++++++
> > ?1 files changed, 31 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
...
> > +static void __init tegra_gpio_probe_dt(struct platform_device *pdev)
> > +{
> > + ? ? ? const __be32 *gpios;
> > + ? ? ? u32 gpioslen;
> > + ? ? ? int i;
> > +
> > + ? ? ? gpios = of_get_property(pdev->dev.of_node, "nvidia,gpios", &gpioslen);
> > + ? ? ? if (gpios == NULL)
> > + ? ? ? ? ? ? ? return;
> > +
> > + ? ? ? gpioslen /= sizeof(*gpios);
> > + ? ? ? for (i = 0; i < gpioslen; i++, gpios++) {
> > + ? ? ? ? ? ? ? u32 gpio = be32_to_cpup(gpios);
> > + ? ? ? ? ? ? ? dev_err(&pdev->dev, "Enabling GPIO %d\n", gpio);
>
> Is really necessary to print all enabled gpio's to console? Also seen
> same in pinmux probe.

Oops, that's certainly not necessary. That was debugging code, and I meant
to convert to dev_dbg before posting.

-- 
nvpublic

[RFC PATCH 12/12] arm/tegra: Remove temporary gpio/pinmux registration workaround

[Stephen Warren]

Sergei Shtylyov wrote at Monday, August 15, 2011 5:13 AM:
> Hello.
> 
> On 13-08-2011 2:54, Stephen Warren wrote:
> 
> > This reverts commit "arm/tegra: Prevent duplicate gpio/pinmux pdev
> 
>     Would be good to also include the commit ID for gitweb.

I can't do that yet, because the commit that's being reverted is earlier
in the patch series being posted, and hence doesn't have a commit ID that
will be valid in any upstream repository.

I suppose this is the last commit in the series though, so I could remove
it and submit the revert separately once the rest is upstream.

> > registration with dt"; board-dt.c no long calls harmony/
> > seaboard_pinmux_init(), so the workaround is no longer needed.
> 
> > Signed-off-by: Stephen Warren<swarren@nvidia.com>
> 
> WBR, Sergei

-- 
nvpublic

[RFC PATCH 00/12] arm/tegra: Initialize GPIO & pinmux from DT

[Stephen Warren]

Shawn Guo wrote at Saturday, August 13, 2011 7:09 AM:
> On Fri, Aug 12, 2011 at 04:54:45PM -0600, Stephen Warren wrote:
> > This patch modifies Tegra's device tree support to remove the dependency
> > on harmony_pinmux_init(), thus making it completely board-independent.
> >
> > Some notes:
> >
...
> > * tegra_pinmux_probe_dt() enumerates all legal pingroup names, and searches
> >   for a pinmux controller subnode of that name, then processes each one
> >   that is found. An alternative that some may prefer would be to enumerate
> >   each child node of the pinmux controller, and have each node contain an
> >   explicit pingroup name property instead. Does anyone have any preference
> >   here? I suppose the latter option would obviate the need to add
> >   of_find_child_node_by_name().
>
> I agree with Jamie that the latter option seems better/simper.

OK, I'll flip the iteration around.

...
> >  arch/arm/boot/dts/tegra-harmony.dts          |  479 ++++++++++++++++++++++++++
> >  arch/arm/boot/dts/tegra-seaboard.dts         |  409 ++++++++++++++++++++++
> >  arch/arm/boot/dts/tegra20.dtsi               |    5 +
> >  arch/arm/mach-tegra/Makefile                 |    1 -
> >  arch/arm/mach-tegra/board-dt.c               |   12 +-
> >  arch/arm/mach-tegra/board-harmony-pinmux.c   |    8 +
> >  arch/arm/mach-tegra/board-paz00-pinmux.c     |    8 +
> >  arch/arm/mach-tegra/board-seaboard-pinmux.c  |    9 +-
> >  arch/arm/mach-tegra/board-trimslice-pinmux.c |    7 +
> >  arch/arm/mach-tegra/devices.c                |   10 +
> >  arch/arm/mach-tegra/devices.h                |    2 +
> >  arch/arm/mach-tegra/pinmux.c                 |  136 ++++++++
> >  drivers/gpio/gpio-tegra.c                    |   56 +++-
> >  drivers/of/base.c                            |   18 +
> >  include/linux/of.h                           |    2 +
> >  15 files changed, 1138 insertions(+), 24 deletions(-)
> >
> Generally, you need to document the bindings you come with in
> Documentation/devicetree/bindings/

Uggh. I must have run format-patch on the wrong commit ID; the last thing
I did was to add a couple commits containing the documentation:-( I really
shouldn't try to post patch series last thing on Friday...

-- 
nvpublic

[RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver

[Stephen Warren]

Jamie Iles wrote at Saturday, August 13, 2011 4:49 AM:
> On Sat, Aug 13, 2011 at 11:43:23AM +0100, Jamie Iles wrote:
> > Hi Stephen,
> >
> > On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
...
> > > diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
...
> > > +#ifdef CONFIG_OF
> > > +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> > > +{
> > > +	int pg;
> > > +
> > > +	for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> > > +		const char *pg_name = pingroup_name(pg);
> > > +		struct tegra_pingroup_config config;
> > > +		struct device_node *pg_node;
> > > +		int ret;
> > > +		const char *s;
> > > +
> > > +		pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> > > +						     pg_name);
> > > +		if (pg_node == NULL)
> > > +			continue;
> >
> > Rather than iterating over all of the mux names in the pinmux driver and
> > searching for a matching DT node, could you not do it the other way
> > round?  So do an for_each_child_of_node() on the pinmux node then find
> > the matching pingroup keyed by the node name?  This would eliminate
> > of_find_child_node_by_name().  You could also catch invalid
> > configurations for non-existent pins this way.
> 
> I just re-read your introduction email and saw you've already discussed
> this!  Would this require an explicit pin name property though or could
> you just key off of the pg_node->name?

No, I think pg_node->name will work out fine; it's what of_find_child_node_by_name
is using anyway.

-- 
nvpublic

[RFC PATCH 05/12] arm/dt: Tegra: Add nvidia,gpios property to GPIO controller

[Stephen Warren]

Olof Johansson wrote at Sunday, August 14, 2011 1:02 AM:
> On Fri, Aug 12, 2011 at 3:54 PM, Stephen Warren <swarren@nvidia.com> wrote:
> > Add board-specific gpio node for Harmony and Seaboard. This lists the
> > GPIOs used by the board. Note that not all GPIOs that exist on the board
> > are listed; only those used by devices currently supported by device
> > tree.
> 
> I don't want to bikeshed over this, but something like
> "nvidia,enabled-gpios" could be a bit more descriptive. Either way is
> OK though.

Yes, that's a much better name.

Existing board files do have a Boolean enabled/disabled flag per GPIO,
which is currently always true,  whereas this patch series only implements
"enabled" entries. I thought about it briefly, and didn't think that
explicitly disabling GPIOs that the bootloader had already enabled was
likely to be useful. Do you agree? Possibly not since IIRC you added the
tables that contain that Boolean.

> The property should be documented under the bindings Documentation/
> hierarchy though.

Yup. The next posting will include this.

-- 
nvpublic

[RFC PATCH 06/12] arm/dt: Tegra: Add pinmux node

[Stephen Warren]

Olof Johansson wrote at Sunday, August 14, 2011 1:25 AM:
> On Fri, Aug 12, 2011 at 3:54 PM, Stephen Warren <swarren@nvidia.com> wrote:
> > Add a pinmux node to tegra20.dtsi in order to instantiate the future
> > pinmux device. Add pinmux nodes to Harmony and Seaboard, which detail
> > the entire default pinmux configuration. This configuration is identical
> > to that in board-harmony/seaboard-pinmux.c.
> 
> Again, documentation for the binding is needed.

Yes. It should have been there, but I screwed up.

> Seeing the table coded up now though, I wonder if it could make sense
> to flip it around? The number of functions multiplexed out are fewer
> than the pin groups (and this would be even more true on platforms
> that have per-pin configurations and/or smaller groups).

There are 116 pin groups and 61 functions, so this certainly would reduce
the size of the tree.

> I.e. something like:
> 
>     sdio4 {
>             nvidia,pingroups = < DTA DTD >; // Not sure how to
> reference this though -- integers would be hard to read. DTA/DTD
> aren't valid values in the syntax.
>             nvidia,pull-up
>     },
> 
> And any pingroups not covered by a function would be left alone

I'm personally inclined not to do this.

a) The HW registers are laid out such that each pingroup has various
properties, so the current binding represents that directly. That said,
inverting the table would contain exactly the same data, so this argument
is slightly tenuous/arbitrary, except that:

b) I think we'd still need tristate and pull properties per pin-group
either way; within a given special function, I see no reason for every
pingroup to need the same pull/tristate values (otherwise, I imagine the
Tegra HW designers would have lumped all the pins into a single pingroup
already). For example, an interface with data and control signals might
need pullups on control signals, but none on data.

c) Similar to that, a RSVD/NONE (or otherwise unused) function might be
used for a bunch of pingroups that are in fact used by GPIOs, and hence
only the pull/tristate values are relevant, since the GPIO controller
will actually control the data on the line. In this case, there's no 
reason to assume that different pingroups that have the same function are
related in any way, and hence should have the same pull/tristate.

Given, b/c, we'd need an array of pull/tristate values per pingroup within
a given function, and I think the syntax for that would be sufficiently
complex that the binding in the current patchset makes more sense.

Do you agree?

> (one
> could easily define a few no-op functions to set pull up/down and
> tristate values on the unused groups).

The binding (and original pinmux code) does define RSVD1/2/3/4 functions
for the case where a pingroup should be programmed to an unused/quiescent
state. There's also a NONE function for the pingroups that don't support
muxing, but just pullup/down and tristate.

> [...]
> 
> > + ? ? ? pinmux: pinmux at 70000000 {
> > + ? ? ? ? ? ? ? ATA {
> 
> I would prefer seeing these in lower case (since device tree tends to
> be no-caps). Should be easy to switch to strcasecmp in the code.

Sure.

> [...]
> > + ? ? ? ? ? ? ? CDEV2 {
> > + ? ? ? ? ? ? ? ? ? ? ? nvidia,function = "PLLP_OUT4";
> 
> The string here is a bit unfortunate. It's really just used to map
> from the string to an integer anyway, with the reverse mapping being
> produced by the debugfs output. But especially if the function is
> flipped above, the different pingroups referenced might not use the
> same value for each function, so some sort of lookup will still be
> needed. Not much to do about, it seems. :(

I originally considered syntax like:

    nvidia,function = <33>; // PLLP_OUT4

However, I figured this was problematic because:

a) Calculating the integers would be problematic; pinmux.h doesn't
currently list the integer for each value in enum tegra_mux_func, although
I suppose it and the binding documentation could easily be modified to do
so.

b) With just an integer, it's much harder to know what the value means.

c) With both the integer and comment, they can get out of sync if
incorrectly edited.

I'd be much more included to use integers if the *.dts files wer run
though the pre-processor, and hence defines could be used. I do observe
that Documentation/devicetree/booting-without-of.txt says:

    It is also suggested that you pipe your source file through cpp (gcc
    preprocessor) so you can use #include's, #define for constants, etc...

> > + ? ? ? ? ? ? ? ? ? ? ? nvidia,pull = "down";
> 
> This should be done by discrete properties instead: nvidia,pull-up,
> nvidia-pull-down (and omitted means normal), without values.

OK.

-- 
nvpublic

[RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver

[Jamie Iles]

Hi Stephen,

On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
>  arch/arm/mach-tegra/pinmux.c |  115 ++++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 115 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
> index 05fa1a3..33246c2 100644
> --- a/arch/arm/mach-tegra/pinmux.c
> +++ b/arch/arm/mach-tegra/pinmux.c
> @@ -20,6 +20,7 @@
>  #include <linux/errno.h>
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
> +#include <linux/of.h>
>  #include <linux/platform_device.h>
>  
>  #include <mach/iomap.h>
> @@ -147,6 +148,41 @@ static const char *func_name(enum tegra_mux_func func)
>  	return tegra_mux_names[func];
>  }
>  
[...]
>  
>  static const char *tri_name(unsigned long val)
>  {
> @@ -666,15 +702,94 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
>  	}
>  }
>  
> +#ifdef CONFIG_OF
> +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> +{
> +	int pg;
> +
> +	for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> +		const char *pg_name = pingroup_name(pg);
> +		struct tegra_pingroup_config config;
> +		struct device_node *pg_node;
> +		int ret;
> +		const char *s;
> +
> +		pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> +						     pg_name);
> +		if (pg_node == NULL)
> +			continue;
> +
> +		config.pingroup = pg;
> +
> +		ret = of_property_read_string(pg_node, "nvidia,function", &s);
> +		if (ret < 0) {
> +			dev_err(&pdev->dev,
> +				"%s: Missing property nvidia,function\n",
> +				pg_name);
> +			continue;
> +		}
> +		ret = func_enum(s, &config.func);
> +		if (ret < 0) {
> +			dev_err(&pdev->dev,
> +				"%s: Invalid nvidia,function value %s\n",
> +				pg_name, s);
> +			continue;
> +		}
> +
> +		ret = of_property_read_string(pg_node, "nvidia,pull", &s);
> +		if (ret >= 0) {
> +			if (!strcmp(s, "up"))
> +				config.pupd = TEGRA_PUPD_PULL_UP;
> +			else if (!strcmp(s, "down"))
> +				config.pupd = TEGRA_PUPD_PULL_DOWN;
> +			else if (!strcmp(s, "normal"))
> +				config.pupd = TEGRA_PUPD_NORMAL;
> +			else {
> +				dev_err(&pdev->dev,
> +					"%s: Invalid nvidia,pull value %s\n",
> +					pg_name, s);
> +				continue;
> +			}
> +		} else
> +			config.pupd = TEGRA_PUPD_NORMAL;
> +
> +		if (of_find_property(pg_node, "nvidia,tristate", NULL))
> +			config.tristate = TEGRA_TRI_TRISTATE;
> +		else
> +			config.tristate = TEGRA_TRI_NORMAL;
> +
> +		dev_err(&pdev->dev, "%s: func %d (%s) pull %d tri %d\n",
> +			pg_name, config.func, func_name(config.func),
> +			config.pupd, config.tristate);
> +
> +		tegra_pinmux_config_pingroup(&config);
> +
> +		of_node_put(pg_node);
> +	}
> +}

I need to implement DT muxing configuration for my platform, and I believe 
that what you have here would work fine for me too, and to avoid duplicating 
the same thing, I wonder if this could be a little more generic.

So if the platform specific pinmux driver called the pinmux parser with a 
callback for a pingroup configuration function then this wouldn't need the 
nvidia specific properties.  I'd envisage the setup callback to be something 
like:

	int pingroup_configure(const char *name, unsigned long flags);

where the flags would be a bitmask of properties, so:

	PINMUX_F_TRISTATE
	PINMUX_F_PUPD
	etc

which would map to pinmux,tristate properties etc.  The tegra (or 
picoxcell...) specific driver would then map any regs and setup the 
pinmux tables and call the parser loop with the correct callback.  This 
would require looping over the child nodes as we've discussed before, 
and the decoding of the func_enum in the nvidia driver, but I think 
that's okay.

Jamie

[RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver

[Jamie Iles]

On Mon, Aug 15, 2011 at 09:07:16PM +0100, Jamie Iles wrote:
> Hi Stephen,
> 
> On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> > Signed-off-by: Stephen Warren <swarren@nvidia.com>
> > ---
> >  arch/arm/mach-tegra/pinmux.c |  115 ++++++++++++++++++++++++++++++++++++++++++
> >  1 files changed, 115 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
> > index 05fa1a3..33246c2 100644
> > --- a/arch/arm/mach-tegra/pinmux.c
> > +++ b/arch/arm/mach-tegra/pinmux.c
> > @@ -20,6 +20,7 @@
> >  #include <linux/errno.h>
> >  #include <linux/spinlock.h>
> >  #include <linux/io.h>
> > +#include <linux/of.h>
> >  #include <linux/platform_device.h>
> >  
> >  #include <mach/iomap.h>
> > @@ -147,6 +148,41 @@ static const char *func_name(enum tegra_mux_func func)
> >  	return tegra_mux_names[func];
> >  }
> >  
> [...]
> >  
> >  static const char *tri_name(unsigned long val)
> >  {
> > @@ -666,15 +702,94 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
> >  	}
> >  }
> >  
> > +#ifdef CONFIG_OF
> > +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> > +{
> > +	int pg;
> > +
> > +	for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> > +		const char *pg_name = pingroup_name(pg);
> > +		struct tegra_pingroup_config config;
> > +		struct device_node *pg_node;
> > +		int ret;
> > +		const char *s;
> > +
> > +		pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> > +						     pg_name);
> > +		if (pg_node == NULL)
> > +			continue;
> > +
> > +		config.pingroup = pg;
> > +
> > +		ret = of_property_read_string(pg_node, "nvidia,function", &s);
> > +		if (ret < 0) {
> > +			dev_err(&pdev->dev,
> > +				"%s: Missing property nvidia,function\n",
> > +				pg_name);
> > +			continue;
> > +		}
> > +		ret = func_enum(s, &config.func);
> > +		if (ret < 0) {
> > +			dev_err(&pdev->dev,
> > +				"%s: Invalid nvidia,function value %s\n",
> > +				pg_name, s);
> > +			continue;
> > +		}
> > +
> > +		ret = of_property_read_string(pg_node, "nvidia,pull", &s);
> > +		if (ret >= 0) {
> > +			if (!strcmp(s, "up"))
> > +				config.pupd = TEGRA_PUPD_PULL_UP;
> > +			else if (!strcmp(s, "down"))
> > +				config.pupd = TEGRA_PUPD_PULL_DOWN;
> > +			else if (!strcmp(s, "normal"))
> > +				config.pupd = TEGRA_PUPD_NORMAL;
> > +			else {
> > +				dev_err(&pdev->dev,
> > +					"%s: Invalid nvidia,pull value %s\n",
> > +					pg_name, s);
> > +				continue;
> > +			}
> > +		} else
> > +			config.pupd = TEGRA_PUPD_NORMAL;
> > +
> > +		if (of_find_property(pg_node, "nvidia,tristate", NULL))
> > +			config.tristate = TEGRA_TRI_TRISTATE;
> > +		else
> > +			config.tristate = TEGRA_TRI_NORMAL;
> > +
> > +		dev_err(&pdev->dev, "%s: func %d (%s) pull %d tri %d\n",
> > +			pg_name, config.func, func_name(config.func),
> > +			config.pupd, config.tristate);
> > +
> > +		tegra_pinmux_config_pingroup(&config);
> > +
> > +		of_node_put(pg_node);
> > +	}
> > +}
> 
> I need to implement DT muxing configuration for my platform, and I believe 
> that what you have here would work fine for me too, and to avoid duplicating 
> the same thing, I wonder if this could be a little more generic.
> 
> So if the platform specific pinmux driver called the pinmux parser with a 
> callback for a pingroup configuration function then this wouldn't need the 
> nvidia specific properties.  I'd envisage the setup callback to be something 
> like:
> 
> 	int pingroup_configure(const char *name, unsigned long flags);

and it if this took the device_node too then the platform specific bits could 
handle more esoteric properties if required.  I'll have a go at prototyping 
this tomorrow unless there are any obvious reasons that this is a stupid idea!

Jamie

[RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver

[Stephen Warren]

Jamie Iles wrote at Monday, August 15, 2011 2:36 PM:
> On Mon, Aug 15, 2011 at 09:07:16PM +0100, Jamie Iles wrote:
> > Hi Stephen,
> >
> > On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> > > Signed-off-by: Stephen Warren <swarren@nvidia.com>
...
> > > diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
...
> > > +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> > > +{
> > > +	int pg;
> > > +
> > > +	for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> > > +		const char *pg_name = pingroup_name(pg);
> > > +		struct tegra_pingroup_config config;
> > > +		struct device_node *pg_node;
> > > +		int ret;
> > > +		const char *s;
> > > +
> > > +		pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> > > +						     pg_name);
> > > +		if (pg_node == NULL)
> > > +			continue;
> > > +
> > > +		config.pingroup = pg;
> > > +
> > > +		ret = of_property_read_string(pg_node, "nvidia,function", &s);
...
> > > +		ret = of_property_read_string(pg_node, "nvidia,pull", &s);
...
> > > +		if (of_find_property(pg_node, "nvidia,tristate", NULL))
...
> > > +		tegra_pinmux_config_pingroup(&config);
> > > +
> > > +		of_node_put(pg_node);
> > > +	}
> > > +}
> >
> > I need to implement DT muxing configuration for my platform, and I believe
> > that what you have here would work fine for me too, and to avoid duplicating
> > the same thing, I wonder if this could be a little more generic.
> >
> > So if the platform specific pinmux driver called the pinmux parser with a
> > callback for a pingroup configuration function then this wouldn't need the
> > nvidia specific properties.  I'd envisage the setup callback to be something
> > like:
> >
> > 	int pingroup_configure(const char *name, unsigned long flags);
> 
> and it if this took the device_node too then the platform specific bits could
> handle more esoteric properties if required.  I'll have a go at prototyping
> this tomorrow unless there are any obvious reasons that this is a stupid idea!

I expect some of the code could be shared.

The only worry I have is whether some SoCs don't configure things like
pinmux function in the same place as pad function (pullup/down, tristate),
and hence whether a generic binding is generally applicable. I suppose the
code could always ignore unused properties.

I wonder how much of this is relevant to Linus W's pinctrl API?

Note that in the updated patch series I just posted, I reworked the binding
a little; Tegra has two sets of pin-groups, one configuring muxing, pullup/
down, and tri-state, and the other configuring various driver strength/
rate properties. Hence, the tree is now e.g.:

	pinmux: pinmux at 70000000 {
		compatible = "nvidia,tegra20-pinmux";
		reg = < 0x70000000 0xc00 >;
		nvidia,mux-groups {
			cdev1 {
				nvidia,function = "plla_out";
			};
			cdev2 {
				nvidia,function = "pllp_out4";
				nvidia,pull-down;
				nvidia,tristate;
			};
		};
		nvidia,drive-groups {
			sdio1 {
				nvidia,schmitt;
				nvidia,drive-power = <1>;
				nvidia,pull-down-strength = <31>;
				nvidia,pull-up-strength = <31>;
				nvidia,slew-rate-rising = <3>;
				nvidia,slew-rate-falling = <3>;
			};
		};
	};

But it's probably still reasonably easy to make the parser for the mux-groups
node generic. Perhaps it makes sense for all SoCs to have a "mux-settings"
node, even if they don't have any other custom nodes?

-- 
nvpublic

[RFC PATCH 10/12] arm/tegra: Add device tree support to pinmux driver

[Jamie Iles]

On Mon, Aug 15, 2011 at 01:44:53PM -0700, Stephen Warren wrote:
> Jamie Iles wrote at Monday, August 15, 2011 2:36 PM:
> > On Mon, Aug 15, 2011 at 09:07:16PM +0100, Jamie Iles wrote:
> > > Hi Stephen,
> > >
> > > On Fri, Aug 12, 2011 at 04:54:55PM -0600, Stephen Warren wrote:
> > > > Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ...
> > > > diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
> ...
> > > > +static void __init tegra_pinmux_probe_dt(struct platform_device *pdev)
> > > > +{
> > > > +	int pg;
> > > > +
> > > > +	for (pg = 0; pg < TEGRA_MAX_PINGROUP; pg++) {
> > > > +		const char *pg_name = pingroup_name(pg);
> > > > +		struct tegra_pingroup_config config;
> > > > +		struct device_node *pg_node;
> > > > +		int ret;
> > > > +		const char *s;
> > > > +
> > > > +		pg_node = of_find_child_node_by_name(pdev->dev.of_node,
> > > > +						     pg_name);
> > > > +		if (pg_node == NULL)
> > > > +			continue;
> > > > +
> > > > +		config.pingroup = pg;
> > > > +
> > > > +		ret = of_property_read_string(pg_node, "nvidia,function", &s);
> ...
> > > > +		ret = of_property_read_string(pg_node, "nvidia,pull", &s);
> ...
> > > > +		if (of_find_property(pg_node, "nvidia,tristate", NULL))
> ...
> > > > +		tegra_pinmux_config_pingroup(&config);
> > > > +
> > > > +		of_node_put(pg_node);
> > > > +	}
> > > > +}
> > >
> > > I need to implement DT muxing configuration for my platform, and I believe
> > > that what you have here would work fine for me too, and to avoid duplicating
> > > the same thing, I wonder if this could be a little more generic.
> > >
> > > So if the platform specific pinmux driver called the pinmux parser with a
> > > callback for a pingroup configuration function then this wouldn't need the
> > > nvidia specific properties.  I'd envisage the setup callback to be something
> > > like:
> > >
> > > 	int pingroup_configure(const char *name, unsigned long flags);
> > 
> > and it if this took the device_node too then the platform specific bits could
> > handle more esoteric properties if required.  I'll have a go at prototyping
> > this tomorrow unless there are any obvious reasons that this is a stupid idea!
> 
> I expect some of the code could be shared.
> 
> The only worry I have is whether some SoCs don't configure things like
> pinmux function in the same place as pad function (pullup/down, tristate),
> and hence whether a generic binding is generally applicable. I suppose the
> code could always ignore unused properties.

Yes, well our hardware doesn't support any of these features other than 
setting the function so in the picoxcell backend I'd just WARN_ON() invalid 
flags settings.

> I wonder how much of this is relevant to Linus W's pinctrl API?

Hmm, not sure on that one, it's been a while since I've looked at Linus' 
patches.

> Note that in the updated patch series I just posted, I reworked the binding
> a little; Tegra has two sets of pin-groups, one configuring muxing, pullup/
> down, and tri-state, and the other configuring various driver strength/
> rate properties. Hence, the tree is now e.g.:
> 
> 	pinmux: pinmux at 70000000 {
> 		compatible = "nvidia,tegra20-pinmux";
> 		reg = < 0x70000000 0xc00 >;
> 		nvidia,mux-groups {
> 			cdev1 {
> 				nvidia,function = "plla_out";
> 			};
> 			cdev2 {
> 				nvidia,function = "pllp_out4";
> 				nvidia,pull-down;
> 				nvidia,tristate;
> 			};
> 		};
> 		nvidia,drive-groups {
> 			sdio1 {
> 				nvidia,schmitt;
> 				nvidia,drive-power = <1>;
> 				nvidia,pull-down-strength = <31>;
> 				nvidia,pull-up-strength = <31>;
> 				nvidia,slew-rate-rising = <3>;
> 				nvidia,slew-rate-falling = <3>;
> 			};
> 		};
> 	};
> 
> But it's probably still reasonably easy to make the parser for the mux-groups
> node generic. Perhaps it makes sense for all SoCs to have a "mux-settings"
> node, even if they don't have any other custom nodes?

You have a much more complex chip than I do!  I don't know if *all* SoC's have 
to have the same muxing binding, but it feels that this one should cover a lot 
of the most common bases.

Jamie