From mboxrd@z Thu Jan  1 00:00:00 1970
From: linux@arm.linux.org.uk (Russell King - ARM Linux)
Date: Wed, 21 Sep 2011 08:38:53 +0100
Subject: [PATCH] ARM: cache-l2x0: add resume entry for l2 in secure mode
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To: linux-arm-kernel@lists.infradead.org
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On Wed, Sep 21, 2011 at 01:53:37PM +0800, Barry Song wrote:
> yes. imx6q actually needs to enable l2 earlier than cpu_resume(and mmu
> resume). so how about letting outer_resume support both phy and virt
> address restore?

You can't call C functions in the kernel before the MMU is enabled.