[PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp

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* [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp
@ 2011-10-13  4:06 Haojian Zhuang
  2011-10-13  4:06 ` [PATCH v4 1/8] ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQ Haojian Zhuang
                   ` (7 more replies)
  0 siblings, 8 replies; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:06 UTC (permalink / raw)
  To: linux-arm-kernel

Changelog
v4:
       1. append one patch for clean gpio macros and use function instead.
v3:
       1. Rebase on Russell's for-next branch.
       2. Add clock support.
       3. Move gpio edge detection initiliaztion of arch-mmp into gpio driver.

v2:
      1. Remove gpio.c from mach-pxa & mach-mmp that is introduced from v1.
      2. Remove init function in gpio.c. Move the platfrom_device_register()
         into platform driver.
      3. Initialize pxa_gpio_regs in gpio-pxa.c
      4. Simplify code of identifing pxa gpio series or mmp gpio series.
      5. Use linux/io.h instead of asm/io.h.

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 1/8] ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQ
  2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
@ 2011-10-13  4:06 ` Haojian Zhuang
  2011-10-13 19:07   ` Grant Likely
  2011-10-13  4:06 ` [PATCH v4 2/8] ARM: pxa: use chained interrupt for GPIO0 and GPIO1 Haojian Zhuang
                   ` (6 subsequent siblings)
  7 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:06 UTC (permalink / raw)
  To: linux-arm-kernel

Avoid potential naming confliction since multiple architecture will be built
in a single kernel.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
---
 arch/arm/mach-pxa/am200epd.c                      |    4 +-
 arch/arm/mach-pxa/am300epd.c                      |    4 +-
 arch/arm/mach-pxa/balloon3.c                      |    2 +-
 arch/arm/mach-pxa/cm-x270.c                       |    2 +-
 arch/arm/mach-pxa/cm-x2xx.c                       |    4 +-
 arch/arm/mach-pxa/cm-x300.c                       |    6 +-
 arch/arm/mach-pxa/em-x270.c                       |    6 +-
 arch/arm/mach-pxa/eseries.c                       |    4 +-
 arch/arm/mach-pxa/idp.c                           |    4 +-
 arch/arm/mach-pxa/include/mach/balloon3.h         |    6 +-
 arch/arm/mach-pxa/include/mach/corgi.h            |   24 +++++-----
 arch/arm/mach-pxa/include/mach/gpio.h             |    2 +-
 arch/arm/mach-pxa/include/mach/gumstix.h          |   20 +++++-----
 arch/arm/mach-pxa/include/mach/idp.h              |   14 +++---
 arch/arm/mach-pxa/include/mach/irqs.h             |    2 +-
 arch/arm/mach-pxa/include/mach/palmld.h           |    8 ++--
 arch/arm/mach-pxa/include/mach/palmt5.h           |    8 ++--
 arch/arm/mach-pxa/include/mach/palmtc.h           |    4 +-
 arch/arm/mach-pxa/include/mach/palmtx.h           |    8 ++--
 arch/arm/mach-pxa/include/mach/pcm027.h           |    8 ++--
 arch/arm/mach-pxa/include/mach/pcm990_baseboard.h |   14 +++---
 arch/arm/mach-pxa/include/mach/poodle.h           |   24 +++++-----
 arch/arm/mach-pxa/include/mach/spitz.h            |   34 ++++++++--------
 arch/arm/mach-pxa/include/mach/tosa.h             |   46 ++++++++++----------
 arch/arm/mach-pxa/include/mach/trizeps4.h         |   16 ++++----
 arch/arm/mach-pxa/littleton.c                     |    4 +-
 arch/arm/mach-pxa/lpd270.c                        |    4 +-
 arch/arm/mach-pxa/lubbock.c                       |    4 +-
 arch/arm/mach-pxa/mainstone.c                     |    4 +-
 arch/arm/mach-pxa/poodle.c                        |    4 +-
 arch/arm/mach-pxa/sharpsl_pm.c                    |   24 +++++-----
 arch/arm/mach-pxa/stargate2.c                     |   22 +++++-----
 arch/arm/mach-pxa/vpac270.c                       |    6 +-
 arch/arm/mach-pxa/zylonite_pxa300.c               |    4 +-
 34 files changed, 175 insertions(+), 175 deletions(-)

diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 4cb069f..ccdac4b 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -138,7 +138,7 @@ static void am200_cleanup(struct metronomefb_par *par)
 {
 	int i;
 
-	free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
+	free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
 
 	for (i = 0; i < ARRAY_SIZE(gpios); i++)
 		gpio_free(gpios[i]);
@@ -292,7 +292,7 @@ static int am200_setup_irq(struct fb_info *info)
 {
 	int ret;
 
-	ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq,
+	ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am200_handle_irq,
 				IRQF_DISABLED|IRQF_TRIGGER_FALLING,
 				"AM200", info->par);
 	if (ret)
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index fa8bad2..76c4b94 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -176,7 +176,7 @@ static void am300_cleanup(struct broadsheetfb_par *par)
 {
 	int i;
 
-	free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
+	free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
 
 	for (i = 0; i < ARRAY_SIZE(gpios); i++)
 		gpio_free(gpios[i]);
@@ -240,7 +240,7 @@ static int am300_setup_irq(struct fb_info *info)
 	int ret;
 	struct broadsheetfb_par *par = info->par;
 
-	ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am300_handle_irq,
+	ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am300_handle_irq,
 				IRQF_DISABLED|IRQF_TRIGGER_RISING,
 				"AM300", par);
 	if (ret)
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 7765d67..9164281 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -179,7 +179,7 @@ static unsigned long balloon3_ac97_pin_config[] __initdata = {
 };
 
 static struct ucb1400_pdata vpac270_ucb1400_pdata = {
-	.irq		= IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ),
+	.irq		= PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ),
 };
 
 
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index 13518a7..4ebcee5 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -33,7 +33,7 @@
 /* GPIO IRQ usage */
 #define GPIO83_MMC_IRQ		(83)
 
-#define CMX270_MMC_IRQ		IRQ_GPIO(GPIO83_MMC_IRQ)
+#define CMX270_MMC_IRQ		PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ)
 
 /* MMC power enable */
 #define GPIO105_MMC_POWER	(105)
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index 349896c..6211378 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -58,8 +58,8 @@ extern void cmx270_init(void);
 #define CMX255_GPIO_IT8152_IRQ	(0)
 #define CMX270_GPIO_IT8152_IRQ	(22)
 
-#define CMX255_ETHIRQ		IRQ_GPIO(GPIO22_ETHIRQ)
-#define CMX270_ETHIRQ		IRQ_GPIO(GPIO10_ETHIRQ)
+#define CMX255_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
+#define CMX270_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
 
 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
 static struct resource cmx255_dm9000_resource[] = {
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index d2da301..7ff8a27 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -64,7 +64,7 @@
 #define GPIO82_MMC_IRQ		(82)
 #define GPIO85_MMC_WP		(85)
 
-#define	CM_X300_MMC_IRQ		IRQ_GPIO(GPIO82_MMC_IRQ)
+#define	CM_X300_MMC_IRQ		PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)
 
 #define GPIO95_RTC_CS		(95)
 #define GPIO96_RTC_WR		(96)
@@ -229,8 +229,8 @@ static struct resource dm9000_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[2] = {
-		.start	= IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
-		.end	= IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
+		.start	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
+		.end	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 94acc0b..3358f4d 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -70,7 +70,7 @@
 /* common  GPIOs */
 #define GPIO11_NAND_CS		(11)
 #define GPIO41_ETHIRQ		(41)
-#define EM_X270_ETHIRQ		IRQ_GPIO(GPIO41_ETHIRQ)
+#define EM_X270_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO41_ETHIRQ)
 #define GPIO115_WLAN_PWEN	(115)
 #define GPIO19_WLAN_STRAP	(19)
 #define GPIO9_USB_VBUS_EN	(9)
@@ -805,7 +805,7 @@ static struct spi_board_info em_x270_spi_devices[] __initdata = {
 		.modalias		= "libertas_spi",
 		.max_speed_hz		= 13000000,
 		.bus_num		= 2,
-		.irq			= IRQ_GPIO(116),
+		.irq			= PXA_GPIO_TO_IRQ(116),
 		.chip_select		= 0,
 		.controller_data	= &em_x270_libertas_chip,
 		.platform_data		= &em_x270_libertas_pdata,
@@ -1203,7 +1203,7 @@ static struct da903x_platform_data em_x270_da9030_info = {
 
 static struct i2c_board_info em_x270_i2c_pmic_info = {
 	I2C_BOARD_INFO("da9030", 0x49),
-	.irq = IRQ_GPIO(0),
+	.irq = PXA_GPIO_TO_IRQ(0),
 	.platform_data = &em_x270_da9030_info,
 };
 
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 8e697dd..cf84051 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -119,8 +119,8 @@ struct resource eseries_tmio_resources[] = {
 		.flags  = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start  = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
-		.end    = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
+		.start  = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
+		.end    = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
 		.flags  = IORESOURCE_IRQ,
 	},
 };
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index ddf20e5..bb98ff5 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -75,8 +75,8 @@ static struct resource smc91x_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start	= IRQ_GPIO(4),
-		.end	= IRQ_GPIO(4),
+		.start	= PXA_GPIO_TO_IRQ(4),
+		.end	= PXA_GPIO_TO_IRQ(4),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 7074e76..65cb71f 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -172,9 +172,9 @@ enum balloon3_features {
 /* Balloon3 Interrupts */
 #define BALLOON3_IRQ(x)		(IRQ_BOARD_START + (x))
 
-#define BALLOON3_AUX_NIRQ	IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
-#define BALLOON3_CODEC_IRQ	IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
-#define BALLOON3_S0_CD_IRQ	IRQ_GPIO(BALLOON3_GPIO_S0_CD)
+#define BALLOON3_AUX_NIRQ	PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
+#define BALLOON3_CODEC_IRQ	PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
+#define BALLOON3_S0_CD_IRQ	PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)
 
 #define BALLOON3_NR_IRQS	(IRQ_BOARD_START + 16)
 
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 5dfd119..c9f8617 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -66,18 +66,18 @@
 /*
  * Corgi Interrupts
  */
-#define CORGI_IRQ_GPIO_KEY_INT		IRQ_GPIO(0)
-#define CORGI_IRQ_GPIO_AC_IN		IRQ_GPIO(1)
-#define CORGI_IRQ_GPIO_WAKEUP		IRQ_GPIO(3)
-#define CORGI_IRQ_GPIO_AK_INT		IRQ_GPIO(4)
-#define CORGI_IRQ_GPIO_TP_INT		IRQ_GPIO(5)
-#define CORGI_IRQ_GPIO_nSD_DETECT	IRQ_GPIO(9)
-#define CORGI_IRQ_GPIO_nSD_INT		IRQ_GPIO(10)
-#define CORGI_IRQ_GPIO_MAIN_BAT_LOW	IRQ_GPIO(11)
-#define CORGI_IRQ_GPIO_CF_CD		IRQ_GPIO(14)
-#define CORGI_IRQ_GPIO_CHRG_FULL	IRQ_GPIO(16)	/* Battery fully charged */
-#define CORGI_IRQ_GPIO_CF_IRQ		IRQ_GPIO(17)
-#define CORGI_IRQ_GPIO_KEY_SENSE(a)	IRQ_GPIO(58+(a))	/* Keyboard Sense lines */
+#define CORGI_IRQ_GPIO_KEY_INT		PXA_GPIO_TO_IRQ(0)
+#define CORGI_IRQ_GPIO_AC_IN		PXA_GPIO_TO_IRQ(1)
+#define CORGI_IRQ_GPIO_WAKEUP		PXA_GPIO_TO_IRQ(3)
+#define CORGI_IRQ_GPIO_AK_INT		PXA_GPIO_TO_IRQ(4)
+#define CORGI_IRQ_GPIO_TP_INT		PXA_GPIO_TO_IRQ(5)
+#define CORGI_IRQ_GPIO_nSD_DETECT	PXA_GPIO_TO_IRQ(9)
+#define CORGI_IRQ_GPIO_nSD_INT		PXA_GPIO_TO_IRQ(10)
+#define CORGI_IRQ_GPIO_MAIN_BAT_LOW	PXA_GPIO_TO_IRQ(11)
+#define CORGI_IRQ_GPIO_CF_CD		PXA_GPIO_TO_IRQ(14)
+#define CORGI_IRQ_GPIO_CHRG_FULL	PXA_GPIO_TO_IRQ(16)	/* Battery fully charged */
+#define CORGI_IRQ_GPIO_CF_IRQ		PXA_GPIO_TO_IRQ(17)
+#define CORGI_IRQ_GPIO_KEY_SENSE(a)	PXA_GPIO_TO_IRQ(58+(a))	/* Keyboard Sense lines */
 
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 004cade..07fa3ba 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -28,7 +28,7 @@
 /* The defines for the driver are needed for the accelerated accessors */
 #include "gpio-pxa.h"
 
-#define gpio_to_irq(gpio)	IRQ_GPIO(gpio)
+#define gpio_to_irq(gpio)	PXA_GPIO_TO_IRQ(gpio)
 
 static inline int irq_to_gpio(unsigned int irq)
 {
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
index 9b89868..dba14b6 100644
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */
 #define GPIO_GUMSTIX_USB_GPIOx		41
 
 /* usb state change */
-#define GUMSTIX_USB_INTR_IRQ		IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn)
+#define GUMSTIX_USB_INTR_IRQ		PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
 
 #define GPIO_GUMSTIX_USB_GPIOn_MD	(GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
 #define GPIO_GUMSTIX_USB_GPIOx_CON_MD	(GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
@@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */
  */
 #define GUMSTIX_GPIO_nSD_WP		22 /* SD Write Protect */
 #define GUMSTIX_GPIO_nSD_DETECT		11 /* MMC/SD Card Detect */
-#define GUMSTIX_IRQ_GPIO_nSD_DETECT	IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT)
+#define GUMSTIX_IRQ_GPIO_nSD_DETECT	PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)
 
 /*
  * SMC Ethernet definitions
@@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */
 
 #define GPIO_GUMSTIX_ETH0		36
 #define GPIO_GUMSTIX_ETH0_MD		(GPIO_GUMSTIX_ETH0 | GPIO_IN)
-#define GUMSTIX_ETH0_IRQ		IRQ_GPIO(GPIO_GUMSTIX_ETH0)
+#define GUMSTIX_ETH0_IRQ		PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
 #define GPIO_GUMSTIX_ETH1		27
 #define GPIO_GUMSTIX_ETH1_MD		(GPIO_GUMSTIX_ETH1 | GPIO_IN)
-#define GUMSTIX_ETH1_IRQ		IRQ_GPIO(GPIO_GUMSTIX_ETH1)
+#define GUMSTIX_ETH1_IRQ		PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
 
 
 /* CF reset line */
@@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */
 #define GPIO4_nSTSCHG			GPIO4_nBVD1
 #define GPIO11_nCD			11
 #define GPIO26_PRDY_nBSY		26
-#define GUMSTIX_S0_nSTSCHG_IRQ		IRQ_GPIO(GPIO4_nSTSCHG)
-#define GUMSTIX_S0_nCD_IRQ		IRQ_GPIO(GPIO11_nCD)
-#define GUMSTIX_S0_PRDY_nBSY_IRQ	IRQ_GPIO(GPIO26_PRDY_nBSY)
+#define GUMSTIX_S0_nSTSCHG_IRQ		PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
+#define GUMSTIX_S0_nCD_IRQ		PXA_GPIO_TO_IRQ(GPIO11_nCD)
+#define GUMSTIX_S0_PRDY_nBSY_IRQ	PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
 
 /* CF slot 1 */
 #define GPIO18_nBVD1			18
 #define GPIO18_nSTSCHG			GPIO18_nBVD1
 #define GPIO36_nCD			36
 #define GPIO27_PRDY_nBSY		27
-#define GUMSTIX_S1_nSTSCHG_IRQ		IRQ_GPIO(GPIO18_nSTSCHG)
-#define GUMSTIX_S1_nCD_IRQ		IRQ_GPIO(GPIO36_nCD)
-#define GUMSTIX_S1_PRDY_nBSY_IRQ	IRQ_GPIO(GPIO27_PRDY_nBSY)
+#define GUMSTIX_S1_nSTSCHG_IRQ		PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
+#define GUMSTIX_S1_nCD_IRQ		PXA_GPIO_TO_IRQ(GPIO36_nCD)
+#define GUMSTIX_S1_PRDY_nBSY_IRQ	PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
 
 /* CF GPIO line modes */
 #define GPIO4_nSTSCHG_MD		(GPIO4_nSTSCHG | GPIO_IN)
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index 5eff96f..a7f912f 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -135,24 +135,24 @@
 
 /* A listing of interrupts used by external hardware devices */
 
-#define TOUCH_PANEL_IRQ			IRQ_GPIO(5)
-#define IDE_IRQ				IRQ_GPIO(21)
+#define TOUCH_PANEL_IRQ			PXA_GPIO_TO_IRQ(5)
+#define IDE_IRQ				PXA_GPIO_TO_IRQ(21)
 
 #define TOUCH_PANEL_IRQ_EDGE		IRQ_TYPE_EDGE_FALLING
 
-#define ETHERNET_IRQ			IRQ_GPIO(4)
+#define ETHERNET_IRQ			PXA_GPIO_TO_IRQ(4)
 #define ETHERNET_IRQ_EDGE		IRQ_TYPE_EDGE_RISING
 
 #define IDE_IRQ_EDGE			IRQ_TYPE_EDGE_RISING
 
-#define PCMCIA_S0_CD_VALID		IRQ_GPIO(7)
+#define PCMCIA_S0_CD_VALID		PXA_GPIO_TO_IRQ(7)
 #define PCMCIA_S0_CD_VALID_EDGE		IRQ_TYPE_EDGE_BOTH
 
-#define PCMCIA_S1_CD_VALID		IRQ_GPIO(8)
+#define PCMCIA_S1_CD_VALID		PXA_GPIO_TO_IRQ(8)
 #define PCMCIA_S1_CD_VALID_EDGE		IRQ_TYPE_EDGE_BOTH
 
-#define PCMCIA_S0_RDYINT		IRQ_GPIO(19)
-#define PCMCIA_S1_RDYINT		IRQ_GPIO(22)
+#define PCMCIA_S0_RDYINT		PXA_GPIO_TO_IRQ(19)
+#define PCMCIA_S1_RDYINT		PXA_GPIO_TO_IRQ(22)
 
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 7cc5a78..1f99664 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -91,7 +91,7 @@
 #define PXA_GPIO_IRQ_NUM	(192)
 
 #define GPIO_2_x_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
-#define IRQ_GPIO(x)	(((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
+#define PXA_GPIO_TO_IRQ(x)	(((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
 
 /*
  * The following interrupts are for board specific purposes. Since
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index ae536e8..2c44713 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -68,10 +68,10 @@
 /* 20, 53 and 86 are usb related too */
 
 /* INTERRUPTS */
-#define IRQ_GPIO_PALMLD_GPIO_RESET	IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET)
-#define IRQ_GPIO_PALMLD_SD_DETECT_N	IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N)
-#define IRQ_GPIO_PALMLD_WM9712_IRQ	IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ)
-#define IRQ_GPIO_PALMLD_IDE_IRQ		IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ)
+#define IRQ_GPIO_PALMLD_GPIO_RESET	PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET)
+#define IRQ_GPIO_PALMLD_SD_DETECT_N	PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N)
+#define IRQ_GPIO_PALMLD_WM9712_IRQ	PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ)
+#define IRQ_GPIO_PALMLD_IDE_IRQ		PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)
 
 
 /** HERE ARE INIT VALUES **/
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index 6baf746..0bd4f03 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -48,10 +48,10 @@
 #define GPIO_NR_PALMT5_BT_RESET			83
 
 /* INTERRUPTS */
-#define IRQ_GPIO_PALMT5_SD_DETECT_N	IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N)
-#define IRQ_GPIO_PALMT5_WM9712_IRQ	IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ)
-#define IRQ_GPIO_PALMT5_USB_DETECT	IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT)
-#define IRQ_GPIO_PALMT5_GPIO_RESET	IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET)
+#define IRQ_GPIO_PALMT5_SD_DETECT_N	PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N)
+#define IRQ_GPIO_PALMT5_WM9712_IRQ	PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ)
+#define IRQ_GPIO_PALMT5_USB_DETECT	PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT)
+#define IRQ_GPIO_PALMT5_GPIO_RESET	PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)
 
 /** HERE ARE INIT VALUES **/
 
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
index 3f9dd3f..c383a21 100644
--- a/arch/arm/mach-pxa/include/mach/palmtc.h
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -52,8 +52,8 @@
 #define GPIO_NR_PALMTC_IR_DISABLE	45
 
 /* IRQs */
-#define IRQ_GPIO_PALMTC_SD_DETECT_N	IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N)
-#define IRQ_GPIO_PALMTC_WLAN_READY	IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY)
+#define IRQ_GPIO_PALMTC_SD_DETECT_N	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N)
+#define IRQ_GPIO_PALMTC_WLAN_READY	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)
 
 /* UCB1400 GPIOs */
 #define GPIO_NR_PALMTC_POWER_DETECT	(0x80 | 0x00)
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 10abc4f..c3b6c72 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -62,10 +62,10 @@
 #define GPIO_NR_PALMTX_NAND_BUFFER_DIR		79
 
 /* INTERRUPTS */
-#define IRQ_GPIO_PALMTX_SD_DETECT_N	IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N)
-#define IRQ_GPIO_PALMTX_WM9712_IRQ	IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ)
-#define IRQ_GPIO_PALMTX_USB_DETECT	IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT)
-#define IRQ_GPIO_PALMTX_GPIO_RESET	IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET)
+#define IRQ_GPIO_PALMTX_SD_DETECT_N	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N)
+#define IRQ_GPIO_PALMTX_WM9712_IRQ	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ)
+#define IRQ_GPIO_PALMTX_USB_DETECT	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT)
+#define IRQ_GPIO_PALMTX_GPIO_RESET	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)
 
 /** HERE ARE INIT VALUES **/
 
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4bac588..6bf28de 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -34,7 +34,7 @@
 
 /* I2C RTC */
 #define PCM027_RTC_IRQ_GPIO	0
-#define PCM027_RTC_IRQ		IRQ_GPIO(PCM027_RTC_IRQ_GPIO)
+#define PCM027_RTC_IRQ		PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)
 #define PCM027_RTC_IRQ_EDGE	IRQ_TYPE_EDGE_FALLING
 #define ADR_PCM027_RTC		0x51	/* I2C address */
 
@@ -43,21 +43,21 @@
 
 /* Ethernet chip (SMSC91C111) */
 #define PCM027_ETH_IRQ_GPIO	52
-#define PCM027_ETH_IRQ		IRQ_GPIO(PCM027_ETH_IRQ_GPIO)
+#define PCM027_ETH_IRQ		PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)
 #define PCM027_ETH_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
 #define PCM027_ETH_PHYS		PXA_CS5_PHYS
 #define PCM027_ETH_SIZE		(1*1024*1024)
 
 /* CAN controller SJA1000 (unsupported yet) */
 #define PCM027_CAN_IRQ_GPIO	114
-#define PCM027_CAN_IRQ		IRQ_GPIO(PCM027_CAN_IRQ_GPIO)
+#define PCM027_CAN_IRQ		PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)
 #define PCM027_CAN_IRQ_EDGE	IRQ_TYPE_EDGE_FALLING
 #define PCM027_CAN_PHYS		0x22000000
 #define PCM027_CAN_SIZE		0x100
 
 /* SPI GPIO expander (unsupported yet) */
 #define PCM027_EGPIO_IRQ_GPIO	27
-#define PCM027_EGPIO_IRQ	IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO)
+#define PCM027_EGPIO_IRQ	PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)
 #define PCM027_EGPIO_IRQ_EDGE	IRQ_TYPE_EDGE_FALLING
 #define PCM027_EGPIO_CS		24
 /*
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
index 8a4383b..d727916 100644
--- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
+++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
@@ -28,14 +28,14 @@
 
 /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
 #define PCM990_CTRL_INT_IRQ_GPIO	9
-#define PCM990_CTRL_INT_IRQ		IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
+#define PCM990_CTRL_INT_IRQ		PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
 #define PCM990_CTRL_INT_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
 #define PCM990_CTRL_PHYS		PXA_CS1_PHYS	/* 16-Bit */
 #define PCM990_CTRL_BASE		0xea000000
 #define PCM990_CTRL_SIZE		(1*1024*1024)
 
 #define PCM990_CTRL_PWR_IRQ_GPIO	14
-#define PCM990_CTRL_PWR_IRQ		IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
+#define PCM990_CTRL_PWR_IRQ		PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)
 #define PCM990_CTRL_PWR_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
 
 /* visible CPLD (U7) registers */
@@ -132,7 +132,7 @@
  * IDE
  */
 #define PCM990_IDE_IRQ_GPIO	13
-#define PCM990_IDE_IRQ		IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
+#define PCM990_IDE_IRQ		PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)
 #define PCM990_IDE_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
 #define PCM990_IDE_PLD_PHYS	0x20000000	/* 16 bit wide */
 #define PCM990_IDE_PLD_BASE	0xee000000
@@ -188,11 +188,11 @@
  * Compact Flash
  */
 #define PCM990_CF_IRQ_GPIO	11
-#define PCM990_CF_IRQ		IRQ_GPIO(PCM990_CF_IRQ_GPIO)
+#define PCM990_CF_IRQ		PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)
 #define PCM990_CF_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
 
 #define PCM990_CF_CD_GPIO	12
-#define PCM990_CF_CD		IRQ_GPIO(PCM990_CF_CD_GPIO)
+#define PCM990_CF_CD		PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)
 #define PCM990_CF_CD_EDGE	IRQ_TYPE_EDGE_RISING
 
 #define PCM990_CF_PLD_PHYS	0x30000000	/* 16 bit wide */
@@ -258,14 +258,14 @@
  * Wolfson AC97 Touch
  */
 #define PCM990_AC97_IRQ_GPIO	10
-#define PCM990_AC97_IRQ		IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
+#define PCM990_AC97_IRQ		PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)
 #define PCM990_AC97_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
 
 /*
  * MMC phyCORE
  */
 #define PCM990_MMC0_IRQ_GPIO	9
-#define PCM990_MMC0_IRQ		IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
+#define PCM990_MMC0_IRQ		PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)
 #define PCM990_MMC0_IRQ_EDGE	IRQ_TYPE_EDGE_FALLING
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 83d1cfd..763fdc4 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -47,18 +47,18 @@
 #define POODLE_GPIO_DISCHARGE_ON        (42) /* Enable battery discharge */
 
 /* PXA GPIOs */
-#define POODLE_IRQ_GPIO_ON_KEY		IRQ_GPIO(0)
-#define POODLE_IRQ_GPIO_AC_IN		IRQ_GPIO(1)
-#define POODLE_IRQ_GPIO_HP_IN		IRQ_GPIO(4)
-#define POODLE_IRQ_GPIO_CO		IRQ_GPIO(16)
-#define POODLE_IRQ_GPIO_TP_INT		IRQ_GPIO(5)
-#define POODLE_IRQ_GPIO_WAKEUP		IRQ_GPIO(11)
-#define POODLE_IRQ_GPIO_GA_INT		IRQ_GPIO(10)
-#define POODLE_IRQ_GPIO_CF_IRQ		IRQ_GPIO(17)
-#define POODLE_IRQ_GPIO_CF_CD		IRQ_GPIO(14)
-#define POODLE_IRQ_GPIO_nSD_INT		IRQ_GPIO(8)
-#define POODLE_IRQ_GPIO_nSD_DETECT	IRQ_GPIO(9)
-#define POODLE_IRQ_GPIO_MAIN_BAT_LOW	IRQ_GPIO(13)
+#define POODLE_IRQ_GPIO_ON_KEY		PXA_GPIO_TO_IRQ(0)
+#define POODLE_IRQ_GPIO_AC_IN		PXA_GPIO_TO_IRQ(1)
+#define POODLE_IRQ_GPIO_HP_IN		PXA_GPIO_TO_IRQ(4)
+#define POODLE_IRQ_GPIO_CO		PXA_GPIO_TO_IRQ(16)
+#define POODLE_IRQ_GPIO_TP_INT		PXA_GPIO_TO_IRQ(5)
+#define POODLE_IRQ_GPIO_WAKEUP		PXA_GPIO_TO_IRQ(11)
+#define POODLE_IRQ_GPIO_GA_INT		PXA_GPIO_TO_IRQ(10)
+#define POODLE_IRQ_GPIO_CF_IRQ		PXA_GPIO_TO_IRQ(17)
+#define POODLE_IRQ_GPIO_CF_CD		PXA_GPIO_TO_IRQ(14)
+#define POODLE_IRQ_GPIO_nSD_INT		PXA_GPIO_TO_IRQ(8)
+#define POODLE_IRQ_GPIO_nSD_DETECT	PXA_GPIO_TO_IRQ(9)
+#define POODLE_IRQ_GPIO_MAIN_BAT_LOW	PXA_GPIO_TO_IRQ(13)
 
 /* SCOOP GPIOs */
 #define POODLE_SCOOP_CHARGE_ON	SCOOP_GPCR_PA11
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index 685749a..273381a 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -164,23 +164,23 @@
 
 /* Spitz IRQ Definitions */
 
-#define SPITZ_IRQ_GPIO_KEY_INT        IRQ_GPIO(SPITZ_GPIO_KEY_INT)
-#define SPITZ_IRQ_GPIO_AC_IN          IRQ_GPIO(SPITZ_GPIO_AC_IN)
-#define SPITZ_IRQ_GPIO_AK_INT         IRQ_GPIO(SPITZ_GPIO_AK_INT)
-#define SPITZ_IRQ_GPIO_HP_IN          IRQ_GPIO(SPITZ_GPIO_HP_IN)
-#define SPITZ_IRQ_GPIO_TP_INT         IRQ_GPIO(SPITZ_GPIO_TP_INT)
-#define SPITZ_IRQ_GPIO_SYNC           IRQ_GPIO(SPITZ_GPIO_SYNC)
-#define SPITZ_IRQ_GPIO_ON_KEY         IRQ_GPIO(SPITZ_GPIO_ON_KEY)
-#define SPITZ_IRQ_GPIO_SWA            IRQ_GPIO(SPITZ_GPIO_SWA)
-#define SPITZ_IRQ_GPIO_SWB            IRQ_GPIO(SPITZ_GPIO_SWB)
-#define SPITZ_IRQ_GPIO_BAT_COVER      IRQ_GPIO(SPITZ_GPIO_BAT_COVER)
-#define SPITZ_IRQ_GPIO_FATAL_BAT      IRQ_GPIO(SPITZ_GPIO_FATAL_BAT)
-#define SPITZ_IRQ_GPIO_CO             IRQ_GPIO(SPITZ_GPIO_CO)
-#define SPITZ_IRQ_GPIO_CF_IRQ         IRQ_GPIO(SPITZ_GPIO_CF_IRQ)
-#define SPITZ_IRQ_GPIO_CF_CD          IRQ_GPIO(SPITZ_GPIO_CF_CD)
-#define SPITZ_IRQ_GPIO_CF2_IRQ        IRQ_GPIO(SPITZ_GPIO_CF2_IRQ)
-#define SPITZ_IRQ_GPIO_nSD_INT        IRQ_GPIO(SPITZ_GPIO_nSD_INT)
-#define SPITZ_IRQ_GPIO_nSD_DETECT     IRQ_GPIO(SPITZ_GPIO_nSD_DETECT)
+#define SPITZ_IRQ_GPIO_KEY_INT        PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT)
+#define SPITZ_IRQ_GPIO_AC_IN          PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN)
+#define SPITZ_IRQ_GPIO_AK_INT         PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT)
+#define SPITZ_IRQ_GPIO_HP_IN          PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN)
+#define SPITZ_IRQ_GPIO_TP_INT         PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT)
+#define SPITZ_IRQ_GPIO_SYNC           PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC)
+#define SPITZ_IRQ_GPIO_ON_KEY         PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY)
+#define SPITZ_IRQ_GPIO_SWA            PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA)
+#define SPITZ_IRQ_GPIO_SWB            PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB)
+#define SPITZ_IRQ_GPIO_BAT_COVER      PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER)
+#define SPITZ_IRQ_GPIO_FATAL_BAT      PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT)
+#define SPITZ_IRQ_GPIO_CO             PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO)
+#define SPITZ_IRQ_GPIO_CF_IRQ         PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ)
+#define SPITZ_IRQ_GPIO_CF_CD          PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD)
+#define SPITZ_IRQ_GPIO_CF2_IRQ        PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ)
+#define SPITZ_IRQ_GPIO_nSD_INT        PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT)
+#define SPITZ_IRQ_GPIO_nSD_DETECT     PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT)
 
 /*
  * Shared data structures
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 1272c4b..4653539 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -141,30 +141,30 @@
 /*
  * Interrupts
  */
-#define TOSA_IRQ_GPIO_WAKEUP        	IRQ_GPIO(TOSA_GPIO_WAKEUP)
-#define TOSA_IRQ_GPIO_AC_IN         	IRQ_GPIO(TOSA_GPIO_AC_IN)
-#define TOSA_IRQ_GPIO_RECORD_BTN    	IRQ_GPIO(TOSA_GPIO_RECORD_BTN)
-#define TOSA_IRQ_GPIO_SYNC          	IRQ_GPIO(TOSA_GPIO_SYNC)
-#define TOSA_IRQ_GPIO_USB_IN        	IRQ_GPIO(TOSA_GPIO_USB_IN)
-#define TOSA_IRQ_GPIO_JACKET_DETECT 	IRQ_GPIO(TOSA_GPIO_JACKET_DETECT)
-#define TOSA_IRQ_GPIO_nSD_INT       	IRQ_GPIO(TOSA_GPIO_nSD_INT)
-#define TOSA_IRQ_GPIO_nSD_DETECT    	IRQ_GPIO(TOSA_GPIO_nSD_DETECT)
-#define TOSA_IRQ_GPIO_BAT1_CRG      	IRQ_GPIO(TOSA_GPIO_BAT1_CRG)
-#define TOSA_IRQ_GPIO_CF_CD         	IRQ_GPIO(TOSA_GPIO_CF_CD)
-#define TOSA_IRQ_GPIO_BAT0_CRG      	IRQ_GPIO(TOSA_GPIO_BAT0_CRG)
-#define TOSA_IRQ_GPIO_TC6393XB_INT    	IRQ_GPIO(TOSA_GPIO_TC6393XB_INT)
-#define TOSA_IRQ_GPIO_BAT0_LOW      	IRQ_GPIO(TOSA_GPIO_BAT0_LOW)
-#define TOSA_IRQ_GPIO_EAR_IN        	IRQ_GPIO(TOSA_GPIO_EAR_IN)
-#define TOSA_IRQ_GPIO_CF_IRQ        	IRQ_GPIO(TOSA_GPIO_CF_IRQ)
-#define TOSA_IRQ_GPIO_ON_KEY        	IRQ_GPIO(TOSA_GPIO_ON_KEY)
-#define TOSA_IRQ_GPIO_VGA_LINE      	IRQ_GPIO(TOSA_GPIO_VGA_LINE)
-#define TOSA_IRQ_GPIO_TP_INT        	IRQ_GPIO(TOSA_GPIO_TP_INT)
-#define TOSA_IRQ_GPIO_JC_CF_IRQ     	IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ)
-#define TOSA_IRQ_GPIO_BAT_LOCKED    	IRQ_GPIO(TOSA_GPIO_BAT_LOCKED)
-#define TOSA_IRQ_GPIO_BAT1_LOW      	IRQ_GPIO(TOSA_GPIO_BAT1_LOW)
-#define TOSA_IRQ_GPIO_KEY_SENSE(a)  	IRQ_GPIO(69+(a))
-
-#define TOSA_IRQ_GPIO_MAIN_BAT_LOW 	IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW)
+#define TOSA_IRQ_GPIO_WAKEUP        	PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP)
+#define TOSA_IRQ_GPIO_AC_IN         	PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN)
+#define TOSA_IRQ_GPIO_RECORD_BTN    	PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN)
+#define TOSA_IRQ_GPIO_SYNC          	PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC)
+#define TOSA_IRQ_GPIO_USB_IN        	PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN)
+#define TOSA_IRQ_GPIO_JACKET_DETECT 	PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT)
+#define TOSA_IRQ_GPIO_nSD_INT       	PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT)
+#define TOSA_IRQ_GPIO_nSD_DETECT    	PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT)
+#define TOSA_IRQ_GPIO_BAT1_CRG      	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG)
+#define TOSA_IRQ_GPIO_CF_CD         	PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD)
+#define TOSA_IRQ_GPIO_BAT0_CRG      	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG)
+#define TOSA_IRQ_GPIO_TC6393XB_INT    	PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT)
+#define TOSA_IRQ_GPIO_BAT0_LOW      	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW)
+#define TOSA_IRQ_GPIO_EAR_IN        	PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN)
+#define TOSA_IRQ_GPIO_CF_IRQ        	PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ)
+#define TOSA_IRQ_GPIO_ON_KEY        	PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY)
+#define TOSA_IRQ_GPIO_VGA_LINE      	PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE)
+#define TOSA_IRQ_GPIO_TP_INT        	PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT)
+#define TOSA_IRQ_GPIO_JC_CF_IRQ     	PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ)
+#define TOSA_IRQ_GPIO_BAT_LOCKED    	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED)
+#define TOSA_IRQ_GPIO_BAT1_LOW      	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW)
+#define TOSA_IRQ_GPIO_KEY_SENSE(a)  	PXA_GPIO_TO_IRQ(69+(a))
+
+#define TOSA_IRQ_GPIO_MAIN_BAT_LOW 	PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW)
 
 #define TOSA_KEY_SYNC		KEY_102ND /* ??? */
 
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 903e1a2..d2ca010 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -43,30 +43,30 @@
 
 /* Ethernet Controller Davicom DM9000 */
 #define GPIO_DM9000		101
-#define TRIZEPS4_ETH_IRQ	IRQ_GPIO(GPIO_DM9000)
+#define TRIZEPS4_ETH_IRQ	PXA_GPIO_TO_IRQ(GPIO_DM9000)
 
 /* UCB1400 audio / TS-controller */
 #define GPIO_UCB1400		1
-#define TRIZEPS4_UCB1400_IRQ	IRQ_GPIO(GPIO_UCB1400)
+#define TRIZEPS4_UCB1400_IRQ	PXA_GPIO_TO_IRQ(GPIO_UCB1400)
 
 /* PCMCIA socket Compact Flash */
 #define GPIO_PCD		11		/* PCMCIA Card Detect */
-#define TRIZEPS4_CD_IRQ		IRQ_GPIO(GPIO_PCD)
+#define TRIZEPS4_CD_IRQ		PXA_GPIO_TO_IRQ(GPIO_PCD)
 #define GPIO_PRDY		13		/* READY / nINT */
-#define TRIZEPS4_READY_NINT	IRQ_GPIO(GPIO_PRDY)
+#define TRIZEPS4_READY_NINT	PXA_GPIO_TO_IRQ(GPIO_PRDY)
 
 /* MMC socket */
 #define GPIO_MMC_DET		12
-#define TRIZEPS4_MMC_IRQ	IRQ_GPIO(GPIO_MMC_DET)
+#define TRIZEPS4_MMC_IRQ	PXA_GPIO_TO_IRQ(GPIO_MMC_DET)
 
 /* DOC NAND chip */
 #define GPIO_DOC_LOCK           94
 #define GPIO_DOC_IRQ            93
-#define TRIZEPS4_DOC_IRQ        IRQ_GPIO(GPIO_DOC_IRQ)
+#define TRIZEPS4_DOC_IRQ        PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ)
 
 /* SPI interface */
 #define GPIO_SPI                53
-#define TRIZEPS4_SPI_IRQ        IRQ_GPIO(GPIO_SPI)
+#define TRIZEPS4_SPI_IRQ        PXA_GPIO_TO_IRQ(GPIO_SPI)
 
 /* LEDS using tx2 / rx2 */
 #define GPIO_SYS_BUSY_LED	46
@@ -74,7 +74,7 @@
 
 /* Off-module PIC on ConXS board */
 #define GPIO_PIC		0
-#define TRIZEPS4_PIC_IRQ	IRQ_GPIO(GPIO_PIC)
+#define TRIZEPS4_PIC_IRQ	PXA_GPIO_TO_IRQ(GPIO_PIC)
 
 #ifdef CONFIG_MACH_TRIZEPS_CONXS
 /* for CONXS base board define these registers */
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 0037e57..9cd2356 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -124,8 +124,8 @@ static struct resource smc91x_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start	= IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
-		.end	= IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
+		.start	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
+		.end	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 	}
 };
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 64540d9..60c49f1 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -152,8 +152,8 @@ static void __init lpd270_init_irq(void)
 					 handle_level_irq);
 		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 	}
-	irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
-	irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+	irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index c48ce6d..2fb2b50 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -170,8 +170,8 @@ static void __init lubbock_init_irq(void)
 		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 	}
 
-	irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
-	irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+	irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 0567d39..ea62a99 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -178,8 +178,8 @@ static void __init mainstone_init_irq(void)
 	MST_INTMSKENA = 0;
 	MST_INTSETCLR = 0;
 
-	irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
-	irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+	irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 948ce3e..7c8a308 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -165,8 +165,8 @@ static struct resource locomo_resources[] = {
 		.flags		= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start		= IRQ_GPIO(10),
-		.end		= IRQ_GPIO(10),
+		.start		= PXA_GPIO_TO_IRQ(10),
+		.end		= PXA_GPIO_TO_IRQ(10),
 		.flags		= IORESOURCE_IRQ,
 	},
 };
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 785880f..8d5168d 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -907,24 +907,24 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
 	gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock);
 
 	/* Register interrupt handlers */
-	if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
-		dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
+	if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
+		dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin));
 	}
 
-	if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
-		dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
+	if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
+		dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock));
 	}
 
 	if (sharpsl_pm.machinfo->gpio_fatal) {
-		if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
-			dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
+		if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
+			dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal));
 		}
 	}
 
 	if (sharpsl_pm.machinfo->batfull_irq) {
 		/* Register interrupt handler. */
-		if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
-			dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
+		if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
+			dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull));
 		}
 	}
 
@@ -953,14 +953,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev)
 
 	led_trigger_unregister_simple(sharpsl_charge_led_trigger);
 
-	free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
-	free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
+	free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
+	free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
 
 	if (sharpsl_pm.machinfo->gpio_fatal)
-		free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
+		free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
 
 	if (sharpsl_pm.machinfo->batfull_irq)
-		free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
+		free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
 
 	gpio_free(sharpsl_pm.machinfo->gpio_batlock);
 	gpio_free(sharpsl_pm.machinfo->gpio_batfull);
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 4c9a48b..bbf79d5 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -376,7 +376,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
 		.bus_num = 1,
 		.chip_select = 0,
 		.controller_data = &staccel_chip_info,
-		.irq = IRQ_GPIO(96),
+		.irq = PXA_GPIO_TO_IRQ(96),
 	}, {
 		.modalias = "cc2420",
 		.max_speed_hz = 6500000,
@@ -560,18 +560,18 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
 		/* Through a nand gate - Also beware, on V2 sensor board the
 		 * pull up resistors are missing.
 		 */
-		.irq = IRQ_GPIO(99),
+		.irq = PXA_GPIO_TO_IRQ(99),
 	}, { /* ITS400 Sensor board only */
 		.type = "tsl2561",
 		.addr = 0x49,
 		/* Through a nand gate - Also beware, on V2 sensor board the
 		 * pull up resistors are missing.
 		 */
-		.irq = IRQ_GPIO(99),
+		.irq = PXA_GPIO_TO_IRQ(99),
 	}, { /* ITS400 Sensor board only */
 		.type = "tmp175",
 		.addr = 0x4A,
-		.irq = IRQ_GPIO(96),
+		.irq = PXA_GPIO_TO_IRQ(96),
 	}, { /* IMB400 Multimedia board */
 		.type = "wm8940",
 		.addr = 0x1A,
@@ -661,8 +661,8 @@ static struct resource smc91x_resources[] = {
 		.flags = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start = IRQ_GPIO(40),
-		.end = IRQ_GPIO(40),
+		.start = PXA_GPIO_TO_IRQ(40),
+		.end = PXA_GPIO_TO_IRQ(40),
 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
@@ -707,7 +707,7 @@ static int stargate2_mci_init(struct device *dev,
 	}
 	gpio_direction_input(SG2_GPIO_nSD_DETECT);
 
-	err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT),
+	err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT),
 			  stargate2_detect_int,
 			  IRQ_TYPE_EDGE_BOTH,
 			  "MMC card detect",
@@ -738,7 +738,7 @@ static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
 
 static void stargate2_mci_exit(struct device *dev, void *data)
 {
-	free_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), data);
+	free_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), data);
 	gpio_free(SG2_SD_POWER_ENABLE);
 	gpio_free(SG2_GPIO_nSD_DETECT);
 }
@@ -938,18 +938,18 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
 		/* Through a nand gate - Also beware, on V2 sensor board the
 		 * pull up resistors are missing.
 		 */
-		.irq = IRQ_GPIO(99),
+		.irq = PXA_GPIO_TO_IRQ(99),
 	}, { /* ITS400 Sensor board only */
 		.type = "tsl2561",
 		.addr = 0x49,
 		/* Through a nand gate - Also beware, on V2 sensor board the
 		 * pull up resistors are missing.
 		 */
-		.irq = IRQ_GPIO(99),
+		.irq = PXA_GPIO_TO_IRQ(99),
 	}, { /* ITS400 Sensor board only */
 		.type = "tmp175",
 		.addr = 0x4A,
-		.irq = IRQ_GPIO(96),
+		.irq = PXA_GPIO_TO_IRQ(96),
 	},
 };
 
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index a7539a6..585e4f4 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -395,8 +395,8 @@ static struct resource vpac270_dm9000_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[2] = {
-		.start	= IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
-		.end	= IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
+		.start	= PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
+		.end	= PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	},
 };
@@ -433,7 +433,7 @@ static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
 };
 
 static struct ucb1400_pdata vpac270_ucb1400_pdata = {
-	.irq		= IRQ_GPIO(GPIO113_VPAC270_TS_IRQ),
+	.irq		= PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ),
 };
 
 static struct platform_device vpac270_ucb1400_device = {
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 93c64d8..86e59c0 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -231,12 +231,12 @@ static struct i2c_board_info zylonite_i2c_board_info[] = {
 		.type		= "pca9539",
 		.addr		= 0x74,
 		.platform_data	= &gpio_exp[0],
-		.irq		= IRQ_GPIO(18),
+		.irq		= PXA_GPIO_TO_IRQ(18),
 	}, {
 		.type		= "pca9539",
 		.addr		= 0x75,
 		.platform_data	= &gpio_exp[1],
-		.irq		= IRQ_GPIO(19),
+		.irq		= PXA_GPIO_TO_IRQ(19),
 	},
 };
 
-- 
1.7.2.5

^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH v4 1/8] ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQ
  2011-10-13  4:06 ` [PATCH v4 1/8] ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQ Haojian Zhuang
@ 2011-10-13 19:07   ` Grant Likely
  0 siblings, 0 replies; 25+ messages in thread
From: Grant Likely @ 2011-10-13 19:07 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 13, 2011 at 12:06:58PM +0800, Haojian Zhuang wrote:
> Avoid potential naming confliction since multiple architecture will be built
> in a single kernel.
> 
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>

Acked-by: Grant Likely <grant.likely@secretlab.ca>

> ---
>  arch/arm/mach-pxa/am200epd.c                      |    4 +-
>  arch/arm/mach-pxa/am300epd.c                      |    4 +-
>  arch/arm/mach-pxa/balloon3.c                      |    2 +-
>  arch/arm/mach-pxa/cm-x270.c                       |    2 +-
>  arch/arm/mach-pxa/cm-x2xx.c                       |    4 +-
>  arch/arm/mach-pxa/cm-x300.c                       |    6 +-
>  arch/arm/mach-pxa/em-x270.c                       |    6 +-
>  arch/arm/mach-pxa/eseries.c                       |    4 +-
>  arch/arm/mach-pxa/idp.c                           |    4 +-
>  arch/arm/mach-pxa/include/mach/balloon3.h         |    6 +-
>  arch/arm/mach-pxa/include/mach/corgi.h            |   24 +++++-----
>  arch/arm/mach-pxa/include/mach/gpio.h             |    2 +-
>  arch/arm/mach-pxa/include/mach/gumstix.h          |   20 +++++-----
>  arch/arm/mach-pxa/include/mach/idp.h              |   14 +++---
>  arch/arm/mach-pxa/include/mach/irqs.h             |    2 +-
>  arch/arm/mach-pxa/include/mach/palmld.h           |    8 ++--
>  arch/arm/mach-pxa/include/mach/palmt5.h           |    8 ++--
>  arch/arm/mach-pxa/include/mach/palmtc.h           |    4 +-
>  arch/arm/mach-pxa/include/mach/palmtx.h           |    8 ++--
>  arch/arm/mach-pxa/include/mach/pcm027.h           |    8 ++--
>  arch/arm/mach-pxa/include/mach/pcm990_baseboard.h |   14 +++---
>  arch/arm/mach-pxa/include/mach/poodle.h           |   24 +++++-----
>  arch/arm/mach-pxa/include/mach/spitz.h            |   34 ++++++++--------
>  arch/arm/mach-pxa/include/mach/tosa.h             |   46 ++++++++++----------
>  arch/arm/mach-pxa/include/mach/trizeps4.h         |   16 ++++----
>  arch/arm/mach-pxa/littleton.c                     |    4 +-
>  arch/arm/mach-pxa/lpd270.c                        |    4 +-
>  arch/arm/mach-pxa/lubbock.c                       |    4 +-
>  arch/arm/mach-pxa/mainstone.c                     |    4 +-
>  arch/arm/mach-pxa/poodle.c                        |    4 +-
>  arch/arm/mach-pxa/sharpsl_pm.c                    |   24 +++++-----
>  arch/arm/mach-pxa/stargate2.c                     |   22 +++++-----
>  arch/arm/mach-pxa/vpac270.c                       |    6 +-
>  arch/arm/mach-pxa/zylonite_pxa300.c               |    4 +-
>  34 files changed, 175 insertions(+), 175 deletions(-)
> 
> diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
> index 4cb069f..ccdac4b 100644
> --- a/arch/arm/mach-pxa/am200epd.c
> +++ b/arch/arm/mach-pxa/am200epd.c
> @@ -138,7 +138,7 @@ static void am200_cleanup(struct metronomefb_par *par)
>  {
>  	int i;
>  
> -	free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
> +	free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
>  
>  	for (i = 0; i < ARRAY_SIZE(gpios); i++)
>  		gpio_free(gpios[i]);
> @@ -292,7 +292,7 @@ static int am200_setup_irq(struct fb_info *info)
>  {
>  	int ret;
>  
> -	ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq,
> +	ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am200_handle_irq,
>  				IRQF_DISABLED|IRQF_TRIGGER_FALLING,
>  				"AM200", info->par);
>  	if (ret)
> diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
> index fa8bad2..76c4b94 100644
> --- a/arch/arm/mach-pxa/am300epd.c
> +++ b/arch/arm/mach-pxa/am300epd.c
> @@ -176,7 +176,7 @@ static void am300_cleanup(struct broadsheetfb_par *par)
>  {
>  	int i;
>  
> -	free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
> +	free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
>  
>  	for (i = 0; i < ARRAY_SIZE(gpios); i++)
>  		gpio_free(gpios[i]);
> @@ -240,7 +240,7 @@ static int am300_setup_irq(struct fb_info *info)
>  	int ret;
>  	struct broadsheetfb_par *par = info->par;
>  
> -	ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am300_handle_irq,
> +	ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am300_handle_irq,
>  				IRQF_DISABLED|IRQF_TRIGGER_RISING,
>  				"AM300", par);
>  	if (ret)
> diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
> index 7765d67..9164281 100644
> --- a/arch/arm/mach-pxa/balloon3.c
> +++ b/arch/arm/mach-pxa/balloon3.c
> @@ -179,7 +179,7 @@ static unsigned long balloon3_ac97_pin_config[] __initdata = {
>  };
>  
>  static struct ucb1400_pdata vpac270_ucb1400_pdata = {
> -	.irq		= IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ),
> +	.irq		= PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ),
>  };
>  
>  
> diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
> index 13518a7..4ebcee5 100644
> --- a/arch/arm/mach-pxa/cm-x270.c
> +++ b/arch/arm/mach-pxa/cm-x270.c
> @@ -33,7 +33,7 @@
>  /* GPIO IRQ usage */
>  #define GPIO83_MMC_IRQ		(83)
>  
> -#define CMX270_MMC_IRQ		IRQ_GPIO(GPIO83_MMC_IRQ)
> +#define CMX270_MMC_IRQ		PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ)
>  
>  /* MMC power enable */
>  #define GPIO105_MMC_POWER	(105)
> diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
> index 349896c..6211378 100644
> --- a/arch/arm/mach-pxa/cm-x2xx.c
> +++ b/arch/arm/mach-pxa/cm-x2xx.c
> @@ -58,8 +58,8 @@ extern void cmx270_init(void);
>  #define CMX255_GPIO_IT8152_IRQ	(0)
>  #define CMX270_GPIO_IT8152_IRQ	(22)
>  
> -#define CMX255_ETHIRQ		IRQ_GPIO(GPIO22_ETHIRQ)
> -#define CMX270_ETHIRQ		IRQ_GPIO(GPIO10_ETHIRQ)
> +#define CMX255_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
> +#define CMX270_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
>  
>  #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
>  static struct resource cmx255_dm9000_resource[] = {
> diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
> index d2da301..7ff8a27 100644
> --- a/arch/arm/mach-pxa/cm-x300.c
> +++ b/arch/arm/mach-pxa/cm-x300.c
> @@ -64,7 +64,7 @@
>  #define GPIO82_MMC_IRQ		(82)
>  #define GPIO85_MMC_WP		(85)
>  
> -#define	CM_X300_MMC_IRQ		IRQ_GPIO(GPIO82_MMC_IRQ)
> +#define	CM_X300_MMC_IRQ		PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)
>  
>  #define GPIO95_RTC_CS		(95)
>  #define GPIO96_RTC_WR		(96)
> @@ -229,8 +229,8 @@ static struct resource dm9000_resources[] = {
>  		.flags	= IORESOURCE_MEM,
>  	},
>  	[2] = {
> -		.start	= IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
> -		.end	= IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
> +		.start	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
> +		.end	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
>  		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
>  	}
>  };
> diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
> index 94acc0b..3358f4d 100644
> --- a/arch/arm/mach-pxa/em-x270.c
> +++ b/arch/arm/mach-pxa/em-x270.c
> @@ -70,7 +70,7 @@
>  /* common  GPIOs */
>  #define GPIO11_NAND_CS		(11)
>  #define GPIO41_ETHIRQ		(41)
> -#define EM_X270_ETHIRQ		IRQ_GPIO(GPIO41_ETHIRQ)
> +#define EM_X270_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO41_ETHIRQ)
>  #define GPIO115_WLAN_PWEN	(115)
>  #define GPIO19_WLAN_STRAP	(19)
>  #define GPIO9_USB_VBUS_EN	(9)
> @@ -805,7 +805,7 @@ static struct spi_board_info em_x270_spi_devices[] __initdata = {
>  		.modalias		= "libertas_spi",
>  		.max_speed_hz		= 13000000,
>  		.bus_num		= 2,
> -		.irq			= IRQ_GPIO(116),
> +		.irq			= PXA_GPIO_TO_IRQ(116),
>  		.chip_select		= 0,
>  		.controller_data	= &em_x270_libertas_chip,
>  		.platform_data		= &em_x270_libertas_pdata,
> @@ -1203,7 +1203,7 @@ static struct da903x_platform_data em_x270_da9030_info = {
>  
>  static struct i2c_board_info em_x270_i2c_pmic_info = {
>  	I2C_BOARD_INFO("da9030", 0x49),
> -	.irq = IRQ_GPIO(0),
> +	.irq = PXA_GPIO_TO_IRQ(0),
>  	.platform_data = &em_x270_da9030_info,
>  };
>  
> diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
> index 8e697dd..cf84051 100644
> --- a/arch/arm/mach-pxa/eseries.c
> +++ b/arch/arm/mach-pxa/eseries.c
> @@ -119,8 +119,8 @@ struct resource eseries_tmio_resources[] = {
>  		.flags  = IORESOURCE_MEM,
>  	},
>  	[1] = {
> -		.start  = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
> -		.end    = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
> +		.start  = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
> +		.end    = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
>  		.flags  = IORESOURCE_IRQ,
>  	},
>  };
> diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
> index ddf20e5..bb98ff5 100644
> --- a/arch/arm/mach-pxa/idp.c
> +++ b/arch/arm/mach-pxa/idp.c
> @@ -75,8 +75,8 @@ static struct resource smc91x_resources[] = {
>  		.flags	= IORESOURCE_MEM,
>  	},
>  	[1] = {
> -		.start	= IRQ_GPIO(4),
> -		.end	= IRQ_GPIO(4),
> +		.start	= PXA_GPIO_TO_IRQ(4),
> +		.end	= PXA_GPIO_TO_IRQ(4),
>  		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
>  	}
>  };
> diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
> index 7074e76..65cb71f 100644
> --- a/arch/arm/mach-pxa/include/mach/balloon3.h
> +++ b/arch/arm/mach-pxa/include/mach/balloon3.h
> @@ -172,9 +172,9 @@ enum balloon3_features {
>  /* Balloon3 Interrupts */
>  #define BALLOON3_IRQ(x)		(IRQ_BOARD_START + (x))
>  
> -#define BALLOON3_AUX_NIRQ	IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
> -#define BALLOON3_CODEC_IRQ	IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
> -#define BALLOON3_S0_CD_IRQ	IRQ_GPIO(BALLOON3_GPIO_S0_CD)
> +#define BALLOON3_AUX_NIRQ	PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
> +#define BALLOON3_CODEC_IRQ	PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
> +#define BALLOON3_S0_CD_IRQ	PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)
>  
>  #define BALLOON3_NR_IRQS	(IRQ_BOARD_START + 16)
>  
> diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
> index 5dfd119..c9f8617 100644
> --- a/arch/arm/mach-pxa/include/mach/corgi.h
> +++ b/arch/arm/mach-pxa/include/mach/corgi.h
> @@ -66,18 +66,18 @@
>  /*
>   * Corgi Interrupts
>   */
> -#define CORGI_IRQ_GPIO_KEY_INT		IRQ_GPIO(0)
> -#define CORGI_IRQ_GPIO_AC_IN		IRQ_GPIO(1)
> -#define CORGI_IRQ_GPIO_WAKEUP		IRQ_GPIO(3)
> -#define CORGI_IRQ_GPIO_AK_INT		IRQ_GPIO(4)
> -#define CORGI_IRQ_GPIO_TP_INT		IRQ_GPIO(5)
> -#define CORGI_IRQ_GPIO_nSD_DETECT	IRQ_GPIO(9)
> -#define CORGI_IRQ_GPIO_nSD_INT		IRQ_GPIO(10)
> -#define CORGI_IRQ_GPIO_MAIN_BAT_LOW	IRQ_GPIO(11)
> -#define CORGI_IRQ_GPIO_CF_CD		IRQ_GPIO(14)
> -#define CORGI_IRQ_GPIO_CHRG_FULL	IRQ_GPIO(16)	/* Battery fully charged */
> -#define CORGI_IRQ_GPIO_CF_IRQ		IRQ_GPIO(17)
> -#define CORGI_IRQ_GPIO_KEY_SENSE(a)	IRQ_GPIO(58+(a))	/* Keyboard Sense lines */
> +#define CORGI_IRQ_GPIO_KEY_INT		PXA_GPIO_TO_IRQ(0)
> +#define CORGI_IRQ_GPIO_AC_IN		PXA_GPIO_TO_IRQ(1)
> +#define CORGI_IRQ_GPIO_WAKEUP		PXA_GPIO_TO_IRQ(3)
> +#define CORGI_IRQ_GPIO_AK_INT		PXA_GPIO_TO_IRQ(4)
> +#define CORGI_IRQ_GPIO_TP_INT		PXA_GPIO_TO_IRQ(5)
> +#define CORGI_IRQ_GPIO_nSD_DETECT	PXA_GPIO_TO_IRQ(9)
> +#define CORGI_IRQ_GPIO_nSD_INT		PXA_GPIO_TO_IRQ(10)
> +#define CORGI_IRQ_GPIO_MAIN_BAT_LOW	PXA_GPIO_TO_IRQ(11)
> +#define CORGI_IRQ_GPIO_CF_CD		PXA_GPIO_TO_IRQ(14)
> +#define CORGI_IRQ_GPIO_CHRG_FULL	PXA_GPIO_TO_IRQ(16)	/* Battery fully charged */
> +#define CORGI_IRQ_GPIO_CF_IRQ		PXA_GPIO_TO_IRQ(17)
> +#define CORGI_IRQ_GPIO_KEY_SENSE(a)	PXA_GPIO_TO_IRQ(58+(a))	/* Keyboard Sense lines */
>  
>  
>  /*
> diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
> index 004cade..07fa3ba 100644
> --- a/arch/arm/mach-pxa/include/mach/gpio.h
> +++ b/arch/arm/mach-pxa/include/mach/gpio.h
> @@ -28,7 +28,7 @@
>  /* The defines for the driver are needed for the accelerated accessors */
>  #include "gpio-pxa.h"
>  
> -#define gpio_to_irq(gpio)	IRQ_GPIO(gpio)
> +#define gpio_to_irq(gpio)	PXA_GPIO_TO_IRQ(gpio)
>  
>  static inline int irq_to_gpio(unsigned int irq)
>  {
> diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
> index 9b89868..dba14b6 100644
> --- a/arch/arm/mach-pxa/include/mach/gumstix.h
> +++ b/arch/arm/mach-pxa/include/mach/gumstix.h
> @@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */
>  #define GPIO_GUMSTIX_USB_GPIOx		41
>  
>  /* usb state change */
> -#define GUMSTIX_USB_INTR_IRQ		IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn)
> +#define GUMSTIX_USB_INTR_IRQ		PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
>  
>  #define GPIO_GUMSTIX_USB_GPIOn_MD	(GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
>  #define GPIO_GUMSTIX_USB_GPIOx_CON_MD	(GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
> @@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */
>   */
>  #define GUMSTIX_GPIO_nSD_WP		22 /* SD Write Protect */
>  #define GUMSTIX_GPIO_nSD_DETECT		11 /* MMC/SD Card Detect */
> -#define GUMSTIX_IRQ_GPIO_nSD_DETECT	IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT)
> +#define GUMSTIX_IRQ_GPIO_nSD_DETECT	PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)
>  
>  /*
>   * SMC Ethernet definitions
> @@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */
>  
>  #define GPIO_GUMSTIX_ETH0		36
>  #define GPIO_GUMSTIX_ETH0_MD		(GPIO_GUMSTIX_ETH0 | GPIO_IN)
> -#define GUMSTIX_ETH0_IRQ		IRQ_GPIO(GPIO_GUMSTIX_ETH0)
> +#define GUMSTIX_ETH0_IRQ		PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
>  #define GPIO_GUMSTIX_ETH1		27
>  #define GPIO_GUMSTIX_ETH1_MD		(GPIO_GUMSTIX_ETH1 | GPIO_IN)
> -#define GUMSTIX_ETH1_IRQ		IRQ_GPIO(GPIO_GUMSTIX_ETH1)
> +#define GUMSTIX_ETH1_IRQ		PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
>  
>  
>  /* CF reset line */
> @@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */
>  #define GPIO4_nSTSCHG			GPIO4_nBVD1
>  #define GPIO11_nCD			11
>  #define GPIO26_PRDY_nBSY		26
> -#define GUMSTIX_S0_nSTSCHG_IRQ		IRQ_GPIO(GPIO4_nSTSCHG)
> -#define GUMSTIX_S0_nCD_IRQ		IRQ_GPIO(GPIO11_nCD)
> -#define GUMSTIX_S0_PRDY_nBSY_IRQ	IRQ_GPIO(GPIO26_PRDY_nBSY)
> +#define GUMSTIX_S0_nSTSCHG_IRQ		PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
> +#define GUMSTIX_S0_nCD_IRQ		PXA_GPIO_TO_IRQ(GPIO11_nCD)
> +#define GUMSTIX_S0_PRDY_nBSY_IRQ	PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
>  
>  /* CF slot 1 */
>  #define GPIO18_nBVD1			18
>  #define GPIO18_nSTSCHG			GPIO18_nBVD1
>  #define GPIO36_nCD			36
>  #define GPIO27_PRDY_nBSY		27
> -#define GUMSTIX_S1_nSTSCHG_IRQ		IRQ_GPIO(GPIO18_nSTSCHG)
> -#define GUMSTIX_S1_nCD_IRQ		IRQ_GPIO(GPIO36_nCD)
> -#define GUMSTIX_S1_PRDY_nBSY_IRQ	IRQ_GPIO(GPIO27_PRDY_nBSY)
> +#define GUMSTIX_S1_nSTSCHG_IRQ		PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
> +#define GUMSTIX_S1_nCD_IRQ		PXA_GPIO_TO_IRQ(GPIO36_nCD)
> +#define GUMSTIX_S1_PRDY_nBSY_IRQ	PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
>  
>  /* CF GPIO line modes */
>  #define GPIO4_nSTSCHG_MD		(GPIO4_nSTSCHG | GPIO_IN)
> diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
> index 5eff96f..a7f912f 100644
> --- a/arch/arm/mach-pxa/include/mach/idp.h
> +++ b/arch/arm/mach-pxa/include/mach/idp.h
> @@ -135,24 +135,24 @@
>  
>  /* A listing of interrupts used by external hardware devices */
>  
> -#define TOUCH_PANEL_IRQ			IRQ_GPIO(5)
> -#define IDE_IRQ				IRQ_GPIO(21)
> +#define TOUCH_PANEL_IRQ			PXA_GPIO_TO_IRQ(5)
> +#define IDE_IRQ				PXA_GPIO_TO_IRQ(21)
>  
>  #define TOUCH_PANEL_IRQ_EDGE		IRQ_TYPE_EDGE_FALLING
>  
> -#define ETHERNET_IRQ			IRQ_GPIO(4)
> +#define ETHERNET_IRQ			PXA_GPIO_TO_IRQ(4)
>  #define ETHERNET_IRQ_EDGE		IRQ_TYPE_EDGE_RISING
>  
>  #define IDE_IRQ_EDGE			IRQ_TYPE_EDGE_RISING
>  
> -#define PCMCIA_S0_CD_VALID		IRQ_GPIO(7)
> +#define PCMCIA_S0_CD_VALID		PXA_GPIO_TO_IRQ(7)
>  #define PCMCIA_S0_CD_VALID_EDGE		IRQ_TYPE_EDGE_BOTH
>  
> -#define PCMCIA_S1_CD_VALID		IRQ_GPIO(8)
> +#define PCMCIA_S1_CD_VALID		PXA_GPIO_TO_IRQ(8)
>  #define PCMCIA_S1_CD_VALID_EDGE		IRQ_TYPE_EDGE_BOTH
>  
> -#define PCMCIA_S0_RDYINT		IRQ_GPIO(19)
> -#define PCMCIA_S1_RDYINT		IRQ_GPIO(22)
> +#define PCMCIA_S0_RDYINT		PXA_GPIO_TO_IRQ(19)
> +#define PCMCIA_S1_RDYINT		PXA_GPIO_TO_IRQ(22)
>  
>  
>  /*
> diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
> index 7cc5a78..1f99664 100644
> --- a/arch/arm/mach-pxa/include/mach/irqs.h
> +++ b/arch/arm/mach-pxa/include/mach/irqs.h
> @@ -91,7 +91,7 @@
>  #define PXA_GPIO_IRQ_NUM	(192)
>  
>  #define GPIO_2_x_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
> -#define IRQ_GPIO(x)	(((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
> +#define PXA_GPIO_TO_IRQ(x)	(((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
>  
>  /*
>   * The following interrupts are for board specific purposes. Since
> diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
> index ae536e8..2c44713 100644
> --- a/arch/arm/mach-pxa/include/mach/palmld.h
> +++ b/arch/arm/mach-pxa/include/mach/palmld.h
> @@ -68,10 +68,10 @@
>  /* 20, 53 and 86 are usb related too */
>  
>  /* INTERRUPTS */
> -#define IRQ_GPIO_PALMLD_GPIO_RESET	IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET)
> -#define IRQ_GPIO_PALMLD_SD_DETECT_N	IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N)
> -#define IRQ_GPIO_PALMLD_WM9712_IRQ	IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ)
> -#define IRQ_GPIO_PALMLD_IDE_IRQ		IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ)
> +#define IRQ_GPIO_PALMLD_GPIO_RESET	PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET)
> +#define IRQ_GPIO_PALMLD_SD_DETECT_N	PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N)
> +#define IRQ_GPIO_PALMLD_WM9712_IRQ	PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ)
> +#define IRQ_GPIO_PALMLD_IDE_IRQ		PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)
>  
>  
>  /** HERE ARE INIT VALUES **/
> diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
> index 6baf746..0bd4f03 100644
> --- a/arch/arm/mach-pxa/include/mach/palmt5.h
> +++ b/arch/arm/mach-pxa/include/mach/palmt5.h
> @@ -48,10 +48,10 @@
>  #define GPIO_NR_PALMT5_BT_RESET			83
>  
>  /* INTERRUPTS */
> -#define IRQ_GPIO_PALMT5_SD_DETECT_N	IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N)
> -#define IRQ_GPIO_PALMT5_WM9712_IRQ	IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ)
> -#define IRQ_GPIO_PALMT5_USB_DETECT	IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT)
> -#define IRQ_GPIO_PALMT5_GPIO_RESET	IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET)
> +#define IRQ_GPIO_PALMT5_SD_DETECT_N	PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N)
> +#define IRQ_GPIO_PALMT5_WM9712_IRQ	PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ)
> +#define IRQ_GPIO_PALMT5_USB_DETECT	PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT)
> +#define IRQ_GPIO_PALMT5_GPIO_RESET	PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)
>  
>  /** HERE ARE INIT VALUES **/
>  
> diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
> index 3f9dd3f..c383a21 100644
> --- a/arch/arm/mach-pxa/include/mach/palmtc.h
> +++ b/arch/arm/mach-pxa/include/mach/palmtc.h
> @@ -52,8 +52,8 @@
>  #define GPIO_NR_PALMTC_IR_DISABLE	45
>  
>  /* IRQs */
> -#define IRQ_GPIO_PALMTC_SD_DETECT_N	IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N)
> -#define IRQ_GPIO_PALMTC_WLAN_READY	IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY)
> +#define IRQ_GPIO_PALMTC_SD_DETECT_N	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N)
> +#define IRQ_GPIO_PALMTC_WLAN_READY	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)
>  
>  /* UCB1400 GPIOs */
>  #define GPIO_NR_PALMTC_POWER_DETECT	(0x80 | 0x00)
> diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
> index 10abc4f..c3b6c72 100644
> --- a/arch/arm/mach-pxa/include/mach/palmtx.h
> +++ b/arch/arm/mach-pxa/include/mach/palmtx.h
> @@ -62,10 +62,10 @@
>  #define GPIO_NR_PALMTX_NAND_BUFFER_DIR		79
>  
>  /* INTERRUPTS */
> -#define IRQ_GPIO_PALMTX_SD_DETECT_N	IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N)
> -#define IRQ_GPIO_PALMTX_WM9712_IRQ	IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ)
> -#define IRQ_GPIO_PALMTX_USB_DETECT	IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT)
> -#define IRQ_GPIO_PALMTX_GPIO_RESET	IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET)
> +#define IRQ_GPIO_PALMTX_SD_DETECT_N	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N)
> +#define IRQ_GPIO_PALMTX_WM9712_IRQ	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ)
> +#define IRQ_GPIO_PALMTX_USB_DETECT	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT)
> +#define IRQ_GPIO_PALMTX_GPIO_RESET	PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)
>  
>  /** HERE ARE INIT VALUES **/
>  
> diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
> index 4bac588..6bf28de 100644
> --- a/arch/arm/mach-pxa/include/mach/pcm027.h
> +++ b/arch/arm/mach-pxa/include/mach/pcm027.h
> @@ -34,7 +34,7 @@
>  
>  /* I2C RTC */
>  #define PCM027_RTC_IRQ_GPIO	0
> -#define PCM027_RTC_IRQ		IRQ_GPIO(PCM027_RTC_IRQ_GPIO)
> +#define PCM027_RTC_IRQ		PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)
>  #define PCM027_RTC_IRQ_EDGE	IRQ_TYPE_EDGE_FALLING
>  #define ADR_PCM027_RTC		0x51	/* I2C address */
>  
> @@ -43,21 +43,21 @@
>  
>  /* Ethernet chip (SMSC91C111) */
>  #define PCM027_ETH_IRQ_GPIO	52
> -#define PCM027_ETH_IRQ		IRQ_GPIO(PCM027_ETH_IRQ_GPIO)
> +#define PCM027_ETH_IRQ		PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)
>  #define PCM027_ETH_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
>  #define PCM027_ETH_PHYS		PXA_CS5_PHYS
>  #define PCM027_ETH_SIZE		(1*1024*1024)
>  
>  /* CAN controller SJA1000 (unsupported yet) */
>  #define PCM027_CAN_IRQ_GPIO	114
> -#define PCM027_CAN_IRQ		IRQ_GPIO(PCM027_CAN_IRQ_GPIO)
> +#define PCM027_CAN_IRQ		PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)
>  #define PCM027_CAN_IRQ_EDGE	IRQ_TYPE_EDGE_FALLING
>  #define PCM027_CAN_PHYS		0x22000000
>  #define PCM027_CAN_SIZE		0x100
>  
>  /* SPI GPIO expander (unsupported yet) */
>  #define PCM027_EGPIO_IRQ_GPIO	27
> -#define PCM027_EGPIO_IRQ	IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO)
> +#define PCM027_EGPIO_IRQ	PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)
>  #define PCM027_EGPIO_IRQ_EDGE	IRQ_TYPE_EDGE_FALLING
>  #define PCM027_EGPIO_CS		24
>  /*
> diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
> index 8a4383b..d727916 100644
> --- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
> +++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
> @@ -28,14 +28,14 @@
>  
>  /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
>  #define PCM990_CTRL_INT_IRQ_GPIO	9
> -#define PCM990_CTRL_INT_IRQ		IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
> +#define PCM990_CTRL_INT_IRQ		PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
>  #define PCM990_CTRL_INT_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
>  #define PCM990_CTRL_PHYS		PXA_CS1_PHYS	/* 16-Bit */
>  #define PCM990_CTRL_BASE		0xea000000
>  #define PCM990_CTRL_SIZE		(1*1024*1024)
>  
>  #define PCM990_CTRL_PWR_IRQ_GPIO	14
> -#define PCM990_CTRL_PWR_IRQ		IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
> +#define PCM990_CTRL_PWR_IRQ		PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)
>  #define PCM990_CTRL_PWR_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
>  
>  /* visible CPLD (U7) registers */
> @@ -132,7 +132,7 @@
>   * IDE
>   */
>  #define PCM990_IDE_IRQ_GPIO	13
> -#define PCM990_IDE_IRQ		IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
> +#define PCM990_IDE_IRQ		PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)
>  #define PCM990_IDE_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
>  #define PCM990_IDE_PLD_PHYS	0x20000000	/* 16 bit wide */
>  #define PCM990_IDE_PLD_BASE	0xee000000
> @@ -188,11 +188,11 @@
>   * Compact Flash
>   */
>  #define PCM990_CF_IRQ_GPIO	11
> -#define PCM990_CF_IRQ		IRQ_GPIO(PCM990_CF_IRQ_GPIO)
> +#define PCM990_CF_IRQ		PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)
>  #define PCM990_CF_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
>  
>  #define PCM990_CF_CD_GPIO	12
> -#define PCM990_CF_CD		IRQ_GPIO(PCM990_CF_CD_GPIO)
> +#define PCM990_CF_CD		PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)
>  #define PCM990_CF_CD_EDGE	IRQ_TYPE_EDGE_RISING
>  
>  #define PCM990_CF_PLD_PHYS	0x30000000	/* 16 bit wide */
> @@ -258,14 +258,14 @@
>   * Wolfson AC97 Touch
>   */
>  #define PCM990_AC97_IRQ_GPIO	10
> -#define PCM990_AC97_IRQ		IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
> +#define PCM990_AC97_IRQ		PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)
>  #define PCM990_AC97_IRQ_EDGE	IRQ_TYPE_EDGE_RISING
>  
>  /*
>   * MMC phyCORE
>   */
>  #define PCM990_MMC0_IRQ_GPIO	9
> -#define PCM990_MMC0_IRQ		IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
> +#define PCM990_MMC0_IRQ		PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)
>  #define PCM990_MMC0_IRQ_EDGE	IRQ_TYPE_EDGE_FALLING
>  
>  /*
> diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
> index 83d1cfd..763fdc4 100644
> --- a/arch/arm/mach-pxa/include/mach/poodle.h
> +++ b/arch/arm/mach-pxa/include/mach/poodle.h
> @@ -47,18 +47,18 @@
>  #define POODLE_GPIO_DISCHARGE_ON        (42) /* Enable battery discharge */
>  
>  /* PXA GPIOs */
> -#define POODLE_IRQ_GPIO_ON_KEY		IRQ_GPIO(0)
> -#define POODLE_IRQ_GPIO_AC_IN		IRQ_GPIO(1)
> -#define POODLE_IRQ_GPIO_HP_IN		IRQ_GPIO(4)
> -#define POODLE_IRQ_GPIO_CO		IRQ_GPIO(16)
> -#define POODLE_IRQ_GPIO_TP_INT		IRQ_GPIO(5)
> -#define POODLE_IRQ_GPIO_WAKEUP		IRQ_GPIO(11)
> -#define POODLE_IRQ_GPIO_GA_INT		IRQ_GPIO(10)
> -#define POODLE_IRQ_GPIO_CF_IRQ		IRQ_GPIO(17)
> -#define POODLE_IRQ_GPIO_CF_CD		IRQ_GPIO(14)
> -#define POODLE_IRQ_GPIO_nSD_INT		IRQ_GPIO(8)
> -#define POODLE_IRQ_GPIO_nSD_DETECT	IRQ_GPIO(9)
> -#define POODLE_IRQ_GPIO_MAIN_BAT_LOW	IRQ_GPIO(13)
> +#define POODLE_IRQ_GPIO_ON_KEY		PXA_GPIO_TO_IRQ(0)
> +#define POODLE_IRQ_GPIO_AC_IN		PXA_GPIO_TO_IRQ(1)
> +#define POODLE_IRQ_GPIO_HP_IN		PXA_GPIO_TO_IRQ(4)
> +#define POODLE_IRQ_GPIO_CO		PXA_GPIO_TO_IRQ(16)
> +#define POODLE_IRQ_GPIO_TP_INT		PXA_GPIO_TO_IRQ(5)
> +#define POODLE_IRQ_GPIO_WAKEUP		PXA_GPIO_TO_IRQ(11)
> +#define POODLE_IRQ_GPIO_GA_INT		PXA_GPIO_TO_IRQ(10)
> +#define POODLE_IRQ_GPIO_CF_IRQ		PXA_GPIO_TO_IRQ(17)
> +#define POODLE_IRQ_GPIO_CF_CD		PXA_GPIO_TO_IRQ(14)
> +#define POODLE_IRQ_GPIO_nSD_INT		PXA_GPIO_TO_IRQ(8)
> +#define POODLE_IRQ_GPIO_nSD_DETECT	PXA_GPIO_TO_IRQ(9)
> +#define POODLE_IRQ_GPIO_MAIN_BAT_LOW	PXA_GPIO_TO_IRQ(13)
>  
>  /* SCOOP GPIOs */
>  #define POODLE_SCOOP_CHARGE_ON	SCOOP_GPCR_PA11
> diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
> index 685749a..273381a 100644
> --- a/arch/arm/mach-pxa/include/mach/spitz.h
> +++ b/arch/arm/mach-pxa/include/mach/spitz.h
> @@ -164,23 +164,23 @@
>  
>  /* Spitz IRQ Definitions */
>  
> -#define SPITZ_IRQ_GPIO_KEY_INT        IRQ_GPIO(SPITZ_GPIO_KEY_INT)
> -#define SPITZ_IRQ_GPIO_AC_IN          IRQ_GPIO(SPITZ_GPIO_AC_IN)
> -#define SPITZ_IRQ_GPIO_AK_INT         IRQ_GPIO(SPITZ_GPIO_AK_INT)
> -#define SPITZ_IRQ_GPIO_HP_IN          IRQ_GPIO(SPITZ_GPIO_HP_IN)
> -#define SPITZ_IRQ_GPIO_TP_INT         IRQ_GPIO(SPITZ_GPIO_TP_INT)
> -#define SPITZ_IRQ_GPIO_SYNC           IRQ_GPIO(SPITZ_GPIO_SYNC)
> -#define SPITZ_IRQ_GPIO_ON_KEY         IRQ_GPIO(SPITZ_GPIO_ON_KEY)
> -#define SPITZ_IRQ_GPIO_SWA            IRQ_GPIO(SPITZ_GPIO_SWA)
> -#define SPITZ_IRQ_GPIO_SWB            IRQ_GPIO(SPITZ_GPIO_SWB)
> -#define SPITZ_IRQ_GPIO_BAT_COVER      IRQ_GPIO(SPITZ_GPIO_BAT_COVER)
> -#define SPITZ_IRQ_GPIO_FATAL_BAT      IRQ_GPIO(SPITZ_GPIO_FATAL_BAT)
> -#define SPITZ_IRQ_GPIO_CO             IRQ_GPIO(SPITZ_GPIO_CO)
> -#define SPITZ_IRQ_GPIO_CF_IRQ         IRQ_GPIO(SPITZ_GPIO_CF_IRQ)
> -#define SPITZ_IRQ_GPIO_CF_CD          IRQ_GPIO(SPITZ_GPIO_CF_CD)
> -#define SPITZ_IRQ_GPIO_CF2_IRQ        IRQ_GPIO(SPITZ_GPIO_CF2_IRQ)
> -#define SPITZ_IRQ_GPIO_nSD_INT        IRQ_GPIO(SPITZ_GPIO_nSD_INT)
> -#define SPITZ_IRQ_GPIO_nSD_DETECT     IRQ_GPIO(SPITZ_GPIO_nSD_DETECT)
> +#define SPITZ_IRQ_GPIO_KEY_INT        PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT)
> +#define SPITZ_IRQ_GPIO_AC_IN          PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN)
> +#define SPITZ_IRQ_GPIO_AK_INT         PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT)
> +#define SPITZ_IRQ_GPIO_HP_IN          PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN)
> +#define SPITZ_IRQ_GPIO_TP_INT         PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT)
> +#define SPITZ_IRQ_GPIO_SYNC           PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC)
> +#define SPITZ_IRQ_GPIO_ON_KEY         PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY)
> +#define SPITZ_IRQ_GPIO_SWA            PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA)
> +#define SPITZ_IRQ_GPIO_SWB            PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB)
> +#define SPITZ_IRQ_GPIO_BAT_COVER      PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER)
> +#define SPITZ_IRQ_GPIO_FATAL_BAT      PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT)
> +#define SPITZ_IRQ_GPIO_CO             PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO)
> +#define SPITZ_IRQ_GPIO_CF_IRQ         PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ)
> +#define SPITZ_IRQ_GPIO_CF_CD          PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD)
> +#define SPITZ_IRQ_GPIO_CF2_IRQ        PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ)
> +#define SPITZ_IRQ_GPIO_nSD_INT        PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT)
> +#define SPITZ_IRQ_GPIO_nSD_DETECT     PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT)
>  
>  /*
>   * Shared data structures
> diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
> index 1272c4b..4653539 100644
> --- a/arch/arm/mach-pxa/include/mach/tosa.h
> +++ b/arch/arm/mach-pxa/include/mach/tosa.h
> @@ -141,30 +141,30 @@
>  /*
>   * Interrupts
>   */
> -#define TOSA_IRQ_GPIO_WAKEUP        	IRQ_GPIO(TOSA_GPIO_WAKEUP)
> -#define TOSA_IRQ_GPIO_AC_IN         	IRQ_GPIO(TOSA_GPIO_AC_IN)
> -#define TOSA_IRQ_GPIO_RECORD_BTN    	IRQ_GPIO(TOSA_GPIO_RECORD_BTN)
> -#define TOSA_IRQ_GPIO_SYNC          	IRQ_GPIO(TOSA_GPIO_SYNC)
> -#define TOSA_IRQ_GPIO_USB_IN        	IRQ_GPIO(TOSA_GPIO_USB_IN)
> -#define TOSA_IRQ_GPIO_JACKET_DETECT 	IRQ_GPIO(TOSA_GPIO_JACKET_DETECT)
> -#define TOSA_IRQ_GPIO_nSD_INT       	IRQ_GPIO(TOSA_GPIO_nSD_INT)
> -#define TOSA_IRQ_GPIO_nSD_DETECT    	IRQ_GPIO(TOSA_GPIO_nSD_DETECT)
> -#define TOSA_IRQ_GPIO_BAT1_CRG      	IRQ_GPIO(TOSA_GPIO_BAT1_CRG)
> -#define TOSA_IRQ_GPIO_CF_CD         	IRQ_GPIO(TOSA_GPIO_CF_CD)
> -#define TOSA_IRQ_GPIO_BAT0_CRG      	IRQ_GPIO(TOSA_GPIO_BAT0_CRG)
> -#define TOSA_IRQ_GPIO_TC6393XB_INT    	IRQ_GPIO(TOSA_GPIO_TC6393XB_INT)
> -#define TOSA_IRQ_GPIO_BAT0_LOW      	IRQ_GPIO(TOSA_GPIO_BAT0_LOW)
> -#define TOSA_IRQ_GPIO_EAR_IN        	IRQ_GPIO(TOSA_GPIO_EAR_IN)
> -#define TOSA_IRQ_GPIO_CF_IRQ        	IRQ_GPIO(TOSA_GPIO_CF_IRQ)
> -#define TOSA_IRQ_GPIO_ON_KEY        	IRQ_GPIO(TOSA_GPIO_ON_KEY)
> -#define TOSA_IRQ_GPIO_VGA_LINE      	IRQ_GPIO(TOSA_GPIO_VGA_LINE)
> -#define TOSA_IRQ_GPIO_TP_INT        	IRQ_GPIO(TOSA_GPIO_TP_INT)
> -#define TOSA_IRQ_GPIO_JC_CF_IRQ     	IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ)
> -#define TOSA_IRQ_GPIO_BAT_LOCKED    	IRQ_GPIO(TOSA_GPIO_BAT_LOCKED)
> -#define TOSA_IRQ_GPIO_BAT1_LOW      	IRQ_GPIO(TOSA_GPIO_BAT1_LOW)
> -#define TOSA_IRQ_GPIO_KEY_SENSE(a)  	IRQ_GPIO(69+(a))
> -
> -#define TOSA_IRQ_GPIO_MAIN_BAT_LOW 	IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW)
> +#define TOSA_IRQ_GPIO_WAKEUP        	PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP)
> +#define TOSA_IRQ_GPIO_AC_IN         	PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN)
> +#define TOSA_IRQ_GPIO_RECORD_BTN    	PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN)
> +#define TOSA_IRQ_GPIO_SYNC          	PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC)
> +#define TOSA_IRQ_GPIO_USB_IN        	PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN)
> +#define TOSA_IRQ_GPIO_JACKET_DETECT 	PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT)
> +#define TOSA_IRQ_GPIO_nSD_INT       	PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT)
> +#define TOSA_IRQ_GPIO_nSD_DETECT    	PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT)
> +#define TOSA_IRQ_GPIO_BAT1_CRG      	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG)
> +#define TOSA_IRQ_GPIO_CF_CD         	PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD)
> +#define TOSA_IRQ_GPIO_BAT0_CRG      	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG)
> +#define TOSA_IRQ_GPIO_TC6393XB_INT    	PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT)
> +#define TOSA_IRQ_GPIO_BAT0_LOW      	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW)
> +#define TOSA_IRQ_GPIO_EAR_IN        	PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN)
> +#define TOSA_IRQ_GPIO_CF_IRQ        	PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ)
> +#define TOSA_IRQ_GPIO_ON_KEY        	PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY)
> +#define TOSA_IRQ_GPIO_VGA_LINE      	PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE)
> +#define TOSA_IRQ_GPIO_TP_INT        	PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT)
> +#define TOSA_IRQ_GPIO_JC_CF_IRQ     	PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ)
> +#define TOSA_IRQ_GPIO_BAT_LOCKED    	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED)
> +#define TOSA_IRQ_GPIO_BAT1_LOW      	PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW)
> +#define TOSA_IRQ_GPIO_KEY_SENSE(a)  	PXA_GPIO_TO_IRQ(69+(a))
> +
> +#define TOSA_IRQ_GPIO_MAIN_BAT_LOW 	PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW)
>  
>  #define TOSA_KEY_SYNC		KEY_102ND /* ??? */
>  
> diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
> index 903e1a2..d2ca010 100644
> --- a/arch/arm/mach-pxa/include/mach/trizeps4.h
> +++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
> @@ -43,30 +43,30 @@
>  
>  /* Ethernet Controller Davicom DM9000 */
>  #define GPIO_DM9000		101
> -#define TRIZEPS4_ETH_IRQ	IRQ_GPIO(GPIO_DM9000)
> +#define TRIZEPS4_ETH_IRQ	PXA_GPIO_TO_IRQ(GPIO_DM9000)
>  
>  /* UCB1400 audio / TS-controller */
>  #define GPIO_UCB1400		1
> -#define TRIZEPS4_UCB1400_IRQ	IRQ_GPIO(GPIO_UCB1400)
> +#define TRIZEPS4_UCB1400_IRQ	PXA_GPIO_TO_IRQ(GPIO_UCB1400)
>  
>  /* PCMCIA socket Compact Flash */
>  #define GPIO_PCD		11		/* PCMCIA Card Detect */
> -#define TRIZEPS4_CD_IRQ		IRQ_GPIO(GPIO_PCD)
> +#define TRIZEPS4_CD_IRQ		PXA_GPIO_TO_IRQ(GPIO_PCD)
>  #define GPIO_PRDY		13		/* READY / nINT */
> -#define TRIZEPS4_READY_NINT	IRQ_GPIO(GPIO_PRDY)
> +#define TRIZEPS4_READY_NINT	PXA_GPIO_TO_IRQ(GPIO_PRDY)
>  
>  /* MMC socket */
>  #define GPIO_MMC_DET		12
> -#define TRIZEPS4_MMC_IRQ	IRQ_GPIO(GPIO_MMC_DET)
> +#define TRIZEPS4_MMC_IRQ	PXA_GPIO_TO_IRQ(GPIO_MMC_DET)
>  
>  /* DOC NAND chip */
>  #define GPIO_DOC_LOCK           94
>  #define GPIO_DOC_IRQ            93
> -#define TRIZEPS4_DOC_IRQ        IRQ_GPIO(GPIO_DOC_IRQ)
> +#define TRIZEPS4_DOC_IRQ        PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ)
>  
>  /* SPI interface */
>  #define GPIO_SPI                53
> -#define TRIZEPS4_SPI_IRQ        IRQ_GPIO(GPIO_SPI)
> +#define TRIZEPS4_SPI_IRQ        PXA_GPIO_TO_IRQ(GPIO_SPI)
>  
>  /* LEDS using tx2 / rx2 */
>  #define GPIO_SYS_BUSY_LED	46
> @@ -74,7 +74,7 @@
>  
>  /* Off-module PIC on ConXS board */
>  #define GPIO_PIC		0
> -#define TRIZEPS4_PIC_IRQ	IRQ_GPIO(GPIO_PIC)
> +#define TRIZEPS4_PIC_IRQ	PXA_GPIO_TO_IRQ(GPIO_PIC)
>  
>  #ifdef CONFIG_MACH_TRIZEPS_CONXS
>  /* for CONXS base board define these registers */
> diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
> index 0037e57..9cd2356 100644
> --- a/arch/arm/mach-pxa/littleton.c
> +++ b/arch/arm/mach-pxa/littleton.c
> @@ -124,8 +124,8 @@ static struct resource smc91x_resources[] = {
>  		.flags	= IORESOURCE_MEM,
>  	},
>  	[1] = {
> -		.start	= IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
> -		.end	= IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
> +		.start	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
> +		.end	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
>  		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
>  	}
>  };
> diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
> index 64540d9..60c49f1 100644
> --- a/arch/arm/mach-pxa/lpd270.c
> +++ b/arch/arm/mach-pxa/lpd270.c
> @@ -152,8 +152,8 @@ static void __init lpd270_init_irq(void)
>  					 handle_level_irq);
>  		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
>  	}
> -	irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
> -	irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
> +	irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
> +	irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
>  }
>  
>  
> diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
> index c48ce6d..2fb2b50 100644
> --- a/arch/arm/mach-pxa/lubbock.c
> +++ b/arch/arm/mach-pxa/lubbock.c
> @@ -170,8 +170,8 @@ static void __init lubbock_init_irq(void)
>  		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
>  	}
>  
> -	irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
> -	irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
> +	irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler);
> +	irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
>  }
>  
>  #ifdef CONFIG_PM
> diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
> index 0567d39..ea62a99 100644
> --- a/arch/arm/mach-pxa/mainstone.c
> +++ b/arch/arm/mach-pxa/mainstone.c
> @@ -178,8 +178,8 @@ static void __init mainstone_init_irq(void)
>  	MST_INTMSKENA = 0;
>  	MST_INTSETCLR = 0;
>  
> -	irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
> -	irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
> +	irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
> +	irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
>  }
>  
>  #ifdef CONFIG_PM
> diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
> index 948ce3e..7c8a308 100644
> --- a/arch/arm/mach-pxa/poodle.c
> +++ b/arch/arm/mach-pxa/poodle.c
> @@ -165,8 +165,8 @@ static struct resource locomo_resources[] = {
>  		.flags		= IORESOURCE_MEM,
>  	},
>  	[1] = {
> -		.start		= IRQ_GPIO(10),
> -		.end		= IRQ_GPIO(10),
> +		.start		= PXA_GPIO_TO_IRQ(10),
> +		.end		= PXA_GPIO_TO_IRQ(10),
>  		.flags		= IORESOURCE_IRQ,
>  	},
>  };
> diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
> index 785880f..8d5168d 100644
> --- a/arch/arm/mach-pxa/sharpsl_pm.c
> +++ b/arch/arm/mach-pxa/sharpsl_pm.c
> @@ -907,24 +907,24 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
>  	gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock);
>  
>  	/* Register interrupt handlers */
> -	if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
> -		dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
> +	if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
> +		dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin));
>  	}
>  
> -	if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
> -		dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
> +	if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
> +		dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock));
>  	}
>  
>  	if (sharpsl_pm.machinfo->gpio_fatal) {
> -		if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
> -			dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
> +		if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
> +			dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal));
>  		}
>  	}
>  
>  	if (sharpsl_pm.machinfo->batfull_irq) {
>  		/* Register interrupt handler. */
> -		if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
> -			dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
> +		if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
> +			dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull));
>  		}
>  	}
>  
> @@ -953,14 +953,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev)
>  
>  	led_trigger_unregister_simple(sharpsl_charge_led_trigger);
>  
> -	free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
> -	free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
> +	free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
> +	free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
>  
>  	if (sharpsl_pm.machinfo->gpio_fatal)
> -		free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
> +		free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
>  
>  	if (sharpsl_pm.machinfo->batfull_irq)
> -		free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
> +		free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
>  
>  	gpio_free(sharpsl_pm.machinfo->gpio_batlock);
>  	gpio_free(sharpsl_pm.machinfo->gpio_batfull);
> diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
> index 4c9a48b..bbf79d5 100644
> --- a/arch/arm/mach-pxa/stargate2.c
> +++ b/arch/arm/mach-pxa/stargate2.c
> @@ -376,7 +376,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
>  		.bus_num = 1,
>  		.chip_select = 0,
>  		.controller_data = &staccel_chip_info,
> -		.irq = IRQ_GPIO(96),
> +		.irq = PXA_GPIO_TO_IRQ(96),
>  	}, {
>  		.modalias = "cc2420",
>  		.max_speed_hz = 6500000,
> @@ -560,18 +560,18 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
>  		/* Through a nand gate - Also beware, on V2 sensor board the
>  		 * pull up resistors are missing.
>  		 */
> -		.irq = IRQ_GPIO(99),
> +		.irq = PXA_GPIO_TO_IRQ(99),
>  	}, { /* ITS400 Sensor board only */
>  		.type = "tsl2561",
>  		.addr = 0x49,
>  		/* Through a nand gate - Also beware, on V2 sensor board the
>  		 * pull up resistors are missing.
>  		 */
> -		.irq = IRQ_GPIO(99),
> +		.irq = PXA_GPIO_TO_IRQ(99),
>  	}, { /* ITS400 Sensor board only */
>  		.type = "tmp175",
>  		.addr = 0x4A,
> -		.irq = IRQ_GPIO(96),
> +		.irq = PXA_GPIO_TO_IRQ(96),
>  	}, { /* IMB400 Multimedia board */
>  		.type = "wm8940",
>  		.addr = 0x1A,
> @@ -661,8 +661,8 @@ static struct resource smc91x_resources[] = {
>  		.flags = IORESOURCE_MEM,
>  	},
>  	[1] = {
> -		.start = IRQ_GPIO(40),
> -		.end = IRQ_GPIO(40),
> +		.start = PXA_GPIO_TO_IRQ(40),
> +		.end = PXA_GPIO_TO_IRQ(40),
>  		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
>  	}
>  };
> @@ -707,7 +707,7 @@ static int stargate2_mci_init(struct device *dev,
>  	}
>  	gpio_direction_input(SG2_GPIO_nSD_DETECT);
>  
> -	err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT),
> +	err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT),
>  			  stargate2_detect_int,
>  			  IRQ_TYPE_EDGE_BOTH,
>  			  "MMC card detect",
> @@ -738,7 +738,7 @@ static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
>  
>  static void stargate2_mci_exit(struct device *dev, void *data)
>  {
> -	free_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), data);
> +	free_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), data);
>  	gpio_free(SG2_SD_POWER_ENABLE);
>  	gpio_free(SG2_GPIO_nSD_DETECT);
>  }
> @@ -938,18 +938,18 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
>  		/* Through a nand gate - Also beware, on V2 sensor board the
>  		 * pull up resistors are missing.
>  		 */
> -		.irq = IRQ_GPIO(99),
> +		.irq = PXA_GPIO_TO_IRQ(99),
>  	}, { /* ITS400 Sensor board only */
>  		.type = "tsl2561",
>  		.addr = 0x49,
>  		/* Through a nand gate - Also beware, on V2 sensor board the
>  		 * pull up resistors are missing.
>  		 */
> -		.irq = IRQ_GPIO(99),
> +		.irq = PXA_GPIO_TO_IRQ(99),
>  	}, { /* ITS400 Sensor board only */
>  		.type = "tmp175",
>  		.addr = 0x4A,
> -		.irq = IRQ_GPIO(96),
> +		.irq = PXA_GPIO_TO_IRQ(96),
>  	},
>  };
>  
> diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
> index a7539a6..585e4f4 100644
> --- a/arch/arm/mach-pxa/vpac270.c
> +++ b/arch/arm/mach-pxa/vpac270.c
> @@ -395,8 +395,8 @@ static struct resource vpac270_dm9000_resources[] = {
>  		.flags	= IORESOURCE_MEM,
>  	},
>  	[2] = {
> -		.start	= IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
> -		.end	= IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
> +		.start	= PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
> +		.end	= PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
>  		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
>  	},
>  };
> @@ -433,7 +433,7 @@ static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
>  };
>  
>  static struct ucb1400_pdata vpac270_ucb1400_pdata = {
> -	.irq		= IRQ_GPIO(GPIO113_VPAC270_TS_IRQ),
> +	.irq		= PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ),
>  };
>  
>  static struct platform_device vpac270_ucb1400_device = {
> diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
> index 93c64d8..86e59c0 100644
> --- a/arch/arm/mach-pxa/zylonite_pxa300.c
> +++ b/arch/arm/mach-pxa/zylonite_pxa300.c
> @@ -231,12 +231,12 @@ static struct i2c_board_info zylonite_i2c_board_info[] = {
>  		.type		= "pca9539",
>  		.addr		= 0x74,
>  		.platform_data	= &gpio_exp[0],
> -		.irq		= IRQ_GPIO(18),
> +		.irq		= PXA_GPIO_TO_IRQ(18),
>  	}, {
>  		.type		= "pca9539",
>  		.addr		= 0x75,
>  		.platform_data	= &gpio_exp[1],
> -		.irq		= IRQ_GPIO(19),
> +		.irq		= PXA_GPIO_TO_IRQ(19),
>  	},
>  };
>  
> -- 
> 1.7.2.5
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 2/8] ARM: pxa: use chained interrupt for GPIO0 and GPIO1
  2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
  2011-10-13  4:06 ` [PATCH v4 1/8] ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQ Haojian Zhuang
@ 2011-10-13  4:06 ` Haojian Zhuang
  2011-10-13 19:07   ` Grant Likely
  2011-10-13  4:07 ` [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio Haojian Zhuang
                   ` (5 subsequent siblings)
  7 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:06 UTC (permalink / raw)
  To: linux-arm-kernel

GPIO0 and GPIO1 are linked to unique interrupt line in PXA series,
others are linked to another interrupt line. All GPIO are linked to one
interrupt line in MMP series.

Since gpio driver is shared between PXA series and MMP series, define
GPIO0 and GPIO1 as chained interrupt chip. So we can move out gpio code
from irq.c to gpio-pxa.c.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
---
 arch/arm/mach-pxa/include/mach/gpio.h |   15 +--------
 arch/arm/mach-pxa/include/mach/irqs.h |    4 +--
 arch/arm/mach-pxa/irq.c               |   58 ---------------------------------
 drivers/gpio/gpio-pxa.c               |   14 ++++++++
 4 files changed, 16 insertions(+), 75 deletions(-)

diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 07fa3ba..13b9039 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -29,20 +29,7 @@
 #include "gpio-pxa.h"
 
 #define gpio_to_irq(gpio)	PXA_GPIO_TO_IRQ(gpio)
-
-static inline int irq_to_gpio(unsigned int irq)
-{
-	int gpio;
-
-	if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
-		return irq - IRQ_GPIO0;
-
-	gpio = irq - PXA_GPIO_IRQ_BASE;
-	if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
-		return gpio;
-
-	return -1;
-}
+#define irq_to_gpio(irq)	(irq - PXA_GPIO_TO_IRQ(0))
 
 #include <plat/gpio.h>
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 1f99664..b83d8ff 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -89,9 +89,7 @@
 
 #define PXA_GPIO_IRQ_BASE	PXA_IRQ(96)
 #define PXA_GPIO_IRQ_NUM	(192)
-
-#define GPIO_2_x_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
-#define PXA_GPIO_TO_IRQ(x)	(((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
+#define PXA_GPIO_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
 
 /*
  * The following interrupts are for board specific purposes. Since
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index d493a23..2d87e64 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -90,44 +90,6 @@ static struct irq_chip pxa_internal_irq_chip = {
 	.irq_unmask	= pxa_unmask_irq,
 };
 
-/*
- * GPIO IRQs for GPIO 0 and 1
- */
-static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
-{
-	int gpio = d->irq - IRQ_GPIO0;
-
-	if (__gpio_is_occupied(gpio)) {
-		pr_err("%s failed: GPIO is configured\n", __func__);
-		return -EINVAL;
-	}
-
-	if (type & IRQ_TYPE_EDGE_RISING)
-		GRER0 |= GPIO_bit(gpio);
-	else
-		GRER0 &= ~GPIO_bit(gpio);
-
-	if (type & IRQ_TYPE_EDGE_FALLING)
-		GFER0 |= GPIO_bit(gpio);
-	else
-		GFER0 &= ~GPIO_bit(gpio);
-
-	return 0;
-}
-
-static void pxa_ack_low_gpio(struct irq_data *d)
-{
-	GEDR0 = (1 << (d->irq - IRQ_GPIO0));
-}
-
-static struct irq_chip pxa_low_gpio_chip = {
-	.name		= "GPIO-l",
-	.irq_ack	= pxa_ack_low_gpio,
-	.irq_mask	= pxa_mask_irq,
-	.irq_unmask	= pxa_unmask_irq,
-	.irq_set_type	= pxa_set_low_gpio_type,
-};
-
 asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs)
 {
 	uint32_t icip, icmr, mask;
@@ -158,25 +120,6 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
 	} while (1);
 }
 
-static void __init pxa_init_low_gpio_irq(set_wake_t fn)
-{
-	int irq;
-
-	/* clear edge detection on GPIO 0 and 1 */
-	GFER0 &= ~0x3;
-	GRER0 &= ~0x3;
-	GEDR0 = 0x3;
-
-	for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
-		irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
-					 handle_edge_irq);
-		irq_set_chip_data(irq, irq_base(0));
-		set_irq_flags(irq, IRQF_VALID);
-	}
-
-	pxa_low_gpio_chip.irq_set_wake = fn;
-}
-
 void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 {
 	int irq, i, n;
@@ -207,7 +150,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 	__raw_writel(1, irq_base(0) + ICCR);
 
 	pxa_internal_irq_chip.irq_set_wake = fn;
-	pxa_init_low_gpio_irq(fn);
 }
 
 #ifdef CONFIG_PM
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 9052925..8c34e8c 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -283,6 +283,20 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
 		__raw_writel(~0,c->regbase + GEDR_OFFSET);
 	}
 
+#ifdef CONFIG_ARCH_PXA
+	irq = gpio_to_irq(0);
+	irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
+				 handle_edge_irq);
+	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+	irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler);
+
+	irq = gpio_to_irq(1);
+	irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
+				 handle_edge_irq);
+	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+	irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);
+#endif
+
 	for (irq  = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) {
 		irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
 					 handle_edge_irq);
-- 
1.7.2.5

^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH v4 2/8] ARM: pxa: use chained interrupt for GPIO0 and GPIO1
  2011-10-13  4:06 ` [PATCH v4 2/8] ARM: pxa: use chained interrupt for GPIO0 and GPIO1 Haojian Zhuang
@ 2011-10-13 19:07   ` Grant Likely
  0 siblings, 0 replies; 25+ messages in thread
From: Grant Likely @ 2011-10-13 19:07 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 13, 2011 at 12:06:59PM +0800, Haojian Zhuang wrote:
> GPIO0 and GPIO1 are linked to unique interrupt line in PXA series,
> others are linked to another interrupt line. All GPIO are linked to one
> interrupt line in MMP series.
> 
> Since gpio driver is shared between PXA series and MMP series, define
> GPIO0 and GPIO1 as chained interrupt chip. So we can move out gpio code
> from irq.c to gpio-pxa.c.
> 
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>

Acked-by: Grant Likely <grant.likely@secretlab.ca>

> ---
>  arch/arm/mach-pxa/include/mach/gpio.h |   15 +--------
>  arch/arm/mach-pxa/include/mach/irqs.h |    4 +--
>  arch/arm/mach-pxa/irq.c               |   58 ---------------------------------
>  drivers/gpio/gpio-pxa.c               |   14 ++++++++
>  4 files changed, 16 insertions(+), 75 deletions(-)
> 
> diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
> index 07fa3ba..13b9039 100644
> --- a/arch/arm/mach-pxa/include/mach/gpio.h
> +++ b/arch/arm/mach-pxa/include/mach/gpio.h
> @@ -29,20 +29,7 @@
>  #include "gpio-pxa.h"
>  
>  #define gpio_to_irq(gpio)	PXA_GPIO_TO_IRQ(gpio)
> -
> -static inline int irq_to_gpio(unsigned int irq)
> -{
> -	int gpio;
> -
> -	if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
> -		return irq - IRQ_GPIO0;
> -
> -	gpio = irq - PXA_GPIO_IRQ_BASE;
> -	if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
> -		return gpio;
> -
> -	return -1;
> -}
> +#define irq_to_gpio(irq)	(irq - PXA_GPIO_TO_IRQ(0))
>  
>  #include <plat/gpio.h>
>  #endif
> diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
> index 1f99664..b83d8ff 100644
> --- a/arch/arm/mach-pxa/include/mach/irqs.h
> +++ b/arch/arm/mach-pxa/include/mach/irqs.h
> @@ -89,9 +89,7 @@
>  
>  #define PXA_GPIO_IRQ_BASE	PXA_IRQ(96)
>  #define PXA_GPIO_IRQ_NUM	(192)
> -
> -#define GPIO_2_x_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
> -#define PXA_GPIO_TO_IRQ(x)	(((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
> +#define PXA_GPIO_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
>  
>  /*
>   * The following interrupts are for board specific purposes. Since
> diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
> index d493a23..2d87e64 100644
> --- a/arch/arm/mach-pxa/irq.c
> +++ b/arch/arm/mach-pxa/irq.c
> @@ -90,44 +90,6 @@ static struct irq_chip pxa_internal_irq_chip = {
>  	.irq_unmask	= pxa_unmask_irq,
>  };
>  
> -/*
> - * GPIO IRQs for GPIO 0 and 1
> - */
> -static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
> -{
> -	int gpio = d->irq - IRQ_GPIO0;
> -
> -	if (__gpio_is_occupied(gpio)) {
> -		pr_err("%s failed: GPIO is configured\n", __func__);
> -		return -EINVAL;
> -	}
> -
> -	if (type & IRQ_TYPE_EDGE_RISING)
> -		GRER0 |= GPIO_bit(gpio);
> -	else
> -		GRER0 &= ~GPIO_bit(gpio);
> -
> -	if (type & IRQ_TYPE_EDGE_FALLING)
> -		GFER0 |= GPIO_bit(gpio);
> -	else
> -		GFER0 &= ~GPIO_bit(gpio);
> -
> -	return 0;
> -}
> -
> -static void pxa_ack_low_gpio(struct irq_data *d)
> -{
> -	GEDR0 = (1 << (d->irq - IRQ_GPIO0));
> -}
> -
> -static struct irq_chip pxa_low_gpio_chip = {
> -	.name		= "GPIO-l",
> -	.irq_ack	= pxa_ack_low_gpio,
> -	.irq_mask	= pxa_mask_irq,
> -	.irq_unmask	= pxa_unmask_irq,
> -	.irq_set_type	= pxa_set_low_gpio_type,
> -};
> -
>  asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs)
>  {
>  	uint32_t icip, icmr, mask;
> @@ -158,25 +120,6 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
>  	} while (1);
>  }
>  
> -static void __init pxa_init_low_gpio_irq(set_wake_t fn)
> -{
> -	int irq;
> -
> -	/* clear edge detection on GPIO 0 and 1 */
> -	GFER0 &= ~0x3;
> -	GRER0 &= ~0x3;
> -	GEDR0 = 0x3;
> -
> -	for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
> -		irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
> -					 handle_edge_irq);
> -		irq_set_chip_data(irq, irq_base(0));
> -		set_irq_flags(irq, IRQF_VALID);
> -	}
> -
> -	pxa_low_gpio_chip.irq_set_wake = fn;
> -}
> -
>  void __init pxa_init_irq(int irq_nr, set_wake_t fn)
>  {
>  	int irq, i, n;
> @@ -207,7 +150,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
>  	__raw_writel(1, irq_base(0) + ICCR);
>  
>  	pxa_internal_irq_chip.irq_set_wake = fn;
> -	pxa_init_low_gpio_irq(fn);
>  }
>  
>  #ifdef CONFIG_PM
> diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
> index 9052925..8c34e8c 100644
> --- a/drivers/gpio/gpio-pxa.c
> +++ b/drivers/gpio/gpio-pxa.c
> @@ -283,6 +283,20 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
>  		__raw_writel(~0,c->regbase + GEDR_OFFSET);
>  	}
>  
> +#ifdef CONFIG_ARCH_PXA
> +	irq = gpio_to_irq(0);
> +	irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
> +				 handle_edge_irq);
> +	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
> +	irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler);
> +
> +	irq = gpio_to_irq(1);
> +	irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
> +				 handle_edge_irq);
> +	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
> +	irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);
> +#endif
> +
>  	for (irq  = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) {
>  		irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
>  					 handle_edge_irq);
> -- 
> 1.7.2.5
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio
  2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
  2011-10-13  4:06 ` [PATCH v4 1/8] ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQ Haojian Zhuang
  2011-10-13  4:06 ` [PATCH v4 2/8] ARM: pxa: use chained interrupt for GPIO0 and GPIO1 Haojian Zhuang
@ 2011-10-13  4:07 ` Haojian Zhuang
  2011-10-13 19:18   ` Grant Likely
  2011-10-13  4:07 ` [PATCH v4 4/8] ARM: pxa: rename NR_BUILTIN_GPIO Haojian Zhuang
                   ` (4 subsequent siblings)
  7 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:07 UTC (permalink / raw)
  To: linux-arm-kernel

Avoid to define gpio_to_irq() and irq_to_gpio() for potential name
confliction since multiple architecture will be built together.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
---
 arch/arm/mach-mmp/aspenite.c              |    4 +-
 arch/arm/mach-mmp/flint.c                 |    4 +-
 arch/arm/mach-mmp/include/mach/gpio-pxa.h |    1 +
 arch/arm/mach-mmp/include/mach/gpio.h     |    3 -
 arch/arm/mach-mmp/include/mach/irqs.h     |    1 +
 arch/arm/mach-mmp/tavorevb.c              |    4 +-
 arch/arm/mach-mmp/teton_bga.c             |    2 +-
 arch/arm/mach-pxa/capc7117.c              |   12 ++--
 arch/arm/mach-pxa/cm-x270.c               |    2 +-
 arch/arm/mach-pxa/cm-x2xx-pci.c           |    4 +-
 arch/arm/mach-pxa/colibri-pxa270.c        |    6 +-
 arch/arm/mach-pxa/colibri-pxa300.c        |    4 +-
 arch/arm/mach-pxa/colibri-pxa320.c        |    4 +-
 arch/arm/mach-pxa/corgi.c                 |    2 +-
 arch/arm/mach-pxa/em-x270.c               |    6 +-
 arch/arm/mach-pxa/hx4700.c                |   18 +++---
 arch/arm/mach-pxa/icontrol.c              |    8 +-
 arch/arm/mach-pxa/include/mach/csb726.h   |    4 +-
 arch/arm/mach-pxa/include/mach/gpio.h     |    3 -
 arch/arm/mach-pxa/littleton.c             |    2 +-
 arch/arm/mach-pxa/magician.c              |    8 +-
 arch/arm/mach-pxa/mioa701.c               |   12 ++--
 arch/arm/mach-pxa/mxm8x10.c               |    4 +-
 arch/arm/mach-pxa/poodle.c                |    2 +-
 arch/arm/mach-pxa/pxa25x.c                |    2 +-
 arch/arm/mach-pxa/pxa27x.c                |    2 +-
 arch/arm/mach-pxa/raumfeld.c              |   14 ++--
 arch/arm/mach-pxa/saar.c                  |    6 +-
 arch/arm/mach-pxa/saarb.c                 |    2 +-
 arch/arm/mach-pxa/spitz.c                 |    2 +-
 arch/arm/mach-pxa/stargate2.c             |    4 +-
 arch/arm/mach-pxa/tavorevb.c              |    4 +-
 arch/arm/mach-pxa/tavorevb3.c             |    2 +-
 arch/arm/mach-pxa/tosa.c                  |    4 +-
 arch/arm/mach-pxa/viper.c                 |   16 ++--
 arch/arm/mach-pxa/vpac270.c               |    4 +-
 arch/arm/mach-pxa/z2.c                    |    2 +-
 arch/arm/mach-pxa/zeus.c                  |   34 +++++-----
 arch/arm/mach-pxa/zylonite.c              |    4 +-
 arch/arm/plat-pxa/include/plat/gpio-pxa.h |    1 +
 drivers/gpio/gpio-pxa.c                   |  104 +++++++++++++++++++++++++++--
 41 files changed, 209 insertions(+), 118 deletions(-)

diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 06b5ad7..fb7dfc1 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -120,8 +120,8 @@ static struct resource smc91x_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start	= gpio_to_irq(27),
-		.end	= gpio_to_irq(27),
+		.start	= MMP_GPIO_TO_IRQ(27),
+		.end	= MMP_GPIO_TO_IRQ(27),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index c4fd806..a64c172 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -87,8 +87,8 @@ static struct resource smc91x_resources[] = {
 		.flags  = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start  = gpio_to_irq(155),
-		.end    = gpio_to_irq(155),
+		.start  = MMP_GPIO_TO_IRQ(155),
+		.end    = MMP_GPIO_TO_IRQ(155),
 		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index c017a98..f7bcc30 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -2,6 +2,7 @@
 #define __ASM_MACH_GPIO_PXA_H
 
 #include <mach/addr-map.h>
+#include <mach/cputype.h>
 #include <mach/irqs.h>
 
 #define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 6812623..32b684a 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -3,9 +3,6 @@
 
 #include <asm-generic/gpio.h>
 
-#define gpio_to_irq(gpio)	(IRQ_GPIO_START + (gpio))
-#define irq_to_gpio(irq)	((irq) - IRQ_GPIO_START)
-
 #define __gpio_is_inverted(gpio)	(0)
 #define __gpio_is_occupied(gpio)	(0)
 
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index a09d328..ec95951 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -221,6 +221,7 @@
 #define IRQ_GPIO_START			128
 #define IRQ_GPIO_NUM			192
 #define IRQ_GPIO(x)			(IRQ_GPIO_START + (x))
+#define MMP_GPIO_TO_IRQ(gpio)		(IRQ_GPIO_START + (gpio))
 
 #define IRQ_BOARD_START			(IRQ_GPIO_START + IRQ_GPIO_NUM)
 
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index eb5be87..0afe3a3 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -71,8 +71,8 @@ static struct resource smc91x_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start	= gpio_to_irq(80),
-		.end	= gpio_to_irq(80),
+		.start	= MMP_GPIO_TO_IRQ(80),
+		.end	= MMP_GPIO_TO_IRQ(80),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index bbe4727..825a01c 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -66,7 +66,7 @@ static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
 static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
 	{
 		I2C_BOARD_INFO("ds1337", 0x68),
-		.irq = gpio_to_irq(RTC_INT_GPIO)
+		.irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO)
 	},
 };
 
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 4efc16d..5516317 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -50,8 +50,8 @@ static struct resource capc7117_ide_resources[] = {
 	       .flags = IORESOURCE_MEM
 	},
 	[2] = {
-	       .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
-	       .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
+	       .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
+	       .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
 	       .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
 	}
 };
@@ -80,7 +80,7 @@ static void __init capc7117_ide_init(void)
 static struct plat_serial8250_port ti16c752_platform_data[] = {
 	[0] = {
 	       .mapbase = 0x14000000,
-	       .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)),
+	       .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)),
 	       .irqflags = IRQF_TRIGGER_RISING,
 	       .flags = TI16C752_FLAGS,
 	       .iotype = UPIO_MEM,
@@ -89,7 +89,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
 	},
 	[1] = {
 	       .mapbase = 0x14000040,
-	       .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)),
+	       .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)),
 	       .irqflags = IRQF_TRIGGER_RISING,
 	       .flags = TI16C752_FLAGS,
 	       .iotype = UPIO_MEM,
@@ -98,7 +98,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
 	},
 	[2] = {
 	       .mapbase = 0x14000080,
-	       .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)),
+	       .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)),
 	       .irqflags = IRQF_TRIGGER_RISING,
 	       .flags = TI16C752_FLAGS,
 	       .iotype = UPIO_MEM,
@@ -107,7 +107,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
 	},
 	[3] = {
 	       .mapbase = 0x140000c0,
-	       .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)),
+	       .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)),
 	       .irqflags = IRQF_TRIGGER_RISING,
 	       .flags = TI16C752_FLAGS,
 	       .iotype = UPIO_MEM,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index 4ebcee5..431ef56 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -380,7 +380,7 @@ static struct spi_board_info cm_x270_spi_devices[] __initdata = {
 		.modalias		= "libertas_spi",
 		.max_speed_hz		= 13000000,
 		.bus_num		= 2,
-		.irq			= gpio_to_irq(95),
+		.irq			= PXA_GPIO_TO_IRQ(95),
 		.chip_select		= 0,
 		.controller_data	= &cm_x270_libertas_chip,
 		.platform_data		= &cm_x270_libertas_pdata,
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 6bf479d..dd8443f 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -43,9 +43,9 @@ void __cmx2xx_pci_init_irq(int irq_gpio)
 
 	cmx2xx_it8152_irq_gpio = irq_gpio;
 
-	irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(irq_gpio), IRQ_TYPE_EDGE_RISING);
 
-	irq_set_chained_handler(gpio_to_irq(irq_gpio),
+	irq_set_chained_handler(PXA_GPIO_TO_IRQ(irq_gpio),
 				cmx2xx_it8152_irq_demux);
 }
 
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 7db6646..3b25472 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -217,8 +217,8 @@ static struct resource colibri_pxa270_dm9000_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
-		.end	= gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
+		.start	= PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
+		.end	= PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
 	},
 };
@@ -248,7 +248,7 @@ static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
 };
 
 static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
-	.irq		= gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ),
+	.irq		= PXA_GPIO_TO_IRQ(GPIO113_COLIBRI_PXA270_TS_IRQ),
 };
 
 static struct platform_device colibri_pxa270_ucb1400_device = {
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index c825e8b..0a6222e 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -78,8 +78,8 @@ static struct resource colibri_asix_resource[] = {
 		.flags = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
-		.end   = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
+		.start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
+		.end   = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
 		.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
 	}
 };
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 692e1ff..8cbb2b4 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -115,8 +115,8 @@ static struct resource colibri_asix_resource[] = {
 		.flags = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
-		.end   = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
+		.start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
+		.end   = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
 		.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
 	}
 };
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 3e9483b..bed7cec 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -530,7 +530,7 @@ static struct spi_board_info corgi_spi_devices[] = {
 		.chip_select	= 0,
 		.platform_data	= &corgi_ads7846_info,
 		.controller_data= &corgi_ads7846_chip,
-		.irq		= gpio_to_irq(CORGI_GPIO_TP_INT),
+		.irq		= PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT),
 	}, {
 		.modalias	= "corgi-lcd",
 		.max_speed_hz	= 50000,
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 3358f4d..e71c395 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -558,7 +558,7 @@ static int em_x270_mci_init(struct device *dev,
 		return PTR_ERR(em_x270_sdio_ldo);
 	}
 
-	err = request_irq(gpio_to_irq(mmc_cd), em_x270_detect_int,
+	err = request_irq(PXA_GPIO_TO_IRQ(mmc_cd), em_x270_detect_int,
 			      IRQF_DISABLED | IRQF_TRIGGER_RISING |
 			      IRQF_TRIGGER_FALLING,
 			      "MMC card detect", data);
@@ -588,7 +588,7 @@ static int em_x270_mci_init(struct device *dev,
 	return 0;
 
 err_gpio_wp:
-	free_irq(gpio_to_irq(mmc_cd), data);
+	free_irq(PXA_GPIO_TO_IRQ(mmc_cd), data);
 err_irq:
 	regulator_put(em_x270_sdio_ldo);
 
@@ -611,7 +611,7 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
 
 static void em_x270_mci_exit(struct device *dev, void *data)
 {
-	free_irq(gpio_to_irq(mmc_cd), data);
+	free_irq(PXA_GPIO_TO_IRQ(mmc_cd), data);
 	regulator_put(em_x270_sdio_ldo);
 
 	if (machine_is_em_x270())
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 6f6368e..82e9976 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -252,8 +252,8 @@ static struct resource asic3_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start	= gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
-		.end	= gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
+		.start	= PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
+		.end	= PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
 		.flags	= IORESOURCE_IRQ,
 	},
 	/* SD part */
@@ -263,8 +263,8 @@ static struct resource asic3_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[3] = {
-		.start	= gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
-		.end	= gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
+		.start	= PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
+		.end	= PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
 		.flags	= IORESOURCE_IRQ,
 	},
 };
@@ -587,7 +587,7 @@ static struct spi_board_info tsc2046_board_info[] __initdata = {
 		.modalias        = "ads7846",
 		.bus_num         = 2,
 		.max_speed_hz    = 2600000, /* 100 kHz sample rate */
-		.irq             = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ),
+		.irq             = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ),
 		.platform_data   = &tsc2046_info,
 		.controller_data = &tsc2046_chip,
 	},
@@ -635,15 +635,15 @@ static struct resource power_supply_resources[] = {
 		.name  = "ac",
 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
 		         IORESOURCE_IRQ_LOWEDGE,
-		.start = gpio_to_irq(GPIOD9_nAC_IN),
-		.end   = gpio_to_irq(GPIOD9_nAC_IN),
+		.start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
+		.end   = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
 	},
 	[1] = {
 		.name  = "usb",
 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
 		         IORESOURCE_IRQ_LOWEDGE,
-		.start = gpio_to_irq(GPIOD14_nUSBC_DETECT),
-		.end   = gpio_to_irq(GPIOD14_nUSBC_DETECT),
+		.start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
+		.end   = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
 	},
 };
 
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index f78d5db..33e81e8 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -86,7 +86,7 @@ static struct spi_board_info mcp251x_board_info[] = {
 		.chip_select     = 0,
 		.platform_data   = &mcp251x_info,
 		.controller_data = &mcp251x_chip_info1,
-		.irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ1)
+		.irq             = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ1)
 	},
 	{
 		.modalias        = "mcp2515",
@@ -95,7 +95,7 @@ static struct spi_board_info mcp251x_board_info[] = {
 		.chip_select     = 1,
 		.platform_data   = &mcp251x_info,
 		.controller_data = &mcp251x_chip_info2,
-		.irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ2)
+		.irq             = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ2)
 	},
 	{
 		.modalias        = "mcp2515",
@@ -104,7 +104,7 @@ static struct spi_board_info mcp251x_board_info[] = {
 		.chip_select     = 0,
 		.platform_data   = &mcp251x_info,
 		.controller_data = &mcp251x_chip_info3,
-		.irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ3)
+		.irq             = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ3)
 	},
 	{
 		.modalias        = "mcp2515",
@@ -113,7 +113,7 @@ static struct spi_board_info mcp251x_board_info[] = {
 		.chip_select     = 1,
 		.platform_data   = &mcp251x_info,
 		.controller_data = &mcp251x_chip_info4,
-		.irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ4)
+		.irq             = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4)
 	}
 };
 
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h
index 747ab1a..2628e7b 100644
--- a/arch/arm/mach-pxa/include/mach/csb726.h
+++ b/arch/arm/mach-pxa/include/mach/csb726.h
@@ -19,8 +19,8 @@
 #define CSB726_FLASH_SIZE	(64 * 1024 * 1024)
 #define CSB726_FLASH_uMON	(8 * 1024 * 1024)
 
-#define CSB726_IRQ_LAN		gpio_to_irq(CSB726_GPIO_IRQ_LAN)
-#define CSB726_IRQ_SM501	gpio_to_irq(CSB726_GPIO_IRQ_SM501)
+#define CSB726_IRQ_LAN		PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN)
+#define CSB726_IRQ_SM501	PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501)
 
 #endif
 
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 13b9039..5cf0137 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -28,8 +28,5 @@
 /* The defines for the driver are needed for the accelerated accessors */
 #include "gpio-pxa.h"
 
-#define gpio_to_irq(gpio)	PXA_GPIO_TO_IRQ(gpio)
-#define irq_to_gpio(irq)	(irq - PXA_GPIO_TO_IRQ(0))
-
 #include <plat/gpio.h>
 #endif
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 9cd2356..27147f6 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -395,7 +395,7 @@ static struct i2c_board_info littleton_i2c_info[] = {
 		.type		= "da9034",
 		.addr		= 0x34,
 		.platform_data	= &littleton_da9034_info,
-		.irq		= gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)),
+		.irq		= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)),
 	},
 	[1] = {
 		.type		= "max7320",
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 4b796c3..e340ea0 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -184,8 +184,8 @@ static struct resource egpio_resources[] = {
 		.flags = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ),
-		.end   = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ),
+		.start = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
+		.end   = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
 		.flags = IORESOURCE_IRQ,
 	},
 };
@@ -468,8 +468,8 @@ static struct resource pasic3_resources[] = {
 	},
 	/* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */
 	[1] = {
-		.start  = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ),
-		.end    = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ),
+		.start  = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
+		.end    = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
 		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index b938fc2..1144def 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -314,7 +314,7 @@ static int __init gsm_init(void)
 	rc = gpio_request_array(ARRAY_AND_SIZE(gsm_gpios));
 	if (rc)
 		goto err_gpio;
-	rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq,
+	rc = request_irq(PXA_GPIO_TO_IRQ(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq,
 			 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 			 "GSM XS200 Power Irq", NULL);
 	if (rc)
@@ -333,7 +333,7 @@ err_gpio:
 
 static void gsm_exit(void)
 {
-	free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL);
+	free_irq(PXA_GPIO_TO_IRQ(GPIO25_GSM_MOD_ON_STATE), NULL);
 	gpio_free_array(ARRAY_AND_SIZE(gsm_gpios));
 }
 
@@ -541,15 +541,15 @@ static struct pda_power_pdata power_pdata = {
 static struct resource power_resources[] = {
 	[0] = {
 		.name	= "ac",
-		.start	= gpio_to_irq(GPIO96_AC_DETECT),
-		.end	= gpio_to_irq(GPIO96_AC_DETECT),
+		.start	= PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
+		.end	= PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
 		IORESOURCE_IRQ_LOWEDGE,
 	},
 	[1] = {
 		.name	= "usb",
-		.start	= gpio_to_irq(GPIO13_nUSB_DETECT),
-		.end	= gpio_to_irq(GPIO13_nUSB_DETECT),
+		.start	= PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
+		.end	= PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
 		IORESOURCE_IRQ_LOWEDGE,
 	},
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index b5a8fd3..a13a1e3 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -416,8 +416,8 @@ static struct resource dm9k_resources[] = {
 	       .flags = IORESOURCE_MEM
 	},
 	[2] = {
-	       .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
-	       .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
+	       .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
+	       .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
 	       .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
 	}
 };
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 7c8a308..b5a4214 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -211,7 +211,7 @@ static struct spi_board_info poodle_spi_devices[] = {
 		.bus_num	= 1,
 		.platform_data	= &poodle_ads7846_info,
 		.controller_data= &poodle_ads7846_chip,
-		.irq		= gpio_to_irq(POODLE_GPIO_TP_INT),
+		.irq		= PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT),
 	},
 };
 
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 8746e10..d4fca6a 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -287,7 +287,7 @@ static inline void pxa25x_init_pm(void) {}
 
 static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
 {
-	int gpio = irq_to_gpio(d->irq);
+	int gpio = pxa_irq_to_gpio(d->irq);
 	uint32_t mask = 0;
 
 	if (gpio >= 0 && gpio < 85)
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 2bb5cf8..08eb452 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -355,7 +355,7 @@ static inline void pxa27x_init_pm(void) {}
  */
 static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
 {
-	int gpio = irq_to_gpio(d->irq);
+	int gpio = pxa_irq_to_gpio(d->irq);
 	uint32_t mask;
 
 	if (gpio >= 0 && gpio < 128)
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 6810cdd..9d13f87 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -292,8 +292,8 @@ static struct resource smc91x_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	{
-		.start	= gpio_to_irq(GPIO_ETH_IRQ),
-		.end	= gpio_to_irq(GPIO_ETH_IRQ),
+		.start	= PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
+		.end	= PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
 	}
 };
@@ -671,7 +671,7 @@ static struct lis3lv02d_platform_data lis3_pdata = {
 	.chip_select	= 1,			\
 	.controller_data = (void *) GPIO_ACCEL_CS,	\
 	.platform_data	= &lis3_pdata,		\
-	.irq		= gpio_to_irq(GPIO_ACCEL_IRQ),	\
+	.irq		= PXA_GPIO_TO_IRQ(GPIO_ACCEL_IRQ),	\
 }
 
 #define SPI_DAC7512	\
@@ -823,10 +823,10 @@ static void __init raumfeld_power_init(void)
 	else
 		gpio_direction_output(GPIO_CHARGE_USB_SUSP, 0);
 
-	power_supply_resources[0].start = gpio_to_irq(GPIO_CHARGE_DC_OK);
-	power_supply_resources[0].end = gpio_to_irq(GPIO_CHARGE_DC_OK);
+	power_supply_resources[0].start = PXA_GPIO_TO_IRQ(GPIO_CHARGE_DC_OK);
+	power_supply_resources[0].end = PXA_GPIO_TO_IRQ(GPIO_CHARGE_DC_OK);
 
-	ret = request_irq(gpio_to_irq(GPIO_CHARGE_DONE),
+	ret = request_irq(PXA_GPIO_TO_IRQ(GPIO_CHARGE_DONE),
 			&charge_done_irq, IORESOURCE_IRQ_LOWEDGE,
 			"charge_done", NULL);
 
@@ -955,7 +955,7 @@ static struct eeti_ts_platform_data eeti_ts_pdata = {
 static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
 	.type	= "eeti_ts",
 	.addr	= 0x0a,
-	.irq	= gpio_to_irq(GPIO_TOUCH_IRQ),
+	.irq	= PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ),
 	.platform_data = &eeti_ts_pdata,
 };
 
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index fc2c1e0..423ec89 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -96,8 +96,8 @@ static struct resource smc91x_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start	= gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
-		.end	= gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
+		.start	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
+		.end	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
@@ -502,7 +502,7 @@ static struct i2c_board_info saar_i2c_info[] = {
 		.type		= "da9034",
 		.addr		= 0x34,
 		.platform_data	= &saar_da9034_info,
-		.irq		= gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+		.irq		= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
 	},
 };
 
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 3c988b6f..cfa172c 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -91,7 +91,7 @@ static struct i2c_board_info saarb_i2c_info[] = {
 		.type		= "88PM860x",
 		.addr		= 0x34,
 		.platform_data	= &saarb_pm8607_info,
-		.irq		= gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+		.irq		= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
 	},
 };
 
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index d8dec91..4c3600b 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -551,7 +551,7 @@ static struct spi_board_info spitz_spi_devices[] = {
 		.chip_select		= 0,
 		.platform_data		= &spitz_ads7846_info,
 		.controller_data	= &spitz_ads7846_chip,
-		.irq			= gpio_to_irq(SPITZ_GPIO_TP_INT),
+		.irq			= PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT),
 	}, {
 		.modalias		= "corgi-lcd",
 		.max_speed_hz		= 50000,
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index bbf79d5..940ca56 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -546,7 +546,7 @@ static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
 		.type = "da9030",
 		.addr = 0x49,
 		.platform_data = &imote2_da9030_pdata,
-		.irq = gpio_to_irq(1),
+		.irq = PXA_GPIO_TO_IRQ(1),
 	},
 };
 
@@ -913,7 +913,7 @@ static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
 		.type = "da9030",
 		.addr = 0x49,
 		.platform_data = &stargate2_da9030_pdata,
-		.irq = gpio_to_irq(1),
+		.irq = PXA_GPIO_TO_IRQ(1),
 	},
 };
 
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index ad47bb9..43bdcb9 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -85,8 +85,8 @@ static struct resource smc91x_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	},
 	[1] = {
-		.start	= gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
-		.end	= gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
+		.start	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
+		.end	= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	}
 };
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index fd56916..46c60b3 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -101,7 +101,7 @@ static struct i2c_board_info evb3_i2c_info[] = {
 		.type		= "88PM860x",
 		.addr		= 0x34,
 		.platform_data	= &evb3_pm8607_info,
-		.irq		= gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+		.irq		= PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
 	},
 };
 
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 402b0c9..1ddb982 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -404,8 +404,8 @@ static struct pda_power_pdata tosa_power_data = {
 static struct resource tosa_power_resource[] = {
 	{
 		.name		= "ac",
-		.start		= gpio_to_irq(TOSA_GPIO_AC_IN),
-		.end		= gpio_to_irq(TOSA_GPIO_AC_IN),
+		.start		= PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
+		.end		= PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
 		.flags		= IORESOURCE_IRQ |
 				  IORESOURCE_IRQ_HIGHEDGE |
 				  IORESOURCE_IRQ_LOWEDGE,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 242ddae..b49d10b 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -315,9 +315,9 @@ static void __init viper_init_irq(void)
 		set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
 	}
 
-	irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
+	irq_set_chained_handler(PXA_GPIO_TO_IRQ(VIPER_CPLD_GPIO),
 				viper_irq_handler);
-	irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
 }
 
 /* Flat Panel */
@@ -422,8 +422,8 @@ static struct resource smc91x_resources[] = {
 		.flags  = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start  = gpio_to_irq(VIPER_ETH_GPIO),
-		.end    = gpio_to_irq(VIPER_ETH_GPIO),
+		.start  = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
+		.end    = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
 		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	},
 	[2] = {
@@ -546,7 +546,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 	/* External UARTs */
 	{
 		.mapbase	= VIPER_UARTA_PHYS,
-		.irq		= gpio_to_irq(VIPER_UARTA_GPIO),
+		.irq		= PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
 		.irqflags	= IRQF_TRIGGER_RISING,
 		.uartclk	= 1843200,
 		.regshift	= 1,
@@ -556,7 +556,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 	},
 	{
 		.mapbase	= VIPER_UARTB_PHYS,
-		.irq		= gpio_to_irq(VIPER_UARTB_GPIO),
+		.irq		= PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
 		.irqflags	= IRQF_TRIGGER_RISING,
 		.uartclk	= 1843200,
 		.regshift	= 1,
@@ -596,8 +596,8 @@ static struct resource isp116x_resources[] = {
 		.flags  = IORESOURCE_MEM,
 	},
 	[2] = {
-		.start  = gpio_to_irq(VIPER_USB_GPIO),
-		.end    = gpio_to_irq(VIPER_USB_GPIO),
+		.start  = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
+		.end    = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
 		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 	},
 };
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index 585e4f4..bf2403c 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -610,8 +610,8 @@ static struct resource vpac270_ide_resources[] = {
 	       .flags	= IORESOURCE_DMA
 	},
 	[3] = {	/* IDE IRQ pin */
-	       .start	= gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
-	       .end	= gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
+	       .start	= PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
+	       .end	= PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
 	       .flags	= IORESOURCE_IRQ
 	}
 };
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index 65fed37..7bd4863 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -573,7 +573,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
 	.modalias		= "libertas_spi",
 	.platform_data		= &z2_lbs_pdata,
 	.controller_data	= &z2_lbs_chip_info,
-	.irq			= gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ),
+	.irq			= PXA_GPIO_TO_IRQ(GPIO36_ZIPITZ2_WIFI_IRQ),
 	.max_speed_hz		= 13000000,
 	.bus_num		= 1,
 	.chip_select		= 0,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index c424e7d..7d22c0b 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -136,12 +136,12 @@ static void __init zeus_init_irq(void)
 
 	/* Peripheral IRQs. It would be nice to move those inside driver
 	   configuration, but it is not supported@the moment. */
-	irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
-	irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
-	irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
-	irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
 			 IRQ_TYPE_EDGE_FALLING);
-	irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
 
 	/* Setup ISA IRQs */
 	for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
@@ -151,8 +151,8 @@ static void __init zeus_init_irq(void)
 		set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
 	}
 
-	irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
-	irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
+	irq_set_irq_type(PXA_GPIO_TO_IRQ(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
+	irq_set_chained_handler(PXA_GPIO_TO_IRQ(ZEUS_ISA_GPIO), zeus_irq_handler);
 }
 
 
@@ -233,7 +233,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 	/* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
 	{ /* COM1 */
 		.mapbase	= 0x10000000,
-		.irq		= gpio_to_irq(ZEUS_UARTA_GPIO),
+		.irq		= PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
 		.irqflags	= IRQF_TRIGGER_RISING,
 		.uartclk	= 14745600,
 		.regshift	= 1,
@@ -242,7 +242,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 	},
 	{ /* COM2 */
 		.mapbase	= 0x10800000,
-		.irq		= gpio_to_irq(ZEUS_UARTB_GPIO),
+		.irq		= PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
 		.irqflags	= IRQF_TRIGGER_RISING,
 		.uartclk	= 14745600,
 		.regshift	= 1,
@@ -251,7 +251,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 	},
 	{ /* COM3 */
 		.mapbase	= 0x11000000,
-		.irq		= gpio_to_irq(ZEUS_UARTC_GPIO),
+		.irq		= PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
 		.irqflags	= IRQF_TRIGGER_RISING,
 		.uartclk	= 14745600,
 		.regshift	= 1,
@@ -260,7 +260,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 	},
 	{ /* COM4 */
 		.mapbase	= 0x11800000,
-		.irq		= gpio_to_irq(ZEUS_UARTD_GPIO),
+		.irq		= PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
 		.irqflags	= IRQF_TRIGGER_RISING,
 		.uartclk	= 14745600,
 		.regshift	= 1,
@@ -321,8 +321,8 @@ static struct resource zeus_dm9k0_resource[] = {
 		.flags = IORESOURCE_MEM
 	},
 	[2] = {
-		.start = gpio_to_irq(ZEUS_ETH0_GPIO),
-		.end   = gpio_to_irq(ZEUS_ETH0_GPIO),
+		.start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
+		.end   = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 	},
 };
@@ -339,8 +339,8 @@ static struct resource zeus_dm9k1_resource[] = {
 		.flags = IORESOURCE_MEM,
 	},
 	[2] = {
-		.start = gpio_to_irq(ZEUS_ETH1_GPIO),
-		.end   = gpio_to_irq(ZEUS_ETH1_GPIO),
+		.start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
+		.end   = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 	},
 };
@@ -423,7 +423,7 @@ static struct spi_board_info zeus_spi_board_info[] = {
 	[0] = {
 		.modalias	= "mcp2515",
 		.platform_data	= &zeus_mcp2515_pdata,
-		.irq		= gpio_to_irq(ZEUS_CAN_GPIO),
+		.irq		= PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
 		.max_speed_hz	= 1*1000*1000,
 		.bus_num	= 3,
 		.mode		= SPI_MODE_0,
@@ -753,7 +753,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
 	{
 		I2C_BOARD_INFO("pca9535",	0x20),
 		.platform_data	= &zeus_pca953x_pdata[2],
-		.irq		= gpio_to_irq(ZEUS_EXTGPIO_GPIO),
+		.irq		= PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
 	},
 	{ I2C_BOARD_INFO("lm75a",	0x48) },
 	{ I2C_BOARD_INFO("24c01",	0x50) },
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 31d4968..2406fd2 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -407,8 +407,8 @@ static void __init zylonite_init(void)
 	 * Note: We depend that the bootloader set
 	 * the correct value to MSC register for SMC91x.
 	 */
-	smc91x_resources[1].start = gpio_to_irq(gpio_eth_irq);
-	smc91x_resources[1].end   = gpio_to_irq(gpio_eth_irq);
+	smc91x_resources[1].start = PXA_GPIO_TO_IRQ(gpio_eth_irq);
+	smc91x_resources[1].end   = PXA_GPIO_TO_IRQ(gpio_eth_irq);
 	platform_device_register(&smc91x_device);
 
 	pxa_set_ac97_info(NULL);
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
index b6390be..15bf9be 100644
--- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
+++ b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
@@ -40,5 +40,6 @@ extern int pxa_last_gpio;
 typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
 
 extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
+extern int pxa_irq_to_gpio(int irq);
 
 #endif /* __PLAT_PXA_GPIO_H */
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 8c34e8c..a26e37a 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -39,8 +39,19 @@ struct pxa_gpio_chip {
 #endif
 };
 
+enum {
+	PXA25X_GPIO = 0,
+	PXA26X_GPIO,
+	PXA27X_GPIO,
+	PXA3XX_GPIO,
+	PXA93X_GPIO,
+	MMP_GPIO = 0x10,
+	MMP2_GPIO,
+};
+
 static DEFINE_SPINLOCK(gpio_lock);
 static struct pxa_gpio_chip *pxa_gpio_chips;
+static int gpio_type;
 
 #define for_each_gpio_chip(i, c)			\
 	for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++)
@@ -55,6 +66,49 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
 	return &pxa_gpio_chips[gpio_to_bank(gpio)];
 }
 
+static inline int gpio_is_pxa_type(int type)
+{
+	if (type & MMP_GPIO)
+		return 0;
+	return 1;
+}
+
+static inline int gpio_is_mmp_type(int type)
+{
+	if (type & MMP_GPIO)
+		return 1;
+	return 0;
+}
+
+static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+	int gpio;
+
+	gpio = chip->base + offset;
+#ifdef CONFIG_ARCH_PXA
+	if (gpio_is_pxa_type(gpio_type))
+		return PXA_GPIO_TO_IRQ(gpio);
+#endif
+#ifdef CONFIG_ARCH_MMP
+	if (gpio_is_mmp_type(gpio_type))
+		return MMP_GPIO_TO_IRQ(gpio);
+#endif
+	return 0;
+}
+
+int pxa_irq_to_gpio(int irq)
+{
+#ifdef CONFIG_ARCH_PXA
+	if (gpio_is_pxa_type(gpio_type))
+		return irq - PXA_GPIO_TO_IRQ(0);
+#endif
+#ifdef CONFIG_ARCH_MMP
+	if (gpio_is_mmp_type(gpio_type))
+		return irq - MMP_GPIO_TO_IRQ(0);
+#endif
+	return 0;
+}
+
 static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 {
 	void __iomem *base = gpio_chip_base(chip);
@@ -131,6 +185,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
 		c->direction_output = pxa_gpio_direction_output;
 		c->get = pxa_gpio_get;
 		c->set = pxa_gpio_set;
+		c->to_irq = pxa_gpio_to_irq;
 
 		/* number of GPIOs on last bank may be less than 32 */
 		c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32;
@@ -158,7 +213,7 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
 static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
 {
 	struct pxa_gpio_chip *c;
-	int gpio = irq_to_gpio(d->irq);
+	int gpio = pxa_irq_to_gpio(d->irq);
 	unsigned long gpdr, mask = GPIO_bit(gpio);
 
 	c = gpio_to_pxachip(gpio);
@@ -229,7 +284,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
 
 static void pxa_ack_muxed_gpio(struct irq_data *d)
 {
-	int gpio = irq_to_gpio(d->irq);
+	int gpio = pxa_irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
 	__raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
@@ -237,7 +292,7 @@ static void pxa_ack_muxed_gpio(struct irq_data *d)
 
 static void pxa_mask_muxed_gpio(struct irq_data *d)
 {
-	int gpio = irq_to_gpio(d->irq);
+	int gpio = pxa_irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 	uint32_t grer, gfer;
 
@@ -251,7 +306,7 @@ static void pxa_mask_muxed_gpio(struct irq_data *d)
 
 static void pxa_unmask_muxed_gpio(struct irq_data *d)
 {
-	int gpio = irq_to_gpio(d->irq);
+	int gpio = pxa_irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
 	c->irq_mask |= GPIO_bit(gpio);
@@ -266,12 +321,51 @@ static struct irq_chip pxa_muxed_gpio_chip = {
 	.irq_set_type	= pxa_gpio_irq_type,
 };
 
+static int pxa_gpio_nums(void)
+{
+	int count = 0;
+
+#ifdef CONFIG_ARCH_PXA
+	if (cpu_is_pxa25x()) {
+#ifdef CONFIG_CPU_PXA26x
+		count = 89;
+		gpio_type = PXA26X_GPIO;
+#elif defined(CONFIG_PXA25x)
+		count = 84;
+		gpio_type = PXA26X_GPIO;
+#endif /* CONFIG_CPU_PXA26x */
+	} else if (cpu_is_pxa27x()) {
+		count = 120;
+		gpio_type = PXA27X_GPIO;
+	} else if (cpu_is_pxa93x() || cpu_is_pxa95x()) {
+		count = 191;
+		gpio_type = PXA93X_GPIO;
+	} else if (cpu_is_pxa3xx()) {
+		count = 127;
+		gpio_type = PXA3XX_GPIO;
+	}
+#endif /* CONFIG_ARCH_PXA */
+
+#ifdef CONFIG_ARCH_MMP
+	if (cpu_is_pxa168() || cpu_is_pxa910()) {
+		count = 127;
+		gpio_type = MMP_GPIO;
+	} else if (cpu_is_mmp2()) {
+		count = 191;
+		gpio_type = MMP2_GPIO;
+	}
+#endif /* CONFIG_ARCH_MMP */
+	return count;
+}
+
 void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
 {
 	struct pxa_gpio_chip *c;
 	int gpio, irq;
 
-	pxa_last_gpio = end;
+	pxa_last_gpio = pxa_gpio_nums();
+	if (!pxa_last_gpio)
+		return -EINVAL;
 
 	/* Initialize GPIO chips */
 	pxa_init_gpio_chip(end);
-- 
1.7.2.5

^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio
  2011-10-13  4:07 ` [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio Haojian Zhuang
@ 2011-10-13 19:18   ` Grant Likely
  2011-10-14  8:27     ` Haojian Zhuang
  0 siblings, 1 reply; 25+ messages in thread
From: Grant Likely @ 2011-10-13 19:18 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 13, 2011 at 12:07:00PM +0800, Haojian Zhuang wrote:
> Avoid to define gpio_to_irq() and irq_to_gpio() for potential name
> confliction since multiple architecture will be built together.
> 
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
> ---
> @@ -55,6 +66,49 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
>  	return &pxa_gpio_chips[gpio_to_bank(gpio)];
>  }
>  
> +static inline int gpio_is_pxa_type(int type)
> +{
> +	if (type & MMP_GPIO)
> +		return 0;
> +	return 1;
> +}

or simply: "return (type & MMP_GPIO) == 0;"

> +
> +static inline int gpio_is_mmp_type(int type)
> +{
> +	if (type & MMP_GPIO)
> +		return 1;
> +	return 0;

return (type & MMP_GPIO) != 0;

> +}
> +
> +static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
> +{
> +	int gpio;
> +
> +	gpio = chip->base + offset;
> +#ifdef CONFIG_ARCH_PXA
> +	if (gpio_is_pxa_type(gpio_type))
> +		return PXA_GPIO_TO_IRQ(gpio);
> +#endif
> +#ifdef CONFIG_ARCH_MMP
> +	if (gpio_is_mmp_type(gpio_type))
> +		return MMP_GPIO_TO_IRQ(gpio);
> +#endif

Blech!  Ugly #ifdef blocks.  It would be better to have the #ifdef
around the gpio_is_*_type macros with empty versions when the arch
isn't enabled.

> +	return 0;
> +}
> +
> +int pxa_irq_to_gpio(int irq)
> +{
> +#ifdef CONFIG_ARCH_PXA
> +	if (gpio_is_pxa_type(gpio_type))
> +		return irq - PXA_GPIO_TO_IRQ(0);
> +#endif
> +#ifdef CONFIG_ARCH_MMP
> +	if (gpio_is_mmp_type(gpio_type))
> +		return irq - MMP_GPIO_TO_IRQ(0);
> +#endif

Ditto here.

> +static int pxa_gpio_nums(void)
> +{
> +	int count = 0;
> +
> +#ifdef CONFIG_ARCH_PXA
> +	if (cpu_is_pxa25x()) {
> +#ifdef CONFIG_CPU_PXA26x
> +		count = 89;
> +		gpio_type = PXA26X_GPIO;
> +#elif defined(CONFIG_PXA25x)
> +		count = 84;
> +		gpio_type = PXA26X_GPIO;
> +#endif /* CONFIG_CPU_PXA26x */

This isn't multiplatform friendly.  My expectation is that new driver
code will not have either/or #ifdef CONFIG blocks like this.  The
driver should be written in a way that either option can be turned on.

> +	} else if (cpu_is_pxa27x()) {
> +		count = 120;
> +		gpio_type = PXA27X_GPIO;
> +	} else if (cpu_is_pxa93x() || cpu_is_pxa95x()) {
> +		count = 191;
> +		gpio_type = PXA93X_GPIO;
> +	} else if (cpu_is_pxa3xx()) {
> +		count = 127;
> +		gpio_type = PXA3XX_GPIO;
> +	}
> +#endif /* CONFIG_ARCH_PXA */
> +
> +#ifdef CONFIG_ARCH_MMP
> +	if (cpu_is_pxa168() || cpu_is_pxa910()) {
> +		count = 127;
> +		gpio_type = MMP_GPIO;
> +	} else if (cpu_is_mmp2()) {
> +		count = 191;
> +		gpio_type = MMP2_GPIO;
> +	}
> +#endif /* CONFIG_ARCH_MMP */
> +	return count;
> +}
> +
>  void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
>  {
>  	struct pxa_gpio_chip *c;
>  	int gpio, irq;
>  
> -	pxa_last_gpio = end;
> +	pxa_last_gpio = pxa_gpio_nums();
> +	if (!pxa_last_gpio)
> +		return -EINVAL;
>  
>  	/* Initialize GPIO chips */
>  	pxa_init_gpio_chip(end);
> -- 
> 1.7.2.5
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio
  2011-10-13 19:18   ` Grant Likely
@ 2011-10-14  8:27     ` Haojian Zhuang
  2011-10-14  8:35       ` Eric Miao
  0 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-14  8:27 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Oct 14, 2011 at 3:18 AM, Grant Likely <grant.likely@secretlab.ca> wrote:
> On Thu, Oct 13, 2011 at 12:07:00PM +0800, Haojian Zhuang wrote:
>> Avoid to define gpio_to_irq() and irq_to_gpio() for potential name
>> confliction since multiple architecture will be built together.
>>
>> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
>> ---
>> @@ -55,6 +66,49 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
>> ? ? ? return &pxa_gpio_chips[gpio_to_bank(gpio)];
>> ?}
>>
>> +static inline int gpio_is_pxa_type(int type)
>> +{
>> + ? ? if (type & MMP_GPIO)
>> + ? ? ? ? ? ? return 0;
>> + ? ? return 1;
>> +}
>
> or simply: "return (type & MMP_GPIO) == 0;"
>
>> +
>> +static inline int gpio_is_mmp_type(int type)
>> +{
>> + ? ? if (type & MMP_GPIO)
>> + ? ? ? ? ? ? return 1;
>> + ? ? return 0;
>
> return (type & MMP_GPIO) != 0;
>
Your code is better than me. I'll change it.

>> +}
>> +
>> +static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
>> +{
>> + ? ? int gpio;
>> +
>> + ? ? gpio = chip->base + offset;
>> +#ifdef CONFIG_ARCH_PXA
>> + ? ? if (gpio_is_pxa_type(gpio_type))
>> + ? ? ? ? ? ? return PXA_GPIO_TO_IRQ(gpio);
>> +#endif
>> +#ifdef CONFIG_ARCH_MMP
>> + ? ? if (gpio_is_mmp_type(gpio_type))
>> + ? ? ? ? ? ? return MMP_GPIO_TO_IRQ(gpio);
>> +#endif
>
> Blech! ?Ugly #ifdef blocks. ?It would be better to have the #ifdef
> around the gpio_is_*_type macros with empty versions when the arch
> isn't enabled.
>
OK. I'll append some small API to cover the transition. So #ifdef will
around the new API.

>> + ? ? return 0;
>> +}
>> +
>> +int pxa_irq_to_gpio(int irq)
>> +{
>> +#ifdef CONFIG_ARCH_PXA
>> + ? ? if (gpio_is_pxa_type(gpio_type))
>> + ? ? ? ? ? ? return irq - PXA_GPIO_TO_IRQ(0);
>> +#endif
>> +#ifdef CONFIG_ARCH_MMP
>> + ? ? if (gpio_is_mmp_type(gpio_type))
>> + ? ? ? ? ? ? return irq - MMP_GPIO_TO_IRQ(0);
>> +#endif
>
> Ditto here.
>
>> +static int pxa_gpio_nums(void)
>> +{
>> + ? ? int count = 0;
>> +
>> +#ifdef CONFIG_ARCH_PXA
>> + ? ? if (cpu_is_pxa25x()) {
>> +#ifdef CONFIG_CPU_PXA26x
>> + ? ? ? ? ? ? count = 89;
>> + ? ? ? ? ? ? gpio_type = PXA26X_GPIO;
>> +#elif defined(CONFIG_PXA25x)
>> + ? ? ? ? ? ? count = 84;
>> + ? ? ? ? ? ? gpio_type = PXA26X_GPIO;
>> +#endif /* CONFIG_CPU_PXA26x */
>
> This isn't multiplatform friendly. ?My expectation is that new driver
> code will not have either/or #ifdef CONFIG blocks like this. ?The
> driver should be written in a way that either option can be turned on.
>
Yes, it's not friendly. But the question is that I can't identify
PXA26x by cpuid.
Now we have to identify pxa25x and pxa26x depends on the macro
CONFIG_CPU_PXA26x.

>> + ? ? } else if (cpu_is_pxa27x()) {
>> + ? ? ? ? ? ? count = 120;
>> + ? ? ? ? ? ? gpio_type = PXA27X_GPIO;
>> + ? ? } else if (cpu_is_pxa93x() || cpu_is_pxa95x()) {
>> + ? ? ? ? ? ? count = 191;
>> + ? ? ? ? ? ? gpio_type = PXA93X_GPIO;
>> + ? ? } else if (cpu_is_pxa3xx()) {
>> + ? ? ? ? ? ? count = 127;
>> + ? ? ? ? ? ? gpio_type = PXA3XX_GPIO;
>> + ? ? }
>> +#endif /* CONFIG_ARCH_PXA */
>> +
>> +#ifdef CONFIG_ARCH_MMP
>> + ? ? if (cpu_is_pxa168() || cpu_is_pxa910()) {
>> + ? ? ? ? ? ? count = 127;
>> + ? ? ? ? ? ? gpio_type = MMP_GPIO;
>> + ? ? } else if (cpu_is_mmp2()) {
>> + ? ? ? ? ? ? count = 191;
>> + ? ? ? ? ? ? gpio_type = MMP2_GPIO;
>> + ? ? }
>> +#endif /* CONFIG_ARCH_MMP */
>> + ? ? return count;
>> +}
>> +
>> ?void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
>> ?{
>> ? ? ? struct pxa_gpio_chip *c;
>> ? ? ? int gpio, irq;
>>
>> - ? ? pxa_last_gpio = end;
>> + ? ? pxa_last_gpio = pxa_gpio_nums();
>> + ? ? if (!pxa_last_gpio)
>> + ? ? ? ? ? ? return -EINVAL;
>>
>> ? ? ? /* Initialize GPIO chips */
>> ? ? ? pxa_init_gpio_chip(end);
>> --
>> 1.7.2.5
>>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio
  2011-10-14  8:27     ` Haojian Zhuang
@ 2011-10-14  8:35       ` Eric Miao
  2011-10-14  8:40         ` Haojian Zhuang
  0 siblings, 1 reply; 25+ messages in thread
From: Eric Miao @ 2011-10-14  8:35 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Oct 14, 2011 at 4:27 PM, Haojian Zhuang
<haojian.zhuang@gmail.com> wrote:
> On Fri, Oct 14, 2011 at 3:18 AM, Grant Likely <grant.likely@secretlab.ca> wrote:
>> On Thu, Oct 13, 2011 at 12:07:00PM +0800, Haojian Zhuang wrote:
>>> Avoid to define gpio_to_irq() and irq_to_gpio() for potential name
>>> confliction since multiple architecture will be built together.
>>>
>>> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
>>> ---
>>> @@ -55,6 +66,49 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
>>> ? ? ? return &pxa_gpio_chips[gpio_to_bank(gpio)];
>>> ?}
>>>
>>> +static inline int gpio_is_pxa_type(int type)
>>> +{
>>> + ? ? if (type & MMP_GPIO)
>>> + ? ? ? ? ? ? return 0;
>>> + ? ? return 1;
>>> +}
>>
>> or simply: "return (type & MMP_GPIO) == 0;"
>>
>>> +
>>> +static inline int gpio_is_mmp_type(int type)
>>> +{
>>> + ? ? if (type & MMP_GPIO)
>>> + ? ? ? ? ? ? return 1;
>>> + ? ? return 0;
>>
>> return (type & MMP_GPIO) != 0;
>>
> Your code is better than me. I'll change it.
>
>>> +}
>>> +
>>> +static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
>>> +{
>>> + ? ? int gpio;
>>> +
>>> + ? ? gpio = chip->base + offset;
>>> +#ifdef CONFIG_ARCH_PXA
>>> + ? ? if (gpio_is_pxa_type(gpio_type))
>>> + ? ? ? ? ? ? return PXA_GPIO_TO_IRQ(gpio);
>>> +#endif
>>> +#ifdef CONFIG_ARCH_MMP
>>> + ? ? if (gpio_is_mmp_type(gpio_type))
>>> + ? ? ? ? ? ? return MMP_GPIO_TO_IRQ(gpio);
>>> +#endif
>>
>> Blech! ?Ugly #ifdef blocks. ?It would be better to have the #ifdef
>> around the gpio_is_*_type macros with empty versions when the arch
>> isn't enabled.
>>
> OK. I'll append some small API to cover the transition. So #ifdef will
> around the new API.
>
>>> + ? ? return 0;
>>> +}
>>> +
>>> +int pxa_irq_to_gpio(int irq)
>>> +{
>>> +#ifdef CONFIG_ARCH_PXA
>>> + ? ? if (gpio_is_pxa_type(gpio_type))
>>> + ? ? ? ? ? ? return irq - PXA_GPIO_TO_IRQ(0);
>>> +#endif
>>> +#ifdef CONFIG_ARCH_MMP
>>> + ? ? if (gpio_is_mmp_type(gpio_type))
>>> + ? ? ? ? ? ? return irq - MMP_GPIO_TO_IRQ(0);
>>> +#endif
>>
>> Ditto here.
>>
>>> +static int pxa_gpio_nums(void)
>>> +{
>>> + ? ? int count = 0;
>>> +
>>> +#ifdef CONFIG_ARCH_PXA
>>> + ? ? if (cpu_is_pxa25x()) {
>>> +#ifdef CONFIG_CPU_PXA26x
>>> + ? ? ? ? ? ? count = 89;
>>> + ? ? ? ? ? ? gpio_type = PXA26X_GPIO;
>>> +#elif defined(CONFIG_PXA25x)
>>> + ? ? ? ? ? ? count = 84;
>>> + ? ? ? ? ? ? gpio_type = PXA26X_GPIO;
>>> +#endif /* CONFIG_CPU_PXA26x */
>>
>> This isn't multiplatform friendly. ?My expectation is that new driver
>> code will not have either/or #ifdef CONFIG blocks like this. ?The
>> driver should be written in a way that either option can be turned on.
>>
> Yes, it's not friendly. But the question is that I can't identify
> PXA26x by cpuid.
> Now we have to identify pxa25x and pxa26x depends on the macro
> CONFIG_CPU_PXA26x.
>

Haojian,

Please also separate the removal of global pxa_last_gpio into
another patch.

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio
  2011-10-14  8:35       ` Eric Miao
@ 2011-10-14  8:40         ` Haojian Zhuang
  0 siblings, 0 replies; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-14  8:40 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Oct 14, 2011 at 4:35 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
> On Fri, Oct 14, 2011 at 4:27 PM, Haojian Zhuang
> <haojian.zhuang@gmail.com> wrote:
>> On Fri, Oct 14, 2011 at 3:18 AM, Grant Likely <grant.likely@secretlab.ca> wrote:
>>> On Thu, Oct 13, 2011 at 12:07:00PM +0800, Haojian Zhuang wrote:
>>>> Avoid to define gpio_to_irq() and irq_to_gpio() for potential name
>>>> confliction since multiple architecture will be built together.
>>>>
>>>> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
>>>> ---
>>>> @@ -55,6 +66,49 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
>>>> ? ? ? return &pxa_gpio_chips[gpio_to_bank(gpio)];
>>>> ?}
>>>>
>>>> +static inline int gpio_is_pxa_type(int type)
>>>> +{
>>>> + ? ? if (type & MMP_GPIO)
>>>> + ? ? ? ? ? ? return 0;
>>>> + ? ? return 1;
>>>> +}
>>>
>>> or simply: "return (type & MMP_GPIO) == 0;"
>>>
>>>> +
>>>> +static inline int gpio_is_mmp_type(int type)
>>>> +{
>>>> + ? ? if (type & MMP_GPIO)
>>>> + ? ? ? ? ? ? return 1;
>>>> + ? ? return 0;
>>>
>>> return (type & MMP_GPIO) != 0;
>>>
>> Your code is better than me. I'll change it.
>>
>>>> +}
>>>> +
>>>> +static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
>>>> +{
>>>> + ? ? int gpio;
>>>> +
>>>> + ? ? gpio = chip->base + offset;
>>>> +#ifdef CONFIG_ARCH_PXA
>>>> + ? ? if (gpio_is_pxa_type(gpio_type))
>>>> + ? ? ? ? ? ? return PXA_GPIO_TO_IRQ(gpio);
>>>> +#endif
>>>> +#ifdef CONFIG_ARCH_MMP
>>>> + ? ? if (gpio_is_mmp_type(gpio_type))
>>>> + ? ? ? ? ? ? return MMP_GPIO_TO_IRQ(gpio);
>>>> +#endif
>>>
>>> Blech! ?Ugly #ifdef blocks. ?It would be better to have the #ifdef
>>> around the gpio_is_*_type macros with empty versions when the arch
>>> isn't enabled.
>>>
>> OK. I'll append some small API to cover the transition. So #ifdef will
>> around the new API.
>>
>>>> + ? ? return 0;
>>>> +}
>>>> +
>>>> +int pxa_irq_to_gpio(int irq)
>>>> +{
>>>> +#ifdef CONFIG_ARCH_PXA
>>>> + ? ? if (gpio_is_pxa_type(gpio_type))
>>>> + ? ? ? ? ? ? return irq - PXA_GPIO_TO_IRQ(0);
>>>> +#endif
>>>> +#ifdef CONFIG_ARCH_MMP
>>>> + ? ? if (gpio_is_mmp_type(gpio_type))
>>>> + ? ? ? ? ? ? return irq - MMP_GPIO_TO_IRQ(0);
>>>> +#endif
>>>
>>> Ditto here.
>>>
>>>> +static int pxa_gpio_nums(void)
>>>> +{
>>>> + ? ? int count = 0;
>>>> +
>>>> +#ifdef CONFIG_ARCH_PXA
>>>> + ? ? if (cpu_is_pxa25x()) {
>>>> +#ifdef CONFIG_CPU_PXA26x
>>>> + ? ? ? ? ? ? count = 89;
>>>> + ? ? ? ? ? ? gpio_type = PXA26X_GPIO;
>>>> +#elif defined(CONFIG_PXA25x)
>>>> + ? ? ? ? ? ? count = 84;
>>>> + ? ? ? ? ? ? gpio_type = PXA26X_GPIO;
>>>> +#endif /* CONFIG_CPU_PXA26x */
>>>
>>> This isn't multiplatform friendly. ?My expectation is that new driver
>>> code will not have either/or #ifdef CONFIG blocks like this. ?The
>>> driver should be written in a way that either option can be turned on.
>>>
>> Yes, it's not friendly. But the question is that I can't identify
>> PXA26x by cpuid.
>> Now we have to identify pxa25x and pxa26x depends on the macro
>> CONFIG_CPU_PXA26x.
>>
>
> Haojian,
>
> Please also separate the removal of global pxa_last_gpio into
> another patch.
>

no problem

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 4/8] ARM: pxa: rename NR_BUILTIN_GPIO
  2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
                   ` (2 preceding siblings ...)
  2011-10-13  4:07 ` [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio Haojian Zhuang
@ 2011-10-13  4:07 ` Haojian Zhuang
  2011-10-13 19:19   ` Grant Likely
  2011-10-13  4:07 ` [PATCH v4 5/8] ARM: pxa: change gpio driver to platform driver Haojian Zhuang
                   ` (3 subsequent siblings)
  7 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:07 UTC (permalink / raw)
  To: linux-arm-kernel

NR_BUILTIN_GPIO is both defined in arch-pxa and arch-mmp. Now replace it
with PXA_NR_BUILTIN_GPIO and MMP_NR_BUILTIN_GPIO.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
---
 arch/arm/mach-mmp/include/mach/gpio-pxa.h  |    2 -
 arch/arm/mach-mmp/include/mach/gpio.h      |    1 -
 arch/arm/mach-mmp/include/mach/irqs.h      |    5 +--
 arch/arm/mach-mmp/tavorevb.c               |    1 +
 arch/arm/mach-mmp/ttc_dkb.c                |    7 +++--
 arch/arm/mach-pxa/include/mach/corgi.h     |    2 +-
 arch/arm/mach-pxa/include/mach/gpio-pxa.h  |    2 -
 arch/arm/mach-pxa/include/mach/gpio.h      |    1 -
 arch/arm/mach-pxa/include/mach/hx4700.h    |    2 +-
 arch/arm/mach-pxa/include/mach/irqs.h      |    4 +-
 arch/arm/mach-pxa/include/mach/littleton.h |    2 +-
 arch/arm/mach-pxa/include/mach/magician.h  |    2 +-
 arch/arm/mach-pxa/include/mach/poodle.h    |    2 +-
 arch/arm/mach-pxa/include/mach/spitz.h     |    6 ++--
 arch/arm/mach-pxa/include/mach/tosa.h      |    6 ++--
 arch/arm/mach-pxa/pcm990-baseboard.c       |    6 ++--
 arch/arm/plat-pxa/include/plat/gpio.h      |   30 ----------------------------
 17 files changed, 23 insertions(+), 58 deletions(-)
 delete mode 100644 arch/arm/plat-pxa/include/plat/gpio.h

diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index f7bcc30..78199bd 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -10,8 +10,6 @@
 #define BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
 #define GPIO_REG(x)	(*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
 
-#define NR_BUILTIN_GPIO		IRQ_GPIO_NUM
-
 #define gpio_to_bank(gpio)	((gpio) >> 5)
 
 /* NOTE: these macros are defined here to make optimization of
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 32b684a..904466d 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -6,5 +6,4 @@
 #define __gpio_is_inverted(gpio)	(0)
 #define __gpio_is_occupied(gpio)	(0)
 
-#include <plat/gpio.h>
 #endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index ec95951..34635a0 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -219,11 +219,10 @@
 #define IRQ_MMP2_MUX_END		(IRQ_MMP2_SSP_BASE + 2)
 
 #define IRQ_GPIO_START			128
-#define IRQ_GPIO_NUM			192
-#define IRQ_GPIO(x)			(IRQ_GPIO_START + (x))
+#define MMP_NR_BUILTIN_GPIO		192
 #define MMP_GPIO_TO_IRQ(gpio)		(IRQ_GPIO_START + (gpio))
 
-#define IRQ_BOARD_START			(IRQ_GPIO_START + IRQ_GPIO_NUM)
+#define IRQ_BOARD_START			(IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
 
 #define NR_IRQS				(IRQ_BOARD_START)
 
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 0afe3a3..331f5f3 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -19,6 +19,7 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa910.h>
 #include <mach/pxa910.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 176515a..fac0d5d 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -24,12 +24,13 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa910.h>
 #include <mach/pxa910.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
-#define TTCDKB_GPIO_EXT0(x)	(NR_BUILTIN_GPIO + ((x < 0) ? 0 :	\
+#define TTCDKB_GPIO_EXT0(x)	(MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 :	\
 				((x < 16) ? x : 15)))
-#define TTCDKB_GPIO_EXT1(x)	(NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 :	\
+#define TTCDKB_GPIO_EXT1(x)	(MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \
 				((x < 16) ? x : 15)))
 
 /*
@@ -136,7 +137,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
 	{
 		.type		= "max7312",
 		.addr		= 0x23,
-		.irq		= IRQ_GPIO(80),
+		.irq		= MMP_GPIO_TO_IRQ(80),
 		.platform_data	= &max7312_data,
 	},
 };
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index c9f8617..f3c3493 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -98,7 +98,7 @@
 			CORGI_SCP_MIC_BIAS )
 #define CORGI_SCOOP_IO_OUT	( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
 
-#define CORGI_SCOOP_GPIO_BASE		(NR_BUILTIN_GPIO)
+#define CORGI_SCOOP_GPIO_BASE		(PXA_NR_BUILTIN_GPIO)
 #define CORGI_GPIO_LED_GREEN		(CORGI_SCOOP_GPIO_BASE + 0)
 #define CORGI_GPIO_SWA			(CORGI_SCOOP_GPIO_BASE + 1)  /* Hinge Switch A */
 #define CORGI_GPIO_SWB			(CORGI_SCOOP_GPIO_BASE + 2)  /* Hinge Switch B */
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
index 41b4c93..134b3bc 100644
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
@@ -93,8 +93,6 @@
 #define GAFR(x)		GPIO_REG(0x54 + (((x) & 0x70) >> 2))
 
 
-#define NR_BUILTIN_GPIO		PXA_GPIO_IRQ_NUM
-
 #define gpio_to_bank(gpio)	((gpio) >> 5)
 
 #ifdef CONFIG_CPU_PXA26x
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 5cf0137..561cdbf 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -28,5 +28,4 @@
 /* The defines for the driver are needed for the accelerated accessors */
 #include "gpio-pxa.h"
 
-#include <plat/gpio.h>
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
index 3740844..8bc0291 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -15,7 +15,7 @@
 #include <linux/gpio.h>
 #include <linux/mfd/asic3.h>
 
-#define HX4700_ASIC3_GPIO_BASE	NR_BUILTIN_GPIO
+#define HX4700_ASIC3_GPIO_BASE	PXA_NR_BUILTIN_GPIO
 #define HX4700_EGPIO_BASE	(HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
 #define HX4700_NR_IRQS		(IRQ_BOARD_START + 70)
 
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index b83d8ff..32975ad 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -88,7 +88,7 @@
 #define IRQ_U2P		PXA_IRQ(93)	/* USB PHY D+/D- Lines (PXA935) */
 
 #define PXA_GPIO_IRQ_BASE	PXA_IRQ(96)
-#define PXA_GPIO_IRQ_NUM	(192)
+#define PXA_NR_BUILTIN_GPIO	(192)
 #define PXA_GPIO_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
 
 /*
@@ -98,7 +98,7 @@
  * By default, no board IRQ is reserved. It should be finished in
  * custom board since sparse IRQ is already enabled.
  */
-#define IRQ_BOARD_START		(PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
+#define IRQ_BOARD_START		(PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
 
 #define NR_IRQS			(IRQ_BOARD_START)
 
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index b6238cb..e20ac1b 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -7,7 +7,7 @@
 
 #define LITTLETON_GPIO_LCD_CS	(17)
 
-#define EXT0_GPIO_BASE	(NR_BUILTIN_GPIO)
+#define EXT0_GPIO_BASE	(PXA_NR_BUILTIN_GPIO)
 #define EXT0_GPIO(x)	(EXT0_GPIO_BASE + (x))
 
 #define LITTLETON_NR_IRQS	(IRQ_BOARD_START + 8)
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 7cbfc5d..ba6a6e1 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -78,7 +78,7 @@
  * CPLD EGPIOs
  */
 
-#define MAGICIAN_EGPIO_BASE			NR_BUILTIN_GPIO
+#define MAGICIAN_EGPIO_BASE			PXA_NR_BUILTIN_GPIO
 #define MAGICIAN_EGPIO(reg,bit) \
 	(MAGICIAN_EGPIO_BASE + 8*reg + bit)
 
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 763fdc4..f32ff75 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -71,7 +71,7 @@
 #define POODLE_SCOOP_IO_DIR	( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
 #define POODLE_SCOOP_IO_OUT	( 0 )
 
-#define POODLE_SCOOP_GPIO_BASE	(NR_BUILTIN_GPIO)
+#define POODLE_SCOOP_GPIO_BASE	(PXA_NR_BUILTIN_GPIO)
 #define POODLE_GPIO_CHARGE_ON	(POODLE_SCOOP_GPIO_BASE + 0)
 #define POODLE_GPIO_CP401	(POODLE_SCOOP_GPIO_BASE + 2)
 #define POODLE_GPIO_VPEN	(POODLE_SCOOP_GPIO_BASE + 7)
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index 273381a..0bfe650 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -108,7 +108,7 @@
 #define SPITZ_SCP_SUS_CLR     (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
 #define SPITZ_SCP_SUS_SET     0
 
-#define SPITZ_SCP_GPIO_BASE	(NR_BUILTIN_GPIO)
+#define SPITZ_SCP_GPIO_BASE	(PXA_NR_BUILTIN_GPIO)
 #define SPITZ_GPIO_LED_GREEN	(SPITZ_SCP_GPIO_BASE + 0)
 #define SPITZ_GPIO_JK_B		(SPITZ_SCP_GPIO_BASE + 1)
 #define SPITZ_GPIO_CHRG_ON	(SPITZ_SCP_GPIO_BASE + 2)
@@ -140,7 +140,7 @@
                              SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
 #define SPITZ_SCP2_SUS_SET  (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
 
-#define SPITZ_SCP2_GPIO_BASE		(NR_BUILTIN_GPIO + 12)
+#define SPITZ_SCP2_GPIO_BASE		(PXA_NR_BUILTIN_GPIO + 12)
 #define SPITZ_GPIO_IR_ON		(SPITZ_SCP2_GPIO_BASE + 0)
 #define SPITZ_GPIO_AKIN_PULLUP		(SPITZ_SCP2_GPIO_BASE + 1)
 #define SPITZ_GPIO_RESERVED_1		(SPITZ_SCP2_GPIO_BASE + 2)
@@ -152,7 +152,7 @@
 #define SPITZ_GPIO_MIC_BIAS		(SPITZ_SCP2_GPIO_BASE + 8)
 
 /* Akita IO Expander GPIOs */
-#define AKITA_IOEXP_GPIO_BASE		(NR_BUILTIN_GPIO + 12)
+#define AKITA_IOEXP_GPIO_BASE		(PXA_NR_BUILTIN_GPIO + 12)
 #define AKITA_GPIO_RESERVED_0		(AKITA_IOEXP_GPIO_BASE + 0)
 #define AKITA_GPIO_RESERVED_1		(AKITA_IOEXP_GPIO_BASE + 1)
 #define AKITA_GPIO_MIC_BIAS		(AKITA_IOEXP_GPIO_BASE + 2)
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 4653539..2bb0e86 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -24,7 +24,7 @@
 /*
  * SCOOP2 internal GPIOs
  */
-#define TOSA_SCOOP_GPIO_BASE		NR_BUILTIN_GPIO
+#define TOSA_SCOOP_GPIO_BASE		PXA_NR_BUILTIN_GPIO
 #define TOSA_SCOOP_PXA_VCORE1		SCOOP_GPCR_PA11
 #define TOSA_GPIO_TC6393XB_REST_IN	(TOSA_SCOOP_GPIO_BASE + 1)
 #define TOSA_GPIO_IR_POWERDWN		(TOSA_SCOOP_GPIO_BASE + 2)
@@ -42,7 +42,7 @@
 /*
  * SCOOP2 jacket GPIOs
  */
-#define TOSA_SCOOP_JC_GPIO_BASE		(NR_BUILTIN_GPIO + 12)
+#define TOSA_SCOOP_JC_GPIO_BASE		(PXA_NR_BUILTIN_GPIO + 12)
 #define TOSA_GPIO_BT_LED		(TOSA_SCOOP_JC_GPIO_BASE + 0)
 #define TOSA_GPIO_NOTE_LED		(TOSA_SCOOP_JC_GPIO_BASE + 1)
 #define TOSA_GPIO_CHRG_ERR_LED		(TOSA_SCOOP_JC_GPIO_BASE + 2)
@@ -59,7 +59,7 @@
 /*
  * TC6393XB GPIOs
  */
-#define TOSA_TC6393XB_GPIO_BASE		(NR_BUILTIN_GPIO + 2 * 12)
+#define TOSA_TC6393XB_GPIO_BASE		(PXA_NR_BUILTIN_GPIO + 2 * 12)
 
 #define TOSA_GPIO_TG_ON			(TOSA_TC6393XB_GPIO_BASE + 0)
 #define TOSA_GPIO_L_MUTE		(TOSA_TC6393XB_GPIO_BASE + 1)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 9a9c539..3805e5d 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -378,7 +378,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
 #include <linux/i2c/pca953x.h>
 
 static struct pca953x_platform_data pca9536_data = {
-	.gpio_base	= NR_BUILTIN_GPIO,
+	.gpio_base	= PXA_NR_BUILTIN_GPIO,
 };
 
 static int gpio_bus_switch = -EINVAL;
@@ -406,9 +406,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
 	int ret;
 
 	if (gpio_bus_switch < 0) {
-		ret = gpio_request(NR_BUILTIN_GPIO, "camera");
+		ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera");
 		if (!ret) {
-			gpio_bus_switch = NR_BUILTIN_GPIO;
+			gpio_bus_switch = PXA_NR_BUILTIN_GPIO;
 			gpio_direction_output(gpio_bus_switch, 0);
 		}
 	}
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
deleted file mode 100644
index 258f772..0000000
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ /dev/null
@@ -1,30 +0,0 @@
-#ifndef __PLAT_GPIO_H
-#define __PLAT_GPIO_H
-
-#define __ARM_GPIOLIB_COMPLEX
-
-/* The individual machine provides register offsets and NR_BUILTIN_GPIO */
-#include <mach/gpio-pxa.h>
-
-static inline int gpio_get_value(unsigned gpio)
-{
-	if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
-		return GPLR(gpio) & GPIO_bit(gpio);
-	else
-		return __gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-	if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
-		if (value)
-			GPSR(gpio) = GPIO_bit(gpio);
-		else
-			GPCR(gpio) = GPIO_bit(gpio);
-	} else
-		__gpio_set_value(gpio, value);
-}
-
-#define gpio_cansleep		__gpio_cansleep
-
-#endif /* __PLAT_GPIO_H */
-- 
1.7.2.5

^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH v4 4/8] ARM: pxa: rename NR_BUILTIN_GPIO
  2011-10-13  4:07 ` [PATCH v4 4/8] ARM: pxa: rename NR_BUILTIN_GPIO Haojian Zhuang
@ 2011-10-13 19:19   ` Grant Likely
  0 siblings, 0 replies; 25+ messages in thread
From: Grant Likely @ 2011-10-13 19:19 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 13, 2011 at 12:07:01PM +0800, Haojian Zhuang wrote:
> NR_BUILTIN_GPIO is both defined in arch-pxa and arch-mmp. Now replace it
> with PXA_NR_BUILTIN_GPIO and MMP_NR_BUILTIN_GPIO.

This patch does more than just rename a #define.  There is a hunk that
removes a bunch of code, yet it isn't mentioned in the commit text.

g.
> 
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
> ---
>  arch/arm/mach-mmp/include/mach/gpio-pxa.h  |    2 -
>  arch/arm/mach-mmp/include/mach/gpio.h      |    1 -
>  arch/arm/mach-mmp/include/mach/irqs.h      |    5 +--
>  arch/arm/mach-mmp/tavorevb.c               |    1 +
>  arch/arm/mach-mmp/ttc_dkb.c                |    7 +++--
>  arch/arm/mach-pxa/include/mach/corgi.h     |    2 +-
>  arch/arm/mach-pxa/include/mach/gpio-pxa.h  |    2 -
>  arch/arm/mach-pxa/include/mach/gpio.h      |    1 -
>  arch/arm/mach-pxa/include/mach/hx4700.h    |    2 +-
>  arch/arm/mach-pxa/include/mach/irqs.h      |    4 +-
>  arch/arm/mach-pxa/include/mach/littleton.h |    2 +-
>  arch/arm/mach-pxa/include/mach/magician.h  |    2 +-
>  arch/arm/mach-pxa/include/mach/poodle.h    |    2 +-
>  arch/arm/mach-pxa/include/mach/spitz.h     |    6 ++--
>  arch/arm/mach-pxa/include/mach/tosa.h      |    6 ++--
>  arch/arm/mach-pxa/pcm990-baseboard.c       |    6 ++--
>  arch/arm/plat-pxa/include/plat/gpio.h      |   30 ----------------------------
>  17 files changed, 23 insertions(+), 58 deletions(-)
>  delete mode 100644 arch/arm/plat-pxa/include/plat/gpio.h
> 
> diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
> index f7bcc30..78199bd 100644
> --- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
> +++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
> @@ -10,8 +10,6 @@
>  #define BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
>  #define GPIO_REG(x)	(*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
>  
> -#define NR_BUILTIN_GPIO		IRQ_GPIO_NUM
> -
>  #define gpio_to_bank(gpio)	((gpio) >> 5)
>  
>  /* NOTE: these macros are defined here to make optimization of
> diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
> index 32b684a..904466d 100644
> --- a/arch/arm/mach-mmp/include/mach/gpio.h
> +++ b/arch/arm/mach-mmp/include/mach/gpio.h
> @@ -6,5 +6,4 @@
>  #define __gpio_is_inverted(gpio)	(0)
>  #define __gpio_is_occupied(gpio)	(0)
>  
> -#include <plat/gpio.h>
>  #endif /* __ASM_MACH_GPIO_H */
> diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
> index ec95951..34635a0 100644
> --- a/arch/arm/mach-mmp/include/mach/irqs.h
> +++ b/arch/arm/mach-mmp/include/mach/irqs.h
> @@ -219,11 +219,10 @@
>  #define IRQ_MMP2_MUX_END		(IRQ_MMP2_SSP_BASE + 2)
>  
>  #define IRQ_GPIO_START			128
> -#define IRQ_GPIO_NUM			192
> -#define IRQ_GPIO(x)			(IRQ_GPIO_START + (x))
> +#define MMP_NR_BUILTIN_GPIO		192
>  #define MMP_GPIO_TO_IRQ(gpio)		(IRQ_GPIO_START + (gpio))
>  
> -#define IRQ_BOARD_START			(IRQ_GPIO_START + IRQ_GPIO_NUM)
> +#define IRQ_BOARD_START			(IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
>  
>  #define NR_IRQS				(IRQ_BOARD_START)
>  
> diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
> index 0afe3a3..331f5f3 100644
> --- a/arch/arm/mach-mmp/tavorevb.c
> +++ b/arch/arm/mach-mmp/tavorevb.c
> @@ -19,6 +19,7 @@
>  #include <mach/addr-map.h>
>  #include <mach/mfp-pxa910.h>
>  #include <mach/pxa910.h>
> +#include <mach/irqs.h>
>  
>  #include "common.h"
>  
> diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
> index 176515a..fac0d5d 100644
> --- a/arch/arm/mach-mmp/ttc_dkb.c
> +++ b/arch/arm/mach-mmp/ttc_dkb.c
> @@ -24,12 +24,13 @@
>  #include <mach/addr-map.h>
>  #include <mach/mfp-pxa910.h>
>  #include <mach/pxa910.h>
> +#include <mach/irqs.h>
>  
>  #include "common.h"
>  
> -#define TTCDKB_GPIO_EXT0(x)	(NR_BUILTIN_GPIO + ((x < 0) ? 0 :	\
> +#define TTCDKB_GPIO_EXT0(x)	(MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 :	\
>  				((x < 16) ? x : 15)))
> -#define TTCDKB_GPIO_EXT1(x)	(NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 :	\
> +#define TTCDKB_GPIO_EXT1(x)	(MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \
>  				((x < 16) ? x : 15)))
>  
>  /*
> @@ -136,7 +137,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
>  	{
>  		.type		= "max7312",
>  		.addr		= 0x23,
> -		.irq		= IRQ_GPIO(80),
> +		.irq		= MMP_GPIO_TO_IRQ(80),
>  		.platform_data	= &max7312_data,
>  	},
>  };
> diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
> index c9f8617..f3c3493 100644
> --- a/arch/arm/mach-pxa/include/mach/corgi.h
> +++ b/arch/arm/mach-pxa/include/mach/corgi.h
> @@ -98,7 +98,7 @@
>  			CORGI_SCP_MIC_BIAS )
>  #define CORGI_SCOOP_IO_OUT	( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
>  
> -#define CORGI_SCOOP_GPIO_BASE		(NR_BUILTIN_GPIO)
> +#define CORGI_SCOOP_GPIO_BASE		(PXA_NR_BUILTIN_GPIO)
>  #define CORGI_GPIO_LED_GREEN		(CORGI_SCOOP_GPIO_BASE + 0)
>  #define CORGI_GPIO_SWA			(CORGI_SCOOP_GPIO_BASE + 1)  /* Hinge Switch A */
>  #define CORGI_GPIO_SWB			(CORGI_SCOOP_GPIO_BASE + 2)  /* Hinge Switch B */
> diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
> index 41b4c93..134b3bc 100644
> --- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
> +++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
> @@ -93,8 +93,6 @@
>  #define GAFR(x)		GPIO_REG(0x54 + (((x) & 0x70) >> 2))
>  
>  
> -#define NR_BUILTIN_GPIO		PXA_GPIO_IRQ_NUM
> -
>  #define gpio_to_bank(gpio)	((gpio) >> 5)
>  
>  #ifdef CONFIG_CPU_PXA26x
> diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
> index 5cf0137..561cdbf 100644
> --- a/arch/arm/mach-pxa/include/mach/gpio.h
> +++ b/arch/arm/mach-pxa/include/mach/gpio.h
> @@ -28,5 +28,4 @@
>  /* The defines for the driver are needed for the accelerated accessors */
>  #include "gpio-pxa.h"
>  
> -#include <plat/gpio.h>
>  #endif
> diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
> index 3740844..8bc0291 100644
> --- a/arch/arm/mach-pxa/include/mach/hx4700.h
> +++ b/arch/arm/mach-pxa/include/mach/hx4700.h
> @@ -15,7 +15,7 @@
>  #include <linux/gpio.h>
>  #include <linux/mfd/asic3.h>
>  
> -#define HX4700_ASIC3_GPIO_BASE	NR_BUILTIN_GPIO
> +#define HX4700_ASIC3_GPIO_BASE	PXA_NR_BUILTIN_GPIO
>  #define HX4700_EGPIO_BASE	(HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
>  #define HX4700_NR_IRQS		(IRQ_BOARD_START + 70)
>  
> diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
> index b83d8ff..32975ad 100644
> --- a/arch/arm/mach-pxa/include/mach/irqs.h
> +++ b/arch/arm/mach-pxa/include/mach/irqs.h
> @@ -88,7 +88,7 @@
>  #define IRQ_U2P		PXA_IRQ(93)	/* USB PHY D+/D- Lines (PXA935) */
>  
>  #define PXA_GPIO_IRQ_BASE	PXA_IRQ(96)
> -#define PXA_GPIO_IRQ_NUM	(192)
> +#define PXA_NR_BUILTIN_GPIO	(192)
>  #define PXA_GPIO_TO_IRQ(x)	(PXA_GPIO_IRQ_BASE + (x))
>  
>  /*
> @@ -98,7 +98,7 @@
>   * By default, no board IRQ is reserved. It should be finished in
>   * custom board since sparse IRQ is already enabled.
>   */
> -#define IRQ_BOARD_START		(PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
> +#define IRQ_BOARD_START		(PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
>  
>  #define NR_IRQS			(IRQ_BOARD_START)
>  
> diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
> index b6238cb..e20ac1b 100644
> --- a/arch/arm/mach-pxa/include/mach/littleton.h
> +++ b/arch/arm/mach-pxa/include/mach/littleton.h
> @@ -7,7 +7,7 @@
>  
>  #define LITTLETON_GPIO_LCD_CS	(17)
>  
> -#define EXT0_GPIO_BASE	(NR_BUILTIN_GPIO)
> +#define EXT0_GPIO_BASE	(PXA_NR_BUILTIN_GPIO)
>  #define EXT0_GPIO(x)	(EXT0_GPIO_BASE + (x))
>  
>  #define LITTLETON_NR_IRQS	(IRQ_BOARD_START + 8)
> diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
> index 7cbfc5d..ba6a6e1 100644
> --- a/arch/arm/mach-pxa/include/mach/magician.h
> +++ b/arch/arm/mach-pxa/include/mach/magician.h
> @@ -78,7 +78,7 @@
>   * CPLD EGPIOs
>   */
>  
> -#define MAGICIAN_EGPIO_BASE			NR_BUILTIN_GPIO
> +#define MAGICIAN_EGPIO_BASE			PXA_NR_BUILTIN_GPIO
>  #define MAGICIAN_EGPIO(reg,bit) \
>  	(MAGICIAN_EGPIO_BASE + 8*reg + bit)
>  
> diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
> index 763fdc4..f32ff75 100644
> --- a/arch/arm/mach-pxa/include/mach/poodle.h
> +++ b/arch/arm/mach-pxa/include/mach/poodle.h
> @@ -71,7 +71,7 @@
>  #define POODLE_SCOOP_IO_DIR	( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
>  #define POODLE_SCOOP_IO_OUT	( 0 )
>  
> -#define POODLE_SCOOP_GPIO_BASE	(NR_BUILTIN_GPIO)
> +#define POODLE_SCOOP_GPIO_BASE	(PXA_NR_BUILTIN_GPIO)
>  #define POODLE_GPIO_CHARGE_ON	(POODLE_SCOOP_GPIO_BASE + 0)
>  #define POODLE_GPIO_CP401	(POODLE_SCOOP_GPIO_BASE + 2)
>  #define POODLE_GPIO_VPEN	(POODLE_SCOOP_GPIO_BASE + 7)
> diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
> index 273381a..0bfe650 100644
> --- a/arch/arm/mach-pxa/include/mach/spitz.h
> +++ b/arch/arm/mach-pxa/include/mach/spitz.h
> @@ -108,7 +108,7 @@
>  #define SPITZ_SCP_SUS_CLR     (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
>  #define SPITZ_SCP_SUS_SET     0
>  
> -#define SPITZ_SCP_GPIO_BASE	(NR_BUILTIN_GPIO)
> +#define SPITZ_SCP_GPIO_BASE	(PXA_NR_BUILTIN_GPIO)
>  #define SPITZ_GPIO_LED_GREEN	(SPITZ_SCP_GPIO_BASE + 0)
>  #define SPITZ_GPIO_JK_B		(SPITZ_SCP_GPIO_BASE + 1)
>  #define SPITZ_GPIO_CHRG_ON	(SPITZ_SCP_GPIO_BASE + 2)
> @@ -140,7 +140,7 @@
>                               SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
>  #define SPITZ_SCP2_SUS_SET  (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
>  
> -#define SPITZ_SCP2_GPIO_BASE		(NR_BUILTIN_GPIO + 12)
> +#define SPITZ_SCP2_GPIO_BASE		(PXA_NR_BUILTIN_GPIO + 12)
>  #define SPITZ_GPIO_IR_ON		(SPITZ_SCP2_GPIO_BASE + 0)
>  #define SPITZ_GPIO_AKIN_PULLUP		(SPITZ_SCP2_GPIO_BASE + 1)
>  #define SPITZ_GPIO_RESERVED_1		(SPITZ_SCP2_GPIO_BASE + 2)
> @@ -152,7 +152,7 @@
>  #define SPITZ_GPIO_MIC_BIAS		(SPITZ_SCP2_GPIO_BASE + 8)
>  
>  /* Akita IO Expander GPIOs */
> -#define AKITA_IOEXP_GPIO_BASE		(NR_BUILTIN_GPIO + 12)
> +#define AKITA_IOEXP_GPIO_BASE		(PXA_NR_BUILTIN_GPIO + 12)
>  #define AKITA_GPIO_RESERVED_0		(AKITA_IOEXP_GPIO_BASE + 0)
>  #define AKITA_GPIO_RESERVED_1		(AKITA_IOEXP_GPIO_BASE + 1)
>  #define AKITA_GPIO_MIC_BIAS		(AKITA_IOEXP_GPIO_BASE + 2)
> diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
> index 4653539..2bb0e86 100644
> --- a/arch/arm/mach-pxa/include/mach/tosa.h
> +++ b/arch/arm/mach-pxa/include/mach/tosa.h
> @@ -24,7 +24,7 @@
>  /*
>   * SCOOP2 internal GPIOs
>   */
> -#define TOSA_SCOOP_GPIO_BASE		NR_BUILTIN_GPIO
> +#define TOSA_SCOOP_GPIO_BASE		PXA_NR_BUILTIN_GPIO
>  #define TOSA_SCOOP_PXA_VCORE1		SCOOP_GPCR_PA11
>  #define TOSA_GPIO_TC6393XB_REST_IN	(TOSA_SCOOP_GPIO_BASE + 1)
>  #define TOSA_GPIO_IR_POWERDWN		(TOSA_SCOOP_GPIO_BASE + 2)
> @@ -42,7 +42,7 @@
>  /*
>   * SCOOP2 jacket GPIOs
>   */
> -#define TOSA_SCOOP_JC_GPIO_BASE		(NR_BUILTIN_GPIO + 12)
> +#define TOSA_SCOOP_JC_GPIO_BASE		(PXA_NR_BUILTIN_GPIO + 12)
>  #define TOSA_GPIO_BT_LED		(TOSA_SCOOP_JC_GPIO_BASE + 0)
>  #define TOSA_GPIO_NOTE_LED		(TOSA_SCOOP_JC_GPIO_BASE + 1)
>  #define TOSA_GPIO_CHRG_ERR_LED		(TOSA_SCOOP_JC_GPIO_BASE + 2)
> @@ -59,7 +59,7 @@
>  /*
>   * TC6393XB GPIOs
>   */
> -#define TOSA_TC6393XB_GPIO_BASE		(NR_BUILTIN_GPIO + 2 * 12)
> +#define TOSA_TC6393XB_GPIO_BASE		(PXA_NR_BUILTIN_GPIO + 2 * 12)
>  
>  #define TOSA_GPIO_TG_ON			(TOSA_TC6393XB_GPIO_BASE + 0)
>  #define TOSA_GPIO_L_MUTE		(TOSA_TC6393XB_GPIO_BASE + 1)
> diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
> index 9a9c539..3805e5d 100644
> --- a/arch/arm/mach-pxa/pcm990-baseboard.c
> +++ b/arch/arm/mach-pxa/pcm990-baseboard.c
> @@ -378,7 +378,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
>  #include <linux/i2c/pca953x.h>
>  
>  static struct pca953x_platform_data pca9536_data = {
> -	.gpio_base	= NR_BUILTIN_GPIO,
> +	.gpio_base	= PXA_NR_BUILTIN_GPIO,
>  };
>  
>  static int gpio_bus_switch = -EINVAL;
> @@ -406,9 +406,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
>  	int ret;
>  
>  	if (gpio_bus_switch < 0) {
> -		ret = gpio_request(NR_BUILTIN_GPIO, "camera");
> +		ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera");
>  		if (!ret) {
> -			gpio_bus_switch = NR_BUILTIN_GPIO;
> +			gpio_bus_switch = PXA_NR_BUILTIN_GPIO;
>  			gpio_direction_output(gpio_bus_switch, 0);
>  		}
>  	}
> diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
> deleted file mode 100644
> index 258f772..0000000
> --- a/arch/arm/plat-pxa/include/plat/gpio.h
> +++ /dev/null
> @@ -1,30 +0,0 @@
> -#ifndef __PLAT_GPIO_H
> -#define __PLAT_GPIO_H
> -
> -#define __ARM_GPIOLIB_COMPLEX
> -
> -/* The individual machine provides register offsets and NR_BUILTIN_GPIO */
> -#include <mach/gpio-pxa.h>
> -
> -static inline int gpio_get_value(unsigned gpio)
> -{
> -	if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
> -		return GPLR(gpio) & GPIO_bit(gpio);
> -	else
> -		return __gpio_get_value(gpio);
> -}
> -
> -static inline void gpio_set_value(unsigned gpio, int value)
> -{
> -	if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
> -		if (value)
> -			GPSR(gpio) = GPIO_bit(gpio);
> -		else
> -			GPCR(gpio) = GPIO_bit(gpio);
> -	} else
> -		__gpio_set_value(gpio, value);
> -}
> -
> -#define gpio_cansleep		__gpio_cansleep
> -
> -#endif /* __PLAT_GPIO_H */
> -- 
> 1.7.2.5
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 5/8] ARM: pxa: change gpio driver to platform driver
  2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
                   ` (3 preceding siblings ...)
  2011-10-13  4:07 ` [PATCH v4 4/8] ARM: pxa: rename NR_BUILTIN_GPIO Haojian Zhuang
@ 2011-10-13  4:07 ` Haojian Zhuang
  2011-10-13 19:22   ` Grant Likely
  2011-10-13  4:07 ` [PATCH v4 6/8] ARM: pxa: move gpio-pxa.h into include directory Haojian Zhuang
                   ` (2 subsequent siblings)
  7 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:07 UTC (permalink / raw)
  To: linux-arm-kernel

Change gpio driver to platform driver and remove the potential
conflicted name.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
---
 arch/arm/Kconfig                          |    2 +
 arch/arm/mach-mmp/aspenite.c              |    1 +
 arch/arm/mach-mmp/avengers_lite.c         |    1 +
 arch/arm/mach-mmp/brownstone.c            |    1 +
 arch/arm/mach-mmp/flint.c                 |    1 +
 arch/arm/mach-mmp/gplugd.c                |    1 +
 arch/arm/mach-mmp/include/mach/gpio-pxa.h |   17 -----
 arch/arm/mach-mmp/include/mach/mmp2.h     |    2 +
 arch/arm/mach-mmp/include/mach/pxa168.h   |    2 +
 arch/arm/mach-mmp/include/mach/pxa910.h   |    2 +
 arch/arm/mach-mmp/jasper.c                |    1 +
 arch/arm/mach-mmp/mmp2.c                  |   30 ++++++++-
 arch/arm/mach-mmp/pxa168.c                |   31 +++++++++-
 arch/arm/mach-mmp/pxa910.c                |   31 +++++++++-
 arch/arm/mach-mmp/tavorevb.c              |    1 +
 arch/arm/mach-mmp/teton_bga.c             |    1 +
 arch/arm/mach-mmp/ttc_dkb.c               |    1 +
 arch/arm/mach-pxa/corgi_pm.c              |   19 +++---
 arch/arm/mach-pxa/devices.c               |   37 +++++++++++
 arch/arm/mach-pxa/devices.h               |    1 +
 arch/arm/mach-pxa/include/mach/corgi.h    |    4 +-
 arch/arm/mach-pxa/include/mach/gpio-pxa.h |   82 ++-----------------------
 arch/arm/mach-pxa/include/mach/idp.h      |    2 +-
 arch/arm/mach-pxa/include/mach/tosa.h     |    4 +-
 arch/arm/mach-pxa/mfp-pxa2xx.c            |   36 ++++++------
 arch/arm/mach-pxa/pxa25x.c                |    3 +-
 arch/arm/mach-pxa/pxa27x.c                |    2 +-
 arch/arm/mach-pxa/pxa3xx.c                |    2 +-
 arch/arm/mach-pxa/pxa95x.c                |    2 +-
 arch/arm/mach-pxa/spitz_pm.c              |   29 ++++++----
 arch/arm/plat-pxa/include/plat/gpio-pxa.h |   51 +++++++++++++---
 drivers/gpio/Kconfig                      |    6 ++
 drivers/gpio/Makefile                     |    2 +-
 drivers/gpio/gpio-pxa.c                   |   93 +++++++++++++++++++++++------
 34 files changed, 324 insertions(+), 177 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c704bd7..8b54401 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -556,6 +556,7 @@ config ARCH_MMP
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
 	select GENERIC_CLOCKEVENTS
+	select GPIO_PXA
 	select HAVE_SCHED_CLOCK
 	select TICK_ONESHOT
 	select PLAT_PXA
@@ -627,6 +628,7 @@ config ARCH_PXA
 	select CLKSRC_MMIO
 	select ARCH_REQUIRE_GPIOLIB
 	select GENERIC_CLOCKEVENTS
+	select GPIO_PXA
 	select HAVE_SCHED_CLOCK
 	select TICK_ONESHOT
 	select PLAT_PXA
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index fb7dfc1..edcbada 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -231,6 +231,7 @@ static void __init common_init(void)
 	pxa168_add_nand(&aspenite_nand_info);
 	pxa168_add_fb(&aspenite_lcd_info);
 	pxa168_add_keypad(&aspenite_keypad_info);
+	platform_device_register(&pxa168_device_gpio);
 
 	/* off-chip devices */
 	platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 39f0878..c5d53e0 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -38,6 +38,7 @@ static void __init avengers_lite_init(void)
 
 	/* on-chip devices */
 	pxa168_add_uart(2);
+	platform_device_register(&pxa168_device_gpio);
 }
 
 MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index e411252..1e8c6ee 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -196,6 +196,7 @@ static void __init brownstone_init(void)
 	mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
 	mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
 	mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
+	platform_device_register(&mmp2_device_gpio);
 
 	/* enable 5v regulator */
 	platform_device_register(&brownstone_v_5vp_device);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index a64c172..c1f0aa8 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -110,6 +110,7 @@ static void __init flint_init(void)
 	/* on-chip devices */
 	mmp2_add_uart(1);
 	mmp2_add_uart(2);
+	platform_device_register(&mmp2_device_gpio);
 
 	/* off-chip devices */
 	platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 32776f3..5315fcc 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -184,6 +184,7 @@ static void __init gplugd_init(void)
 	pxa168_add_uart(3);
 	pxa168_add_ssp(0);
 	pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
+	platform_device_register(&pxa168_device_gpio);
 
 	pxa168_add_eth(&gplugd_eth_platform_data);
 }
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index 78199bd..f8448b5 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -7,23 +7,6 @@
 
 #define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
 
-#define BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)	(*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
-
-#define gpio_to_bank(gpio)	((gpio) >> 5)
-
-/* NOTE: these macros are defined here to make optimization of
- * gpio_{get,set}_value() to work when 'gpio' is a constant.
- * Usage of these macros otherwise is no longer recommended,
- * use generic GPIO API whenever possible.
- */
-#define GPIO_bit(gpio)	(1 << ((gpio) & 0x1f))
-
-#define GPLR(x)		GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
-#define GPDR(x)		GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
-#define GPSR(x)		GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
-#define GPCR(x)		GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
-
 #include <plat/gpio-pxa.h>
 
 #endif /* __ASM_MACH_GPIO_PXA_H */
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index de7b888..c4c9046 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -29,6 +29,8 @@ extern struct pxa_device_desc mmp2_device_sdh1;
 extern struct pxa_device_desc mmp2_device_sdh2;
 extern struct pxa_device_desc mmp2_device_sdh3;
 
+extern struct platform_device mmp2_device_gpio;
+
 static inline int mmp2_add_uart(int id)
 {
 	struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 7f00584..dfd6b37 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -35,6 +35,8 @@ extern struct pxa_device_desc pxa168_device_fb;
 extern struct pxa_device_desc pxa168_device_keypad;
 extern struct pxa_device_desc pxa168_device_eth;
 
+extern struct platform_device pxa168_device_gpio;
+
 static inline int pxa168_add_uart(int id)
 {
 	struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 91be755..4de13ab 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;
 extern struct pxa_device_desc pxa910_device_pwm4;
 extern struct pxa_device_desc pxa910_device_nand;
 
+extern struct platform_device pxa910_device_gpio;
+
 static inline int pxa910_add_uart(int id)
 {
 	struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 8bfac66..63b414b 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -165,6 +165,7 @@ static void __init jasper_init(void)
 	mmp2_add_uart(3);
 	mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
 	mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
+	platform_device_register(&mmp2_device_gpio);
 
 	regulator_has_full_constraints();
 }
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 65d8689e..01e5c73 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 
 #include <asm/hardware/cache-tauros2.h>
 
@@ -33,7 +34,7 @@
 
 #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 
-#define APMASK(i)	(GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
+#define APMASK(i)	(GPIO_REGS_VIRT + PXA_BANK_OFF(i) + 0x9c)
 
 static struct mfp_addr_map mmp2_addr_map[] __initdata = {
 
@@ -104,8 +105,6 @@ static void __init mmp2_init_gpio(void)
 	/* unmask GPIO edge detection for all 6 banks -- APMASKx */
 	for (i = 0; i < 6; i++)
 		__raw_writel(0xffffffff, APMASK(i));
-
-	pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
 }
 
 void __init mmp2_init_irq(void)
@@ -226,3 +225,28 @@ MMP2_DEVICE(sdh1, "sdhci-pxav3", 1, MMC2, 0xd4280800, 0x120);
 MMP2_DEVICE(sdh2, "sdhci-pxav3", 2, MMC3, 0xd4281000, 0x120);
 MMP2_DEVICE(sdh3, "sdhci-pxav3", 3, MMC4, 0xd4281800, 0x120);
 
+struct resource mmp2_resources_gpio[] = {
+	{
+		.start  = 0xd4019000,
+		.end    = 0xd4019fff,
+		.name   = "gpio_phys_base",
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.start  = APB_VIRT_BASE + 0x19000,
+		.end    = APB_VIRT_BASE + 0x19fff,
+		.name   = "gpio_virtual_base",
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.start  = IRQ_MMP2_GPIO,
+		.end    = IRQ_MMP2_GPIO,
+		.name   = "gpio_mux",
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device mmp2_device_gpio = {
+	.name           = "pxa-gpio",
+	.id             = -1,
+	.num_resources  = ARRAY_SIZE(mmp2_resources_gpio),
+	.resource       = mmp2_resources_gpio,
+};
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 50c1763..f0da013 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -13,6 +13,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/clk.h>
+#include <linux/platform_device.h>
 
 #include <asm/mach/time.h>
 #include <mach/addr-map.h>
@@ -40,7 +41,7 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
 	MFP_ADDR_END,
 };
 
-#define APMASK(i)	(GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
+#define APMASK(i)	(GPIO_REGS_VIRT + PXA_BANK_OFF(i) + 0x09c)
 
 static void __init pxa168_init_gpio(void)
 {
@@ -52,8 +53,6 @@ static void __init pxa168_init_gpio(void)
 	/* unmask GPIO edge detection for all 4 banks - APMASKx */
 	for (i = 0; i < 4; i++)
 		__raw_writel(0xffffffff, APMASK(i));
-
-	pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
 }
 
 void __init pxa168_init_irq(void)
@@ -168,3 +167,29 @@ PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
 PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
 PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
 PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
+
+struct resource pxa168_resources_gpio[] = {
+	{
+		.start  = 0xd4019000,
+		.end    = 0xd4019fff,
+		.name   = "gpio_phys_base",
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.start  = APB_VIRT_BASE + 0x19000,
+		.end    = APB_VIRT_BASE + 0x19fff,
+		.name   = "gpio_virtual_base",
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.start  = IRQ_PXA168_GPIOX,
+		.end    = IRQ_PXA168_GPIOX,
+		.name   = "gpio_mux",
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device pxa168_device_gpio = {
+	.name           = "pxa-gpio",
+	.id             = -1,
+	.num_resources  = ARRAY_SIZE(pxa168_resources_gpio),
+	.resource       = pxa168_resources_gpio,
+};
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 4ebbfbb..4654e62 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 
 #include <asm/mach/time.h>
 #include <mach/addr-map.h>
@@ -77,7 +78,7 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
 	MFP_ADDR_END,
 };
 
-#define APMASK(i)	(GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
+#define APMASK(i)	(GPIO_REGS_VIRT + PXA_BANK_OFF(i) + 0x09c)
 
 static void __init pxa910_init_gpio(void)
 {
@@ -89,8 +90,6 @@ static void __init pxa910_init_gpio(void)
 	/* unmask GPIO edge detection for all 4 banks - APMASKx */
 	for (i = 0; i < 4; i++)
 		__raw_writel(0xffffffff, APMASK(i));
-
-	pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL);
 }
 
 void __init pxa910_init_irq(void)
@@ -179,3 +178,29 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
 PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
 PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
 PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
+
+struct resource pxa910_resources_gpio[] = {
+	{
+		.start  = 0xd4019000,
+		.end    = 0xd4019fff,
+		.name   = "gpio_phys_base",
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.start  = APB_VIRT_BASE + 0x19000,
+		.end    = APB_VIRT_BASE + 0x19fff,
+		.name   = "gpio_virtual_base",
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.start  = IRQ_PXA910_AP_GPIO,
+		.end    = IRQ_PXA910_AP_GPIO,
+		.name   = "gpio_mux",
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device pxa910_device_gpio = {
+	.name           = "pxa-gpio",
+	.id             = -1,
+	.num_resources  = ARRAY_SIZE(pxa910_resources_gpio),
+	.resource       = pxa910_resources_gpio,
+};
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 331f5f3..bb2ddb7 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -94,6 +94,7 @@ static void __init tavorevb_init(void)
 
 	/* on-chip devices */
 	pxa910_add_uart(1);
+	platform_device_register(&pxa910_device_gpio);
 
 	/* off-chip devices */
 	platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 825a01c..703de85 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -78,6 +78,7 @@ static void __init teton_bga_init(void)
 	pxa168_add_uart(1);
 	pxa168_add_keypad(&teton_bga_keypad_info);
 	pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
+	platform_device_register(&pxa168_device_gpio);
 }
 
 MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index fac0d5d..a80ed26 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -123,6 +123,7 @@ static struct platform_device ttc_dkb_device_onenand = {
 };
 
 static struct platform_device *ttc_dkb_devices[] = {
+	&pxa910_device_gpio,
 	&ttc_dkb_device_onenand,
 };
 
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 2903477..96183c6 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -90,9 +90,9 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
 {
 	int is_resume = 0;
 
-	dev_dbg(sharpsl_pm.dev, "GPLR0 = %x,%x\n", GPLR0, PEDR);
+	dev_dbg(sharpsl_pm.dev, "PXA_GPLR0 = %x,%x\n", PXA_GPLR(0), PEDR);
 
-	if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) {
+	if ((PEDR & PXA_GPIO_bit(CORGI_GPIO_AC_IN))) {
 		if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
 			/* charge on */
 			dev_dbg(sharpsl_pm.dev, "ac insert\n");
@@ -106,14 +106,14 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
 		}
 	}
 
-	if ((PEDR & GPIO_bit(CORGI_GPIO_CHRG_FULL)))
+	if ((PEDR & PXA_GPIO_bit(CORGI_GPIO_CHRG_FULL)))
 		dev_dbg(sharpsl_pm.dev, "Charge full interrupt\n");
 
-	if (PEDR & GPIO_bit(CORGI_GPIO_KEY_INT))
-		is_resume |= GPIO_bit(CORGI_GPIO_KEY_INT);
+	if (PEDR & PXA_GPIO_bit(CORGI_GPIO_KEY_INT))
+		is_resume |= PXA_GPIO_bit(CORGI_GPIO_KEY_INT);
 
-	if (PEDR & GPIO_bit(CORGI_GPIO_WAKEUP))
-		is_resume |= GPIO_bit(CORGI_GPIO_WAKEUP);
+	if (PEDR & PXA_GPIO_bit(CORGI_GPIO_WAKEUP))
+		is_resume |= PXA_GPIO_bit(CORGI_GPIO_WAKEUP);
 
 	if (resume_on_alarm && (PEDR & PWER_RTC))
 		is_resume |= PWER_RTC;
@@ -124,14 +124,15 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
 
 static unsigned long corgi_charger_wakeup(void)
 {
-	return ~GPLR0 & ( GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) );
+	return ~PXA_GPLR(CORGI_GPIO_AC_IN) & ( PXA_GPIO_bit(CORGI_GPIO_AC_IN)
+		| PXA_GPIO_bit(CORGI_GPIO_KEY_INT) | PXA_GPIO_bit(CORGI_GPIO_WAKEUP) );
 }
 
 unsigned long corgipm_read_devdata(int type)
 {
 	switch(type) {
 	case SHARPSL_STATUS_ACIN:
-		return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0);
+		return ((PXA_GPLR(CORGI_GPIO_AC_IN) & PXA_GPIO_bit(CORGI_GPIO_AC_IN)) != 0);
 	case SHARPSL_STATUS_LOCK:
 		return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
 	case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 2e04254..2b552fa 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -1051,6 +1051,43 @@ struct platform_device pxa3xx_device_ssp4 = {
 };
 #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
 
+struct resource pxa_resources_gpio[] = {
+	{
+		.start  = 0x40e00000,
+		.end    = 0x40e0ffff,
+		.name   = "gpio_phys_base",
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.start  = io_p2v(0x40e00000),
+		.end    = io_p2v(0x40e0ffff),
+		.name   = "gpio_virtual_base",
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.start  = IRQ_GPIO0,
+		.end    = IRQ_GPIO0,
+		.name   = "gpio0",
+		.flags  = IORESOURCE_IRQ,
+	}, {
+		.start  = IRQ_GPIO1,
+		.end    = IRQ_GPIO1,
+		.name   = "gpio1",
+		.flags  = IORESOURCE_IRQ,
+	}, {
+		.start  = IRQ_GPIO_2_x,
+			.end    = IRQ_GPIO_2_x,
+			.name   = "gpio_mux",
+			.flags  = IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device pxa_device_gpio = {
+	.name           = "pxa-gpio",
+	.id             = -1,
+	.num_resources  = ARRAY_SIZE(pxa_resources_gpio),
+	.resource       = pxa_resources_gpio,
+};
+
+
 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 2fd5a8b..54d121d 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -1,3 +1,4 @@
+extern struct platform_device pxa_device_gpio;
 extern struct platform_device pxa_device_pmu;
 extern struct platform_device pxa_device_mci;
 extern struct platform_device pxa3xx_device_mci2;
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index f3c3493..14477f5 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -54,8 +54,8 @@
 #define CORGI_GPIO_HIGH_SENSE_RSHIFT	(26)
 #define CORGI_GPIO_LOW_SENSE_BIT	(0x00000003)
 #define CORGI_GPIO_LOW_SENSE_LSHIFT	(6)
-#define CORGI_GPIO_STROBE_BIT(a)	GPIO_bit(66+(a))
-#define CORGI_GPIO_SENSE_BIT(a)		GPIO_bit(58+(a))
+#define CORGI_GPIO_STROBE_BIT(a)	PXA_GPIO_bit(66+(a))
+#define CORGI_GPIO_SENSE_BIT(a)		PXA_GPIO_bit(58+(a))
 #define CORGI_GAFR_ALL_STROBE_BIT	(0x0ffffff0)
 #define CORGI_GAFR_HIGH_SENSE_BIT	(0xfff00000)
 #define CORGI_GAFR_LOW_SENSE_BIT	(0x0000000f)
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
index 134b3bc..29dfcde 100644
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
@@ -22,81 +22,12 @@
 #include <mach/irqs.h>
 #include <mach/hardware.h>
 
-#define GPIO_REGS_VIRT	io_p2v(0x40E00000)
-
-#define BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)	(*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
-
-/* GPIO Pin Level Registers */
-#define GPLR0		GPIO_REG(BANK_OFF(0) + 0x00)
-#define GPLR1		GPIO_REG(BANK_OFF(1) + 0x00)
-#define GPLR2		GPIO_REG(BANK_OFF(2) + 0x00)
-#define GPLR3		GPIO_REG(BANK_OFF(3) + 0x00)
-
-/* GPIO Pin Direction Registers */
-#define GPDR0		GPIO_REG(BANK_OFF(0) + 0x0c)
-#define GPDR1		GPIO_REG(BANK_OFF(1) + 0x0c)
-#define GPDR2		GPIO_REG(BANK_OFF(2) + 0x0c)
-#define GPDR3		GPIO_REG(BANK_OFF(3) + 0x0c)
-
-/* GPIO Pin Output Set Registers */
-#define GPSR0		GPIO_REG(BANK_OFF(0) + 0x18)
-#define GPSR1		GPIO_REG(BANK_OFF(1) + 0x18)
-#define GPSR2		GPIO_REG(BANK_OFF(2) + 0x18)
-#define GPSR3		GPIO_REG(BANK_OFF(3) + 0x18)
-
-/* GPIO Pin Output Clear Registers */
-#define GPCR0		GPIO_REG(BANK_OFF(0) + 0x24)
-#define GPCR1		GPIO_REG(BANK_OFF(1) + 0x24)
-#define GPCR2		GPIO_REG(BANK_OFF(2) + 0x24)
-#define GPCR3		GPIO_REG(BANK_OFF(3) + 0x24)
-
-/* GPIO Rising Edge Detect Registers */
-#define GRER0		GPIO_REG(BANK_OFF(0) + 0x30)
-#define GRER1		GPIO_REG(BANK_OFF(1) + 0x30)
-#define GRER2		GPIO_REG(BANK_OFF(2) + 0x30)
-#define GRER3		GPIO_REG(BANK_OFF(3) + 0x30)
-
-/* GPIO Falling Edge Detect Registers */
-#define GFER0		GPIO_REG(BANK_OFF(0) + 0x3c)
-#define GFER1		GPIO_REG(BANK_OFF(1) + 0x3c)
-#define GFER2		GPIO_REG(BANK_OFF(2) + 0x3c)
-#define GFER3		GPIO_REG(BANK_OFF(3) + 0x3c)
-
-/* GPIO Edge Detect Status Registers */
-#define GEDR0		GPIO_REG(BANK_OFF(0) + 0x48)
-#define GEDR1		GPIO_REG(BANK_OFF(1) + 0x48)
-#define GEDR2		GPIO_REG(BANK_OFF(2) + 0x48)
-#define GEDR3		GPIO_REG(BANK_OFF(3) + 0x48)
-
-/* GPIO Alternate Function Select Registers */
-#define GAFR0_L		GPIO_REG(0x0054)
-#define GAFR0_U		GPIO_REG(0x0058)
-#define GAFR1_L		GPIO_REG(0x005C)
-#define GAFR1_U		GPIO_REG(0x0060)
-#define GAFR2_L		GPIO_REG(0x0064)
-#define GAFR2_U		GPIO_REG(0x0068)
-#define GAFR3_L		GPIO_REG(0x006C)
-#define GAFR3_U		GPIO_REG(0x0070)
-
-/* More handy macros.  The argument is a literal GPIO number. */
-
-#define GPIO_bit(x)	(1 << ((x) & 0x1f))
-
-#define GPLR(x)		GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
-#define GPDR(x)		GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
-#define GPSR(x)		GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
-#define GPCR(x)		GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
-#define GRER(x)		GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
-#define GFER(x)		GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
-#define GEDR(x)		GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
-#define GAFR(x)		GPIO_REG(0x54 + (((x) & 0x70) >> 2))
-
+#include <plat/gpio-pxa.h>
 
-#define gpio_to_bank(gpio)	((gpio) >> 5)
+#define GPIO_REGS_VIRT	io_p2v(0x40E00000)
 
 #ifdef CONFIG_CPU_PXA26x
-/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
+/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
  * as well as their Alternate Function value being '1' for GPIO in GAFRx.
  */
 static inline int __gpio_is_inverted(unsigned gpio)
@@ -116,16 +47,15 @@ static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
 static inline int __gpio_is_occupied(unsigned gpio)
 {
 	if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
-		int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
-		int dir = GPDR(gpio) & GPIO_bit(gpio);
+		int af = (PXA_GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
+		int dir = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
 
 		if (__gpio_is_inverted(gpio))
 			return af != 1 || dir == 0;
 		else
 			return af != 0 || dir != 0;
 	} else
-		return GPDR(gpio) & GPIO_bit(gpio);
+		return PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
 }
 
-#include <plat/gpio-pxa.h>
 #endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index a7f912f..d784e4c 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -131,7 +131,7 @@
 #define PCC_VS2		(1 << 1)
 #define PCC_VS1		(1 << 0)
 
-#define PCC_DETECT(x)	(GPLR(7 + (x)) & GPIO_bit(7 + (x)))
+#define PCC_DETECT(x)	(PXA_GPLR(7 + (x)) & PXA_GPIO_bit(7 + (x)))
 
 /* A listing of interrupts used by external hardware devices */
 
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 2bb0e86..990b152 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -130,8 +130,8 @@
 #define TOSA_GPIO_LOW_STROBE_BIT	(0x0000001f)
 #define TOSA_GPIO_ALL_SENSE_BIT		(0x00000fe0)
 #define TOSA_GPIO_ALL_SENSE_RSHIFT	(5)
-#define TOSA_GPIO_STROBE_BIT(a)		GPIO_bit(58+(a))
-#define TOSA_GPIO_SENSE_BIT(a)		GPIO_bit(69+(a))
+#define TOSA_GPIO_STROBE_BIT(a)		PXA_GPIO_bit(58+(a))
+#define TOSA_GPIO_SENSE_BIT(a)		PXA_GPIO_bit(69+(a))
 #define TOSA_GAFR_HIGH_STROBE_BIT	(0xfff00000)
 #define TOSA_GAFR_LOW_STROBE_BIT	(0x000003ff)
 #define TOSA_GAFR_ALL_SENSE_BIT		(0x00fffc00)
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 43a5f68..af302b4 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -47,8 +47,8 @@ static unsigned long gpdr_lpm[4];
 
 static int __mfp_config_gpio(unsigned gpio, unsigned long c)
 {
-	unsigned long gafr, mask = GPIO_bit(gpio);
-	int bank = gpio_to_bank(gpio);
+	unsigned long gafr, mask = PXA_GPIO_bit(gpio);
+	int bank = pxa_gpio_to_bank(gpio);
 	int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
 	int shft = (gpio & 0xf) << 1;
 	int fn = MFP_AF(c);
@@ -67,9 +67,9 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
 		GAFR_U(bank) = gafr;
 
 	if (is_out ^ gpio_desc[gpio].dir_inverted)
-		GPDR(gpio) |= mask;
+		PXA_GPDR(gpio) |= mask;
 	else
-		GPDR(gpio) &= ~mask;
+		PXA_GPDR(gpio) &= ~mask;
 
 	/* alternate function and direction@low power mode */
 	switch (c & MFP_LPM_STATE_MASK) {
@@ -227,7 +227,7 @@ static void __init pxa25x_mfp_init(void)
 
 	for (i = 0; i <= 15; i++) {
 		gpio_desc[i].can_wakeup = 1;
-		gpio_desc[i].mask = GPIO_bit(i);
+		gpio_desc[i].mask = PXA_GPIO_bit(i);
 	}
 
 	/* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
@@ -312,11 +312,11 @@ static void __init pxa27x_mfp_init(void)
 	/* Overwrite GPIO13 as a PWER wakeup source */
 	for (i = 0; i <= 15; i++) {
 		/* skip GPIO2, 5, 6, 7, 8 */
-		if (GPIO_bit(i) & 0x1e4)
+		if (PXA_GPIO_bit(i) & 0x1e4)
 			continue;
 
 		gpio_desc[i].can_wakeup = 1;
-		gpio_desc[i].mask = GPIO_bit(i);
+		gpio_desc[i].mask = PXA_GPIO_bit(i);
 	}
 
 	gpio_desc[35].can_wakeup = 1;
@@ -345,22 +345,22 @@ static int pxa2xx_mfp_suspend(void)
 	/* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
 	for (i = 0; i < pxa_last_gpio; i++) {
 		if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
-		    (GPDR(i) & GPIO_bit(i))) {
-			if (GPLR(i) & GPIO_bit(i))
-				PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
+		    (PXA_GPDR(i) & PXA_GPIO_bit(i))) {
+			if (PXA_GPLR(i) & PXA_GPIO_bit(i))
+				PGSR(pxa_gpio_to_bank(i)) |= PXA_GPIO_bit(i);
 			else
-				PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
+				PGSR(pxa_gpio_to_bank(i)) &= ~PXA_GPIO_bit(i);
 		}
 	}
 
-	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
+	for (i = 0; i <= pxa_gpio_to_bank(pxa_last_gpio); i++) {
 
 		saved_gafr[0][i] = GAFR_L(i);
 		saved_gafr[1][i] = GAFR_U(i);
-		saved_gpdr[i] = GPDR(i * 32);
+		saved_gpdr[i] = PXA_GPDR(i * 32);
 		saved_pgsr[i] = PGSR(i);
 
-		GPDR(i * 32) = gpdr_lpm[i];
+		PXA_GPDR(i * 32) = gpdr_lpm[i];
 	}
 	return 0;
 }
@@ -369,10 +369,10 @@ static void pxa2xx_mfp_resume(void)
 {
 	int i;
 
-	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
+	for (i = 0; i <= pxa_gpio_to_bank(pxa_last_gpio); i++) {
 		GAFR_L(i) = saved_gafr[0][i];
 		GAFR_U(i) = saved_gafr[1][i];
-		GPDR(i * 32) = saved_gpdr[i];
+		PXA_GPDR(i * 32) = saved_gpdr[i];
 		PGSR(i) = saved_pgsr[i];
 	}
 	PSSR = PSSR_RDH | PSSR_PH;
@@ -404,8 +404,8 @@ static int __init pxa2xx_mfp_init(void)
 	PSSR = PSSR_RDH;
 
 	/* initialize gafr_run[], pgsr_lpm[] from existing values */
-	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
-		gpdr_lpm[i] = GPDR(i * 32);
+	for (i = 0; i <= pxa_gpio_to_bank(pxa_last_gpio); i++)
+		gpdr_lpm[i] = PXA_GPDR(i * 32);
 
 	return 0;
 }
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index d4fca6a..10a4fb3 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -312,14 +312,12 @@ set_pwer:
 void __init pxa25x_init_irq(void)
 {
 	pxa_init_irq(32, pxa25x_set_wake);
-	pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake);
 }
 
 #ifdef CONFIG_CPU_PXA26x
 void __init pxa26x_init_irq(void)
 {
 	pxa_init_irq(32, pxa25x_set_wake);
-	pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake);
 }
 #endif
 
@@ -340,6 +338,7 @@ void __init pxa25x_map_io(void)
 }
 
 static struct platform_device *pxa25x_devices[] __initdata = {
+	&pxa_device_gpio,
 	&pxa25x_device_udc,
 	&pxa_device_pmu,
 	&pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 08eb452..a200bae 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -386,7 +386,6 @@ static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
 void __init pxa27x_init_irq(void)
 {
 	pxa_init_irq(34, pxa27x_set_wake);
-	pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
 }
 
 static struct map_desc pxa27x_io_desc[] __initdata = {
@@ -422,6 +421,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 }
 
 static struct platform_device *devices[] __initdata = {
+	&pxa_device_gpio,
 	&pxa27x_device_udc,
 	&pxa_device_pmu,
 	&pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f940a13..e5c3688 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -388,7 +388,6 @@ void __init pxa3xx_init_irq(void)
 
 	pxa_init_irq(56, pxa3xx_set_wake);
 	pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
-	pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
 }
 
 static struct map_desc pxa3xx_io_desc[] __initdata = {
@@ -417,6 +416,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 }
 
 static struct platform_device *devices[] __initdata = {
+	&pxa_device_gpio,
 	&pxa27x_device_udc,
 	&pxa_device_pmu,
 	&pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 51371b3..5af6a44 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -235,7 +235,6 @@ static struct clk_lookup pxa95x_clkregs[] = {
 void __init pxa95x_init_irq(void)
 {
 	pxa_init_irq(96, NULL);
-	pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
 }
 
 /*
@@ -248,6 +247,7 @@ void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 }
 
 static struct platform_device *devices[] __initdata = {
+	&pxa_device_gpio,
 	&sa1100_device_rtc,
 	&pxa_device_rtc,
 	&pxa27x_device_ssp1,
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 094279a..a8d9aee 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -108,16 +108,20 @@ static void spitz_presuspend(void)
 	PGSR1 &= ~SPITZ_GPIO_G1_STROBE_BIT;
 	PGSR2 &= ~SPITZ_GPIO_G2_STROBE_BIT;
 	PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
-	PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
+	PGSR2 |= PXA_GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
 
 	pxa2xx_mfp_config(&gpio18_config[0], 1);
 	gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
 	gpio_free(18);
 
-	PRER = GPIO_bit(SPITZ_GPIO_KEY_INT);
-	PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
-	PWER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET) | PWER_RTC;
-	PKWR = GPIO_bit(SPITZ_GPIO_SYNC) | GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
+	PRER = PXA_GPIO_bit(SPITZ_GPIO_KEY_INT);
+	PFER = PXA_GPIO_bit(SPITZ_GPIO_KEY_INT)
+		| PXA_GPIO_bit(SPITZ_GPIO_RESET);
+	PWER = PXA_GPIO_bit(SPITZ_GPIO_KEY_INT)
+		| PXA_GPIO_bit(SPITZ_GPIO_RESET) | PWER_RTC;
+	PKWR = PXA_GPIO_bit(SPITZ_GPIO_SYNC)
+		| PXA_GPIO_bit(SPITZ_GPIO_KEY_INT)
+		| PXA_GPIO_bit(SPITZ_GPIO_RESET);
 	PKSR = 0xffffffff; /* clear */
 
 	/* nRESET_OUT Disable */
@@ -154,11 +158,11 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
 		return 0;
 	}
 
-	if (PEDR & GPIO_bit(SPITZ_GPIO_KEY_INT))
-		is_resume |= GPIO_bit(SPITZ_GPIO_KEY_INT);
+	if (PEDR & PXA_GPIO_bit(SPITZ_GPIO_KEY_INT))
+		is_resume |= PXA_GPIO_bit(SPITZ_GPIO_KEY_INT);
 
-	if (PKSR & GPIO_bit(SPITZ_GPIO_SYNC))
-		is_resume |= GPIO_bit(SPITZ_GPIO_SYNC);
+	if (PKSR & PXA_GPIO_bit(SPITZ_GPIO_SYNC))
+		is_resume |= PXA_GPIO_bit(SPITZ_GPIO_SYNC);
 
 	if (resume_on_alarm && (PEDR & PWER_RTC))
 		is_resume |= PWER_RTC;
@@ -169,14 +173,17 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
 
 static unsigned long spitz_charger_wakeup(void)
 {
-	return (~GPLR0 & GPIO_bit(SPITZ_GPIO_KEY_INT)) | (GPLR0 & GPIO_bit(SPITZ_GPIO_SYNC));
+	return (~PXA_GPLR(SPITZ_GPIO_KEY_INT)
+		& PXA_GPIO_bit(SPITZ_GPIO_KEY_INT))
+		| (PXA_GPLR(SPITZ_GPIO_SYNC) & PXA_GPIO_bit(SPITZ_GPIO_SYNC));
 }
 
 unsigned long spitzpm_read_devdata(int type)
 {
 	switch (type) {
 	case SHARPSL_STATUS_ACIN:
-		return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0);
+		return (((~PXA_GPLR(SPITZ_GPIO_AC_IN))
+			& PXA_GPIO_bit(SPITZ_GPIO_AC_IN)) != 0);
 	case SHARPSL_STATUS_LOCK:
 		return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
 	case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
index 15bf9be..b74b921 100644
--- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
+++ b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
@@ -3,6 +3,17 @@
 
 struct irq_data;
 
+struct pxa_gpio_regs {
+	u32	gplr;
+	u32	gpdr;
+	u32	gpsr;
+	u32	gpcr;
+	u32	grer;
+	u32	gfer;
+	u32	gedr;
+	u32	gafr;
+};
+
 /*
  * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
  * one set of registers. The register offsets are organized below:
@@ -21,15 +32,39 @@ struct irq_data;
  *   BANK 4 and 5 are only available on PXA935
  */
 
-#define GPIO_BANK(n)	(GPIO_REGS_VIRT + BANK_OFF(n))
+#define PXA_BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
+
+#define PXA_GPIO_BANK(n)	(pxa_gpio_regs.gplr + PXA_BANK_OFF(n))
+#define PXA_GPIO_bit(x)		(1 << ((x) & 0x1f))
+#define pxa_gpio_to_bank(gpio)	((gpio) >> 5)
+
+
+/* GPIO Pin Level Registers */
+#define PXA_GPLR(x)	(*(volatile u32 *)(pxa_gpio_regs.gplr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Pin Direction Registers */
+#define PXA_GPDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpdr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Pin Output Set Registers */
+#define PXA_GPSR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpsr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Pin Output Clear Registers */
+#define PXA_GPCR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpcr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Rising Edge Detect Registers */
+#define PXA_GRER(x)	(*(volatile u32 *)(pxa_gpio_regs.grer	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Falling Edge Detect Registers */
+#define PXA_GFER(x)	(*(volatile u32 *)(pxa_gpio_regs.gfer	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Edge Detect Status Registers */
+#define PXA_GEDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gedr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Alternate Function Select Registers */
+#define PXA_GAFR(x)	(*(volatile u32 *)(pxa_gpio_regs.gafr	\
+			+ (((x) & 0x70) >> 2)))
 
-#define GPLR_OFFSET	0x00
-#define GPDR_OFFSET	0x0C
-#define GPSR_OFFSET	0x18
-#define GPCR_OFFSET	0x24
-#define GRER_OFFSET	0x30
-#define GFER_OFFSET	0x3C
-#define GEDR_OFFSET	0x48
+extern struct pxa_gpio_regs pxa_gpio_regs;
 
 /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
  * Those cases currently cause holes in the GPIO number space, the
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 4caa3d3..015e95c 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -149,6 +149,12 @@ config GPIO_PL061
 	help
 	  Say yes here to support the PrimeCell PL061 GPIO device
 
+config GPIO_PXA
+	def_bool y
+	depends on ARCH_PXA || ARCH_MMP
+	help
+	  Say yes here to support the PXA GPIO device
+
 config GPIO_XILINX
 	bool "Xilinx GPIO support"
 	depends on PPC_OF || MICROBLAZE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 19c5d27..56e4f1e 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -40,7 +40,7 @@ obj-$(CONFIG_GPIO_PCA953X)	+= gpio-pca953x.o
 obj-$(CONFIG_GPIO_PCF857X)	+= gpio-pcf857x.o
 obj-$(CONFIG_GPIO_PCH)		+= gpio-pch.o
 obj-$(CONFIG_GPIO_PL061)	+= gpio-pl061.o
-obj-$(CONFIG_PLAT_PXA)		+= gpio-pxa.o
+obj-$(CONFIG_GPIO_PXA)		+= gpio-pxa.o
 obj-$(CONFIG_GPIO_RDC321X)	+= gpio-rdc321x.o
 
 obj-$(CONFIG_GPIO_PLAT_SAMSUNG)	+= gpio-plat-samsung.o
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index a26e37a..6731779 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -15,12 +15,20 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 #include <linux/syscore_ops.h>
 #include <linux/slab.h>
 
 #include <mach/gpio-pxa.h>
 
-int pxa_last_gpio;
+#define GPLR_OFFSET	0x00
+#define GPDR_OFFSET	0x0C
+#define GPSR_OFFSET	0x18
+#define GPCR_OFFSET	0x24
+#define GRER_OFFSET	0x30
+#define GFER_OFFSET	0x3C
+#define GEDR_OFFSET	0x48
+#define GAFR_OFFSET	0x54
 
 struct pxa_gpio_chip {
 	struct gpio_chip chip;
@@ -49,6 +57,9 @@ enum {
 	MMP2_GPIO,
 };
 
+struct pxa_gpio_regs pxa_gpio_regs;
+int pxa_last_gpio;
+
 static DEFINE_SPINLOCK(gpio_lock);
 static struct pxa_gpio_chip *pxa_gpio_chips;
 static int gpio_type;
@@ -63,7 +74,7 @@ static inline void __iomem *gpio_chip_base(struct gpio_chip *c)
 
 static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
 {
-	return &pxa_gpio_chips[gpio_to_bank(gpio)];
+	return &pxa_gpio_chips[pxa_gpio_to_bank(gpio)];
 }
 
 static inline int gpio_is_pxa_type(int type)
@@ -163,7 +174,7 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 
 static int __init pxa_init_gpio_chip(int gpio_end)
 {
-	int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1;
+	int i, gpio, nbanks = pxa_gpio_to_bank(gpio_end) + 1;
 	struct pxa_gpio_chip *chips;
 
 	chips = kzalloc(nbanks * sizeof(struct pxa_gpio_chip), GFP_KERNEL);
@@ -176,7 +187,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
 		struct gpio_chip *c = &chips[i].chip;
 
 		sprintf(chips[i].label, "gpio-%d", i);
-		chips[i].regbase = (void __iomem *)GPIO_BANK(i);
+		chips[i].regbase = (void __iomem *)PXA_GPIO_BANK(i);
 
 		c->base  = gpio;
 		c->label = chips[i].label;
@@ -214,7 +225,7 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
 {
 	struct pxa_gpio_chip *c;
 	int gpio = pxa_irq_to_gpio(d->irq);
-	unsigned long gpdr, mask = GPIO_bit(gpio);
+	unsigned long gpdr, mask = PXA_GPIO_bit(gpio);
 
 	c = gpio_to_pxachip(gpio);
 
@@ -222,7 +233,7 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
 		/* Don't mess with enabled GPIOs using preconfigured edges or
 		 * GPIOs set to alternate function or to output during probe
 		 */
-		if ((c->irq_edge_rise | c->irq_edge_fall) & GPIO_bit(gpio))
+		if ((c->irq_edge_rise | c->irq_edge_fall) & PXA_GPIO_bit(gpio))
 			return 0;
 
 		if (__gpio_is_occupied(gpio))
@@ -287,7 +298,7 @@ static void pxa_ack_muxed_gpio(struct irq_data *d)
 	int gpio = pxa_irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
-	__raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
+	__raw_writel(PXA_GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
 }
 
 static void pxa_mask_muxed_gpio(struct irq_data *d)
@@ -296,10 +307,10 @@ static void pxa_mask_muxed_gpio(struct irq_data *d)
 	struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 	uint32_t grer, gfer;
 
-	c->irq_mask &= ~GPIO_bit(gpio);
+	c->irq_mask &= ~PXA_GPIO_bit(gpio);
 
-	grer = __raw_readl(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio);
-	gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio);
+	grer = __raw_readl(c->regbase + GRER_OFFSET) & ~PXA_GPIO_bit(gpio);
+	gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~PXA_GPIO_bit(gpio);
 	__raw_writel(grer, c->regbase + GRER_OFFSET);
 	__raw_writel(gfer, c->regbase + GFER_OFFSET);
 }
@@ -309,7 +320,7 @@ static void pxa_unmask_muxed_gpio(struct irq_data *d)
 	int gpio = pxa_irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
-	c->irq_mask |= GPIO_bit(gpio);
+	c->irq_mask |= PXA_GPIO_bit(gpio);
 	update_edge_detect(c);
 }
 
@@ -321,7 +332,7 @@ static struct irq_chip pxa_muxed_gpio_chip = {
 	.irq_set_type	= pxa_gpio_irq_type,
 };
 
-static int pxa_gpio_nums(void)
+static int __devinit pxa_gpio_nums(void)
 {
 	int count = 0;
 
@@ -358,17 +369,42 @@ static int pxa_gpio_nums(void)
 	return count;
 }
 
-void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
+static int __devinit pxa_gpio_probe(struct platform_device *pdev)
 {
 	struct pxa_gpio_chip *c;
+	struct resource *res;
 	int gpio, irq;
+	int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
 
 	pxa_last_gpio = pxa_gpio_nums();
 	if (!pxa_last_gpio)
 		return -EINVAL;
 
+	irq0 = platform_get_irq_byname(pdev, "gpio0");
+	irq1 = platform_get_irq_byname(pdev, "gpio1");
+	irq_mux = platform_get_irq_byname(pdev, "gpio_mux");
+	if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0)
+		|| (irq_mux <= 0))
+		return -EINVAL;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+					   "gpio_virtual_base");
+	if (!res)
+		return -EINVAL;
+	pxa_gpio_regs.gplr = res->start + GPLR_OFFSET;
+	pxa_gpio_regs.gpdr = res->start + GPDR_OFFSET;
+	pxa_gpio_regs.gpsr = res->start + GPSR_OFFSET;
+	pxa_gpio_regs.gpcr = res->start + GPCR_OFFSET;
+	pxa_gpio_regs.grer = res->start + GRER_OFFSET;
+	pxa_gpio_regs.gfer = res->start + GFER_OFFSET;
+	pxa_gpio_regs.gedr = res->start + GEDR_OFFSET;
+	pxa_gpio_regs.gafr = res->start + GAFR_OFFSET;
+
+	if (irq0 > 0)
+		gpio_offset = 2;
+
 	/* Initialize GPIO chips */
-	pxa_init_gpio_chip(end);
+	pxa_init_gpio_chip(pxa_last_gpio);
 
 	/* clear all GPIO edge detects */
 	for_each_gpio_chip(gpio, c) {
@@ -391,17 +427,31 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
 	irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);
 #endif
 
-	for (irq  = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) {
+	for (irq  = gpio_to_irq(gpio_offset);
+		irq <= gpio_to_irq(pxa_last_gpio); irq++) {
 		irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
 					 handle_edge_irq);
 		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 	}
 
-	/* Install handler for GPIO>=2 edge detect interrupts */
-	irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler);
-	pxa_muxed_gpio_chip.irq_set_wake = fn;
+	irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler);
+	return 0;
 }
 
+static struct platform_driver pxa_gpio_driver = {
+	.probe          = pxa_gpio_probe,
+	.driver         = {
+		.owner  = THIS_MODULE,
+		.name   = "pxa-gpio",
+	},
+};
+
+static int __init pxa_gpio_init(void)
+{
+	return platform_driver_register(&pxa_gpio_driver);
+}
+postcore_initcall(pxa_gpio_init);
+
 #ifdef CONFIG_PM
 static int pxa_gpio_suspend(void)
 {
@@ -444,3 +494,10 @@ struct syscore_ops pxa_gpio_syscore_ops = {
 	.suspend	= pxa_gpio_suspend,
 	.resume		= pxa_gpio_resume,
 };
+
+static int __init pxa_gpio_sysinit(void)
+{
+	register_syscore_ops(&pxa_gpio_syscore_ops);
+	return 0;
+}
+postcore_initcall(pxa_gpio_sysinit);
-- 
1.7.2.5

^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH v4 5/8] ARM: pxa: change gpio driver to platform driver
  2011-10-13  4:07 ` [PATCH v4 5/8] ARM: pxa: change gpio driver to platform driver Haojian Zhuang
@ 2011-10-13 19:22   ` Grant Likely
  2011-10-14 19:42     ` Russell King - ARM Linux
  0 siblings, 1 reply; 25+ messages in thread
From: Grant Likely @ 2011-10-13 19:22 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 13, 2011 at 12:07:02PM +0800, Haojian Zhuang wrote:
> Change gpio driver to platform driver and remove the potential
> conflicted name.
> 
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>


>  void __init mmp2_init_irq(void)
> @@ -226,3 +225,28 @@ MMP2_DEVICE(sdh1, "sdhci-pxav3", 1, MMC2, 0xd4280800, 0x120);
>  MMP2_DEVICE(sdh2, "sdhci-pxav3", 2, MMC3, 0xd4281000, 0x120);
>  MMP2_DEVICE(sdh3, "sdhci-pxav3", 3, MMC4, 0xd4281800, 0x120);
>  
> +struct resource mmp2_resources_gpio[] = {
> +	{
> +		.start  = 0xd4019000,
> +		.end    = 0xd4019fff,
> +		.name   = "gpio_phys_base",
> +		.flags  = IORESOURCE_MEM,
> +	}, {
> +		.start  = APB_VIRT_BASE + 0x19000,
> +		.end    = APB_VIRT_BASE + 0x19fff,
> +		.name   = "gpio_virtual_base",
> +		.flags  = IORESOURCE_MEM,

This shouldn't be needed.  The driver should ioremap its registers.
Only the physical address should be passed in via a IORESOURCE_MEM
resource.

g.

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 5/8] ARM: pxa: change gpio driver to platform driver
  2011-10-13 19:22   ` Grant Likely
@ 2011-10-14 19:42     ` Russell King - ARM Linux
  0 siblings, 0 replies; 25+ messages in thread
From: Russell King - ARM Linux @ 2011-10-14 19:42 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 13, 2011 at 01:22:22PM -0600, Grant Likely wrote:
> On Thu, Oct 13, 2011 at 12:07:02PM +0800, Haojian Zhuang wrote:
> > +struct resource mmp2_resources_gpio[] = {
> > +	{
> > +		.start  = 0xd4019000,
> > +		.end    = 0xd4019fff,
> > +		.name   = "gpio_phys_base",
> > +		.flags  = IORESOURCE_MEM,
> > +	}, {
> > +		.start  = APB_VIRT_BASE + 0x19000,
> > +		.end    = APB_VIRT_BASE + 0x19fff,
> > +		.name   = "gpio_virtual_base",
> > +		.flags  = IORESOURCE_MEM,
> 
> This shouldn't be needed.  The driver should ioremap its registers.
> Only the physical address should be passed in via a IORESOURCE_MEM
> resource.

Definitely - the thing to point out to people who do this kind of thing
is that resources are part of an ordered tree occupying a single space,
and nasty things happen when resources overlap other resources within
that space (sometimes they can refuse to be requested - which causes
device registration to fail.)

Therefore, abusing MEM resources to pass non-physical addresses is a
potential cause for trouble.

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 6/8] ARM: pxa: move gpio-pxa.h into include directory
  2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
                   ` (4 preceding siblings ...)
  2011-10-13  4:07 ` [PATCH v4 5/8] ARM: pxa: change gpio driver to platform driver Haojian Zhuang
@ 2011-10-13  4:07 ` Haojian Zhuang
  2011-10-13 19:24   ` Grant Likely
  2011-10-13  4:07 ` [PATCH v4 7/8] ARM: pxa: add clk support in gpio driver Haojian Zhuang
  2011-10-13  4:07 ` [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c Haojian Zhuang
  7 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:07 UTC (permalink / raw)
  To: linux-arm-kernel

Merge the gpio-pxa.h in arch-pxa and arch-mmp. Move the new gpio-pxa.h
into include directory.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
---
 arch/arm/mach-mmp/include/mach/gpio-pxa.h  |   12 ----
 arch/arm/mach-mmp/include/mach/gpio.h      |    3 +-
 arch/arm/mach-mmp/mmp2.c                   |    3 +-
 arch/arm/mach-mmp/pxa168.c                 |    3 +-
 arch/arm/mach-mmp/pxa910.c                 |    3 +-
 arch/arm/mach-pxa/include/mach/gpio-pxa.h  |   61 ---------------------
 arch/arm/mach-pxa/include/mach/gpio.h      |    2 -
 arch/arm/mach-pxa/include/mach/littleton.h |    2 -
 arch/arm/mach-pxa/irq.c                    |    3 +-
 arch/arm/mach-pxa/mfp-pxa2xx.c             |    2 +-
 arch/arm/mach-pxa/pxa25x.c                 |    2 +-
 arch/arm/mach-pxa/pxa27x.c                 |    2 +-
 arch/arm/mach-pxa/pxa3xx.c                 |    4 +-
 arch/arm/mach-pxa/pxa95x.c                 |    2 +-
 arch/arm/plat-pxa/include/plat/gpio-pxa.h  |   80 ---------------------------
 drivers/gpio/gpio-pxa.c                    |   42 ++++++++++++++-
 include/linux/gpio-pxa.h                   |   81 ++++++++++++++++++++++++++++
 17 files changed, 135 insertions(+), 172 deletions(-)
 delete mode 100644 arch/arm/mach-mmp/include/mach/gpio-pxa.h
 delete mode 100644 arch/arm/mach-pxa/include/mach/gpio-pxa.h
 delete mode 100644 arch/arm/plat-pxa/include/plat/gpio-pxa.h
 create mode 100644 include/linux/gpio-pxa.h

diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
deleted file mode 100644
index f8448b5..0000000
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef __ASM_MACH_GPIO_PXA_H
-#define __ASM_MACH_GPIO_PXA_H
-
-#include <mach/addr-map.h>
-#include <mach/cputype.h>
-#include <mach/irqs.h>
-
-#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
-
-#include <plat/gpio-pxa.h>
-
-#endif /* __ASM_MACH_GPIO_PXA_H */
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 904466d..13219eb 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -3,7 +3,6 @@
 
 #include <asm-generic/gpio.h>
 
-#define __gpio_is_inverted(gpio)	(0)
-#define __gpio_is_occupied(gpio)	(0)
+#include <mach/cputype.h>
 
 #endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 01e5c73..1291364 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/gpio-pxa.h>
 #include <linux/platform_device.h>
 
 #include <asm/hardware/cache-tauros2.h>
@@ -25,13 +26,13 @@
 #include <mach/irqs.h>
 #include <mach/dma.h>
 #include <mach/mfp.h>
-#include <mach/gpio-pxa.h>
 #include <mach/devices.h>
 #include <mach/mmp2.h>
 
 #include "common.h"
 #include "clock.h"
 
+#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
 #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 
 #define APMASK(i)	(GPIO_REGS_VIRT + PXA_BANK_OFF(i) + 0x9c)
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index f0da013..61395c6 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -13,6 +13,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/clk.h>
+#include <linux/gpio-pxa.h>
 #include <linux/platform_device.h>
 
 #include <asm/mach/time.h>
@@ -21,7 +22,6 @@
 #include <mach/regs-apbc.h>
 #include <mach/regs-apmu.h>
 #include <mach/irqs.h>
-#include <mach/gpio-pxa.h>
 #include <mach/dma.h>
 #include <mach/devices.h>
 #include <mach/mfp.h>
@@ -29,6 +29,7 @@
 #include "common.h"
 #include "clock.h"
 
+#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
 #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 
 static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 4654e62..0b0e3db 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
+#include <linux/gpio-pxa.h>
 #include <linux/platform_device.h>
 
 #include <asm/mach/time.h>
@@ -20,7 +21,6 @@
 #include <mach/regs-apmu.h>
 #include <mach/cputype.h>
 #include <mach/irqs.h>
-#include <mach/gpio-pxa.h>
 #include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/devices.h>
@@ -28,6 +28,7 @@
 #include "common.h"
 #include "clock.h"
 
+#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
 #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 
 static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
deleted file mode 100644
index 29dfcde..0000000
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Written by Philipp Zabel <philipp.zabel@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-#ifndef __MACH_PXA_GPIO_PXA_H
-#define __MACH_PXA_GPIO_PXA_H
-
-#include <mach/irqs.h>
-#include <mach/hardware.h>
-
-#include <plat/gpio-pxa.h>
-
-#define GPIO_REGS_VIRT	io_p2v(0x40E00000)
-
-#ifdef CONFIG_CPU_PXA26x
-/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
- * as well as their Alternate Function value being '1' for GPIO in GAFRx.
- */
-static inline int __gpio_is_inverted(unsigned gpio)
-{
-	return cpu_is_pxa25x() && gpio > 85;
-}
-#else
-static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
-#endif
-
-/*
- * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
- * function of a GPIO, and GPDRx cannot be altered once configured. It
- * is attributed as "occupied" here (I know this terminology isn't
- * accurate, you are welcome to propose a better one :-)
- */
-static inline int __gpio_is_occupied(unsigned gpio)
-{
-	if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
-		int af = (PXA_GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
-		int dir = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
-
-		if (__gpio_is_inverted(gpio))
-			return af != 1 || dir == 0;
-		else
-			return af != 0 || dir != 0;
-	} else
-		return PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
-}
-
-#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 561cdbf..ef8b51f 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -25,7 +25,5 @@
 #define __ASM_ARCH_PXA_GPIO_H
 
 #include <asm-generic/gpio.h>
-/* The defines for the driver are needed for the accelerated accessors */
-#include "gpio-pxa.h"
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index e20ac1b..8066be5 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_ARCH_LITTLETON_H
 #define __ASM_ARCH_LITTLETON_H
 
-#include <mach/gpio-pxa.h>
-
 #define LITTLETON_ETH_PHYS	0x30000000
 
 #define LITTLETON_GPIO_LCD_CS	(17)
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 2d87e64..26ad6cd 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -20,7 +20,6 @@
 
 #include <mach/hardware.h>
 #include <mach/irqs.h>
-#include <mach/gpio-pxa.h>
 
 #include "generic.h"
 
@@ -120,7 +119,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
 	} while (1);
 }
 
-void __init pxa_init_irq(int irq_nr, set_wake_t fn)
+void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int))
 {
 	int irq, i, n;
 
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index af302b4..290af99 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -13,6 +13,7 @@
  *  published by the Free Software Foundation.
  */
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -20,7 +21,6 @@
 
 #include <mach/pxa2xx-regs.h>
 #include <mach/mfp-pxa2xx.h>
-#include <mach/gpio-pxa.h>
 
 #include "generic.h"
 
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 10a4fb3..b3641cc 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -17,6 +17,7 @@
  * need be.
  */
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -24,7 +25,6 @@
 #include <linux/suspend.h>
 #include <linux/syscore_ops.h>
 #include <linux/irq.h>
-#include <linux/gpio.h>
 
 #include <asm/mach/map.h>
 #include <asm/suspend.h>
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index a200bae..06fb464 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -12,6 +12,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -21,7 +22,6 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/i2c/pxa-i2c.h>
-#include <linux/gpio.h>
 
 #include <asm/mach/map.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index e5c3688..4446d56 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -25,7 +25,6 @@
 #include <asm/mach/map.h>
 #include <asm/suspend.h>
 #include <mach/hardware.h>
-#include <mach/gpio-pxa.h>
 #include <mach/pxa3xx-regs.h>
 #include <mach/reset.h>
 #include <mach/ohci.h>
@@ -365,7 +364,8 @@ static struct irq_chip pxa_ext_wakeup_chip = {
 	.irq_set_type	= pxa_set_ext_wakeup_type,
 };
 
-static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
+static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *,
+					   unsigned int))
 {
 	int irq;
 
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 5af6a44..dcff331 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -9,6 +9,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include <linux/gpio-pxa.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -20,7 +21,6 @@
 #include <linux/syscore_ops.h>
 
 #include <mach/hardware.h>
-#include <mach/gpio-pxa.h>
 #include <mach/pxa3xx-regs.h>
 #include <mach/pxa930.h>
 #include <mach/reset.h>
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
deleted file mode 100644
index b74b921..0000000
--- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
+++ /dev/null
@@ -1,80 +0,0 @@
-#ifndef __PLAT_PXA_GPIO_H
-#define __PLAT_PXA_GPIO_H
-
-struct irq_data;
-
-struct pxa_gpio_regs {
-	u32	gplr;
-	u32	gpdr;
-	u32	gpsr;
-	u32	gpcr;
-	u32	grer;
-	u32	gfer;
-	u32	gedr;
-	u32	gafr;
-};
-
-/*
- * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
- * one set of registers. The register offsets are organized below:
- *
- *           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
- * BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
- * BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
- * BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050
- *
- * BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
- * BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
- * BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150
- *
- * NOTE:
- *   BANK 3 is only available on PXA27x and later processors.
- *   BANK 4 and 5 are only available on PXA935
- */
-
-#define PXA_BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-
-#define PXA_GPIO_BANK(n)	(pxa_gpio_regs.gplr + PXA_BANK_OFF(n))
-#define PXA_GPIO_bit(x)		(1 << ((x) & 0x1f))
-#define pxa_gpio_to_bank(gpio)	((gpio) >> 5)
-
-
-/* GPIO Pin Level Registers */
-#define PXA_GPLR(x)	(*(volatile u32 *)(pxa_gpio_regs.gplr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Pin Direction Registers */
-#define PXA_GPDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpdr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Pin Output Set Registers */
-#define PXA_GPSR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpsr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Pin Output Clear Registers */
-#define PXA_GPCR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpcr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Rising Edge Detect Registers */
-#define PXA_GRER(x)	(*(volatile u32 *)(pxa_gpio_regs.grer	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Falling Edge Detect Registers */
-#define PXA_GFER(x)	(*(volatile u32 *)(pxa_gpio_regs.gfer	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Edge Detect Status Registers */
-#define PXA_GEDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gedr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Alternate Function Select Registers */
-#define PXA_GAFR(x)	(*(volatile u32 *)(pxa_gpio_regs.gafr	\
-			+ (((x) & 0x70) >> 2)))
-
-extern struct pxa_gpio_regs pxa_gpio_regs;
-
-/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
- * Those cases currently cause holes in the GPIO number space, the
- * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
- */
-extern int pxa_last_gpio;
-
-typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
-
-extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
-extern int pxa_irq_to_gpio(int irq);
-
-#endif /* __PLAT_PXA_GPIO_H */
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 6731779..92b92e8 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -12,6 +12,7 @@
  *  published by the Free Software Foundation.
  */
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/io.h>
@@ -19,8 +20,6 @@
 #include <linux/syscore_ops.h>
 #include <linux/slab.h>
 
-#include <mach/gpio-pxa.h>
-
 #define GPLR_OFFSET	0x00
 #define GPDR_OFFSET	0x0C
 #define GPSR_OFFSET	0x18
@@ -91,6 +90,45 @@ static inline int gpio_is_mmp_type(int type)
 	return 0;
 }
 
+/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
+ * as well as their Alternate Function value being '1' for GPIO in GAFRx.
+ */
+static inline int __gpio_is_inverted(int gpio)
+{
+	if ((gpio_type == PXA26X_GPIO) && (gpio > 85))
+		return 1;
+	return 0;
+}
+
+/*
+ * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
+ * function of a GPIO, and GPDRx cannot be altered once configured. It
+ * is attributed as "occupied" here (I know this terminology isn't
+ * accurate, you are welcome to propose a better one :-)
+ */
+static inline int __gpio_is_occupied(unsigned gpio)
+{
+	int ret, af = 0, dir = 0;
+
+	switch (gpio_type) {
+	case PXA25X_GPIO:
+	case PXA26X_GPIO:
+	case PXA27X_GPIO:
+		af = (PXA_GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
+		dir = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
+
+		if (__gpio_is_inverted(gpio))
+			ret = (af != 1) || (dir == 0);
+		else
+			ret = (af != 0) || (dir != 0);
+		break;
+	default:
+		ret = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
+		break;
+	}
+	return ret;
+}
+
 static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 {
 	int gpio;
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
new file mode 100644
index 0000000..6cebf6c
--- /dev/null
+++ b/include/linux/gpio-pxa.h
@@ -0,0 +1,81 @@
+#ifndef __GPIO_PXA_H
+#define __GPIO_PXA_H
+
+#include <linux/kernel.h>
+
+struct irq_data;
+
+struct pxa_gpio_regs {
+	u32	gplr;
+	u32	gpdr;
+	u32	gpsr;
+	u32	gpcr;
+	u32	grer;
+	u32	gfer;
+	u32	gedr;
+	u32	gafr;
+};
+
+/*
+ * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
+ * one set of registers. The register offsets are organized below:
+ *
+ *           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
+ * BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
+ * BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
+ * BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050
+ *
+ * BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
+ * BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
+ * BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150
+ *
+ * NOTE:
+ *   BANK 3 is only available on PXA27x and later processors.
+ *   BANK 4 and 5 are only available on PXA935
+ */
+
+#define PXA_BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
+
+#define PXA_GPIO_BANK(n)	(pxa_gpio_regs.gplr + PXA_BANK_OFF(n))
+#define PXA_GPIO_bit(x)		(1 << ((x) & 0x1f))
+#define pxa_gpio_to_bank(gpio)	((gpio) >> 5)
+
+
+/* GPIO Pin Level Registers */
+#define PXA_GPLR(x)	(*(volatile u32 *)(pxa_gpio_regs.gplr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Pin Direction Registers */
+#define PXA_GPDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpdr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Pin Output Set Registers */
+#define PXA_GPSR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpsr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Pin Output Clear Registers */
+#define PXA_GPCR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpcr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Rising Edge Detect Registers */
+#define PXA_GRER(x)	(*(volatile u32 *)(pxa_gpio_regs.grer	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Falling Edge Detect Registers */
+#define PXA_GFER(x)	(*(volatile u32 *)(pxa_gpio_regs.gfer	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Edge Detect Status Registers */
+#define PXA_GEDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gedr	\
+			+ PXA_BANK_OFF((x >> 5))))
+/* GPIO Alternate Function Select Registers */
+#define PXA_GAFR(x)	(*(volatile u32 *)(pxa_gpio_regs.gafr	\
+			+ (((x) & 0x70) >> 2)))
+
+extern struct pxa_gpio_regs pxa_gpio_regs;
+
+/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
+ * Those cases currently cause holes in the GPIO number space, the
+ * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
+ */
+extern int pxa_last_gpio;
+
+typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
+
+extern int pxa_irq_to_gpio(int irq);
+
+#endif /* __GPIO_PXA_H */
-- 
1.7.2.5

^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH v4 6/8] ARM: pxa: move gpio-pxa.h into include directory
  2011-10-13  4:07 ` [PATCH v4 6/8] ARM: pxa: move gpio-pxa.h into include directory Haojian Zhuang
@ 2011-10-13 19:24   ` Grant Likely
  0 siblings, 0 replies; 25+ messages in thread
From: Grant Likely @ 2011-10-13 19:24 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 13, 2011 at 12:07:03PM +0800, Haojian Zhuang wrote:
> Merge the gpio-pxa.h in arch-pxa and arch-mmp. Move the new gpio-pxa.h
> into include directory.
> 
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>

Hi Haojian,

Please respin this patch and use the -M or --find-renames flag to git
format-patch.  Otherwise it is hard to review the change.  This change
also moves a hunk of code into the gpio-pxa.c file, yet the commit
text doesn't mention it.

g.

> ---
>  arch/arm/mach-mmp/include/mach/gpio-pxa.h  |   12 ----
>  arch/arm/mach-mmp/include/mach/gpio.h      |    3 +-
>  arch/arm/mach-mmp/mmp2.c                   |    3 +-
>  arch/arm/mach-mmp/pxa168.c                 |    3 +-
>  arch/arm/mach-mmp/pxa910.c                 |    3 +-
>  arch/arm/mach-pxa/include/mach/gpio-pxa.h  |   61 ---------------------
>  arch/arm/mach-pxa/include/mach/gpio.h      |    2 -
>  arch/arm/mach-pxa/include/mach/littleton.h |    2 -
>  arch/arm/mach-pxa/irq.c                    |    3 +-
>  arch/arm/mach-pxa/mfp-pxa2xx.c             |    2 +-
>  arch/arm/mach-pxa/pxa25x.c                 |    2 +-
>  arch/arm/mach-pxa/pxa27x.c                 |    2 +-
>  arch/arm/mach-pxa/pxa3xx.c                 |    4 +-
>  arch/arm/mach-pxa/pxa95x.c                 |    2 +-
>  arch/arm/plat-pxa/include/plat/gpio-pxa.h  |   80 ---------------------------
>  drivers/gpio/gpio-pxa.c                    |   42 ++++++++++++++-
>  include/linux/gpio-pxa.h                   |   81 ++++++++++++++++++++++++++++
>  17 files changed, 135 insertions(+), 172 deletions(-)
>  delete mode 100644 arch/arm/mach-mmp/include/mach/gpio-pxa.h
>  delete mode 100644 arch/arm/mach-pxa/include/mach/gpio-pxa.h
>  delete mode 100644 arch/arm/plat-pxa/include/plat/gpio-pxa.h
>  create mode 100644 include/linux/gpio-pxa.h
> 
> diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
> deleted file mode 100644
> index f8448b5..0000000
> --- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
> +++ /dev/null
> @@ -1,12 +0,0 @@
> -#ifndef __ASM_MACH_GPIO_PXA_H
> -#define __ASM_MACH_GPIO_PXA_H
> -
> -#include <mach/addr-map.h>
> -#include <mach/cputype.h>
> -#include <mach/irqs.h>
> -
> -#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
> -
> -#include <plat/gpio-pxa.h>
> -
> -#endif /* __ASM_MACH_GPIO_PXA_H */
> diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
> index 904466d..13219eb 100644
> --- a/arch/arm/mach-mmp/include/mach/gpio.h
> +++ b/arch/arm/mach-mmp/include/mach/gpio.h
> @@ -3,7 +3,6 @@
>  
>  #include <asm-generic/gpio.h>
>  
> -#define __gpio_is_inverted(gpio)	(0)
> -#define __gpio_is_occupied(gpio)	(0)
> +#include <mach/cputype.h>
>  
>  #endif /* __ASM_MACH_GPIO_H */
> diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
> index 01e5c73..1291364 100644
> --- a/arch/arm/mach-mmp/mmp2.c
> +++ b/arch/arm/mach-mmp/mmp2.c
> @@ -13,6 +13,7 @@
>  #include <linux/kernel.h>
>  #include <linux/init.h>
>  #include <linux/io.h>
> +#include <linux/gpio-pxa.h>
>  #include <linux/platform_device.h>
>  
>  #include <asm/hardware/cache-tauros2.h>
> @@ -25,13 +26,13 @@
>  #include <mach/irqs.h>
>  #include <mach/dma.h>
>  #include <mach/mfp.h>
> -#include <mach/gpio-pxa.h>
>  #include <mach/devices.h>
>  #include <mach/mmp2.h>
>  
>  #include "common.h"
>  #include "clock.h"
>  
> +#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
>  #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
>  
>  #define APMASK(i)	(GPIO_REGS_VIRT + PXA_BANK_OFF(i) + 0x9c)
> diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
> index f0da013..61395c6 100644
> --- a/arch/arm/mach-mmp/pxa168.c
> +++ b/arch/arm/mach-mmp/pxa168.c
> @@ -13,6 +13,7 @@
>  #include <linux/list.h>
>  #include <linux/io.h>
>  #include <linux/clk.h>
> +#include <linux/gpio-pxa.h>
>  #include <linux/platform_device.h>
>  
>  #include <asm/mach/time.h>
> @@ -21,7 +22,6 @@
>  #include <mach/regs-apbc.h>
>  #include <mach/regs-apmu.h>
>  #include <mach/irqs.h>
> -#include <mach/gpio-pxa.h>
>  #include <mach/dma.h>
>  #include <mach/devices.h>
>  #include <mach/mfp.h>
> @@ -29,6 +29,7 @@
>  #include "common.h"
>  #include "clock.h"
>  
> +#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
>  #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
>  
>  static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
> diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
> index 4654e62..0b0e3db 100644
> --- a/arch/arm/mach-mmp/pxa910.c
> +++ b/arch/arm/mach-mmp/pxa910.c
> @@ -12,6 +12,7 @@
>  #include <linux/init.h>
>  #include <linux/list.h>
>  #include <linux/io.h>
> +#include <linux/gpio-pxa.h>
>  #include <linux/platform_device.h>
>  
>  #include <asm/mach/time.h>
> @@ -20,7 +21,6 @@
>  #include <mach/regs-apmu.h>
>  #include <mach/cputype.h>
>  #include <mach/irqs.h>
> -#include <mach/gpio-pxa.h>
>  #include <mach/dma.h>
>  #include <mach/mfp.h>
>  #include <mach/devices.h>
> @@ -28,6 +28,7 @@
>  #include "common.h"
>  #include "clock.h"
>  
> +#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
>  #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
>  
>  static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
> diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
> deleted file mode 100644
> index 29dfcde..0000000
> --- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
> +++ /dev/null
> @@ -1,61 +0,0 @@
> -/*
> - * Written by Philipp Zabel <philipp.zabel@gmail.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - *
> - * You should have received a copy of the GNU General Public License
> - * along with this program; if not, write to the Free Software
> - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
> - *
> - */
> -#ifndef __MACH_PXA_GPIO_PXA_H
> -#define __MACH_PXA_GPIO_PXA_H
> -
> -#include <mach/irqs.h>
> -#include <mach/hardware.h>
> -
> -#include <plat/gpio-pxa.h>
> -
> -#define GPIO_REGS_VIRT	io_p2v(0x40E00000)
> -
> -#ifdef CONFIG_CPU_PXA26x
> -/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
> - * as well as their Alternate Function value being '1' for GPIO in GAFRx.
> - */
> -static inline int __gpio_is_inverted(unsigned gpio)
> -{
> -	return cpu_is_pxa25x() && gpio > 85;
> -}
> -#else
> -static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
> -#endif
> -
> -/*
> - * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
> - * function of a GPIO, and GPDRx cannot be altered once configured. It
> - * is attributed as "occupied" here (I know this terminology isn't
> - * accurate, you are welcome to propose a better one :-)
> - */
> -static inline int __gpio_is_occupied(unsigned gpio)
> -{
> -	if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
> -		int af = (PXA_GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
> -		int dir = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
> -
> -		if (__gpio_is_inverted(gpio))
> -			return af != 1 || dir == 0;
> -		else
> -			return af != 0 || dir != 0;
> -	} else
> -		return PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
> -}
> -
> -#endif /* __MACH_PXA_GPIO_PXA_H */
> diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
> index 561cdbf..ef8b51f 100644
> --- a/arch/arm/mach-pxa/include/mach/gpio.h
> +++ b/arch/arm/mach-pxa/include/mach/gpio.h
> @@ -25,7 +25,5 @@
>  #define __ASM_ARCH_PXA_GPIO_H
>  
>  #include <asm-generic/gpio.h>
> -/* The defines for the driver are needed for the accelerated accessors */
> -#include "gpio-pxa.h"
>  
>  #endif
> diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
> index e20ac1b..8066be5 100644
> --- a/arch/arm/mach-pxa/include/mach/littleton.h
> +++ b/arch/arm/mach-pxa/include/mach/littleton.h
> @@ -1,8 +1,6 @@
>  #ifndef __ASM_ARCH_LITTLETON_H
>  #define __ASM_ARCH_LITTLETON_H
>  
> -#include <mach/gpio-pxa.h>
> -
>  #define LITTLETON_ETH_PHYS	0x30000000
>  
>  #define LITTLETON_GPIO_LCD_CS	(17)
> diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
> index 2d87e64..26ad6cd 100644
> --- a/arch/arm/mach-pxa/irq.c
> +++ b/arch/arm/mach-pxa/irq.c
> @@ -20,7 +20,6 @@
>  
>  #include <mach/hardware.h>
>  #include <mach/irqs.h>
> -#include <mach/gpio-pxa.h>
>  
>  #include "generic.h"
>  
> @@ -120,7 +119,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
>  	} while (1);
>  }
>  
> -void __init pxa_init_irq(int irq_nr, set_wake_t fn)
> +void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int))
>  {
>  	int irq, i, n;
>  
> diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
> index af302b4..290af99 100644
> --- a/arch/arm/mach-pxa/mfp-pxa2xx.c
> +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
> @@ -13,6 +13,7 @@
>   *  published by the Free Software Foundation.
>   */
>  #include <linux/gpio.h>
> +#include <linux/gpio-pxa.h>
>  #include <linux/module.h>
>  #include <linux/kernel.h>
>  #include <linux/init.h>
> @@ -20,7 +21,6 @@
>  
>  #include <mach/pxa2xx-regs.h>
>  #include <mach/mfp-pxa2xx.h>
> -#include <mach/gpio-pxa.h>
>  
>  #include "generic.h"
>  
> diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
> index 10a4fb3..b3641cc 100644
> --- a/arch/arm/mach-pxa/pxa25x.c
> +++ b/arch/arm/mach-pxa/pxa25x.c
> @@ -17,6 +17,7 @@
>   * need be.
>   */
>  #include <linux/gpio.h>
> +#include <linux/gpio-pxa.h>
>  #include <linux/module.h>
>  #include <linux/kernel.h>
>  #include <linux/init.h>
> @@ -24,7 +25,6 @@
>  #include <linux/suspend.h>
>  #include <linux/syscore_ops.h>
>  #include <linux/irq.h>
> -#include <linux/gpio.h>
>  
>  #include <asm/mach/map.h>
>  #include <asm/suspend.h>
> diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
> index a200bae..06fb464 100644
> --- a/arch/arm/mach-pxa/pxa27x.c
> +++ b/arch/arm/mach-pxa/pxa27x.c
> @@ -12,6 +12,7 @@
>   * published by the Free Software Foundation.
>   */
>  #include <linux/gpio.h>
> +#include <linux/gpio-pxa.h>
>  #include <linux/module.h>
>  #include <linux/kernel.h>
>  #include <linux/init.h>
> @@ -21,7 +22,6 @@
>  #include <linux/io.h>
>  #include <linux/irq.h>
>  #include <linux/i2c/pxa-i2c.h>
> -#include <linux/gpio.h>
>  
>  #include <asm/mach/map.h>
>  #include <mach/hardware.h>
> diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
> index e5c3688..4446d56 100644
> --- a/arch/arm/mach-pxa/pxa3xx.c
> +++ b/arch/arm/mach-pxa/pxa3xx.c
> @@ -25,7 +25,6 @@
>  #include <asm/mach/map.h>
>  #include <asm/suspend.h>
>  #include <mach/hardware.h>
> -#include <mach/gpio-pxa.h>
>  #include <mach/pxa3xx-regs.h>
>  #include <mach/reset.h>
>  #include <mach/ohci.h>
> @@ -365,7 +364,8 @@ static struct irq_chip pxa_ext_wakeup_chip = {
>  	.irq_set_type	= pxa_set_ext_wakeup_type,
>  };
>  
> -static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
> +static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *,
> +					   unsigned int))
>  {
>  	int irq;
>  
> diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
> index 5af6a44..dcff331 100644
> --- a/arch/arm/mach-pxa/pxa95x.c
> +++ b/arch/arm/mach-pxa/pxa95x.c
> @@ -9,6 +9,7 @@
>   * it under the terms of the GNU General Public License version 2 as
>   * published by the Free Software Foundation.
>   */
> +#include <linux/gpio-pxa.h>
>  #include <linux/module.h>
>  #include <linux/kernel.h>
>  #include <linux/init.h>
> @@ -20,7 +21,6 @@
>  #include <linux/syscore_ops.h>
>  
>  #include <mach/hardware.h>
> -#include <mach/gpio-pxa.h>
>  #include <mach/pxa3xx-regs.h>
>  #include <mach/pxa930.h>
>  #include <mach/reset.h>
> diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
> deleted file mode 100644
> index b74b921..0000000
> --- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
> +++ /dev/null
> @@ -1,80 +0,0 @@
> -#ifndef __PLAT_PXA_GPIO_H
> -#define __PLAT_PXA_GPIO_H
> -
> -struct irq_data;
> -
> -struct pxa_gpio_regs {
> -	u32	gplr;
> -	u32	gpdr;
> -	u32	gpsr;
> -	u32	gpcr;
> -	u32	grer;
> -	u32	gfer;
> -	u32	gedr;
> -	u32	gafr;
> -};
> -
> -/*
> - * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
> - * one set of registers. The register offsets are organized below:
> - *
> - *           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
> - * BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
> - * BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
> - * BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050
> - *
> - * BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
> - * BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
> - * BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150
> - *
> - * NOTE:
> - *   BANK 3 is only available on PXA27x and later processors.
> - *   BANK 4 and 5 are only available on PXA935
> - */
> -
> -#define PXA_BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
> -
> -#define PXA_GPIO_BANK(n)	(pxa_gpio_regs.gplr + PXA_BANK_OFF(n))
> -#define PXA_GPIO_bit(x)		(1 << ((x) & 0x1f))
> -#define pxa_gpio_to_bank(gpio)	((gpio) >> 5)
> -
> -
> -/* GPIO Pin Level Registers */
> -#define PXA_GPLR(x)	(*(volatile u32 *)(pxa_gpio_regs.gplr	\
> -			+ PXA_BANK_OFF((x >> 5))))
> -/* GPIO Pin Direction Registers */
> -#define PXA_GPDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpdr	\
> -			+ PXA_BANK_OFF((x >> 5))))
> -/* GPIO Pin Output Set Registers */
> -#define PXA_GPSR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpsr	\
> -			+ PXA_BANK_OFF((x >> 5))))
> -/* GPIO Pin Output Clear Registers */
> -#define PXA_GPCR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpcr	\
> -			+ PXA_BANK_OFF((x >> 5))))
> -/* GPIO Rising Edge Detect Registers */
> -#define PXA_GRER(x)	(*(volatile u32 *)(pxa_gpio_regs.grer	\
> -			+ PXA_BANK_OFF((x >> 5))))
> -/* GPIO Falling Edge Detect Registers */
> -#define PXA_GFER(x)	(*(volatile u32 *)(pxa_gpio_regs.gfer	\
> -			+ PXA_BANK_OFF((x >> 5))))
> -/* GPIO Edge Detect Status Registers */
> -#define PXA_GEDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gedr	\
> -			+ PXA_BANK_OFF((x >> 5))))
> -/* GPIO Alternate Function Select Registers */
> -#define PXA_GAFR(x)	(*(volatile u32 *)(pxa_gpio_regs.gafr	\
> -			+ (((x) & 0x70) >> 2)))
> -
> -extern struct pxa_gpio_regs pxa_gpio_regs;
> -
> -/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
> - * Those cases currently cause holes in the GPIO number space, the
> - * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
> - */
> -extern int pxa_last_gpio;
> -
> -typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
> -
> -extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
> -extern int pxa_irq_to_gpio(int irq);
> -
> -#endif /* __PLAT_PXA_GPIO_H */
> diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
> index 6731779..92b92e8 100644
> --- a/drivers/gpio/gpio-pxa.c
> +++ b/drivers/gpio/gpio-pxa.c
> @@ -12,6 +12,7 @@
>   *  published by the Free Software Foundation.
>   */
>  #include <linux/gpio.h>
> +#include <linux/gpio-pxa.h>
>  #include <linux/init.h>
>  #include <linux/irq.h>
>  #include <linux/io.h>
> @@ -19,8 +20,6 @@
>  #include <linux/syscore_ops.h>
>  #include <linux/slab.h>
>  
> -#include <mach/gpio-pxa.h>
> -
>  #define GPLR_OFFSET	0x00
>  #define GPDR_OFFSET	0x0C
>  #define GPSR_OFFSET	0x18
> @@ -91,6 +90,45 @@ static inline int gpio_is_mmp_type(int type)
>  	return 0;
>  }
>  
> +/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
> + * as well as their Alternate Function value being '1' for GPIO in GAFRx.
> + */
> +static inline int __gpio_is_inverted(int gpio)
> +{
> +	if ((gpio_type == PXA26X_GPIO) && (gpio > 85))
> +		return 1;
> +	return 0;
> +}
> +
> +/*
> + * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
> + * function of a GPIO, and GPDRx cannot be altered once configured. It
> + * is attributed as "occupied" here (I know this terminology isn't
> + * accurate, you are welcome to propose a better one :-)
> + */
> +static inline int __gpio_is_occupied(unsigned gpio)
> +{
> +	int ret, af = 0, dir = 0;
> +
> +	switch (gpio_type) {
> +	case PXA25X_GPIO:
> +	case PXA26X_GPIO:
> +	case PXA27X_GPIO:
> +		af = (PXA_GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
> +		dir = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
> +
> +		if (__gpio_is_inverted(gpio))
> +			ret = (af != 1) || (dir == 0);
> +		else
> +			ret = (af != 0) || (dir != 0);
> +		break;
> +	default:
> +		ret = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
> +		break;
> +	}
> +	return ret;
> +}
> +
>  static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
>  {
>  	int gpio;
> diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
> new file mode 100644
> index 0000000..6cebf6c
> --- /dev/null
> +++ b/include/linux/gpio-pxa.h
> @@ -0,0 +1,81 @@
> +#ifndef __GPIO_PXA_H
> +#define __GPIO_PXA_H
> +
> +#include <linux/kernel.h>
> +
> +struct irq_data;
> +
> +struct pxa_gpio_regs {
> +	u32	gplr;
> +	u32	gpdr;
> +	u32	gpsr;
> +	u32	gpcr;
> +	u32	grer;
> +	u32	gfer;
> +	u32	gedr;
> +	u32	gafr;
> +};
> +
> +/*
> + * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
> + * one set of registers. The register offsets are organized below:
> + *
> + *           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
> + * BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
> + * BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
> + * BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050
> + *
> + * BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
> + * BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
> + * BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150
> + *
> + * NOTE:
> + *   BANK 3 is only available on PXA27x and later processors.
> + *   BANK 4 and 5 are only available on PXA935
> + */
> +
> +#define PXA_BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
> +
> +#define PXA_GPIO_BANK(n)	(pxa_gpio_regs.gplr + PXA_BANK_OFF(n))
> +#define PXA_GPIO_bit(x)		(1 << ((x) & 0x1f))
> +#define pxa_gpio_to_bank(gpio)	((gpio) >> 5)
> +
> +
> +/* GPIO Pin Level Registers */
> +#define PXA_GPLR(x)	(*(volatile u32 *)(pxa_gpio_regs.gplr	\
> +			+ PXA_BANK_OFF((x >> 5))))
> +/* GPIO Pin Direction Registers */
> +#define PXA_GPDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpdr	\
> +			+ PXA_BANK_OFF((x >> 5))))
> +/* GPIO Pin Output Set Registers */
> +#define PXA_GPSR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpsr	\
> +			+ PXA_BANK_OFF((x >> 5))))
> +/* GPIO Pin Output Clear Registers */
> +#define PXA_GPCR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpcr	\
> +			+ PXA_BANK_OFF((x >> 5))))
> +/* GPIO Rising Edge Detect Registers */
> +#define PXA_GRER(x)	(*(volatile u32 *)(pxa_gpio_regs.grer	\
> +			+ PXA_BANK_OFF((x >> 5))))
> +/* GPIO Falling Edge Detect Registers */
> +#define PXA_GFER(x)	(*(volatile u32 *)(pxa_gpio_regs.gfer	\
> +			+ PXA_BANK_OFF((x >> 5))))
> +/* GPIO Edge Detect Status Registers */
> +#define PXA_GEDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gedr	\
> +			+ PXA_BANK_OFF((x >> 5))))
> +/* GPIO Alternate Function Select Registers */
> +#define PXA_GAFR(x)	(*(volatile u32 *)(pxa_gpio_regs.gafr	\
> +			+ (((x) & 0x70) >> 2)))
> +
> +extern struct pxa_gpio_regs pxa_gpio_regs;
> +
> +/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
> + * Those cases currently cause holes in the GPIO number space, the
> + * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
> + */
> +extern int pxa_last_gpio;
> +
> +typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
> +
> +extern int pxa_irq_to_gpio(int irq);
> +
> +#endif /* __GPIO_PXA_H */
> -- 
> 1.7.2.5
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 7/8] ARM: pxa: add clk support in gpio driver
  2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
                   ` (5 preceding siblings ...)
  2011-10-13  4:07 ` [PATCH v4 6/8] ARM: pxa: move gpio-pxa.h into include directory Haojian Zhuang
@ 2011-10-13  4:07 ` Haojian Zhuang
  2011-10-13 19:26   ` Grant Likely
  2011-10-13  4:07 ` [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c Haojian Zhuang
  7 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:07 UTC (permalink / raw)
  To: linux-arm-kernel

Support clk in gpio driver. There's no gpio clock in PXA25x and PXA27x.
So use dummy clk instead. And move the gpio edge initialization into
gpio driver for arch-mmp.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
---
 arch/arm/mach-mmp/mmp2.c   |   18 ++----------------
 arch/arm/mach-mmp/pxa168.c |   18 ++----------------
 arch/arm/mach-mmp/pxa910.c |   18 ++----------------
 arch/arm/mach-pxa/pxa25x.c |    1 +
 arch/arm/mach-pxa/pxa27x.c |    1 +
 arch/arm/mach-pxa/pxa3xx.c |    2 ++
 arch/arm/mach-pxa/pxa95x.c |    2 ++
 drivers/gpio/gpio-pxa.c    |   16 ++++++++++++++++
 include/linux/gpio-pxa.h   |    1 +
 9 files changed, 29 insertions(+), 48 deletions(-)

diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 1291364..d350fdd 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -32,11 +32,8 @@
 #include "common.h"
 #include "clock.h"
 
-#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
 #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 
-#define APMASK(i)	(GPIO_REGS_VIRT + PXA_BANK_OFF(i) + 0x9c)
-
 static struct mfp_addr_map mmp2_addr_map[] __initdata = {
 
 	MFP_ADDR_X(GPIO0, GPIO58, 0x54),
@@ -96,22 +93,9 @@ void mmp2_clear_pmic_int(void)
 	__raw_writel(data, mfpr_pmic);
 }
 
-static void __init mmp2_init_gpio(void)
-{
-	int i;
-
-	/* enable GPIO clock */
-	__raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
-
-	/* unmask GPIO edge detection for all 6 banks -- APMASKx */
-	for (i = 0; i < 6; i++)
-		__raw_writel(0xffffffff, APMASK(i));
-}
-
 void __init mmp2_init_irq(void)
 {
 	mmp2_init_icu();
-	mmp2_init_gpio();
 }
 
 static void sdhc_clk_enable(struct clk *clk)
@@ -148,6 +132,7 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
 static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
 static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
 static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
+static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000);
 
 static APMU_CLK(nand, NAND, 0xbf, 100000000);
 static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
@@ -167,6 +152,7 @@ static struct clk_lookup mmp2_clkregs[] = {
 	INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
 	INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
 	INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
+	INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
 	INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
 	INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
 	INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 61395c6..0550884 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -29,7 +29,6 @@
 #include "common.h"
 #include "clock.h"
 
-#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
 #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 
 static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
@@ -42,24 +41,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
 	MFP_ADDR_END,
 };
 
-#define APMASK(i)	(GPIO_REGS_VIRT + PXA_BANK_OFF(i) + 0x09c)
-
-static void __init pxa168_init_gpio(void)
-{
-	int i;
-
-	/* enable GPIO clock */
-	__raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
-
-	/* unmask GPIO edge detection for all 4 banks - APMASKx */
-	for (i = 0; i < 4; i++)
-		__raw_writel(0xffffffff, APMASK(i));
-}
-
 void __init pxa168_init_irq(void)
 {
 	icu_init_irq();
-	pxa168_init_gpio();
 }
 
 /* APB peripheral clocks */
@@ -77,6 +61,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
 static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
 static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
 static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
+static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
 static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
 
 static APMU_CLK(nand, NAND, 0x19b, 156000000);
@@ -101,6 +86,7 @@ static struct clk_lookup pxa168_clkregs[] = {
 	INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
 	INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
 	INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
+	INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
 	INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
 	INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
 };
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 0b0e3db..c08607c 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -28,7 +28,6 @@
 #include "common.h"
 #include "clock.h"
 
-#define GPIO_REGS_VIRT	(APB_VIRT_BASE + 0x19000)
 #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 
 static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
@@ -79,24 +78,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
 	MFP_ADDR_END,
 };
 
-#define APMASK(i)	(GPIO_REGS_VIRT + PXA_BANK_OFF(i) + 0x09c)
-
-static void __init pxa910_init_gpio(void)
-{
-	int i;
-
-	/* enable GPIO clock */
-	__raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO);
-
-	/* unmask GPIO edge detection for all 4 banks - APMASKx */
-	for (i = 0; i < 4; i++)
-		__raw_writel(0xffffffff, APMASK(i));
-}
-
 void __init pxa910_init_irq(void)
 {
 	icu_init_irq();
-	pxa910_init_gpio();
 }
 
 /* APB peripheral clocks */
@@ -108,6 +92,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
 static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
 static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
 static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
+static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
 
 static APMU_CLK(nand, NAND, 0x19b, 156000000);
 static APMU_CLK(u2o, USB, 0x1b, 480000000);
@@ -123,6 +108,7 @@ static struct clk_lookup pxa910_clkregs[] = {
 	INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
 	INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
 	INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
+	INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
 	INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
 };
 
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index b3641cc..605334c 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -208,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
 	INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
 	INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
 	INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
+	INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
 };
 
 static struct clk_lookup pxa25x_hwuart_clkreg =
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 06fb464..c62e77c 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -229,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
 	INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
 	INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
 	INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
+	INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
 };
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4446d56..d241354 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -55,6 +55,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0);
 
 static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
 static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
@@ -87,6 +88,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
 	INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
 	INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
 	INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
+	INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL),
 };
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index dcff331..0bdea94 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -212,6 +212,7 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
 
 static struct clk_lookup pxa95x_clkregs[] = {
 	INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
@@ -230,6 +231,7 @@ static struct clk_lookup pxa95x_clkregs[] = {
 	INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
 	INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
 	INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
+	INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
 };
 
 void __init pxa95x_init_irq(void)
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 92b92e8..11fd69e 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -11,6 +11,8 @@
  *  it under the terms of the GNU General Public License version 2 as
  *  published by the Free Software Foundation.
  */
+#include <linux/clk.h>
+#include <linux/err.h>
 #include <linux/gpio.h>
 #include <linux/gpio-pxa.h>
 #include <linux/init.h>
@@ -28,6 +30,7 @@
 #define GFER_OFFSET	0x3C
 #define GEDR_OFFSET	0x48
 #define GAFR_OFFSET	0x54
+#define ED_MASK_OFFSET	0x9C	/* GPIO edge detection for AP side */
 
 struct pxa_gpio_chip {
 	struct gpio_chip chip;
@@ -411,6 +414,7 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)
 {
 	struct pxa_gpio_chip *c;
 	struct resource *res;
+	struct clk *clk;
 	int gpio, irq;
 	int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
 
@@ -437,10 +441,18 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)
 	pxa_gpio_regs.gfer = res->start + GFER_OFFSET;
 	pxa_gpio_regs.gedr = res->start + GEDR_OFFSET;
 	pxa_gpio_regs.gafr = res->start + GAFR_OFFSET;
+	pxa_gpio_regs.ed_mask = res->start + ED_MASK_OFFSET;
 
 	if (irq0 > 0)
 		gpio_offset = 2;
 
+	clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(clk)) {
+		printk(KERN_ERR "Error %ld to get gpio clock\n", PTR_ERR(clk));
+		return PTR_ERR(clk);
+	}
+	clk_enable(clk);
+
 	/* Initialize GPIO chips */
 	pxa_init_gpio_chip(pxa_last_gpio);
 
@@ -449,6 +461,10 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)
 		__raw_writel(0, c->regbase + GFER_OFFSET);
 		__raw_writel(0, c->regbase + GRER_OFFSET);
 		__raw_writel(~0,c->regbase + GEDR_OFFSET);
+#ifdef CONFIG_ARCH_MMP
+		/* unmask GPIO edge detect for AP side */
+		__raw_writel(~0,c->regbase + ED_MASK_OFFSET);
+#endif
 	}
 
 #ifdef CONFIG_ARCH_PXA
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
index 6cebf6c..dd47850 100644
--- a/include/linux/gpio-pxa.h
+++ b/include/linux/gpio-pxa.h
@@ -14,6 +14,7 @@ struct pxa_gpio_regs {
 	u32	gfer;
 	u32	gedr;
 	u32	gafr;
+	u32	ed_mask;
 };
 
 /*
-- 
1.7.2.5

^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH v4 7/8] ARM: pxa: add clk support in gpio driver
  2011-10-13  4:07 ` [PATCH v4 7/8] ARM: pxa: add clk support in gpio driver Haojian Zhuang
@ 2011-10-13 19:26   ` Grant Likely
  0 siblings, 0 replies; 25+ messages in thread
From: Grant Likely @ 2011-10-13 19:26 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 13, 2011 at 12:07:04PM +0800, Haojian Zhuang wrote:
> Support clk in gpio driver. There's no gpio clock in PXA25x and PXA27x.
> So use dummy clk instead. And move the gpio edge initialization into
> gpio driver for arch-mmp.
> 
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
> @@ -449,6 +461,10 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)
>  		__raw_writel(0, c->regbase + GFER_OFFSET);
>  		__raw_writel(0, c->regbase + GRER_OFFSET);
>  		__raw_writel(~0,c->regbase + GEDR_OFFSET);
> +#ifdef CONFIG_ARCH_MMP
> +		/* unmask GPIO edge detect for AP side */
> +		__raw_writel(~0,c->regbase + ED_MASK_OFFSET);
> +#endif

What will happen on a PXA platform when both CONFIG_ARM_MMP and
CONFIG_ARM_PXA are enabled?

Otherwise the patch looks good.

g.


>  	}
>  
>  #ifdef CONFIG_ARCH_PXA
> diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
> index 6cebf6c..dd47850 100644
> --- a/include/linux/gpio-pxa.h
> +++ b/include/linux/gpio-pxa.h
> @@ -14,6 +14,7 @@ struct pxa_gpio_regs {
>  	u32	gfer;
>  	u32	gedr;
>  	u32	gafr;
> +	u32	ed_mask;
>  };
>  
>  /*
> -- 
> 1.7.2.5
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c
  2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
                   ` (6 preceding siblings ...)
  2011-10-13  4:07 ` [PATCH v4 7/8] ARM: pxa: add clk support in gpio driver Haojian Zhuang
@ 2011-10-13  4:07 ` Haojian Zhuang
  2011-10-13 15:42   ` Arnd Bergmann
  7 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-13  4:07 UTC (permalink / raw)
  To: linux-arm-kernel

Move macro like PXA_GPLR(). Use pxa_gpio_bank_read()/pxa_gpio_bank_write()
instead. And append pxa_gpio_pin_get()/ pxa_gpio_pin_set() /
pxa_gpio_pin_clear() for operation on single GPIO pin.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
---
 arch/arm/mach-pxa/corgi_pm.c         |   13 ++-
 arch/arm/mach-pxa/include/mach/idp.h |    2 +-
 arch/arm/mach-pxa/mfp-pxa2xx.c       |   16 ++--
 arch/arm/mach-pxa/spitz_pm.c         |   11 ++-
 drivers/gpio/gpio-pxa.c              |  149 ++++++++++++++++++++--------------
 include/linux/gpio-pxa.h             |   66 +++++----------
 6 files changed, 135 insertions(+), 122 deletions(-)

diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 96183c6..a0ee790 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/apm-emulation.h>
@@ -90,7 +91,8 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
 {
 	int is_resume = 0;
 
-	dev_dbg(sharpsl_pm.dev, "PXA_GPLR0 = %x,%x\n", PXA_GPLR(0), PEDR);
+	dev_dbg(sharpsl_pm.dev, "PXA_GPLR0 = %x,%x\n",
+		pxa_gpio_bank_read(PXA_GPLR, 0), PEDR);
 
 	if ((PEDR & PXA_GPIO_bit(CORGI_GPIO_AC_IN))) {
 		if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
@@ -124,15 +126,18 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
 
 static unsigned long corgi_charger_wakeup(void)
 {
-	return ~PXA_GPLR(CORGI_GPIO_AC_IN) & ( PXA_GPIO_bit(CORGI_GPIO_AC_IN)
-		| PXA_GPIO_bit(CORGI_GPIO_KEY_INT) | PXA_GPIO_bit(CORGI_GPIO_WAKEUP) );
+	unsigned long ret;
+	ret = pxa_gpio_pin_get(PXA_GPLR, CORGI_GPIO_AC_IN)
+		| pxa_gpio_pin_get(PXA_GPLR, CORGI_GPIO_KEY_INT)
+		| pxa_gpio_pin_get(PXA_GPLR, CORGI_GPIO_WAKEUP);
+	return !ret;
 }
 
 unsigned long corgipm_read_devdata(int type)
 {
 	switch(type) {
 	case SHARPSL_STATUS_ACIN:
-		return ((PXA_GPLR(CORGI_GPIO_AC_IN) & PXA_GPIO_bit(CORGI_GPIO_AC_IN)) != 0);
+		return pxa_gpio_pin_get(PXA_GPLR, CORGI_GPIO_AC_IN);
 	case SHARPSL_STATUS_LOCK:
 		return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
 	case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index d784e4c..4ccc385 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -131,7 +131,7 @@
 #define PCC_VS2		(1 << 1)
 #define PCC_VS1		(1 << 0)
 
-#define PCC_DETECT(x)	(PXA_GPLR(7 + (x)) & PXA_GPIO_bit(7 + (x)))
+#define PCC_DETECT(x)	(pxa_gpio_pin_get(PXA_GPLR, 7 + (x)))
 
 /* A listing of interrupts used by external hardware devices */
 
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 290af99..93d2830 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -67,9 +67,9 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
 		GAFR_U(bank) = gafr;
 
 	if (is_out ^ gpio_desc[gpio].dir_inverted)
-		PXA_GPDR(gpio) |= mask;
+		pxa_gpio_pin_set(PXA_GPDR, gpio);
 	else
-		PXA_GPDR(gpio) &= ~mask;
+		pxa_gpio_pin_clear(PXA_GPDR, gpio);
 
 	/* alternate function and direction@low power mode */
 	switch (c & MFP_LPM_STATE_MASK) {
@@ -345,8 +345,8 @@ static int pxa2xx_mfp_suspend(void)
 	/* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
 	for (i = 0; i < pxa_last_gpio; i++) {
 		if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
-		    (PXA_GPDR(i) & PXA_GPIO_bit(i))) {
-			if (PXA_GPLR(i) & PXA_GPIO_bit(i))
+			pxa_gpio_pin_get(PXA_GPDR, i)) {
+			if (pxa_gpio_pin_get(PXA_GPLR, i))
 				PGSR(pxa_gpio_to_bank(i)) |= PXA_GPIO_bit(i);
 			else
 				PGSR(pxa_gpio_to_bank(i)) &= ~PXA_GPIO_bit(i);
@@ -357,10 +357,10 @@ static int pxa2xx_mfp_suspend(void)
 
 		saved_gafr[0][i] = GAFR_L(i);
 		saved_gafr[1][i] = GAFR_U(i);
-		saved_gpdr[i] = PXA_GPDR(i * 32);
+		saved_gpdr[i] = pxa_gpio_bank_read(PXA_GPDR, i);
 		saved_pgsr[i] = PGSR(i);
 
-		PXA_GPDR(i * 32) = gpdr_lpm[i];
+		pxa_gpio_bank_write(PXA_GPDR, gpdr_lpm[i], i);
 	}
 	return 0;
 }
@@ -372,7 +372,7 @@ static void pxa2xx_mfp_resume(void)
 	for (i = 0; i <= pxa_gpio_to_bank(pxa_last_gpio); i++) {
 		GAFR_L(i) = saved_gafr[0][i];
 		GAFR_U(i) = saved_gafr[1][i];
-		PXA_GPDR(i * 32) = saved_gpdr[i];
+		pxa_gpio_bank_write(PXA_GPDR, saved_gpdr[i], i);
 		PGSR(i) = saved_pgsr[i];
 	}
 	PSSR = PSSR_RDH | PSSR_PH;
@@ -405,7 +405,7 @@ static int __init pxa2xx_mfp_init(void)
 
 	/* initialize gafr_run[], pgsr_lpm[] from existing values */
 	for (i = 0; i <= pxa_gpio_to_bank(pxa_last_gpio); i++)
-		gpdr_lpm[i] = PXA_GPDR(i * 32);
+		gpdr_lpm[i] = pxa_gpio_bank_read(PXA_GPDR, i);
 
 	return 0;
 }
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index a8d9aee..62bd42d 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/apm-emulation.h>
@@ -173,17 +174,17 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
 
 static unsigned long spitz_charger_wakeup(void)
 {
-	return (~PXA_GPLR(SPITZ_GPIO_KEY_INT)
-		& PXA_GPIO_bit(SPITZ_GPIO_KEY_INT))
-		| (PXA_GPLR(SPITZ_GPIO_SYNC) & PXA_GPIO_bit(SPITZ_GPIO_SYNC));
+	unsigned long key, sync;
+	key = pxa_gpio_pin_get(PXA_GPLR, SPITZ_GPIO_KEY_INT);
+	sync = pxa_gpio_pin_get(PXA_GPLR, SPITZ_GPIO_SYNC);
+	return !key | sync;
 }
 
 unsigned long spitzpm_read_devdata(int type)
 {
 	switch (type) {
 	case SHARPSL_STATUS_ACIN:
-		return (((~PXA_GPLR(SPITZ_GPIO_AC_IN))
-			& PXA_GPIO_bit(SPITZ_GPIO_AC_IN)) != 0);
+		return !pxa_gpio_pin_get(PXA_GPLR, SPITZ_GPIO_AC_IN);
 	case SHARPSL_STATUS_LOCK:
 		return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
 	case SHARPSL_STATUS_CHRGFULL:
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 11fd69e..095cf9e 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -22,15 +22,7 @@
 #include <linux/syscore_ops.h>
 #include <linux/slab.h>
 
-#define GPLR_OFFSET	0x00
-#define GPDR_OFFSET	0x0C
-#define GPSR_OFFSET	0x18
-#define GPCR_OFFSET	0x24
-#define GRER_OFFSET	0x30
-#define GFER_OFFSET	0x3C
-#define GEDR_OFFSET	0x48
-#define GAFR_OFFSET	0x54
-#define ED_MASK_OFFSET	0x9C	/* GPIO edge detection for AP side */
+#define PXA_BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
 
 struct pxa_gpio_chip {
 	struct gpio_chip chip;
@@ -59,11 +51,11 @@ enum {
 	MMP2_GPIO,
 };
 
-struct pxa_gpio_regs pxa_gpio_regs;
 int pxa_last_gpio;
 
 static DEFINE_SPINLOCK(gpio_lock);
 static struct pxa_gpio_chip *pxa_gpio_chips;
+static void __iomem *pxa_gpio_regbase;
 static int gpio_type;
 
 #define for_each_gpio_chip(i, c)			\
@@ -93,7 +85,7 @@ static inline int gpio_is_mmp_type(int type)
 	return 0;
 }
 
-/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
+/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
  * as well as their Alternate Function value being '1' for GPIO in GAFRx.
  */
 static inline int __gpio_is_inverted(int gpio)
@@ -111,14 +103,20 @@ static inline int __gpio_is_inverted(int gpio)
  */
 static inline int __gpio_is_occupied(unsigned gpio)
 {
-	int ret, af = 0, dir = 0;
+	int ret, af = 0, dir = 0, bank = 0;
+	unsigned int data = 0;
 
 	switch (gpio_type) {
 	case PXA25X_GPIO:
 	case PXA26X_GPIO:
 	case PXA27X_GPIO:
-		af = (PXA_GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
-		dir = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
+		bank = pxa_gpio_to_bank(gpio);
+		data = readl_relaxed(pxa_gpio_regbase + PXA_GAFR
+			+ PXA_BANK_OFF(bank));
+		af = (data >> ((gpio & 0xf) * 2)) & 0x3;
+		data = readl_relaxed(pxa_gpio_regbase + PXA_GPDR
+			+ PXA_BANK_OFF(bank));
+		dir = pxa_gpio_pin_get(PXA_GPDR, gpio);
 
 		if (__gpio_is_inverted(gpio))
 			ret = (af != 1) || (dir == 0);
@@ -126,7 +124,7 @@ static inline int __gpio_is_occupied(unsigned gpio)
 			ret = (af != 0) || (dir != 0);
 		break;
 	default:
-		ret = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
+		ret = pxa_gpio_pin_get(PXA_GPDR, gpio);
 		break;
 	}
 	return ret;
@@ -161,6 +159,45 @@ int pxa_irq_to_gpio(int irq)
 	return 0;
 }
 
+unsigned int pxa_gpio_pin_get(enum pxa_gpios reg, unsigned int gpio)
+{
+	unsigned int bank = pxa_gpio_to_bank(gpio);
+	unsigned int data, ret;
+
+	data = readl_relaxed(pxa_gpio_regbase + reg + PXA_BANK_OFF(bank));
+	ret = (data & PXA_GPIO_bit(gpio)) ? 1 : 0;
+	return ret;
+}
+
+void pxa_gpio_pin_set(enum pxa_gpios reg, unsigned int gpio)
+{
+	unsigned int bank = pxa_gpio_to_bank(gpio);
+	unsigned int data;
+	data = pxa_gpio_pin_get(reg, gpio);
+	data |= PXA_GPIO_bit(gpio);
+	writel_relaxed(data, pxa_gpio_regbase + reg + PXA_BANK_OFF(bank));
+}
+
+void pxa_gpio_pin_clear(enum pxa_gpios reg, unsigned int gpio)
+{
+	unsigned int bank = pxa_gpio_to_bank(gpio);
+	unsigned int data;
+	data = pxa_gpio_pin_get(reg, gpio);
+	data &= ~PXA_GPIO_bit(gpio);
+	writel_relaxed(data, pxa_gpio_regbase + reg + PXA_BANK_OFF(bank));
+}
+
+unsigned int pxa_gpio_bank_read(enum pxa_gpios reg, unsigned int bank)
+{
+	return readl_relaxed(pxa_gpio_regbase + reg + PXA_BANK_OFF(bank));
+}
+
+void pxa_gpio_bank_write(enum pxa_gpios reg, unsigned int value,
+			 unsigned int bank)
+{
+	writel_relaxed(value, pxa_gpio_regbase + reg + PXA_BANK_OFF(bank));
+}
+
 static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 {
 	void __iomem *base = gpio_chip_base(chip);
@@ -169,12 +206,12 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 
 	spin_lock_irqsave(&gpio_lock, flags);
 
-	value = __raw_readl(base + GPDR_OFFSET);
+	value = __raw_readl(base + PXA_GPDR);
 	if (__gpio_is_inverted(chip->base + offset))
 		value |= mask;
 	else
 		value &= ~mask;
-	__raw_writel(value, base + GPDR_OFFSET);
+	__raw_writel(value, base + PXA_GPDR);
 
 	spin_unlock_irqrestore(&gpio_lock, flags);
 	return 0;
@@ -187,16 +224,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
 	uint32_t tmp, mask = 1 << offset;
 	unsigned long flags;
 
-	__raw_writel(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
+	__raw_writel(mask, base + (value ? PXA_GPSR : PXA_GPCR));
 
 	spin_lock_irqsave(&gpio_lock, flags);
 
-	tmp = __raw_readl(base + GPDR_OFFSET);
+	tmp = __raw_readl(base + PXA_GPDR);
 	if (__gpio_is_inverted(chip->base + offset))
 		tmp &= ~mask;
 	else
 		tmp |= mask;
-	__raw_writel(tmp, base + GPDR_OFFSET);
+	__raw_writel(tmp, base + PXA_GPDR);
 
 	spin_unlock_irqrestore(&gpio_lock, flags);
 	return 0;
@@ -204,13 +241,13 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
 
 static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
-	return __raw_readl(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset);
+	return __raw_readl(gpio_chip_base(chip) + PXA_GPLR) & (1 << offset);
 }
 
 static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 {
 	__raw_writel(1 << offset, gpio_chip_base(chip) +
-				(value ? GPSR_OFFSET : GPCR_OFFSET));
+				(value ? PXA_GPSR : PXA_GPCR));
 }
 
 static int __init pxa_init_gpio_chip(int gpio_end)
@@ -228,7 +265,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
 		struct gpio_chip *c = &chips[i].chip;
 
 		sprintf(chips[i].label, "gpio-%d", i);
-		chips[i].regbase = (void __iomem *)PXA_GPIO_BANK(i);
+		chips[i].regbase = pxa_gpio_regbase + PXA_BANK_OFF(i);
 
 		c->base  = gpio;
 		c->label = chips[i].label;
@@ -254,12 +291,12 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
 {
 	uint32_t grer, gfer;
 
-	grer = __raw_readl(c->regbase + GRER_OFFSET) & ~c->irq_mask;
-	gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~c->irq_mask;
+	grer = __raw_readl(c->regbase + PXA_GRER) & ~c->irq_mask;
+	gfer = __raw_readl(c->regbase + PXA_GFER) & ~c->irq_mask;
 	grer |= c->irq_edge_rise & c->irq_mask;
 	gfer |= c->irq_edge_fall & c->irq_mask;
-	__raw_writel(grer, c->regbase + GRER_OFFSET);
-	__raw_writel(gfer, c->regbase + GFER_OFFSET);
+	__raw_writel(grer, c->regbase + PXA_GRER);
+	__raw_writel(gfer, c->regbase + PXA_GFER);
 }
 
 static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
@@ -283,12 +320,12 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
 		type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
 	}
 
-	gpdr = __raw_readl(c->regbase + GPDR_OFFSET);
+	gpdr = __raw_readl(c->regbase + PXA_GPDR);
 
 	if (__gpio_is_inverted(gpio))
-		__raw_writel(gpdr | mask,  c->regbase + GPDR_OFFSET);
+		__raw_writel(gpdr | mask,  c->regbase + PXA_GPDR);
 	else
-		__raw_writel(gpdr & ~mask, c->regbase + GPDR_OFFSET);
+		__raw_writel(gpdr & ~mask, c->regbase + PXA_GPDR);
 
 	if (type & IRQ_TYPE_EDGE_RISING)
 		c->irq_edge_rise |= mask;
@@ -319,9 +356,9 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
 		for_each_gpio_chip(gpio, c) {
 			gpio_base = c->chip.base;
 
-			gedr = __raw_readl(c->regbase + GEDR_OFFSET);
+			gedr = __raw_readl(c->regbase + PXA_GEDR);
 			gedr = gedr & c->irq_mask;
-			__raw_writel(gedr, c->regbase + GEDR_OFFSET);
+			__raw_writel(gedr, c->regbase + PXA_GEDR);
 
 			n = find_first_bit(&gedr, BITS_PER_LONG);
 			while (n < BITS_PER_LONG) {
@@ -339,7 +376,7 @@ static void pxa_ack_muxed_gpio(struct irq_data *d)
 	int gpio = pxa_irq_to_gpio(d->irq);
 	struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
-	__raw_writel(PXA_GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
+	__raw_writel(PXA_GPIO_bit(gpio), c->regbase + PXA_GEDR);
 }
 
 static void pxa_mask_muxed_gpio(struct irq_data *d)
@@ -350,10 +387,10 @@ static void pxa_mask_muxed_gpio(struct irq_data *d)
 
 	c->irq_mask &= ~PXA_GPIO_bit(gpio);
 
-	grer = __raw_readl(c->regbase + GRER_OFFSET) & ~PXA_GPIO_bit(gpio);
-	gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~PXA_GPIO_bit(gpio);
-	__raw_writel(grer, c->regbase + GRER_OFFSET);
-	__raw_writel(gfer, c->regbase + GFER_OFFSET);
+	grer = __raw_readl(c->regbase + PXA_GRER) & ~PXA_GPIO_bit(gpio);
+	gfer = __raw_readl(c->regbase + PXA_GFER) & ~PXA_GPIO_bit(gpio);
+	__raw_writel(grer, c->regbase + PXA_GRER);
+	__raw_writel(gfer, c->regbase + PXA_GFER);
 }
 
 static void pxa_unmask_muxed_gpio(struct irq_data *d)
@@ -433,15 +470,7 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)
 					   "gpio_virtual_base");
 	if (!res)
 		return -EINVAL;
-	pxa_gpio_regs.gplr = res->start + GPLR_OFFSET;
-	pxa_gpio_regs.gpdr = res->start + GPDR_OFFSET;
-	pxa_gpio_regs.gpsr = res->start + GPSR_OFFSET;
-	pxa_gpio_regs.gpcr = res->start + GPCR_OFFSET;
-	pxa_gpio_regs.grer = res->start + GRER_OFFSET;
-	pxa_gpio_regs.gfer = res->start + GFER_OFFSET;
-	pxa_gpio_regs.gedr = res->start + GEDR_OFFSET;
-	pxa_gpio_regs.gafr = res->start + GAFR_OFFSET;
-	pxa_gpio_regs.ed_mask = res->start + ED_MASK_OFFSET;
+	pxa_gpio_regbase = (void __iomem *)res->start;
 
 	if (irq0 > 0)
 		gpio_offset = 2;
@@ -458,12 +487,12 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)
 
 	/* clear all GPIO edge detects */
 	for_each_gpio_chip(gpio, c) {
-		__raw_writel(0, c->regbase + GFER_OFFSET);
-		__raw_writel(0, c->regbase + GRER_OFFSET);
-		__raw_writel(~0,c->regbase + GEDR_OFFSET);
+		__raw_writel(0, c->regbase + PXA_GFER);
+		__raw_writel(0, c->regbase + PXA_GRER);
+		__raw_writel(~0,c->regbase + PXA_GEDR);
 #ifdef CONFIG_ARCH_MMP
 		/* unmask GPIO edge detect for AP side */
-		__raw_writel(~0,c->regbase + ED_MASK_OFFSET);
+		__raw_writel(~0,c->regbase + PXA_ED_MASK);
 #endif
 	}
 
@@ -513,13 +542,13 @@ static int pxa_gpio_suspend(void)
 	int gpio;
 
 	for_each_gpio_chip(gpio, c) {
-		c->saved_gplr = __raw_readl(c->regbase + GPLR_OFFSET);
-		c->saved_gpdr = __raw_readl(c->regbase + GPDR_OFFSET);
-		c->saved_grer = __raw_readl(c->regbase + GRER_OFFSET);
-		c->saved_gfer = __raw_readl(c->regbase + GFER_OFFSET);
+		c->saved_gplr = __raw_readl(c->regbase + PXA_GPLR);
+		c->saved_gpdr = __raw_readl(c->regbase + PXA_GPDR);
+		c->saved_grer = __raw_readl(c->regbase + PXA_GRER);
+		c->saved_gfer = __raw_readl(c->regbase + PXA_GFER);
 
 		/* Clear GPIO transition detect bits */
-		__raw_writel(0xffffffff, c->regbase + GEDR_OFFSET);
+		__raw_writel(0xffffffff, c->regbase + PXA_GEDR);
 	}
 	return 0;
 }
@@ -531,12 +560,12 @@ static void pxa_gpio_resume(void)
 
 	for_each_gpio_chip(gpio, c) {
 		/* restore level with set/clear */
-		__raw_writel( c->saved_gplr, c->regbase + GPSR_OFFSET);
-		__raw_writel(~c->saved_gplr, c->regbase + GPCR_OFFSET);
+		__raw_writel( c->saved_gplr, c->regbase + PXA_GPSR);
+		__raw_writel(~c->saved_gplr, c->regbase + PXA_GPCR);
 
-		__raw_writel(c->saved_grer, c->regbase + GRER_OFFSET);
-		__raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET);
-		__raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET);
+		__raw_writel(c->saved_grer, c->regbase + PXA_GRER);
+		__raw_writel(c->saved_gfer, c->regbase + PXA_GFER);
+		__raw_writel(c->saved_gpdr, c->regbase + PXA_GPDR);
 	}
 }
 #else
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
index dd47850..3f655da 100644
--- a/include/linux/gpio-pxa.h
+++ b/include/linux/gpio-pxa.h
@@ -3,20 +3,6 @@
 
 #include <linux/kernel.h>
 
-struct irq_data;
-
-struct pxa_gpio_regs {
-	u32	gplr;
-	u32	gpdr;
-	u32	gpsr;
-	u32	gpcr;
-	u32	grer;
-	u32	gfer;
-	u32	gedr;
-	u32	gafr;
-	u32	ed_mask;
-};
-
 /*
  * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
  * one set of registers. The register offsets are organized below:
@@ -35,39 +21,22 @@ struct pxa_gpio_regs {
  *   BANK 4 and 5 are only available on PXA935
  */
 
-#define PXA_BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
 
-#define PXA_GPIO_BANK(n)	(pxa_gpio_regs.gplr + PXA_BANK_OFF(n))
 #define PXA_GPIO_bit(x)		(1 << ((x) & 0x1f))
 #define pxa_gpio_to_bank(gpio)	((gpio) >> 5)
 
 
-/* GPIO Pin Level Registers */
-#define PXA_GPLR(x)	(*(volatile u32 *)(pxa_gpio_regs.gplr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Pin Direction Registers */
-#define PXA_GPDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpdr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Pin Output Set Registers */
-#define PXA_GPSR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpsr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Pin Output Clear Registers */
-#define PXA_GPCR(x)	(*(volatile u32 *)(pxa_gpio_regs.gpcr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Rising Edge Detect Registers */
-#define PXA_GRER(x)	(*(volatile u32 *)(pxa_gpio_regs.grer	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Falling Edge Detect Registers */
-#define PXA_GFER(x)	(*(volatile u32 *)(pxa_gpio_regs.gfer	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Edge Detect Status Registers */
-#define PXA_GEDR(x)	(*(volatile u32 *)(pxa_gpio_regs.gedr	\
-			+ PXA_BANK_OFF((x >> 5))))
-/* GPIO Alternate Function Select Registers */
-#define PXA_GAFR(x)	(*(volatile u32 *)(pxa_gpio_regs.gafr	\
-			+ (((x) & 0x70) >> 2)))
-
-extern struct pxa_gpio_regs pxa_gpio_regs;
+enum pxa_gpios {
+	PXA_GPLR = 0x00,	/* GPIO Pin Level Registers */
+	PXA_GPDR = 0x0C,	/* GPIO Pin Direction Registers */
+	PXA_GPSR = 0x18,	/* GPIO Pin Output Set Registers */
+	PXA_GPCR = 0x24,	/* GPIO Pin Output Clear Registers */
+	PXA_GRER = 0x30,	/* GPIO Rising Edge Detect Registers */
+	PXA_GFER = 0x3C,	/* GPIO Falling Edge Detect Registers */
+	PXA_GEDR = 0x48,	/* GPIO Edge Detect Status Registers */
+	PXA_GAFR = 0x54,	/* GPIO Alternate Function Select Registers */
+	PXA_ED_MASK = 0x9C,	/* GPIO edge detection for AP side */
+};
 
 /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
  * Those cases currently cause holes in the GPIO number space, the
@@ -75,8 +44,17 @@ extern struct pxa_gpio_regs pxa_gpio_regs;
  */
 extern int pxa_last_gpio;
 
-typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
-
 extern int pxa_irq_to_gpio(int irq);
 
+extern unsigned int pxa_gpio_pin_get(enum pxa_gpios reg, unsigned int gpio);
+
+extern void pxa_gpio_pin_set(enum pxa_gpios reg, unsigned int gpio);
+
+extern void pxa_gpio_pin_clear(enum pxa_gpios reg, unsigned int gpio);
+
+extern unsigned int pxa_gpio_bank_read(enum pxa_gpios reg, unsigned int bank);
+
+extern void pxa_gpio_bank_write(enum pxa_gpios reg, unsigned int value,
+				unsigned int bank);
+
 #endif /* __GPIO_PXA_H */
-- 
1.7.2.5

^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c
  2011-10-13  4:07 ` [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c Haojian Zhuang
@ 2011-10-13 15:42   ` Arnd Bergmann
  2011-10-14  6:17     ` Eric Miao
  0 siblings, 1 reply; 25+ messages in thread
From: Arnd Bergmann @ 2011-10-13 15:42 UTC (permalink / raw)
  To: linux-arm-kernel

On Thursday 13 October 2011, Haojian Zhuang wrote:
> Move macro like PXA_GPLR(). Use pxa_gpio_bank_read()/pxa_gpio_bank_write()
> instead. And append pxa_gpio_pin_get()/ pxa_gpio_pin_set() /
> pxa_gpio_pin_clear() for operation on single GPIO pin.
> 
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>

Thanks, reading the patch I understand much more about the background of
how things are done in the gpio-pxa driver, but it also raises a few
more points:

> @@ -90,7 +91,8 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
>  {
>  	int is_resume = 0;
>  
> -	dev_dbg(sharpsl_pm.dev, "PXA_GPLR0 = %x,%x\n", PXA_GPLR(0), PEDR);
> +	dev_dbg(sharpsl_pm.dev, "PXA_GPLR0 = %x,%x\n",
> +		pxa_gpio_bank_read(PXA_GPLR, 0), PEDR);
>  
>  	if ((PEDR & PXA_GPIO_bit(CORGI_GPIO_AC_IN))) {
>  		if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
> @@ -124,15 +126,18 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
>  
>  static unsigned long corgi_charger_wakeup(void)
>  {
> -	return ~PXA_GPLR(CORGI_GPIO_AC_IN) & ( PXA_GPIO_bit(CORGI_GPIO_AC_IN)
> -		| PXA_GPIO_bit(CORGI_GPIO_KEY_INT) | PXA_GPIO_bit(CORGI_GPIO_WAKEUP) );
> +	unsigned long ret;
> +	ret = pxa_gpio_pin_get(PXA_GPLR, CORGI_GPIO_AC_IN)
> +		| pxa_gpio_pin_get(PXA_GPLR, CORGI_GPIO_KEY_INT)
> +		| pxa_gpio_pin_get(PXA_GPLR, CORGI_GPIO_WAKEUP);
> +	return !ret;
>  }

Having code like this in the platform code suggests that there is still
something wrong: it would be much better if the platform could rely on
the generic GPIO API functions and not directly call functions from the
device driver. However, fixing this could become a larger effort and
the cleanups you do are definitely moving in the right direction,
so I'd say this can be left for another time. Maybe you could add a
FIXME comment here as a reminder.

>  	switch (gpio_type) {
>  	case PXA25X_GPIO:
>  	case PXA26X_GPIO:
>  	case PXA27X_GPIO:
> -		af = (PXA_GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
> -		dir = PXA_GPDR(gpio) & PXA_GPIO_bit(gpio);
> +		bank = pxa_gpio_to_bank(gpio);
> +		data = readl_relaxed(pxa_gpio_regbase + PXA_GAFR
> +			+ PXA_BANK_OFF(bank));
> +		af = (data >> ((gpio & 0xf) * 2)) & 0x3;
> +		data = readl_relaxed(pxa_gpio_regbase + PXA_GPDR
> +			+ PXA_BANK_OFF(bank));
> +		dir = pxa_gpio_pin_get(PXA_GPDR, gpio);

This looks much safer than before. I would have used the pxa_gpio_bank_read
function here to encapsulate the address computation, but that is just a
matter of personal preference, not of correctness.

> @@ -169,12 +206,12 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
>  
>  	spin_lock_irqsave(&gpio_lock, flags);
>  
> -	value = __raw_readl(base + GPDR_OFFSET);
> +	value = __raw_readl(base + PXA_GPDR);
>  	if (__gpio_is_inverted(chip->base + offset))
>  		value |= mask;
>  	else
>  		value &= ~mask;
> -	__raw_writel(value, base + GPDR_OFFSET);
> +	__raw_writel(value, base + PXA_GPDR);
>  
>  	spin_unlock_irqrestore(&gpio_lock, flags);
>  	return 0;

It would be better to convert all MMIO accesses to
readl_relaxed/writel_relaxed here. There is no strice need to do that
yet, but since you are touching these lines anyway, just use the
preferred interface. Same for all the other locations.

Note that according to the definition of the __raw MMIO accessors, the
acess is allowed to leaks outside of the spinlock, although that does
not currently happen on ARM AFAIK.

> +enum pxa_gpios {
> +	PXA_GPLR = 0x00,	/* GPIO Pin Level Registers */
> +	PXA_GPDR = 0x0C,	/* GPIO Pin Direction Registers */
> +	PXA_GPSR = 0x18,	/* GPIO Pin Output Set Registers */
> +	PXA_GPCR = 0x24,	/* GPIO Pin Output Clear Registers */
> +	PXA_GRER = 0x30,	/* GPIO Rising Edge Detect Registers */
> +	PXA_GFER = 0x3C,	/* GPIO Falling Edge Detect Registers */
> +	PXA_GEDR = 0x48,	/* GPIO Edge Detect Status Registers */
> +	PXA_GAFR = 0x54,	/* GPIO Alternate Function Select Registers */
> +	PXA_ED_MASK = 0x9C,	/* GPIO edge detection for AP side */
> +};
>  
>  /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
>   * Those cases currently cause holes in the GPIO number space, the
> @@ -75,8 +44,17 @@ extern struct pxa_gpio_regs pxa_gpio_regs;
>   */
>  extern int pxa_last_gpio;
>  
> -typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
> -
>  extern int pxa_irq_to_gpio(int irq);
>  
> +extern unsigned int pxa_gpio_pin_get(enum pxa_gpios reg, unsigned int gpio);
> +
> +extern void pxa_gpio_pin_set(enum pxa_gpios reg, unsigned int gpio);
> +
> +extern void pxa_gpio_pin_clear(enum pxa_gpios reg, unsigned int gpio);
> +
> +extern unsigned int pxa_gpio_bank_read(enum pxa_gpios reg, unsigned int bank);
> +
> +extern void pxa_gpio_bank_write(enum pxa_gpios reg, unsigned int value,
> +				unsigned int bank);

Unfortunately, it seems that you still need to keep the header file around
because of the way it's used by the platform code. Again, I would suggest
adding a comment in the header explaining that this is not actually the
desired situation.

	Arnd

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c
  2011-10-13 15:42   ` Arnd Bergmann
@ 2011-10-14  6:17     ` Eric Miao
  2011-10-14  9:13       ` Haojian Zhuang
  0 siblings, 1 reply; 25+ messages in thread
From: Eric Miao @ 2011-10-14  6:17 UTC (permalink / raw)
  To: linux-arm-kernel

>
>> +enum pxa_gpios {
>> + ? ? PXA_GPLR = 0x00, ? ? ? ?/* GPIO Pin Level Registers */
>> + ? ? PXA_GPDR = 0x0C, ? ? ? ?/* GPIO Pin Direction Registers */
>> + ? ? PXA_GPSR = 0x18, ? ? ? ?/* GPIO Pin Output Set Registers */
>> + ? ? PXA_GPCR = 0x24, ? ? ? ?/* GPIO Pin Output Clear Registers */
>> + ? ? PXA_GRER = 0x30, ? ? ? ?/* GPIO Rising Edge Detect Registers */
>> + ? ? PXA_GFER = 0x3C, ? ? ? ?/* GPIO Falling Edge Detect Registers */
>> + ? ? PXA_GEDR = 0x48, ? ? ? ?/* GPIO Edge Detect Status Registers */
>> + ? ? PXA_GAFR = 0x54, ? ? ? ?/* GPIO Alternate Function Select Registers */
>> + ? ? PXA_ED_MASK = 0x9C, ? ? /* GPIO edge detection for AP side */
>> +};

And Haojian,

Is this is completely for the GPIO driver's internal use, I'd prefer to
use GPxR names directly, instead of prefixing it with PXA_, that's a
bit ugly from my picky point of view.

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c
  2011-10-14  6:17     ` Eric Miao
@ 2011-10-14  9:13       ` Haojian Zhuang
  2011-10-14  9:15         ` Eric Miao
  0 siblings, 1 reply; 25+ messages in thread
From: Haojian Zhuang @ 2011-10-14  9:13 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Oct 14, 2011 at 2:17 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
>>
>>> +enum pxa_gpios {
>>> + ? ? PXA_GPLR = 0x00, ? ? ? ?/* GPIO Pin Level Registers */
>>> + ? ? PXA_GPDR = 0x0C, ? ? ? ?/* GPIO Pin Direction Registers */
>>> + ? ? PXA_GPSR = 0x18, ? ? ? ?/* GPIO Pin Output Set Registers */
>>> + ? ? PXA_GPCR = 0x24, ? ? ? ?/* GPIO Pin Output Clear Registers */
>>> + ? ? PXA_GRER = 0x30, ? ? ? ?/* GPIO Rising Edge Detect Registers */
>>> + ? ? PXA_GFER = 0x3C, ? ? ? ?/* GPIO Falling Edge Detect Registers */
>>> + ? ? PXA_GEDR = 0x48, ? ? ? ?/* GPIO Edge Detect Status Registers */
>>> + ? ? PXA_GAFR = 0x54, ? ? ? ?/* GPIO Alternate Function Select Registers */
>>> + ? ? PXA_ED_MASK = 0x9C, ? ? /* GPIO edge detection for AP side */
>>> +};
>
> And Haojian,
>
> Is this is completely for the GPIO driver's internal use, I'd prefer to
> use GPxR names directly, instead of prefixing it with PXA_, that's a
> bit ugly from my picky point of view.
>

OK, I'll GPxR directly. And I'll keep PXA_GPIO_bit() to avoid
potential name issue.

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c
  2011-10-14  9:13       ` Haojian Zhuang
@ 2011-10-14  9:15         ` Eric Miao
  2011-10-14 15:34           ` Arnd Bergmann
  0 siblings, 1 reply; 25+ messages in thread
From: Eric Miao @ 2011-10-14  9:15 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Oct 14, 2011 at 5:13 PM, Haojian Zhuang
<haojian.zhuang@gmail.com> wrote:
> On Fri, Oct 14, 2011 at 2:17 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
>>>
>>>> +enum pxa_gpios {
>>>> + ? ? PXA_GPLR = 0x00, ? ? ? ?/* GPIO Pin Level Registers */
>>>> + ? ? PXA_GPDR = 0x0C, ? ? ? ?/* GPIO Pin Direction Registers */
>>>> + ? ? PXA_GPSR = 0x18, ? ? ? ?/* GPIO Pin Output Set Registers */
>>>> + ? ? PXA_GPCR = 0x24, ? ? ? ?/* GPIO Pin Output Clear Registers */
>>>> + ? ? PXA_GRER = 0x30, ? ? ? ?/* GPIO Rising Edge Detect Registers */
>>>> + ? ? PXA_GFER = 0x3C, ? ? ? ?/* GPIO Falling Edge Detect Registers */
>>>> + ? ? PXA_GEDR = 0x48, ? ? ? ?/* GPIO Edge Detect Status Registers */
>>>> + ? ? PXA_GAFR = 0x54, ? ? ? ?/* GPIO Alternate Function Select Registers */
>>>> + ? ? PXA_ED_MASK = 0x9C, ? ? /* GPIO edge detection for AP side */
>>>> +};
>>
>> And Haojian,
>>
>> Is this is completely for the GPIO driver's internal use, I'd prefer to
>> use GPxR names directly, instead of prefixing it with PXA_, that's a
>> bit ugly from my picky point of view.
>>
>
> OK, I'll GPxR directly. And I'll keep PXA_GPIO_bit() to avoid
> potential name issue.
>

I think GPIO_bit() is just fine if it's only used in gpio-pxa.c. I do
prefer to have PXA_* prefixes as less as possible unless absolutely
necessary.

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c
  2011-10-14  9:15         ` Eric Miao
@ 2011-10-14 15:34           ` Arnd Bergmann
  0 siblings, 0 replies; 25+ messages in thread
From: Arnd Bergmann @ 2011-10-14 15:34 UTC (permalink / raw)
  To: linux-arm-kernel

On Friday 14 October 2011, Eric Miao wrote:
> On Fri, Oct 14, 2011 at 5:13 PM, Haojian Zhuang
> <haojian.zhuang@gmail.com> wrote:
> > On Fri, Oct 14, 2011 at 2:17 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
> >>>
> >>>> +enum pxa_gpios {
> >>>> +     PXA_GPLR = 0x00,        /* GPIO Pin Level Registers */
> >>>> +     PXA_GPDR = 0x0C,        /* GPIO Pin Direction Registers */
> >>>> +     PXA_GPSR = 0x18,        /* GPIO Pin Output Set Registers */
> >>>> +     PXA_GPCR = 0x24,        /* GPIO Pin Output Clear Registers */
> >>>> +     PXA_GRER = 0x30,        /* GPIO Rising Edge Detect Registers */
> >>>> +     PXA_GFER = 0x3C,        /* GPIO Falling Edge Detect Registers */
> >>>> +     PXA_GEDR = 0x48,        /* GPIO Edge Detect Status Registers */
> >>>> +     PXA_GAFR = 0x54,        /* GPIO Alternate Function Select Registers */
> >>>> +     PXA_ED_MASK = 0x9C,     /* GPIO edge detection for AP side */
> >>>> +};
> >>
> >> And Haojian,
> >>
> >> Is this is completely for the GPIO driver's internal use, I'd prefer to
> >> use GPxR names directly, instead of prefixing it with PXA_, that's a
> >> bit ugly from my picky point of view.

It's not entirely internal to the driver, but internal to pxa specific code
including a few of the board files.

> > OK, I'll GPxR directly. And I'll keep PXA_GPIO_bit() to avoid
> > potential name issue.
> >
> 
> I think GPIO_bit() is just fine if it's only used in gpio-pxa.c. I do
> prefer to have PXA_* prefixes as less as possible unless absolutely
> necessary.

I think I would prefer the PXA_* prefix (or even PXA_GPIO_*) as long as
the constants are used outside of the driver implementation, as a
reminder that these uses should eventually disappear, at least after
all the pxa board files have been converted into device tree descriptions
and the pxa_gpio driver itself knows how to set up the gpio lines for
a given board.

	Arnd

^ permalink raw reply	[flat|nested] 25+ messages in thread

end of thread, other threads:[~2011-10-14 19:42 UTC | newest]

Thread overview: 25+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-10-13  4:06 [PATCH v4 0/8] Clean gpio in arch-pxa and arch-mmp Haojian Zhuang
2011-10-13  4:06 ` [PATCH v4 1/8] ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQ Haojian Zhuang
2011-10-13 19:07   ` Grant Likely
2011-10-13  4:06 ` [PATCH v4 2/8] ARM: pxa: use chained interrupt for GPIO0 and GPIO1 Haojian Zhuang
2011-10-13 19:07   ` Grant Likely
2011-10-13  4:07 ` [PATCH v4 3/8] ARM: pxa: rename gpio_to_irq and irq_to_gpio Haojian Zhuang
2011-10-13 19:18   ` Grant Likely
2011-10-14  8:27     ` Haojian Zhuang
2011-10-14  8:35       ` Eric Miao
2011-10-14  8:40         ` Haojian Zhuang
2011-10-13  4:07 ` [PATCH v4 4/8] ARM: pxa: rename NR_BUILTIN_GPIO Haojian Zhuang
2011-10-13 19:19   ` Grant Likely
2011-10-13  4:07 ` [PATCH v4 5/8] ARM: pxa: change gpio driver to platform driver Haojian Zhuang
2011-10-13 19:22   ` Grant Likely
2011-10-14 19:42     ` Russell King - ARM Linux
2011-10-13  4:07 ` [PATCH v4 6/8] ARM: pxa: move gpio-pxa.h into include directory Haojian Zhuang
2011-10-13 19:24   ` Grant Likely
2011-10-13  4:07 ` [PATCH v4 7/8] ARM: pxa: add clk support in gpio driver Haojian Zhuang
2011-10-13 19:26   ` Grant Likely
2011-10-13  4:07 ` [PATCH v4 8/8] ARM: pxa: move macros into gpio-pxa.c Haojian Zhuang
2011-10-13 15:42   ` Arnd Bergmann
2011-10-14  6:17     ` Eric Miao
2011-10-14  9:13       ` Haojian Zhuang
2011-10-14  9:15         ` Eric Miao
2011-10-14 15:34           ` Arnd Bergmann

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