From: dave.martin@linaro.org (Dave Martin)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] Add condition code checking to SWP emulation handler.
Date: Wed, 30 Nov 2011 17:01:48 +0000 [thread overview]
Message-ID: <20111130170148.GH2045@localhost.localdomain> (raw)
In-Reply-To: <20111125171947.14878.76518.stgit@localhost6.localdomain6>
On Fri, Nov 25, 2011 at 05:19:53PM +0000, Leif Lindholm wrote:
> This patch fixes two separate issues with the SWP emulation handler:
> 1: Certain processors implementing ARMv7-A can (legally) take an
> undef exception even when the condition code would have meant that
> the instruction should not have been executed.
> 2: Opcodes with all flags set (condition code = 0xf) have been reused
> in recent, and not-so-recent, versions of the ARM architecture to
> implement unconditional extensions to the instruction set. The
> existing code would still have processed any undefs triggered by
> executing an opcode with such a value.
>
> This patch uses the new generic ARM instruction set condition code
> checks to implement proper handling of these situations.
>
> Signed-off-by: Leif Lindholm <leif.lindholm@arm.com>
> ---
> arch/arm/kernel/swp_emulate.c | 14 ++++++++++++++
> 1 files changed, 14 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
> index 5f452f8..8629bf7 100644
> --- a/arch/arm/kernel/swp_emulate.c
> +++ b/arch/arm/kernel/swp_emulate.c
> @@ -25,6 +25,7 @@
> #include <linux/syscalls.h>
> #include <linux/perf_event.h>
>
> +#include <asm/opcodes.h>
> #include <asm/traps.h>
> #include <asm/uaccess.h>
>
> @@ -185,6 +186,19 @@ static int swp_handler(struct pt_regs *regs, unsigned int instr)
>
> perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
>
> + res = arm_check_condition(instr, regs->ARM_cpsr);
> + switch (res) {
> + case ARM_OPCODE_CONDTEST_FAIL: {
> + /* Condition failed - return to next instruction */
> + regs->ARM_pc += 4;
> + return 0;
> + } break;
> + case ARM_OPCODE_CONDTEST_UNCOND: {
> + /* If unconditional encoding - not a SWP, undef */
> + return -EFAULT;
> + } break;
> + }
> +
Can we lose the extra { } inside the switch here?
Those cases contain no declarations, so there's no need for a nested
block in either case. This also solves the indentation problem.
Documentation/CodingStyle appears to prefer an unconditional break; to
be indented flush with the contents of the case block that it ends.
Cheers
---Dave
next prev parent reply other threads:[~2011-11-30 17:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-25 17:19 [PATCH 0/4] Add generic ARM ISA condition code checks Leif Lindholm
2011-11-25 17:19 ` [PATCH 1/4] Add generic ARM instruction set " Leif Lindholm
2011-11-25 17:38 ` Dave Martin
2011-11-30 16:59 ` Dave Martin
2011-11-25 17:19 ` [PATCH 2/4] Use generic ARM instruction set condition code checks for nwfpe Leif Lindholm
2011-11-25 17:19 ` [PATCH 3/4] Add condition code checking to SWP emulation handler Leif Lindholm
2011-11-30 17:01 ` Dave Martin [this message]
2011-11-25 17:20 ` [PATCH 4/4] Use generic ARM instruction set condition code checks for kprobes Leif Lindholm
2011-11-27 12:24 ` Tixy
2011-11-30 17:02 ` Dave Martin
-- strict thread matches above, loose matches on Subject: below --
2011-12-08 17:31 [PATCH 0/4] Add generic ARM ISA condition code check Leif Lindholm
2011-12-08 17:32 ` [PATCH 3/4] Add condition code checking to SWP emulation handler Leif Lindholm
2011-12-09 16:06 ` Will Deacon
2011-12-09 18:54 [PATCH 0/4] Add generic ARM ISA condition code check v3 Leif Lindholm
2011-12-09 18:54 ` [PATCH 3/4] Add condition code checking to SWP emulation handler Leif Lindholm
2011-12-10 13:22 ` Will Deacon
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