[PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Heiko Stübner]

Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
variances when compared to the existing types.

This series adds support for those SoCs.

As with the ADC patches, these changes where tested on S3C2416 hardware.
The S3C2443 quirks are a subset of those and are done according to the
datasheet, but not tested on real hardware (as I do not own a S3C2443 device).

changes since v1:
address comments from Thomas Abraham, reducing number of ifdefs and
duplicate code


Heiko Stuebner (4):
  ARM: SAMSUNG: cleanup of rtc register definitions
  rtc-s3c: make room for more variants in devicetree block
  rtc-s3c: add variants for S3C2443 and S3C2416
  ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   92 +++++++++++++++---------
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++
 drivers/rtc/rtc-s3c.c                         |   74 ++++++++++++++++----
 5 files changed, 149 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h

-- 
1.7.5.4

[PATCH 1/4] ARM: SAMSUNG: cleanup of rtc register definitions

[Heiko Stübner]

regs-rtc.h uses a mixture of tabs and spaces and also (x<<y)
to format bits. So, before adding new stuff clean up the formatting
and also add spaces to the bit definitions (i.e. (x << y) )

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   66 ++++++++++++-------------
 1 files changed, 32 insertions(+), 34 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index 30b7cc1..d9d9bdc 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -18,51 +18,49 @@
 #define S3C2410_INTP_ALM	(1 << 1)
 #define S3C2410_INTP_TIC	(1 << 0)
 
-#define S3C2410_RTCCON	      S3C2410_RTCREG(0x40)
-#define S3C2410_RTCCON_RTCEN  (1<<0)
-#define S3C2410_RTCCON_CLKSEL (1<<1)
-#define S3C2410_RTCCON_CNTSEL (1<<2)
-#define S3C2410_RTCCON_CLKRST (1<<3)
-#define S3C64XX_RTCCON_TICEN  (1<<8)
+#define S3C2410_RTCCON		S3C2410_RTCREG(0x40)
+#define S3C2410_RTCCON_RTCEN	(1 << 0)
+#define S3C2410_RTCCON_CLKSEL	(1 << 1)
+#define S3C2410_RTCCON_CNTSEL	(1 << 2)
+#define S3C2410_RTCCON_CLKRST	(1 << 3)
+#define S3C64XX_RTCCON_TICEN	(1 << 8)
 
-#define S3C64XX_RTCCON_TICMSK (0xF<<7)
-#define S3C64XX_RTCCON_TICSHT (7)
+#define S3C64XX_RTCCON_TICMSK	(0xF << 7)
+#define S3C64XX_RTCCON_TICSHT	(7)
 
-#define S3C2410_TICNT	      S3C2410_RTCREG(0x44)
-#define S3C2410_TICNT_ENABLE  (1<<7)
+#define S3C2410_TICNT		S3C2410_RTCREG(0x44)
+#define S3C2410_TICNT_ENABLE	(1 << 7)
 
-#define S3C2410_RTCALM	      S3C2410_RTCREG(0x50)
-#define S3C2410_RTCALM_ALMEN  (1<<6)
-#define S3C2410_RTCALM_YEAREN (1<<5)
-#define S3C2410_RTCALM_MONEN  (1<<4)
-#define S3C2410_RTCALM_DAYEN  (1<<3)
-#define S3C2410_RTCALM_HOUREN (1<<2)
-#define S3C2410_RTCALM_MINEN  (1<<1)
-#define S3C2410_RTCALM_SECEN  (1<<0)
+#define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
+#define S3C2410_RTCALM_ALMEN	(1 << 6)
+#define S3C2410_RTCALM_YEAREN	(1 << 5)
+#define S3C2410_RTCALM_MONEN	(1 << 4)
+#define S3C2410_RTCALM_DAYEN	(1 << 3)
+#define S3C2410_RTCALM_HOUREN	(1 << 2)
+#define S3C2410_RTCALM_MINEN	(1 << 1)
+#define S3C2410_RTCALM_SECEN	(1 << 0)
 
 #define S3C2410_RTCALM_ALL \
   S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
   S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
   S3C2410_RTCALM_SECEN
 
+#define S3C2410_ALMSEC		S3C2410_RTCREG(0x54)
+#define S3C2410_ALMMIN		S3C2410_RTCREG(0x58)
+#define S3C2410_ALMHOUR		S3C2410_RTCREG(0x5c)
 
-#define S3C2410_ALMSEC	      S3C2410_RTCREG(0x54)
-#define S3C2410_ALMMIN	      S3C2410_RTCREG(0x58)
-#define S3C2410_ALMHOUR	      S3C2410_RTCREG(0x5c)
+#define S3C2410_ALMDATE		S3C2410_RTCREG(0x60)
+#define S3C2410_ALMMON		S3C2410_RTCREG(0x64)
+#define S3C2410_ALMYEAR		S3C2410_RTCREG(0x68)
 
-#define S3C2410_ALMDATE	      S3C2410_RTCREG(0x60)
-#define S3C2410_ALMMON	      S3C2410_RTCREG(0x64)
-#define S3C2410_ALMYEAR	      S3C2410_RTCREG(0x68)
-
-#define S3C2410_RTCRST	      S3C2410_RTCREG(0x6c)
-
-#define S3C2410_RTCSEC	      S3C2410_RTCREG(0x70)
-#define S3C2410_RTCMIN	      S3C2410_RTCREG(0x74)
-#define S3C2410_RTCHOUR	      S3C2410_RTCREG(0x78)
-#define S3C2410_RTCDATE	      S3C2410_RTCREG(0x7c)
-#define S3C2410_RTCDAY	      S3C2410_RTCREG(0x80)
-#define S3C2410_RTCMON	      S3C2410_RTCREG(0x84)
-#define S3C2410_RTCYEAR	      S3C2410_RTCREG(0x88)
+#define S3C2410_RTCRST		S3C2410_RTCREG(0x6c)
 
+#define S3C2410_RTCSEC		S3C2410_RTCREG(0x70)
+#define S3C2410_RTCMIN		S3C2410_RTCREG(0x74)
+#define S3C2410_RTCHOUR		S3C2410_RTCREG(0x78)
+#define S3C2410_RTCDATE		S3C2410_RTCREG(0x7c)
+#define S3C2410_RTCDAY		S3C2410_RTCREG(0x80)
+#define S3C2410_RTCMON		S3C2410_RTCREG(0x84)
+#define S3C2410_RTCYEAR		S3C2410_RTCREG(0x88)
 
 #endif /* __ASM_ARCH_REGS_RTC_H */
-- 
1.7.5.4

[PATCH 1/4] ARM: SAMSUNG: cleanup of rtc register definitions

[Kukjin Kim]

Heiko St?bner wrote:
> 
> regs-rtc.h uses a mixture of tabs and spaces and also (x<<y)
> to format bits. So, before adding new stuff clean up the formatting
> and also add spaces to the bit definitions (i.e. (x << y) )
> 
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  arch/arm/plat-samsung/include/plat/regs-rtc.h |   66
++++++++++++---------
> ----
>  1 files changed, 32 insertions(+), 34 deletions(-)
> 
> diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h
> b/arch/arm/plat-samsung/include/plat/regs-rtc.h
> index 30b7cc1..d9d9bdc 100644
> --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
> +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
> @@ -18,51 +18,49 @@
>  #define S3C2410_INTP_ALM	(1 << 1)
>  #define S3C2410_INTP_TIC	(1 << 0)
> 
> -#define S3C2410_RTCCON	      S3C2410_RTCREG(0x40)
> -#define S3C2410_RTCCON_RTCEN  (1<<0)
> -#define S3C2410_RTCCON_CLKSEL (1<<1)
> -#define S3C2410_RTCCON_CNTSEL (1<<2)
> -#define S3C2410_RTCCON_CLKRST (1<<3)
> -#define S3C64XX_RTCCON_TICEN  (1<<8)
> +#define S3C2410_RTCCON		S3C2410_RTCREG(0x40)
> +#define S3C2410_RTCCON_RTCEN	(1 << 0)
> +#define S3C2410_RTCCON_CLKSEL	(1 << 1)
> +#define S3C2410_RTCCON_CNTSEL	(1 << 2)
> +#define S3C2410_RTCCON_CLKRST	(1 << 3)
> +#define S3C64XX_RTCCON_TICEN	(1 << 8)
> 
> -#define S3C64XX_RTCCON_TICMSK (0xF<<7)
> -#define S3C64XX_RTCCON_TICSHT (7)
> +#define S3C64XX_RTCCON_TICMSK	(0xF << 7)
> +#define S3C64XX_RTCCON_TICSHT	(7)
> 
> -#define S3C2410_TICNT	      S3C2410_RTCREG(0x44)
> -#define S3C2410_TICNT_ENABLE  (1<<7)
> +#define S3C2410_TICNT		S3C2410_RTCREG(0x44)
> +#define S3C2410_TICNT_ENABLE	(1 << 7)
> 
> -#define S3C2410_RTCALM	      S3C2410_RTCREG(0x50)
> -#define S3C2410_RTCALM_ALMEN  (1<<6)
> -#define S3C2410_RTCALM_YEAREN (1<<5)
> -#define S3C2410_RTCALM_MONEN  (1<<4)
> -#define S3C2410_RTCALM_DAYEN  (1<<3)
> -#define S3C2410_RTCALM_HOUREN (1<<2)
> -#define S3C2410_RTCALM_MINEN  (1<<1)
> -#define S3C2410_RTCALM_SECEN  (1<<0)
> +#define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
> +#define S3C2410_RTCALM_ALMEN	(1 << 6)
> +#define S3C2410_RTCALM_YEAREN	(1 << 5)
> +#define S3C2410_RTCALM_MONEN	(1 << 4)
> +#define S3C2410_RTCALM_DAYEN	(1 << 3)
> +#define S3C2410_RTCALM_HOUREN	(1 << 2)
> +#define S3C2410_RTCALM_MINEN	(1 << 1)
> +#define S3C2410_RTCALM_SECEN	(1 << 0)
> 
>  #define S3C2410_RTCALM_ALL \
>    S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
>    S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
>    S3C2410_RTCALM_SECEN
> 
> +#define S3C2410_ALMSEC		S3C2410_RTCREG(0x54)
> +#define S3C2410_ALMMIN		S3C2410_RTCREG(0x58)
> +#define S3C2410_ALMHOUR		S3C2410_RTCREG(0x5c)
> 
> -#define S3C2410_ALMSEC	      S3C2410_RTCREG(0x54)
> -#define S3C2410_ALMMIN	      S3C2410_RTCREG(0x58)
> -#define S3C2410_ALMHOUR	      S3C2410_RTCREG(0x5c)
> +#define S3C2410_ALMDATE		S3C2410_RTCREG(0x60)
> +#define S3C2410_ALMMON		S3C2410_RTCREG(0x64)
> +#define S3C2410_ALMYEAR		S3C2410_RTCREG(0x68)
> 
> -#define S3C2410_ALMDATE	      S3C2410_RTCREG(0x60)
> -#define S3C2410_ALMMON	      S3C2410_RTCREG(0x64)
> -#define S3C2410_ALMYEAR	      S3C2410_RTCREG(0x68)
> -
> -#define S3C2410_RTCRST	      S3C2410_RTCREG(0x6c)
> -
> -#define S3C2410_RTCSEC	      S3C2410_RTCREG(0x70)
> -#define S3C2410_RTCMIN	      S3C2410_RTCREG(0x74)
> -#define S3C2410_RTCHOUR	      S3C2410_RTCREG(0x78)
> -#define S3C2410_RTCDATE	      S3C2410_RTCREG(0x7c)
> -#define S3C2410_RTCDAY	      S3C2410_RTCREG(0x80)
> -#define S3C2410_RTCMON	      S3C2410_RTCREG(0x84)
> -#define S3C2410_RTCYEAR	      S3C2410_RTCREG(0x88)
> +#define S3C2410_RTCRST		S3C2410_RTCREG(0x6c)
> 
> +#define S3C2410_RTCSEC		S3C2410_RTCREG(0x70)
> +#define S3C2410_RTCMIN		S3C2410_RTCREG(0x74)
> +#define S3C2410_RTCHOUR		S3C2410_RTCREG(0x78)
> +#define S3C2410_RTCDATE		S3C2410_RTCREG(0x7c)
> +#define S3C2410_RTCDAY		S3C2410_RTCREG(0x80)
> +#define S3C2410_RTCMON		S3C2410_RTCREG(0x84)
> +#define S3C2410_RTCYEAR		S3C2410_RTCREG(0x88)
> 
>  #endif /* __ASM_ARCH_REGS_RTC_H */
> --
> 1.7.5.4

Looks good to me, but how about cleanup useless definitions together like
following?

Actually, S3C2410_RTCCON_CLKSEL, S3C64XX_RTCCON_TICMSK,
S3C64XX_RTCCON_TICSHT, S3C2410_RTCALM_ALL, S3C2410_RTCRST and S3C2410_RTCDAY
are not used.

And I'm not sure we really need to define the S3C2410_RTCREG(x), but this
can be sorted out next time with similar others.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 2/4] rtc-s3c: make room for more variants in devicetree block

[Heiko Stübner]

Use the data field of of_device_id to hold the type for
s3c_cpu_type.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 drivers/rtc/rtc-s3c.c |   31 ++++++++++++++++++++++---------
 1 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 175067a..2885b25 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -428,6 +428,20 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev)
 	return 0;
 }
 
+static const struct of_device_id s3c_rtc_dt_match[];
+
+static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
+{
+#ifdef CONFIG_OF
+	if (pdev->dev.of_node) {
+		const struct of_device_id *match;
+		match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
+		return match->data;
+	}
+#endif
+	return platform_get_device_id(pdev)->driver_data;
+}
+
 static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 {
 	struct rtc_device *rtc;
@@ -508,13 +522,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 		goto err_nortc;
 	}
 
-#ifdef CONFIG_OF
-	if (pdev->dev.of_node)
-		s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node,
-			"samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410;
-	else
-#endif
-		s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
+	s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
 
 	/* Check RTC Time */
 
@@ -638,8 +646,13 @@ static int s3c_rtc_resume(struct platform_device *pdev)
 
 #ifdef CONFIG_OF
 static const struct of_device_id s3c_rtc_dt_match[] = {
-	{ .compatible = "samsung,s3c2410-rtc" },
-	{ .compatible = "samsung,s3c6410-rtc" },
+	{
+		.compatible = "samsung,s3c2410-rtc"
+		.data = TYPE_S3C2410,
+	}, {
+		.compatible = "samsung,s3c6410-rtc"
+		.data = TYPE_S3C64XX,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
-- 
1.7.5.4

[PATCH 3/4] rtc-s3c: add variants for S3C2443 and S3C2416

[Heiko Stübner]

Especially the TICNT registers are different from the two rtc types
that currently exists.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   24 ++++++++++++++
 drivers/rtc/rtc-s3c.c                         |   43 ++++++++++++++++++++++--
 2 files changed, 63 insertions(+), 4 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index d9d9bdc..fa6066a 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -23,14 +23,33 @@
 #define S3C2410_RTCCON_CLKSEL	(1 << 1)
 #define S3C2410_RTCCON_CNTSEL	(1 << 2)
 #define S3C2410_RTCCON_CLKRST	(1 << 3)
+#define S3C2443_RTCCON_TICSEL	(1 << 4)
 #define S3C64XX_RTCCON_TICEN	(1 << 8)
 
 #define S3C64XX_RTCCON_TICMSK	(0xF << 7)
 #define S3C64XX_RTCCON_TICSHT	(7)
 
+#define S3C2416_RTCCON_TICMSK	(0x1F << 7)
+
 #define S3C2410_TICNT		S3C2410_RTCREG(0x44)
 #define S3C2410_TICNT_ENABLE	(1 << 7)
 
+/* S3C2443: tick count is 15 bit wide
+ * TICNT[6:0] contains upper 7 bits
+ * TICNT1[7:0] contains lower 8 bits
+ */
+#define S3C2443_TICNT_PART(x)	((x & 0x7f00) >> 8)
+#define S3C2443_TICNT1		S3C2410_RTCREG(0x4C)
+#define S3C2443_TICNT1_PART(x)	(x & 0xff)
+
+/* S3C2416: tick count is 32 bit wide
+ * TICNT[6:0] contains bits [14:8]
+ * TICNT1[7:0] contains lower 8 bits
+ * TICNT2[16:0] contains upper 17 bits
+ */
+#define S3C2416_TICNT2		S3C2410_RTCREG(0x48)
+#define S3C2416_TICNT2_PART(x)	((x & 0xffff8000) >> 15)
+
 #define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
 #define S3C2410_RTCALM_ALMEN	(1 << 6)
 #define S3C2410_RTCALM_YEAREN	(1 << 5)
@@ -63,4 +82,9 @@
 #define S3C2410_RTCMON		S3C2410_RTCREG(0x84)
 #define S3C2410_RTCYEAR		S3C2410_RTCREG(0x88)
 
+#define S3C2443_TICKCNT		S3C2410_RTCREG(0x90)
+
+#define S3C2443_RTCLBAT		S3C2410_RTCREG(0x94)
+#define S3C2443_RTCLBAT_CLEAR	(1 << 0)
+
 #endif /* __ASM_ARCH_REGS_RTC_H */
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 2885b25..4498053 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -35,6 +35,8 @@
 
 enum s3c_cpu_type {
 	TYPE_S3C2410,
+	TYPE_S3C2443,
+	TYPE_S3C2416,
 	TYPE_S3C64XX,
 };
 
@@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 	struct platform_device *pdev = to_platform_device(dev);
 	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
 	unsigned int tmp = 0;
+	int val;
 
 	if (!is_power_of_2(freq))
 		return -EINVAL;
@@ -139,12 +142,24 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 	clk_enable(rtc_clk);
 	spin_lock_irq(&s3c_rtc_pie_lock);
 
-	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+	if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
 		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
 		tmp &= S3C2410_TICNT_ENABLE;
 	}
 
-	tmp |= (rtc_dev->max_user_freq / freq)-1;
+	val = (rtc_dev->max_user_freq / freq) - 1;
+
+	if (s3c_rtc_cpu_type == TYPE_S3C2443 ||
+	    s3c_rtc_cpu_type == TYPE_S3C2416) {
+		tmp |= S3C2443_TICNT_PART(val);
+		writel(S3C2443_TICNT1_PART(val),
+		       s3c_rtc_base + S3C2443_TICNT1);
+		if (s3c_rtc_cpu_type == TYPE_S3C2416)
+			writel(S3C2416_TICNT2_PART(val),
+			       s3c_rtc_base + S3C2416_TICNT2);
+	} else {
+		tmp |= val;
+	}
 
 	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
 	spin_unlock_irq(&s3c_rtc_pie_lock);
@@ -371,7 +386,7 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
 		tmp &= ~S3C2410_RTCCON_RTCEN;
 		writew(tmp, base + S3C2410_RTCCON);
 
-		if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+		if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
 			tmp = readb(base + S3C2410_TICNT);
 			tmp &= ~S3C2410_TICNT_ENABLE;
 			writeb(tmp, base + S3C2410_TICNT);
@@ -448,6 +463,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 	struct rtc_time rtc_tm;
 	struct resource *res;
 	int ret;
+	int tmp;
 
 	pr_debug("%s: probe=%p\n", __func__, pdev);
 
@@ -541,11 +557,18 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 		dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
 	}
 
-	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
+	if (s3c_rtc_cpu_type != TYPE_S3C2410)
 		rtc->max_user_freq = 32768;
 	else
 		rtc->max_user_freq = 128;
 
+	if (s3c_rtc_cpu_type == TYPE_S3C2443 ||
+	     s3c_rtc_cpu_type == TYPE_S3C2416) {
+		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
+		tmp |= S3C2443_RTCCON_TICSEL;
+		writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
+	}
+
 	platform_set_drvdata(pdev, rtc);
 
 	s3c_rtc_setfreq(&pdev->dev, 1);
@@ -650,6 +673,12 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
 		.compatible = "samsung,s3c2410-rtc"
 		.data = TYPE_S3C2410,
 	}, {
+		.compatible = "samsung,s3c2443-rtc"
+		.data = TYPE_S3C2443,
+	}, {
+		.compatible = "samsung,s3c2416-rtc"
+		.data = TYPE_S3C2416,
+	}, {
 		.compatible = "samsung,s3c6410-rtc"
 		.data = TYPE_S3C64XX,
 	},
@@ -665,6 +694,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = {
 		.name		= "s3c2410-rtc",
 		.driver_data	= TYPE_S3C2410,
 	}, {
+		.name		= "s3c2443-rtc",
+		.driver_data	= TYPE_S3C2443,
+	}, {
+		.name		= "s3c2416-rtc",
+		.driver_data	= TYPE_S3C2416,
+	}, {
 		.name		= "s3c64xx-rtc",
 		.driver_data	= TYPE_S3C64XX,
 	},
-- 
1.7.5.4

[PATCH 4/4] ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

[Heiko Stübner]

As the S3C24xx SoCs use the same rtc device a renaming capability like in
the adc driver is necessary.

This patch adds a s3c_rtc_setname function and names the rtc devices for
S3C2443 and S3C2416 accordingly.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++++++++++++++++++++
 3 files changed, 31 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h

diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index ee214bc..604cf98 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -61,6 +61,7 @@
 #include <plat/fb-core.h>
 #include <plat/nand-core.h>
 #include <plat/adc-core.h>
+#include <plat/rtc-core.h>
 
 static struct map_desc s3c2416_iodesc[] __initdata = {
 	IODESC_ENT(WATCHDOG),
@@ -99,6 +100,7 @@ int __init s3c2416_init(void)
 	s3c_fb_setname("s3c2443-fb");
 
 	s3c_adc_setname("s3c2416-adc");
+	s3c_rtc_setname("s3c2416-rtc");
 
 #ifdef CONFIG_PM
 	register_syscore_ops(&s3c2416_pm_syscore_ops);
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index a22b771..9e6be20 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -42,6 +42,7 @@
 #include <plat/fb-core.h>
 #include <plat/nand-core.h>
 #include <plat/adc-core.h>
+#include <plat/rtc-core.h>
 
 static struct map_desc s3c2443_iodesc[] __initdata = {
 	IODESC_ENT(WATCHDOG),
@@ -72,6 +73,7 @@ int __init s3c2443_init(void)
 	s3c_fb_setname("s3c2443-fb");
 
 	s3c_adc_setname("s3c2443-adc");
+	s3c_rtc_setname("s3c2443-rtc");
 
 	/* change WDT IRQ number */
 	s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
diff --git a/arch/arm/plat-samsung/include/plat/rtc-core.h b/arch/arm/plat-samsung/include/plat/rtc-core.h
new file mode 100644
index 0000000..21d8594
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/rtc-core.h
@@ -0,0 +1,27 @@
+/* linux/arch/arm/plat-samsung/include/plat/rtc-core.h
+ *
+ * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de>
+ *
+ * Samsung RTC Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_RTC_CORE_H
+#define __ASM_PLAT_RTC_CORE_H __FILE__
+
+/* These functions are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void s3c_rtc_setname(char *name)
+{
+#if defined(CONFIG_SAMSUNG_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX)
+	s3c_device_rtc.name = name;
+#endif
+}
+
+#endif /* __ASM_PLAT_RTC_CORE_H */
-- 
1.7.5.4

[PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Kukjin Kim]

Heiko St?bner wrote:
> 
> Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
> variances when compared to the existing types.
> 
> This series adds support for those SoCs.
> 
> As with the ADC patches, these changes where tested on S3C2416 hardware.
> The S3C2443 quirks are a subset of those and are done according to the
> datasheet, but not tested on real hardware (as I do not own a S3C2443
> device).
> 
> changes since v1:
> address comments from Thomas Abraham, reducing number of ifdefs and
> duplicate code
> 
> 
> Heiko Stuebner (4):
>   ARM: SAMSUNG: cleanup of rtc register definitions
>   rtc-s3c: make room for more variants in devicetree block
>   rtc-s3c: add variants for S3C2443 and S3C2416
>   ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices
> 
>  arch/arm/mach-s3c2416/s3c2416.c               |    2 +
>  arch/arm/mach-s3c2443/s3c2443.c               |    2 +
>  arch/arm/plat-samsung/include/plat/regs-rtc.h |   92
+++++++++++++++------
> ---
>  arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++
>  drivers/rtc/rtc-s3c.c                         |   74 ++++++++++++++++----
>  5 files changed, 149 insertions(+), 48 deletions(-)
>  create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h
> 
> --
> 1.7.5.4

Hi Heiko,

There were small comments on 1st patch and others looks ok to me.
If you're ok on my comments, please re-send it so that I can request to pull
this series to Alessandro or Andrew with my ack.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Heiko Stübner]

Am Mittwoch, 21. Dezember 2011, 08:25:53 schrieb Kukjin Kim:
> Heiko St?bner wrote:
> > Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
> > variances when compared to the existing types.
> > 
> > This series adds support for those SoCs.
> > 
> > As with the ADC patches, these changes where tested on S3C2416 hardware.
> > The S3C2443 quirks are a subset of those and are done according to the
> > datasheet, but not tested on real hardware (as I do not own a S3C2443
> > device).
> > 
> > changes since v1:
> > address comments from Thomas Abraham, reducing number of ifdefs and
> > duplicate code
> > 
> > Heiko Stuebner (4):
> >   ARM: SAMSUNG: cleanup of rtc register definitions
> >   rtc-s3c: make room for more variants in devicetree block
> >   rtc-s3c: add variants for S3C2443 and S3C2416
> >   ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices
> >  
> >  arch/arm/mach-s3c2416/s3c2416.c               |    2 +
> >  arch/arm/mach-s3c2443/s3c2443.c               |    2 +
> >  arch/arm/plat-samsung/include/plat/regs-rtc.h |   92
> 
> +++++++++++++++------
> 
> > ---
> > 
> >  arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++
> >  drivers/rtc/rtc-s3c.c                         |   74
> >  ++++++++++++++++---- 5 files changed, 149 insertions(+), 48
> >  deletions(-)
> >  create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h
> > 
> > --
> > 1.7.5.4
> 
> Hi Heiko,
> 
> There were small comments on 1st patch and others looks ok to me.
> If you're ok on my comments, please re-send it so that I can request to
> pull this series to Alessandro or Andrew with my ack.

I'm on it now. 

Who is Andrew and should I include him in the recipients? I only found 
Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking any 
comment from the rtc-side until now.

Heiko

[rtc-linux] Re: [PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Mark Brown]

On Wed, Dec 21, 2011 at 09:22:11AM +0100, Heiko St?bner wrote:
> Am Mittwoch, 21. Dezember 2011, 08:25:53 schrieb Kukjin Kim:

> > There were small comments on 1st patch and others looks ok to me.
> > If you're ok on my comments, please re-send it so that I can request to
> > pull this series to Alessandro or Andrew with my ack.

> Who is Andrew and should I include him in the recipients? I only found 
> Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking any 
> comment from the rtc-side until now.

Andrew Morton.  Alessandro hasn't been terribly active for a while now.

[rtc-linux] Re: [PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Alessandro Zummo]

On Fri, 23 Dec 2011 11:43:00 +0000
Mark Brown <broonie@opensource.wolfsonmicro.com> wrote:

> > Who is Andrew and should I include him in the recipients? I only found 
> > Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking any 
> > comment from the rtc-side until now.  
> 
> Andrew Morton.  Alessandro hasn't been terribly active for a while now.

 But I'm still keeping an eye on the patches ;)

-- 

 Best regards,

 Alessandro Zummo,
  Tower Technologies - Torino, Italy

  http://www.towertech.it

[rtc-linux] Re: [PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Kukjin Kim]

Alessandro Zummo wrote:
> 
> On Fri, 23 Dec 2011 11:43:00 +0000
> Mark Brown <broonie@opensource.wolfsonmicro.com> wrote:
> 
> > > Who is Andrew and should I include him in the recipients? I only found
> > > Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking
> any
> > > comment from the rtc-side until now.
> >
> > Andrew Morton.  Alessandro hasn't been terribly active for a while now.
> 
>  But I'm still keeping an eye on the patches ;)
> 
Hi Alessandro,

Good to see you again :)

Please check next-samsung-devel-rtc branch in my tree,
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

And if you're ok to send to upstream via samsung tree, please let me know so
that I can add your ack on rtc patches. Of course, if any problems, let me
revert them and they should be re-worked.

As a note, it depends on next-samsung-devel-dt1 which includes support
device tree for Samsung stuff, so I rebased on it.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[rtc-linux] Re: [PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Alessandro Zummo]

On Tue, 27 Dec 2011 09:44:52 +0900
Kukjin Kim <kgene.kim@samsung.com> wrote:

> Please check next-samsung-devel-rtc branch in my tree,
> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
> 
> And if you're ok to send to upstream via samsung tree, please let me know so
> that I can add your ack on rtc patches. Of course, if any problems, let me
> revert them and they should be re-worked.

 Checked. Please send it via samsung tree. I can only visually check the 
 code but don't really know if it works and I guess you are in a better
 position to know ;)

 Acked-by: Alessandro Zummo <a.zummo@towertech.it>

-- 

 Best regards,

 Alessandro Zummo,
  Tower Technologies - Torino, Italy

  http://www.towertech.it

[rtc-linux] Re: [PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Kukjin Kim]

Alessandro Zummo wrote:
> 
> On Tue, 27 Dec 2011 09:44:52 +0900
> Kukjin Kim <kgene.kim@samsung.com> wrote:
> 
> > Please check next-samsung-devel-rtc branch in my tree,
> > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
> >
> > And if you're ok to send to upstream via samsung tree, please let me
> know so
> > that I can add your ack on rtc patches. Of course, if any problems, let
> me
> > revert them and they should be re-worked.
> 
>  Checked. Please send it via samsung tree. I can only visually check the
>  code but don't really know if it works and I guess you are in a better
>  position to know ;)
> 
>  Acked-by: Alessandro Zummo <a.zummo@towertech.it>
> 
Hi Alessandro,

Thanks for your ack.
This series will be sent to upstream via arm-soc tree.

Happy New Year 2012 :)

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH v3 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Heiko Stübner]

Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
variances when compared to the existing types.

This series adds support for those SoCs.

As with the ADC patches, these changes where tested on S3C2416 hardware.
The S3C2443 quirks are a subset of those and are done according to the
datasheet, but not tested on real hardware (as I do not own a S3C2443 device).

changes since v2:
remove obsolete constants in register cleanup

changes since v1:
address comments from Thomas Abraham, reducing number of ifdefs and
duplicate code

Heiko Stuebner (2):
  ARM: SAMSUNG: cleanup of rtc register definitions
  rtc-s3c: make room for more variants in devicetree block
  rtc-s3c: add variants for S3C2443 and S3C2416
  ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   81 +++++++++++++------------
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 ++++++++
 drivers/rtc/rtc-s3c.c                         |   74 +++++++++++++++++++----
 5 files changed, 134 insertions(+), 52 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h

-- 
1.7.5.4

[PATCH 3/4] rtc-s3c: add variants for S3C2443 and S3C2416

[Heiko Stübner]

Especially the TICNT registers are different from the two rtc types
that currently exists.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   17 ++++++++++
 drivers/rtc/rtc-s3c.c                         |   43 ++++++++++++++++++++++--
 2 files changed, 56 insertions(+), 4 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index a7d944f..0f8263e 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -22,11 +22,28 @@
 #define S3C2410_RTCCON_RTCEN	(1 << 0)
 #define S3C2410_RTCCON_CNTSEL	(1 << 2)
 #define S3C2410_RTCCON_CLKRST	(1 << 3)
+#define S3C2443_RTCCON_TICSEL	(1 << 4)
 #define S3C64XX_RTCCON_TICEN	(1 << 8)
 
 #define S3C2410_TICNT		S3C2410_RTCREG(0x44)
 #define S3C2410_TICNT_ENABLE	(1 << 7)
 
+/* S3C2443: tick count is 15 bit wide
+ * TICNT[6:0] contains upper 7 bits
+ * TICNT1[7:0] contains lower 8 bits
+ */
+#define S3C2443_TICNT_PART(x)	((x & 0x7f00) >> 8)
+#define S3C2443_TICNT1		S3C2410_RTCREG(0x4C)
+#define S3C2443_TICNT1_PART(x)	(x & 0xff)
+
+/* S3C2416: tick count is 32 bit wide
+ * TICNT[6:0] contains bits [14:8]
+ * TICNT1[7:0] contains lower 8 bits
+ * TICNT2[16:0] contains upper 17 bits
+ */
+#define S3C2416_TICNT2		S3C2410_RTCREG(0x48)
+#define S3C2416_TICNT2_PART(x)	((x & 0xffff8000) >> 15)
+
 #define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
 #define S3C2410_RTCALM_ALMEN	(1 << 6)
 #define S3C2410_RTCALM_YEAREN	(1 << 5)
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 2885b25..4498053 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -35,6 +35,8 @@
 
 enum s3c_cpu_type {
 	TYPE_S3C2410,
+	TYPE_S3C2443,
+	TYPE_S3C2416,
 	TYPE_S3C64XX,
 };
 
@@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 	struct platform_device *pdev = to_platform_device(dev);
 	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
 	unsigned int tmp = 0;
+	int val;
 
 	if (!is_power_of_2(freq))
 		return -EINVAL;
@@ -139,12 +142,24 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 	clk_enable(rtc_clk);
 	spin_lock_irq(&s3c_rtc_pie_lock);
 
-	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+	if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
 		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
 		tmp &= S3C2410_TICNT_ENABLE;
 	}
 
-	tmp |= (rtc_dev->max_user_freq / freq)-1;
+	val = (rtc_dev->max_user_freq / freq) - 1;
+
+	if (s3c_rtc_cpu_type == TYPE_S3C2443 ||
+	    s3c_rtc_cpu_type == TYPE_S3C2416) {
+		tmp |= S3C2443_TICNT_PART(val);
+		writel(S3C2443_TICNT1_PART(val),
+		       s3c_rtc_base + S3C2443_TICNT1);
+		if (s3c_rtc_cpu_type == TYPE_S3C2416)
+			writel(S3C2416_TICNT2_PART(val),
+			       s3c_rtc_base + S3C2416_TICNT2);
+	} else {
+		tmp |= val;
+	}
 
 	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
 	spin_unlock_irq(&s3c_rtc_pie_lock);
@@ -371,7 +386,7 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
 		tmp &= ~S3C2410_RTCCON_RTCEN;
 		writew(tmp, base + S3C2410_RTCCON);
 
-		if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+		if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
 			tmp = readb(base + S3C2410_TICNT);
 			tmp &= ~S3C2410_TICNT_ENABLE;
 			writeb(tmp, base + S3C2410_TICNT);
@@ -448,6 +463,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 	struct rtc_time rtc_tm;
 	struct resource *res;
 	int ret;
+	int tmp;
 
 	pr_debug("%s: probe=%p\n", __func__, pdev);
 
@@ -541,11 +557,18 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 		dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
 	}
 
-	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
+	if (s3c_rtc_cpu_type != TYPE_S3C2410)
 		rtc->max_user_freq = 32768;
 	else
 		rtc->max_user_freq = 128;
 
+	if (s3c_rtc_cpu_type == TYPE_S3C2443 ||
+	     s3c_rtc_cpu_type == TYPE_S3C2416) {
+		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
+		tmp |= S3C2443_RTCCON_TICSEL;
+		writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
+	}
+
 	platform_set_drvdata(pdev, rtc);
 
 	s3c_rtc_setfreq(&pdev->dev, 1);
@@ -650,6 +673,12 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
 		.compatible = "samsung,s3c2410-rtc"
 		.data = TYPE_S3C2410,
 	}, {
+		.compatible = "samsung,s3c2443-rtc"
+		.data = TYPE_S3C2443,
+	}, {
+		.compatible = "samsung,s3c2416-rtc"
+		.data = TYPE_S3C2416,
+	}, {
 		.compatible = "samsung,s3c6410-rtc"
 		.data = TYPE_S3C64XX,
 	},
@@ -665,6 +694,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = {
 		.name		= "s3c2410-rtc",
 		.driver_data	= TYPE_S3C2410,
 	}, {
+		.name		= "s3c2443-rtc",
+		.driver_data	= TYPE_S3C2443,
+	}, {
+		.name		= "s3c2416-rtc",
+		.driver_data	= TYPE_S3C2416,
+	}, {
 		.name		= "s3c64xx-rtc",
 		.driver_data	= TYPE_S3C64XX,
 	},
-- 
1.7.5.4

[PATCH 2/4] rtc-s3c: make room for more variants in devicetree block

[Heiko Stübner]

Hi Kgene,

Am Mittwoch, 4. Januar 2012, 12:51:41 schrieb Heiko St?bner:
> Hi Sylwester,
> 
> Am Mittwoch, 4. Januar 2012, 11:43:45 schrieb Sylwester Nawrocki:
> > Hello,
> > 
> > On 12/21/2011 10:16 AM, Heiko St?bner wrote:
> > > Use the data field of of_device_id to hold the type for
> > > s3c_cpu_type.
> > > 
> > > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > > Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
> > > ---
> > 
> > This patch makes compilation with CONFIG_OF enabled fail with errors
> > and warnings:
> > 
> > drivers/rtc/rtc-s3c.c: In function ?s3c_rtc_get_driver_data?:
> > drivers/rtc/rtc-s3c.c:454: warning: return makes integer from pointer
> > without a cast
> > drivers/rtc/rtc-s3c.c: At top level:
> > drivers/rtc/rtc-s3c.c:674: error: request for member ?data? in something
> > not a structure or union
> > drivers/rtc/rtc-s3c.c:677: error: request for member ?data? in something
> > not a structure or union
> > drivers/rtc/rtc-s3c.c:680: error: request for member ?data? in something
> > not a structure or union
> > drivers/rtc/rtc-s3c.c:683: error: request for member ?data? in something
> > not a structure or union
> > make[2]: *** [drivers/rtc/rtc-s3c.o] Error 1
> 
> thanks for spotting this.
> 
> @kgene: Should this go on top of the rtc series, or should I prepare a v4
> with these fixes included?
never mind, I did both.

In reply to this mail you will find:
- a single patch on top of the 4 original patches, fixing the problems 
sylwester reported
- a v4 of the original series including the fixes to the problems, based on 
the code that you have in your rtc-branch

Please pick the apropriate variant to fix the problem :-)

Heiko

[PATCH v4 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Heiko Stübner]

Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
variances when compared to the existing types.

This series adds support for those SoCs.

As with the ADC patches, these changes where tested on S3C2416 hardware.
The S3C2443 quirks are a subset of those and are done according to the
datasheet, but not tested on real hardware (as I do not own a S3C2443 device).

changes since v3:
fixes missing "," in s3c_rtc_dt_match and wrong handling of the
of_device_id.data property, as reported-by Sylwester Nawrocki

changes since v2:
remove obsolete constants in register cleanup

changes since v1:
address comments from Thomas Abraham, reducing number of ifdefs and
duplicate code


Heiko Stuebner (4):
  ARM: SAMSUNG: cleanup of rtc register definitions
  rtc-s3c: make room for more variants in devicetree block
  rtc-s3c: add variants for S3C2443 and S3C2416
  ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   81 +++++++++++++------------
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 ++++++++
 drivers/rtc/rtc-s3c.c                         |   71 ++++++++++++++++++----
 5 files changed, 131 insertions(+), 52 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h

-- 
1.7.5.4

[PATCH 3/4] rtc-s3c: add variants for S3C2443 and S3C2416

[Heiko Stübner]

Especially the TICNT registers are different from the two rtc
types that currently exists.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   17 ++++++++++
 drivers/rtc/rtc-s3c.c                         |   40 ++++++++++++++++++++++--
 2 files changed, 53 insertions(+), 4 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index a7d944f..0f8263e 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -22,11 +22,28 @@
 #define S3C2410_RTCCON_RTCEN	(1 << 0)
 #define S3C2410_RTCCON_CNTSEL	(1 << 2)
 #define S3C2410_RTCCON_CLKRST	(1 << 3)
+#define S3C2443_RTCCON_TICSEL	(1 << 4)
 #define S3C64XX_RTCCON_TICEN	(1 << 8)
 
 #define S3C2410_TICNT		S3C2410_RTCREG(0x44)
 #define S3C2410_TICNT_ENABLE	(1 << 7)
 
+/* S3C2443: tick count is 15 bit wide
+ * TICNT[6:0] contains upper 7 bits
+ * TICNT1[7:0] contains lower 8 bits
+ */
+#define S3C2443_TICNT_PART(x)	((x & 0x7f00) >> 8)
+#define S3C2443_TICNT1		S3C2410_RTCREG(0x4C)
+#define S3C2443_TICNT1_PART(x)	(x & 0xff)
+
+/* S3C2416: tick count is 32 bit wide
+ * TICNT[6:0] contains bits [14:8]
+ * TICNT1[7:0] contains lower 8 bits
+ * TICNT2[16:0] contains upper 17 bits
+ */
+#define S3C2416_TICNT2		S3C2410_RTCREG(0x48)
+#define S3C2416_TICNT2_PART(x)	((x & 0xffff8000) >> 15)
+
 #define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
 #define S3C2410_RTCALM_ALMEN	(1 << 6)
 #define S3C2410_RTCALM_YEAREN	(1 << 5)
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index dc0f65e..2b4feb8 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -35,6 +35,8 @@
 
 enum s3c_cpu_type {
 	TYPE_S3C2410,
+	TYPE_S3C2416,
+	TYPE_S3C2443,
 	TYPE_S3C64XX,
 };
 
@@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 	struct platform_device *pdev = to_platform_device(dev);
 	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
 	unsigned int tmp = 0;
+	int val;
 
 	if (!is_power_of_2(freq))
 		return -EINVAL;
@@ -139,12 +142,22 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 	clk_enable(rtc_clk);
 	spin_lock_irq(&s3c_rtc_pie_lock);
 
-	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+	if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
 		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
 		tmp &= S3C2410_TICNT_ENABLE;
 	}
 
-	tmp |= (rtc_dev->max_user_freq / freq)-1;
+	val = (rtc_dev->max_user_freq / freq) - 1;
+
+	if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
+		tmp |= S3C2443_TICNT_PART(val);
+		writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
+
+		if (s3c_rtc_cpu_type == TYPE_S3C2416)
+			writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
+	} else {
+		tmp |= val;
+	}
 
 	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
 	spin_unlock_irq(&s3c_rtc_pie_lock);
@@ -371,7 +384,7 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
 		tmp &= ~S3C2410_RTCCON_RTCEN;
 		writew(tmp, base + S3C2410_RTCCON);
 
-		if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+		if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
 			tmp = readb(base + S3C2410_TICNT);
 			tmp &= ~S3C2410_TICNT_ENABLE;
 			writeb(tmp, base + S3C2410_TICNT);
@@ -448,6 +461,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 	struct rtc_time rtc_tm;
 	struct resource *res;
 	int ret;
+	int tmp;
 
 	pr_debug("%s: probe=%p\n", __func__, pdev);
 
@@ -541,11 +555,17 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 		dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
 	}
 
-	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
+	if (s3c_rtc_cpu_type != TYPE_S3C2410)
 		rtc->max_user_freq = 32768;
 	else
 		rtc->max_user_freq = 128;
 
+	if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
+		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
+		tmp |= S3C2443_RTCCON_TICSEL;
+		writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
+	}
+
 	platform_set_drvdata(pdev, rtc);
 
 	s3c_rtc_setfreq(&pdev->dev, 1);
@@ -650,6 +670,12 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
 		.compatible = "samsung,s3c2410-rtc",
 		.data = (void *)TYPE_S3C2410,
 	}, {
+		.compatible = "samsung,s3c2416-rtc",
+		.data = (void *)TYPE_S3C2416,
+	}, {
+		.compatible = "samsung,s3c2443-rtc",
+		.data = (void *)TYPE_S3C2443,
+	}, {
 		.compatible = "samsung,s3c6410-rtc",
 		.data = (void *)TYPE_S3C64XX,
 	},
@@ -665,6 +691,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = {
 		.name		= "s3c2410-rtc",
 		.driver_data	= TYPE_S3C2410,
 	}, {
+		.name		= "s3c2416-rtc",
+		.driver_data	= TYPE_S3C2416,
+	}, {
+		.name		= "s3c2443-rtc",
+		.driver_data	= TYPE_S3C2443,
+	}, {
 		.name		= "s3c64xx-rtc",
 		.driver_data	= TYPE_S3C64XX,
 	},
-- 
1.7.5.4

[PATCH 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

[Heiko Stübner]

Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
variances when compared to the existing types.

This series adds support for those SoCs.

As with the ADC patches, these changes where tested on S3C2416 hardware.
The S3C2443 quirks are a subset of those and are done according to the
datasheet, but not tested on real hardware (as I do not own a S3C2443 device).

I'm also not sure if my changes to the devicetree block in patch 2 are
correct, so I would be really happy if someone could take a closer look
at them.

Heiko Stuebner (4):
  ARM: SAMSUNG: cleanup of rtc register definitions
  rtc-s3c: make room for more variants in devicetree block
  rtc-s3c: add variants for S3C2443 and S3C2416
  ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   92 +++++++++++++++---------
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++
 drivers/rtc/rtc-s3c.c                         |   71 ++++++++++++++++---
 5 files changed, 149 insertions(+), 45 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h

-- 
1.7.5.4

[PATCH 3/4] rtc-s3c: add variants for S3C2443 and S3C2416

[Heiko Stübner]

Especially the TICNT registers are different from the two rtc types
that currently exists.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   24 +++++++++++++
 drivers/rtc/rtc-s3c.c                         |   44 ++++++++++++++++++++++--
 2 files changed, 64 insertions(+), 4 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index d9d9bdc..fa6066a 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -23,14 +23,33 @@
 #define S3C2410_RTCCON_CLKSEL	(1 << 1)
 #define S3C2410_RTCCON_CNTSEL	(1 << 2)
 #define S3C2410_RTCCON_CLKRST	(1 << 3)
+#define S3C2443_RTCCON_TICSEL	(1 << 4)
 #define S3C64XX_RTCCON_TICEN	(1 << 8)
 
 #define S3C64XX_RTCCON_TICMSK	(0xF << 7)
 #define S3C64XX_RTCCON_TICSHT	(7)
 
+#define S3C2416_RTCCON_TICMSK	(0x1F << 7)
+
 #define S3C2410_TICNT		S3C2410_RTCREG(0x44)
 #define S3C2410_TICNT_ENABLE	(1 << 7)
 
+/* S3C2443: tick count is 15 bit wide
+ * TICNT[6:0] contains upper 7 bits
+ * TICNT1[7:0] contains lower 8 bits
+ */
+#define S3C2443_TICNT_PART(x)	((x & 0x7f00) >> 8)
+#define S3C2443_TICNT1		S3C2410_RTCREG(0x4C)
+#define S3C2443_TICNT1_PART(x)	(x & 0xff)
+
+/* S3C2416: tick count is 32 bit wide
+ * TICNT[6:0] contains bits [14:8]
+ * TICNT1[7:0] contains lower 8 bits
+ * TICNT2[16:0] contains upper 17 bits
+ */
+#define S3C2416_TICNT2		S3C2410_RTCREG(0x48)
+#define S3C2416_TICNT2_PART(x)	((x & 0xffff8000) >> 15)
+
 #define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
 #define S3C2410_RTCALM_ALMEN	(1 << 6)
 #define S3C2410_RTCALM_YEAREN	(1 << 5)
@@ -63,4 +82,9 @@
 #define S3C2410_RTCMON		S3C2410_RTCREG(0x84)
 #define S3C2410_RTCYEAR		S3C2410_RTCREG(0x88)
 
+#define S3C2443_TICKCNT		S3C2410_RTCREG(0x90)
+
+#define S3C2443_RTCLBAT		S3C2410_RTCREG(0x94)
+#define S3C2443_RTCLBAT_CLEAR	(1 << 0)
+
 #endif /* __ASM_ARCH_REGS_RTC_H */
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 71807a6..2a0692e 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -35,6 +35,8 @@
 
 enum s3c_cpu_type {
 	TYPE_S3C2410,
+	TYPE_S3C2443,
+	TYPE_S3C2416,
 	TYPE_S3C64XX,
 };
 
@@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 	struct platform_device *pdev = to_platform_device(dev);
 	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
 	unsigned int tmp = 0;
+	int val;
 
 	if (!is_power_of_2(freq))
 		return -EINVAL;
@@ -139,12 +142,23 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 	clk_enable(rtc_clk);
 	spin_lock_irq(&s3c_rtc_pie_lock);
 
-	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+	if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
 		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
 		tmp &= S3C2410_TICNT_ENABLE;
 	}
 
-	tmp |= (rtc_dev->max_user_freq / freq)-1;
+	val = (rtc_dev->max_user_freq / freq) - 1;
+
+	if (s3c_rtc_cpu_type == TYPE_S3C2443) {
+		tmp |= S3C2443_TICNT_PART(val);
+		writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
+	} else if (s3c_rtc_cpu_type == TYPE_S3C2416) {
+		tmp |= S3C2443_TICNT_PART(val);
+		writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
+		writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
+	} else {
+		tmp |= val;
+	}
 
 	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
 	spin_unlock_irq(&s3c_rtc_pie_lock);
@@ -371,7 +385,9 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
 		tmp &= ~S3C2410_RTCCON_RTCEN;
 		writew(tmp, base + S3C2410_RTCCON);
 
-		if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+		if (s3c_rtc_cpu_type == TYPE_S3C2410 ||
+		    s3c_rtc_cpu_type == TYPE_S3C2443 ||
+		    s3c_rtc_cpu_type == TYPE_S3C2416) {
 			tmp = readb(base + S3C2410_TICNT);
 			tmp &= ~S3C2410_TICNT_ENABLE;
 			writeb(tmp, base + S3C2410_TICNT);
@@ -441,6 +457,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 	const struct of_device_id *match;
 #endif
 	int ret;
+	int tmp;
 
 	pr_debug("%s: probe=%p\n", __func__, pdev);
 
@@ -543,11 +560,18 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 		dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
 	}
 
-	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
+	if (s3c_rtc_cpu_type != TYPE_S3C2410)
 		rtc->max_user_freq = 32768;
 	else
 		rtc->max_user_freq = 128;
 
+	if (s3c_rtc_cpu_type == TYPE_S3C2443 ||
+	     s3c_rtc_cpu_type == TYPE_S3C2416) {
+		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
+		tmp |= S3C2443_RTCCON_TICSEL;
+		writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
+	}
+
 	platform_set_drvdata(pdev, rtc);
 
 	s3c_rtc_setfreq(&pdev->dev, 1);
@@ -652,6 +676,12 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
 		.compatible = "samsung,s3c2410-rtc"
 		.data = TYPE_S3C2410,
 	}, {
+		.compatible = "samsung,s3c2443-rtc"
+		.data = TYPE_S3C2443,
+	}, {
+		.compatible = "samsung,s3c2416-rtc"
+		.data = TYPE_S3C2416,
+	}, {
 		.compatible = "samsung,s3c6410-rtc"
 		.data = TYPE_S3C64XX,
 	},
@@ -667,6 +697,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = {
 		.name		= "s3c2410-rtc",
 		.driver_data	= TYPE_S3C2410,
 	}, {
+		.name		= "s3c2443-rtc",
+		.driver_data	= TYPE_S3C2443,
+	}, {
+		.name		= "s3c2416-rtc",
+		.driver_data	= TYPE_S3C2416,
+	}, {
 		.name		= "s3c64xx-rtc",
 		.driver_data	= TYPE_S3C64XX,
 	},
-- 
1.7.5.4

[PATCH 3/4] rtc-s3c: add variants for S3C2443 and S3C2416

[Thomas Abraham]

On 9 December 2011 15:20, Heiko St?bner <heiko@sntech.de> wrote:
> Especially the TICNT registers are different from the two rtc types
> that currently exists.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> ?arch/arm/plat-samsung/include/plat/regs-rtc.h | ? 24 +++++++++++++
> ?drivers/rtc/rtc-s3c.c ? ? ? ? ? ? ? ? ? ? ? ? | ? 44 ++++++++++++++++++++++--
> ?2 files changed, 64 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
> index d9d9bdc..fa6066a 100644
> --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
> +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
> @@ -23,14 +23,33 @@
> ?#define S3C2410_RTCCON_CLKSEL ?(1 << 1)
> ?#define S3C2410_RTCCON_CNTSEL ?(1 << 2)
> ?#define S3C2410_RTCCON_CLKRST ?(1 << 3)
> +#define S3C2443_RTCCON_TICSEL ?(1 << 4)
> ?#define S3C64XX_RTCCON_TICEN ? (1 << 8)
>
> ?#define S3C64XX_RTCCON_TICMSK ?(0xF << 7)
> ?#define S3C64XX_RTCCON_TICSHT ?(7)
>
> +#define S3C2416_RTCCON_TICMSK ?(0x1F << 7)
> +
> ?#define S3C2410_TICNT ? ? ? ? ?S3C2410_RTCREG(0x44)
> ?#define S3C2410_TICNT_ENABLE ? (1 << 7)
>
> +/* S3C2443: tick count is 15 bit wide
> + * TICNT[6:0] contains upper 7 bits
> + * TICNT1[7:0] contains lower 8 bits
> + */
> +#define S3C2443_TICNT_PART(x) ?((x & 0x7f00) >> 8)
> +#define S3C2443_TICNT1 ? ? ? ? S3C2410_RTCREG(0x4C)
> +#define S3C2443_TICNT1_PART(x) (x & 0xff)
> +
> +/* S3C2416: tick count is 32 bit wide
> + * TICNT[6:0] contains bits [14:8]
> + * TICNT1[7:0] contains lower 8 bits
> + * TICNT2[16:0] contains upper 17 bits
> + */
> +#define S3C2416_TICNT2 ? ? ? ? S3C2410_RTCREG(0x48)
> +#define S3C2416_TICNT2_PART(x) ((x & 0xffff8000) >> 15)
> +
> ?#define S3C2410_RTCALM ? ? ? ? S3C2410_RTCREG(0x50)
> ?#define S3C2410_RTCALM_ALMEN ? (1 << 6)
> ?#define S3C2410_RTCALM_YEAREN ?(1 << 5)
> @@ -63,4 +82,9 @@
> ?#define S3C2410_RTCMON ? ? ? ? S3C2410_RTCREG(0x84)
> ?#define S3C2410_RTCYEAR ? ? ? ? ? ? ? ?S3C2410_RTCREG(0x88)
>
> +#define S3C2443_TICKCNT ? ? ? ? ? ? ? ?S3C2410_RTCREG(0x90)
> +
> +#define S3C2443_RTCLBAT ? ? ? ? ? ? ? ?S3C2410_RTCREG(0x94)
> +#define S3C2443_RTCLBAT_CLEAR ?(1 << 0)
> +
> ?#endif /* __ASM_ARCH_REGS_RTC_H */
> diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
> index 71807a6..2a0692e 100644
> --- a/drivers/rtc/rtc-s3c.c
> +++ b/drivers/rtc/rtc-s3c.c
> @@ -35,6 +35,8 @@
>
> ?enum s3c_cpu_type {
> ? ? ? ?TYPE_S3C2410,
> + ? ? ? TYPE_S3C2443,
> + ? ? ? TYPE_S3C2416,
> ? ? ? ?TYPE_S3C64XX,
> ?};
>
> @@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
> ? ? ? ?struct platform_device *pdev = to_platform_device(dev);
> ? ? ? ?struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
> ? ? ? ?unsigned int tmp = 0;
> + ? ? ? int val;
>
> ? ? ? ?if (!is_power_of_2(freq))
> ? ? ? ? ? ? ? ?return -EINVAL;
> @@ -139,12 +142,23 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
> ? ? ? ?clk_enable(rtc_clk);
> ? ? ? ?spin_lock_irq(&s3c_rtc_pie_lock);
>
> - ? ? ? if (s3c_rtc_cpu_type == TYPE_S3C2410) {
> + ? ? ? if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
> ? ? ? ? ? ? ? ?tmp = readb(s3c_rtc_base + S3C2410_TICNT);
> ? ? ? ? ? ? ? ?tmp &= S3C2410_TICNT_ENABLE;
> ? ? ? ?}
>
> - ? ? ? tmp |= (rtc_dev->max_user_freq / freq)-1;
> + ? ? ? val = (rtc_dev->max_user_freq / freq) - 1;
> +
> + ? ? ? if (s3c_rtc_cpu_type == TYPE_S3C2443) {
> + ? ? ? ? ? ? ? tmp |= S3C2443_TICNT_PART(val);
> + ? ? ? ? ? ? ? writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
> + ? ? ? } else if (s3c_rtc_cpu_type == TYPE_S3C2416) {
> + ? ? ? ? ? ? ? tmp |= S3C2443_TICNT_PART(val);
> + ? ? ? ? ? ? ? writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
> + ? ? ? ? ? ? ? writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
> + ? ? ? } else {
> + ? ? ? ? ? ? ? tmp |= val;
> + ? ? ? }

Can this be changed to:

if (s3c_rtc_cpu_type == TYPE_S3C2443 || (s3c_rtc_cpu_type == TYPE_S3C2416) {
       tmp |= S3C2443_TICNT_PART(val);
       writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
       if (s3c_rtc_cpu_type == TYPE_S3C2416)
                writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
} else {
      tmp |= val;
}

>
> ? ? ? ?writel(tmp, s3c_rtc_base + S3C2410_TICNT);
> ? ? ? ?spin_unlock_irq(&s3c_rtc_pie_lock);
> @@ -371,7 +385,9 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
> ? ? ? ? ? ? ? ?tmp &= ~S3C2410_RTCCON_RTCEN;
> ? ? ? ? ? ? ? ?writew(tmp, base + S3C2410_RTCCON);
>
> - ? ? ? ? ? ? ? if (s3c_rtc_cpu_type == TYPE_S3C2410) {
> + ? ? ? ? ? ? ? if (s3c_rtc_cpu_type == TYPE_S3C2410 ||
> + ? ? ? ? ? ? ? ? ? s3c_rtc_cpu_type == TYPE_S3C2443 ||
> + ? ? ? ? ? ? ? ? ? s3c_rtc_cpu_type == TYPE_S3C2416) {
> ? ? ? ? ? ? ? ? ? ? ? ?tmp = readb(base + S3C2410_TICNT);
> ? ? ? ? ? ? ? ? ? ? ? ?tmp &= ~S3C2410_TICNT_ENABLE;
> ? ? ? ? ? ? ? ? ? ? ? ?writeb(tmp, base + S3C2410_TICNT);
> @@ -441,6 +457,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
> ? ? ? ?const struct of_device_id *match;
> ?#endif
> ? ? ? ?int ret;
> + ? ? ? int tmp;
>
> ? ? ? ?pr_debug("%s: probe=%p\n", __func__, pdev);
>
> @@ -543,11 +560,18 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
> ? ? ? ? ? ? ? ?dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
> ? ? ? ?}
>
> - ? ? ? if (s3c_rtc_cpu_type == TYPE_S3C64XX)
> + ? ? ? if (s3c_rtc_cpu_type != TYPE_S3C2410)
> ? ? ? ? ? ? ? ?rtc->max_user_freq = 32768;
> ? ? ? ?else
> ? ? ? ? ? ? ? ?rtc->max_user_freq = 128;
>
> + ? ? ? if (s3c_rtc_cpu_type == TYPE_S3C2443 ||
> + ? ? ? ? ? ?s3c_rtc_cpu_type == TYPE_S3C2416) {
> + ? ? ? ? ? ? ? tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
> + ? ? ? ? ? ? ? tmp |= S3C2443_RTCCON_TICSEL;
> + ? ? ? ? ? ? ? writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
> + ? ? ? }
> +
> ? ? ? ?platform_set_drvdata(pdev, rtc);
>
> ? ? ? ?s3c_rtc_setfreq(&pdev->dev, 1);
> @@ -652,6 +676,12 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
> ? ? ? ? ? ? ? ?.compatible = "samsung,s3c2410-rtc"
> ? ? ? ? ? ? ? ?.data = TYPE_S3C2410,
> ? ? ? ?}, {
> + ? ? ? ? ? ? ? .compatible = "samsung,s3c2443-rtc"
> + ? ? ? ? ? ? ? .data = TYPE_S3C2443,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .compatible = "samsung,s3c2416-rtc"
> + ? ? ? ? ? ? ? .data = TYPE_S3C2416,
> + ? ? ? }, {
> ? ? ? ? ? ? ? ?.compatible = "samsung,s3c6410-rtc"
> ? ? ? ? ? ? ? ?.data = TYPE_S3C64XX,
> ? ? ? ?},
> @@ -667,6 +697,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = {
> ? ? ? ? ? ? ? ?.name ? ? ? ? ? = "s3c2410-rtc",
> ? ? ? ? ? ? ? ?.driver_data ? ?= TYPE_S3C2410,
> ? ? ? ?}, {
> + ? ? ? ? ? ? ? .name ? ? ? ? ? = "s3c2443-rtc",
> + ? ? ? ? ? ? ? .driver_data ? ?= TYPE_S3C2443,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .name ? ? ? ? ? = "s3c2416-rtc",
> + ? ? ? ? ? ? ? .driver_data ? ?= TYPE_S3C2416,
> + ? ? ? }, {
> ? ? ? ? ? ? ? ?.name ? ? ? ? ? = "s3c64xx-rtc",
> ? ? ? ? ? ? ? ?.driver_data ? ?= TYPE_S3C64XX,
> ? ? ? ?},
> --
> 1.7.5.4

Reviewed device tree related changes in this patch.

Regards,
Thomas.

>
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