From: jamie@jamieiles.com (Jamie Iles)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] ARM: picoxcell: don't reserve irq_descs
Date: Mon, 12 Dec 2011 23:03:10 +0000 [thread overview]
Message-ID: <20111212230310.GA2616@gallagher> (raw)
In-Reply-To: <4EE682AA.2020700@gmail.com>
Hi Rob,
On Mon, Dec 12, 2011 at 04:39:38PM -0600, Rob Herring wrote:
> On 12/12/2011 03:46 PM, Jamie Iles wrote:
> > All irq_desc's are now dynamically allocated so we don't need to
> > statically reserve them.
> >
> > Signed-off-by: Jamie Iles <jamie@jamieiles.com>
> > ---
> > arch/arm/mach-picoxcell/common.c | 1 -
> > arch/arm/mach-picoxcell/include/mach/irqs.h | 9 ++-------
> > 2 files changed, 2 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
> > index ad871bd..7d91165 100644
> > --- a/arch/arm/mach-picoxcell/common.c
> > +++ b/arch/arm/mach-picoxcell/common.c
> > @@ -45,7 +45,6 @@ static void __init picoxcell_init_irq(void)
> >
> > DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
> > .map_io = picoxcell_map_io,
> > - .nr_irqs = ARCH_NR_IRQS,
>
> You should probably should set this to NR_IRQS_LEGACY (16) to skip irq 0
> and ISA irqs.
OK, that seems reasonable. This platform won't ever have ISA support
but I guess it's still worth it?
> > .init_irq = picoxcell_init_irq,
> > .handle_irq = vic_handle_irq,
> > .timer = &picoxcell_timer,
> > diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h
> > index 4d13ed9..59eac1e 100644
> > --- a/arch/arm/mach-picoxcell/include/mach/irqs.h
> > +++ b/arch/arm/mach-picoxcell/include/mach/irqs.h
> > @@ -1,8 +1,6 @@
> > /*
> > * Copyright (c) 2011 Picochip Ltd., Jamie Iles
> > *
> > - * This file contains the hardware definitions of the picoXcell SoC devices.
> > - *
> > * This program is free software; you can redistribute it and/or modify
> > * it under the terms of the GNU General Public License as published by
> > * the Free Software Foundation; either version 2 of the License, or
> > @@ -16,10 +14,7 @@
> > #ifndef __MACH_IRQS_H
> > #define __MACH_IRQS_H
> >
> > -#define ARCH_NR_IRQS 64
> > -#define NR_IRQS (128 + ARCH_NR_IRQS)
> > -
> > -#define IRQ_VIC0_BASE 0
> > -#define IRQ_VIC1_BASE 32
> > +/* We dynamically allocate our irq_desc's. */
> > +#define NR_IRQS 0
>
> Are you selecting SPARSE_IRQ?
Not in the patch, but I did have it enabled locally. I'll respin this
patch to select SPARSE_IRQ for picoxcell.
Thanks,
Jamie
next prev parent reply other threads:[~2011-12-12 23:03 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-12 21:46 [PATCH 0/5] Misc picoxcell features for 3.3 Jamie Iles
2011-12-12 21:46 ` [PATCH 1/5] ARM: picoxcell: remove mach/memory.h Jamie Iles
2011-12-12 21:46 ` [PATCH 2/5] ARM: picoxcell: don't reserve irq_descs Jamie Iles
2011-12-12 22:39 ` Rob Herring
2011-12-12 23:03 ` Jamie Iles [this message]
2011-12-12 21:46 ` [PATCH 3/5] ARM: picoxcell: move io mappings to common.c Jamie Iles
2011-12-12 21:46 ` [PATCH 4/5] MAINTAINERS: add maintainer entry for Picochip picoxcell Jamie Iles
2011-12-12 22:28 ` Joe Perches
2011-12-12 23:05 ` Jamie Iles
2011-12-12 21:46 ` [PATCH 5/5] ARM: picoxcell: implement watchdog restart Jamie Iles
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